faculty.psau.edu.sa · web viewchapter 5synchronous sequential logic introduction: sequential...
TRANSCRIPT
Chapter 5
Synchronous Sequential Logic
Introduction:
Sequential circuits employ storage elements in addition to logic gates.
The outputs of a sequential circuit depend on present values of
inputs, and past inputs.
In Bloch diagram the
combinational circuit with memory elements forming a feedback
path.
Categorized/ types of Sequential circuits:
1. Asynchronous:
The storage elements commonly used are time-delay devices.
2. Synchronous:
- has a clock pulse (clocked sequential circuits).
- Use clock pulses to control storage elements are called clocked sequential circuits, - The binary information stored in memory defines the state.
- Flip-flops are storage elements which are used in clocked sequential
circuits.- Each flip-flop can store one bit.
1
(a) Bloch Diagram of A synchronous clocked sequential circuit
Memory/ Storage Elements:
1. Latches:
Storage elements that operate with signal levels. Latches are said
to be level sensitive devices. Latches are the basic types of flip-flop
2. Flip-flops (FF):
It controlled by a clock transition. Flip-flops are edge-sensitive
Type of Latch:
a. SR latch:
The SR latch can be implemented by NOR gates or NAND gates
SR latch- NOR Circuit and Bloch diagram
SR latch- NAND Circuit and Bloch diagram
b. D Latch (Transparent Latch):
Its Cross-coupled SR latch. S and R are never equal to 1 at the
same time.
2
D latch Circuit diagram, Bloch diagram
Trigger:
Trigger: a latch or flip-flop is switched by a change of the control
input
1. Controlled latches are Level triggered
2. Controlled flip-flop is Edge triggered
Flip-flops (FF):
- 1-bit
memory, A sequential circuit may use many flip-flops to store
as many bits as necessary.
- The output of a flip-flop is either 0 or 1 (two states).
Type of Latch:
a. Master–slave/ Edge-Triggered D Flip-flop:
D flip-flop consists of two D latches and an inverter, the first latch is
called the master and the second the slave.
Master–slave Bloch diagram
b. JK Flip-Flop:
Types of flip-flops can be constructed by D flip-flop and external logic
c. T Flip-Flop:
1. Can be obtained from a JK flip-flop with J and K tied together. 2. Can also be constructed with a D flip-flop and an exclusive-OR gate.
T Flip-Flop from a JK flip-flop T Flip-Flop from D flip-flop
3
4
Sate of A sequential circuit
1. Finite State machines (FSMs) models
A sequential circuit has inputs, outputs, and internal states.
Classified/Types of Finite state machine models:
1. The Mealy implementation
2. The Moore implementation
- There are differing only in the way the output is generated.
Moore machine: The outputs of the circuit depend only on the
current state of the circuit.
- Mealy machine: The outputs of the circuit depend on both the
current state of the circuit and the inputs
2. State Equation
Types of analyze a sequential circuit
1. State equations
2. State table
3. State diagram
4. Flip-Flop input equations
Behavior of a clocked Sequential Circuits:
5
This circuit is determined from
1. The inputs
2. The outputs
3. The state of its flip-flops
The behavior of a clocked sequential circuit can be described
algebraically by means of state equations; also called transition
equations.
Example: Two D flip-flops A and B, an input x and output y
Usually, we drop the “(t)”:
3. State Table
6
State table (also called a transition table) enumerates the time
sequence of inputs, outputs, and flip-flop states.
The table consists of four labels: present state, input, next state, and
output.
Note: A sequential circuit with m flip-flops (State) and n inputs need
2m+n rows in the state table.
Second Form of State Table
The state table has three section: present state, next state, and
output
4. State Diagram
The state diagram provides exactly the same information as the state
table and is obtained directly from the state table.
Graphically represent the information in a state table. A state
diagram is a directed graph, where the node (Vertex) represents a
unique state (with its state value inside), and each arc (Edge) a
unique state transition (with inputs/outputs above).
Ex: starting from state 00
7
The binary number inside each circle identifies the state. The
directed lines are labelled with two binary numbers separated by a
slash (/) the input value that causes the state transition is labelled
first. The number after the slash symbol / gives the value of the
output. A directed line connecting a circle with itself indicates that no
change of state occurs..
If the input is 0, it stays at state 00 with output=0
If the input is 1, it goes to state 01 with output=0
State Diagram of Second Form of State Table
5.
5.
5.
5.
5.
5. State Reduction
8
9
6. State Assignment
Assign coded binary values to the states for physical implementation
For a circuit with m states, the codes must contain n bits where 2n≥m
Popular State Assignments:
1. Binary: 2. Gray code: 3. One-hot: 4. Simplify the circuit design but may have larger hardware cost
10