What is DSP Builder?

DSP Builder, consisting of an advanced and standard blockset, allows for high-performance push-button hardware description language (HDL) generation of digital signal processing (DSP) algorithms directly from the Simulink environment. Altera®recommends using the advanced blockset for new designs as it allows you to:

Go from high-level schematic into low-level optimized VHDL targeted for your Altera FPGAs, including the latest 20 nm offering

Perform high-performance fixed- and floating-point DSP with vector processing, such as complex IEEE 754 single-precision floating point. Read the BDTI benchmark white paper on the Floating-Point DSP Solutions page 

Use a designer-specified system clock constraint to automatically pipeline, time-division multiplex/fold, and close timing

Access advanced math.h functions and multichannel data Generate resource utilization tables for all designs without a Quartus® II software compile Automatically generate projects or scripts for the Quartus II software, TimeQuest, Qsys, and

ModelSim® Altera software

MathWorks Tools Required for DSP Builder Advanced Blockset (sold seperately here)

MATLAB (required) Simulink (required) Simulink Fixed-Point and Fixed-Point Toolbox (required) Signal Processing Toolbox (recommended)

Figure 1. DSP Builder Tool Flow 

Figure 2. DSP Builder Advanced Blockset 

Design Examples That Come with DSP Builder

Interpolating/decimating cascaded integrator comb (CIC), finite impulse response (FIR), and multichannel infinite impulse response (IIR) filters

1K-, 4K-, and 8K-point fast Fourier transform (FFT) and inverse FFT (IFFT) Cholesky or QR-based matrix solvers Digital up/down conversion Complex mixer Beamforming Black-Scholes algorithm Field-oriented motor control (FOC) Mandlebrot set

DSP Builder Floating-Point Capabilities

See how 28 nm FPGAs can perform at one TFLOPS.

 Read white paper (PDF)

Learn how Altera FPGAs solve floating-point challenges.

 View webcast

See how BDTI, an independent technology analysis firm, evaluates the energy efficiency of Altera's floating-point DSP on 28 nm development kits.

 Read white paper (PDF)

Updates in Quartus II Software v13.0

Improvements in parameterizable FFTs (with floating-point capability) Additional math.h functions (e.g. log, polynomial evaluation, and fixed-point integer divide)

Get DSP training today! Register for either the online one-hour training or attend one of our in-person training sessionsto learn more about the DSP Builder Advanced Blockset .

Note About the DSP Builder Standard Blockset

Altera continues to support DSP Builder Standard Blockset. Both standard and advanced blockset functionality can be implemented at different Simulink hierarchy levels within a design.

DSP Documents