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William Stallings William Stallings Computer Organization d A hit t and Architecture Chapter 16 Parallel Processing Parallel Processing

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Page 1: William Stallings Computer Organization and A hit td

William Stallings William Stallings Computer Organization

d A hit tand Architecture

Chapter 16Parallel ProcessingParallel Processing

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Multiple Processor OrganizationMultiple Processor Organization

Single instruction, single data stream - SISDSingle instruction, multiple data stream - SIMDMultiple instruction, single data stream - MISDMultiple instruction, multiple data stream- MIMD

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Single Instruction, Single Data Stream SISDStream - SISD

Single processorSingle instruction streamData stored in single memoryUni-processor

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Single Instruction, Multiple Data Stream SIMDData Stream - SIMD

Single machine instruction Controls simultaneous executionNumber of processing elementsLockstep basisEach processing element has associated data memoryEach instruction executed on different set of data by different processorsVector and array processors

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Multiple Instruction, Single Data Stream MISDData Stream - MISD

Sequence of dataTransmitted to set of processorsEach processor executes different instruction sequenceNever been implemented

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Multiple Instruction, Multiple Data Stream MIMDData Stream- MIMD

Set of processorsSimultaneously execute different instruction sequencesDifferent sets of dataSMPs, clusters and NUMA systems

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Taxonomy of Parallel Processor ArchitecturesArchitectures

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MIMD OverviewMIMD - Overview

General purpose processorsEach can process all instructions necessaryFurther classified by method of processor communication

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Tightly Coupled SMPTightly Coupled - SMP

Processors share memoryCommunicate via that shared memorySymmetric Multiprocessor (SMP)

Share single memory or poolShared bus to access memoryMemory access time to given area of memory is approximately the same for each processorapproximately the same for each processor

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Tightly Coupled NUMATightly Coupled - NUMA

Nonuniform memory accessAccess times to different regions of memroy may differ

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Loosely Coupled ClustersLoosely Coupled - Clusters

Collection of independent uniprocessors or SMPsInterconnected to form a clusterCommunication via fixed path or network connections

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Parallel Organizations SISDParallel Organizations - SISD

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Parallel Organizations SIMDParallel Organizations - SIMD

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Parallel Organizations - MIMD Shared MemoryShared Memory

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Parallel Organizations - MIMDDistributed MemoryDistributed Memory

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Symmetric MultiprocessorsSymmetric MultiprocessorsA stand alone computer with the following characteristics

Two or more similar processors of comparable capacityProcessors share same memory and I/OProcessors share same memory and I/OProcessors are connected by a bus or other internal connectionMemory access time is approximately the same for each processorprocessorAll processors share access to I/O⌧Either through same channels or different channels giving paths to

same devicessame devices

All processors can perform the same functions (hence symmetric)S t t ll d b i t t d ti tSystem controlled by integrated operating system⌧providing interaction between processors ⌧Interaction at job, task, file and data element levels

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SMP AdvantagesSMP Advantages

PerformanceIf some work can be done in parallel

AvailabilitySince all processors can perform the same functions, failure of a single processor does not halt the systemfailure of a single processor does not halt the system

Incremental growthUser can enhance performance by adding additionalUser can enhance performance by adding additional processors

Scalinga gVendors can offer range of products based on number of processors

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Block Diagram of Tightly Coupled MultiprocessorCoupled Multiprocessor

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Organization ClassificationOrganization Classification

Time shared or common busMultiport memoryCentral control unit

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Time Shared BusTime Shared Bus

Simplest formSimplest formStructure and interface similar to single processor systemprocessor systemFollowing features provided

Addressing - distinguish modules on busAddressing distinguish modules on bus Arbitration - any module can be temporary masterTime sharing - if one module has the bus, others g ,must wait and may have to suspend

Now have multiple processors as well as multiple I/O modules

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Time Share Bus AdvantagesTime Share Bus - Advantages

SimplicityFlexibilityReliability

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Time Share Bus DisadvantageTime Share Bus - Disadvantage

Performance limited by bus cycle timeEach processor should have local cache

Reduce number of bus accesses

Leads to problems with cache coherenceSolved in hardware - see later

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Multiport MemoryMultiport Memory

Direct independent access of memory modules by each processorLogic required to resolve conflictsLittle or no modification to processors or

d l i dmodules required

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Multiport Memory - Advantages and Disadvantagesand Disadvantages

More complexExtra login in memory system

Better performanceEach processor has dedicated path to each module

f fCan configure portions of memory as private to one or more processors

Inc eased sec itIncreased security

Write through cache policy

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Central Control UnitCentral Control Unit

Funnels separate data streams between independent modulesCan buffer requestsPerforms arbitration and timingPass status and controlPerform cache update alertingInterfaces to modules remain the samee.g. IBM S/370

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Operating System IssuesOperating System Issues

Simultaneous concurrent processesSchedulingSynchronizationMemory managementReliability and fault tolerance

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IBM S/390 Mainframe SMPIBM S/390 Mainframe SMP

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S/390 Key componentsS/390 - Key components

Processor unit (PU)CISC microprocessorFrequently used instructions hard wired64k L1 unified cache with 1 cycle access time

L2 cacheL2 cache384k

Bus switching network adapter (BSN)Bus switching network adapter (BSN)Includes 2M of L3 cache

Memory cardMemory card8G per card

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Cache Coherence and MESI ProtocolMESI Protocol

Problem - multiple copies of same data in different cachesCan result in an inconsistent view of memoryWrite back policy can lead to inconsistencyWrite through can also give problems unless caches monitor memory traffic

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Software SolutionsSoftware Solutions

Compiler and operating system deal with problemOverhead transferred to compile timeDesign complexity transferred from hardware to

ftsoftwareHowever, software tends to make conservative d i idecisions

Inefficient cache utilization

Analyze code to determine safe periods forAnalyze code to determine safe periods for caching shared variables

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Hardware SolutionHardware Solution

Cache coherence protocolsDynamic recognition of potential problemsRun timeMore efficient use of cacheTransparent to programmerDirectory protocolsy pSnoopy protocols

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Directory ProtocolsDirectory Protocols

Collect and maintain information about copies of data in cacheDirectory stored in main memoryRequests are checked against directoryAppropriate transfers are performedCreates central bottleneckEffective in large scale systems with complex interconnection schemes

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Snoopy ProtocolsSnoopy Protocols

Distribute cache coherence responsibility among cache controllersCache recognizes that a line is sharedUpdates announced to other cachesSuited to bus based multiprocessorIncreases bus traffic

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Write InvalidateWrite Invalidate

Multiple readers, one writerWhen a write is required, all other caches of the line are invalidatedWriting processor then has exclusive (cheap)

til li i d b thaccess until line required by another processorUsed in Pentium II and PowerPC systemsState of every line is marked as modified, exclusive, shared or invalidMESIMESI

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Write UpdateWrite Update

Multiple readers and writersUpdated word is distributed to all other processors

Some systems use an adaptive mixture of both solutions

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MESI State Transition DiagramMESI State Transition Diagram

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ClustersClusters

Alternative to SMPHigh performanceHigh availabilityServer applications

A group of interconnected whole computersg p pWorking together as unified resourceIllusion of being one machineu o o b g o aEach computer called a node

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Cluster BenefitsCluster Benefits

Absolute scalabilityIncremental scalabilityHigh availabilitySuperior price/performance

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Cluster Configurations -Standby Server No Shared DiskStandby Server, No Shared Disk

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Cluster Configurations -Shared DiskShared Disk