workbook msp430f5xx_one_day_workshop_v1-2.pdf
TRANSCRIPT
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MSP430 Microcontroller Workshop
Student Guide
Technical Training
Organization
Revision 1.2 July 2010
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Important Notice
Important Notice Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TIs standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.
Customers are responsible for their applications using TI components.
In order to minimize risks associated with the customers applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TIs publication of information regarding any third partys products or services does not constitute TIs approval, warranty or endorsement thereof.
Copyright 2010 Texas Instruments Incorporated
Revision History March 2010 Revision 1.0
July 2010 Revision 1.1 Roadmap and portfolio slide update
July 2010 Revision 1.2 Name change
Mailing Address Texas Instruments Training Technical Organization 7839 Churchill Way M/S 3984 Dallas, Texas 75251-1903
ii MSP430 Microcontroller Workshop Microcontroller Workshop
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Introduction
Introduction This module will cover the MSP430 architecture, instruction set, and development tools. In the lab exercise Code Composer Studion will be installed and we will verify that the hardware and software has been configured properly.
Agenda
Introduction to the MSP430F5xx5xx Active & Low Power Mode
OperationA Mixed-Signal Application ExampleUsing Hardware Timers to Conserve
PowerA Fully-optimized ADC12 Routine
MSP430 Tools, Resources and Conclusion
2Portfolio
MSP430 Microcontroller Workshop - Introduction 1 - 1
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Module Topics
Module Topics Introduction ............................................................................................................................................... 1-1
Module Topics......................................................................................................................................... 1-2 Introduction ............................................................................................................................................ 1-3
TI Processor Portfolio......................................................................................................................... 1-3 5xx Summary...................................................................................................................................... 1-4 MSP430 Generations.......................................................................................................................... 1-5 MSP430 Roadmap.............................................................................................................................. 1-6 Orthogonal CPU ................................................................................................................................. 1-7 Unified Clock System......................................................................................................................... 1-7 5xx Operating Modes ......................................................................................................................... 1-8 Operating Range................................................................................................................................. 1-8 Memory Map ...................................................................................................................................... 1-9 SYS Module ....................................................................................................................................... 1-9 GPIO..................................................................................................................................................1-10 Port Map Module...............................................................................................................................1-10 Universal Serial Communications Interface ......................................................................................1-11 LCD_B and AES128 .........................................................................................................................1-11 USB ...................................................................................................................................................1-12 CC430................................................................................................................................................1-12 Embedded Emulation ........................................................................................................................1-13 Block Diagram...................................................................................................................................1-14 Experimenters Board........................................................................................................................1-14 Code Composer Studio 4.1 ................................................................................................................1-15 Community Support ..........................................................................................................................1-15
Lab 1: Setting up the Software and Hardware.......................................................................................1-17 Objective ...........................................................................................................................................1-17 Hardware / Software Requirements...................................................................................................1-17 Procedure...........................................................................................................................................1-18
1 - 2 MSP430 Microcontroller Workshop - Introduction
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Introduction
Introduction
TI Processor Portfolio
TI Embedded Processing Portfolio
35xx Gen Summary
32-bit ARMCortex-M3
MCUs
16-bit ultra-low power
MCUsDSP
DSP+ARM ARM
Cortex-A8 MPUs
StellarisARM Cortex-M3MSP430
SitaraARM Cortex-A8
& ARM 9
C6000DaVinci
video processors
TI Embedded ProcessorsDigital Signal Processors (DSPs)Microcontrollers (MCUs) ARM-Based Processors
OMAP
Software & Dev. Tools
Up to 100 MHz
Flash8 KB to 256 KB
USB, ENET MAC +PHY CAN, AD C, PWM, SPI
Connectivity, S ecurity,Motion Control, HM I,
Industrial Automation
$ 1.00 to $8.00
300MHz to >1GHzC ache,
RAM, R OMUSB, C AN,
PCIe, EMACIndustrial computing,
POS & portable data terminals
$5 .00 to $20.00
Up to 25 MHz
Flash1 KB to 256 K B Analog I/O, A DCLCD, USB, RF
Measurement,Sensing, General
Purpose
$0.25 to $9 .00
300MHz to >1Ghz +Accelerator
CacheRAM, ROM
USB, ENET, PC Ie, SATA , SPI
Floating/Fixed Poi ntVideo, Audio, Voice,
Securi ty, Conferencing$5.00 to $200.00
32-bit real-time
MCUs
C2000DelfinoPiccolo
40MHz to 300 MHz Flash, RAM
16 KB to 512 K B
PWM, ADC , CAN, SPI, I2CMotor Control, Digi tal Power,
Lighting, Ren. Enrgy
$1.50 to $20 .00
Ultra Low power
DSP
C5000
Up to 300 MHz+Accelerator
Up to 320KB RA MU p to 128KB ROM
USB, AD C McB SP, SPI, I2C
Audio, V oice
Medical , Biometrics
$3.00 to $1 0.00
Multi-coreDSP
C6000
24.000 MMACS
CacheR AM, ROM
SRIO, EMACDMA, PC Ie
Telecom test & meas, media gateways,
base stations
$40 to $200.00
MSP430 Microcontroller Workshop - Introduction 1 - 3
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Introduction
5xx Summary
5xx Generation Summary Ultra-Low Power
230 A/MHz 1.9 A standby mode Wake up from standby in < 5 s
Increased Performance Up to 25 MHz 8 MHz across entire operating range
(1.8 - 3.6 V) 1.8V ISP flash erase & write Fail-safe, flexible clocking system
Innovative Features Integrated LDO, BOR, WDT+, RTC Multi-channel DMA supports data
movement in standby mode More connectivity: USB, RF AES encryption, RTC on backup
battery User-defined Bootstrap Loader Industry-leading code density
4MSP430 Generations
1 - 4 MSP430 Microcontroller Workshop - Introduction
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Introduction
MSP430 Generations
MSP430 Generations
1xx 2xx 4xx 5xxBasic Clock System Basic Clock System + FLL, FLL + Unified Clock System
UCS
Core voltage same as supply voltage
Core voltage same as supply voltage
Core voltage same as supply voltage
Programmable Core Voltage with integrated PMM
16-bit CPU 16-bit CPU, CPUX 16-bit CPU, CPUX 16-bit CPUXV2
GPIO GPIO w/ pull-up and pull-down
GPIO GPIO w/pull-up and pull-down, drive strength
N/A N/A N/A CRC16
Software RTC Software RTC Software RTC with Basic Timer, Basic Timer + RTC
True 32-bit RTC w/Alarms
USART USCI, USI USART, USCI USCI, USB, RF
DMA up to 3-ch DMA up to 3-ch DMA up to 3-ch DMA up to 8-ch
MPY16 MPY16 MPY16, MPY32 MPY32
ADC10,12 ADC10,12 ADC12 ADC12_A
4-wire JTAG 4-wire JTAG, some devices with Spy-Bi-Wire
4-wire JTAG 4-wire JTAG and Spy-Bi-Wire
5MSP430 Generations
MSP430 Microcontroller Workshop - Introduction 1 - 5
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Introduction
MSP430 Generations
6Roadmap
Category 2xx 4xx 5xxCPU Clock (max) 16MH z 8MHz 25MHz
Active Current(@ 3.0V, typical)
515uA @ 1MHz4.2mA @ 8MHz9.1mA @ 16MHz
600uA @ 1MHz4.8m A @ 8MHzN/A
290uA @ 1MHz1.84mA @ 8MHz 230 uA/MHz8.90mA @ 25MHz
120KB / 8KB (Flash / RAM) 120KB / 8KB (Flash / RAM) 256KB / 16KB (Flash / RAM)
Wake-up Time From LPM3 1us 6us 5usStandby LPM3 Current 0.9 1.1uA 1.1 2.5uA 1.9uA (RTC, WDT, SVS
enabled) LPM4 Current 0.1uA 0.1uA 1.2uA (LPM4) / 0.1uA (LPM4.5)
Flash ISP Minimu m DVCC 2.2V 2.7V 1.8VPort I/O Interrupt Capability P1/P2 P1/P2 P1/P2
Some devices also P3/P4Prog. Port Pin Drive Strength N/A N/A All port pinsProg. Pull-ups / Pull-downs All port pins N/A All port pins
12-bit A/D Internal Reference Current
500 uA 500 uA 100 uA*
12-bit A/D Active Conversion Current
800 uA 800 uA 150 uA*
Available MCLK Sources DCO LFXT1XT2 (if available)VLO
FLLLFXT1XT2 ( if available)
FLLLFXT1 / XT1
UCS XT2 ( if available)VLO REFO
Available FLL Reference Clocks
N/A LFXT1 LFXT1, REFO, & XT2 ( if present)
* 2xx, 4xx ADC12; 5xx - REF & ADC12_A
MSP430 Roadmap
MSP430 Roadmap
100+ devices2xx-Catalog 16 M Hz 120 kB F lash 8 kB RAM 500 nA Stand by 1.8 3.6V
75+ devices1xx-Catalog 8M Hz 60 kB Flash 10 kB RAM 1.8 3.6 V
F = FlashC = ROMFR = FRAM
100+ devices4xx: LCD Up to 16 M Hz 120 kB Flash 8 kB RAM L CD Control ler, 160
seg men ts 1.8 3.6V
F23x0neration
Produ ct ionDevelopm en t
Device
F23x-F24x
F261xF241x
F20xxF21x1
F 21x2F22xx
F13x-F14xF15x-F16x
F541xF543x
Fx42x0Fx42x
F44xFx43x
F/CG461x
F E42x2
F 47x4Fx47x
F 471xx
The New Ge5xx-6xx 25M Hz 256 kB Flash 16 kB RAM 1.8 3.6V FRAM , USB, RF 6xx: L CD Control ler 230 uA/M Hz
FR57xxFRAM
CC430RF
F550x USB
F552xUSB
F51x2Lighting
F23x0
F/C11xxF12xx
F/C41x F41x2
L 0920.9V Native
F 53xxGen Purpose
F6/563xBGM, Catalog
7CPU
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Introduction
Orthogonal CPU
5xx MSP430Xv2 Orthogonal CPUC-compiler friendlyMemory address range increased to
1MBCPU registers increased to 20-bitsAddress-word instructions
Direct 20-bit CPU register access Atomic (memory-to-memory) instructions
Instruction compatible with previous CPU
Cycle count optimizationExtension word allows all instructions
Direct access to 1MB address space Bit, byte, word and address-word data Repeat instruction function
8UCS
Unified Clock System
Six independent clock sources Low Freq
LFXT1 32768 Hz crystal VLO 10 kHz REFO 32 kHz
High Freq XT1 4 32 MHz crystal XT2 4 32 MHz crystal DCO FLL multiple of reference
clock
FLL references are divisible LFXT1 / XT1 REFO XT2
ACLK / SMCLK / MCLK tree is fully orthogonal
Clocks on demand MODOSC provided to modules
Flash controller & ADC12_A
Unified Clock System (UCS)
9Operating Modes
MSP430 Microcontroller Workshop - Introduction 1 - 7
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Introduction
5xx Operating Modes
5xx Operating Modes SVS protection for just 200 nA Active Mode 230 uA/MHz
CPU active Fast Peripherals Enabled 32 kHz Per ipherals Enabled - RTC
LPM0 70 uA CPU disabled Fast Peripherals Enabled 32 kHz Per ipherals Enabled RTC
LPM3 1.9 uA CPU disabled Fast Peripherals Disabled 32 kHz Per ipherals Enabled
RTC, Watchdog & SVS protection
LPM4 1.2 uA All clocks disabled Wake on interrupt
LPM4.5 (LPM5) 100 nA Regulator & all clocks disabled No RAM retention BOR on nRST/NMI or Port I/O
10Operating Range
Operating Range
5xx Voltage vs. Frequency Operating Range
25MHz peak performance More performance
across VCC range Flash ISP @ min. VCC 8MHz @ min. VCC Up to 25MHz @ 2.4V-3.6V
Programmable VCORE maximizes power efficiency
Lowering VCC or VCOREreduces system current
11Mem Map
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Introduction
Memory Map
5xx Memory Map
Page-free 20-bit addressing User-definable Boot Strap
Loader RAM starts at 0x1C00
Always a contiguous block
Beginning of MAIN flash moves according to RAM
Vector table starts at 0xFF80
12SYS
SYS Module
5xx Peripherals The SYS Module
Reset Interrupt Vector Generator Generates a constant that maps to the
cause of last reset Simplifies reset handling
Manages non-maskable interrupts Reset events NMIs split into SYSNMI & UNMI SYSNMIs have higher priority Separate interrupt vectors
Factory application data is considered part of the SYS module Factory calibration data and
peripheral discovery table
Brownout (BOR) (highest priority)
RST/NMI (POR)
DoBOR (BOR)
Port_wakeup (BOR)
Security violat ion (BOR)
SVSL (POR)
SVSH (POR)
SVML_OVP (POR)
SVMH_OVP (POR)
DoPOR (POR)
WDT time out (PUC)
WDT key v iolation (PUC)
KEYV flash key violation (PUC)
PLL unlock (PUC)
PERF peripheral/config area fetch (PUC)
13GPIO
MSP430 Microcontroller Workshop - Introduction 1 - 9
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Introduction
GPIO
5xx Peripherals GPIO Initial state of GPIO pins is a digital input
Port registers allow for different configurations PxDIR direction (input vs output) PxREN enables internal pull-up/pull-down resistors
(input) PxDS enables additional drive strength (output)
Select ports have interrupt capabilities PxIE Interrupt enable PxIES Interrupt edge select PxIFG Interrupt flag registers
GPIO functionality is multiplexed with analog and digital peripheral functions PxSEL Peripheral function select
14Port Map Module
Port Map Module
5xx Peripherals Port Map Module
Port mapping allows for additional digital signals to bemapped to one or several output pins. PM_xxx denotes a port-mappable signal Datasheet specifies which ports can be mapped By default, single configuration per PUC reset Port Mapp ing Reconfigure bit (PMRECNFG) allows for
runtime re-configurations
Port mapping configuration is password protected
Available on select MSP430 families. (Check the datasheet)
15USCI
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Introduction
Universal Serial Communications Interface
Universal Serial Communications Interface USCI - New standard MSP430 serial interface Auto clock start from any low power mode Two independent communication blocks Asynchronous communication modes
UART standard and multiprocessor protocols UART with automatic Baud rate detection
(LIN support) Two modulators support n/16 bit timing IrDA bit shaping encoder and decoder
Synchronous communication modes SPI (Master & Slave modes, 3 & 4 wire) I2C (Master & Slave modes)
UxRXBUF
URXD
SMCLKUCLKIACLK
SM CLK
Recei ver Shif t Reg ister
Baud-Rate Generator
Transmit Sh ift Reg ister
UxTXBUF
Clock Phase and Polarity UCLK
UTXD
SOM I
SIMO
STE
16LCD and AES
LCD_B and AES128
5xx Peripherals LCD_B & AES128
LCD distinguishes 6xx from 5xx Static, 2-, 3- or 4-mux displays Supports up to 196 LCD segments Blinking of individual segments Regulated charge pump Software-driver contrast control Integrated drivers to decouple LCD
load from the bias generation
Encryption and decryption according to AES FIPS PUB 197 with 128-bit key
Key expansion for en- and decryption Off-line key generation for decryption AES ready interrupt flag
17USB
MSP430 Microcontroller Workshop - Introduction 1 - 11
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Introduction
USB
5xx + USB Single-chip USB solution Just add USB connector & TI-supplied USB API software
for the most common device classes (CDC/HID/MSC) USB + analog + ultra-low-power
ESD TPD2E001DRLESD Protection
Diode Array
18CC430
SerialCommsComparator
12-bitADC
Timers
RAM
CPU
RTC CRC16
DMA 32x32MPY
Power Supply& Superv is ion
Flash
Clocks
USBModule
+3.3V
VUSB DVCC
+5V VBUS
PURD-D+
4MHz
CC430
Low Power RF IC
Radio Frequency
5xx + Low-Power RF The CC430
CC430Low-power RF SoC
Ultra-low power High analog performance High level of integration Ease of development Sensor interface
High sensitivity Low current consumption Excellent blocking performance Flexible data rate & modulation format Backwards compatible
Supports: 300-348MHz, 387- 464MHz and 779-928MHz
19Emulation
MSP4305xx MCU
Low Power < 1 GHz RFTransceiver
MSP430 MCU
Application &Protocol
processor
1 - 12 MSP430 Microcontroller Workshop - Introduction
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Introduction
Embedded Emulation
5xx Embedded Emulation
Used for in-system programming and emulation JTAG access can be locked using SW no fuse JTAG pins serve as 4 x pin GPIO port (Port J) Support for both 4-wire and 2-wire Spy-Bi-Wire Compatible with existing MSP430 tools
20Emulation
5xx Embedded Emulation Simplifies in-system debugging and reduces
development time Up to 8 hardware breakpoints with complex triggering
capabilities 40-bit wide CPU cycle counters in hardware JTAG Mailbox system provides direct interface to the
CPU during Debugging (Run-time data UART RTDX) Programming / Test
State Storage: non-intrusive trace buffer for data and address bus (e.g., instruction fetch)
21Block Diagram
MSP430 Microcontroller Workshop - Introduction 1 - 13
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Introduction
Block Diagram
MSP430F5438A Block Diagram
22MSP-EXP430F5438
Experimenters Board
MSP-EXP430F5438 Easy power select
USB, JTAG, Battery USB communication Microphone Filtered PWM audio output
Active, selectable gain Headphone compatibility
2-axis accelerometer Dot-matrix LCD (138x110)
Integrated backlight 1 x 5-direction switch 2 x push-button switches RF Interface
CCxxxx EVMs EZRF I/F (6 & 18- pin)
Please ensure 2 x AA batteries are in place on
the back of the board
Load your F5438A into the socket in the appropriate
orientation
23CCS
1 - 14 MSP430 Microcontroller Workshop - Introduction
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Introduction
Code Composer Studio 4.1
Code Composer Studio 4.1
Code Composer Studio v4.1: A single development platform for all TI processors
Enhancements:SpeedCode size improvementsAuto-updatingLicense managerSupport for all TI MCUs
Only $495 for MCU Edition FREE 16KB-limited edition
24Community Support
Community Support
Videos, Blogs, ForumsExtensive community
support and idea exchangeGlobal customer supporthttp://e2e.ti.com
Growing collection of technical wiki articles
Tips & tricks, common pitfalls, and design ideas
http://wiki.msp430.com
Extensive Community Support
E2E Community Processor Wiki
25Lab_1
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Introduction
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Lab 1: Setting up the Software and Hardware
Lab 1: Setting up the Software and Hardware
Objective The objective of this lab exercise is to install Code Composer Studio and verify that the hardware and software has been configured properly. Also, we will cover some of the basic features of the development tools using a simple program running on the MSP430F5438A. These development tools will be used with all of the following lab exercises in this workshop.
Hardware / Software Requirements
PC running Windows XP or greater Code Composer Studio 4.1 MSP-FET430UIF with JTAG ribbon cable and USB cable MSP-EXP430F5438 board with MSP430F5438 device Labs and solutions files
Lab_1: Blink the LED
FET
Blink the LED with C code running on the MSP430F5438A
26Agenda
MSP430 Microcontroller Workshop - Introduction 1 - 17
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Lab 1: Setting up the Software and Hardware
Procedure If youve already completed the installation steps that were emailed to you before the workshop, skip to step 9.
Download and Install Code Composer Studio 4.1 1. Click on this link to begin the Code Composer Studio download process. Download the
latest DVD image of Code Composer Studio. You will need to agree to the export conditions and you will be emailed a link to the installation zip file. Click on the link and save the zip file to your desktop. Unzip the file into a folder on your desktop named Setup CCS. You can delete the zip file and the Setup CCS folder when the installation has completed.
2. Disconnect any evaluation board or FET that you have connected to your PCs USB port(s).
3. Open the Setup CCS folder on your desktop and double-click on the file named setup_CCS_n.n.n.n.exe.
4. Follow the instructions in the Code Composer Studio installation program. Select the Platinum Edition for installation when the Product Configuration dialog window appears. Click Next.
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Lab 1: Setting up the Software and Hardware
5. In the Choose ISA dialog, make sure that only the MSP430 checkbox is selected. Click Next.
In the Select Components dialog, uncheck the Target Content and Emulators checkboxes then check the MSP430 USB FET checkbox and click Next. Click Next in the Start Copying Files dialog. The installation should take less than 10 minutes to complete.
MSP430 Microcontroller Workshop - Introduction 1 - 19
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Lab 1: Setting up the Software and Hardware
Driver Installation 6. Download the workshop installation files from this link on the MSP430 One Day Work-
shop Wiki site. Unzip the file to your desktop (the folder name is MSP430).
7. In the unzipped MSP430 folder on your desktop, open the USB drivers folder. Double-click on setup.exe. Follow the wizard steps until it completes. Then, using Windows Ex-plorer, navigate to C:\Program Files\Texas Instruments Inc\TUSB3410 Single Driver Installer\DISK1 and double-click on setup. Follow the wizard steps until the driver in-stallation completes.
Lab File Installation 8. Back in the unzipped MSP430 folder on your desktop, open the Labs folder and double-
click on 5xx_ODW.exe. Leave the unzip directory as C:\5xx_ODW and click Unzip. When the process completes, click Close. The labs have now been installed in C:\5xx_ODW.
Hardware Setup9. Connect the USB cable to the MSP-FET430UIF port marked USB and that the other end
of the cable to your computers USB port. Your computer should recognize the new USB device.
10. Next, connect the ribbon cable to the MSP-FET430UIF port marked Target and the other end to the JTAG emulation debug port on the MSP-EXP430F5438 Experimenters Board.
JTAG Emulation Port
1 - 20 MSP430 Microcontroller Workshop - Introduction
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Lab 1: Setting up the Software and Hardware
11. The MSP-EXP430F5438 Experimenters Board has several jumpers that control power to the board:
JP4 pins 5-6 SW1 JP2 JP3 JP1
Be sure that the jumpers are set as follows:
JP1 430 PWR provides power to the MSP430F5438A (ON) Used to measure current consumption of the MSP430F5438A
JP2 SYS PWR provides power to the entire MSP-EXP430F5438 board (ON) Used to measure current consumption of the entire board
JP3 RF PWR provides power to the RF connector headers (ON) JP4 USB RST enable for USB chip (ON) SW1 FET/USB/BATT power supply switch (FET position)
FET: Power board from FET interface USB: Power board from USB interface BATT: Power board from batteries
MSP430 Microcontroller Workshop - Introduction 1 - 21
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Lab 1: Setting up the Software and Hardware
Start Code Composer Studio 12. On your PC desktop you should have a shortcut that looks like this:
Double-click the shortcut to start Code Composer Studio 4.1. As CCS loads, the following splash screen will be displayed:
After a few moments, the Workspace Launcher window will appear. In the Workspace window, enter C:\ 5xx_ODW\workspace and click the OK button on the lower right.
This will create a workspace folder in that location. All of the workshops lab project folders will be added to this location as we work on them.
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Lab 1: Setting up the Software and Hardware
13. If you are prompted to review and install updates, click No. When the license dialog appears, select Evaluate Code Composer for 30 days and click OK.
When the Welcome screen appears, close it by clicking on the CCS emblem in the upper right corner.
MSP430 Microcontroller Workshop - Introduction 1 - 23
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Lab 1: Setting up the Software and Hardware
Create a New Project 14. On the menu bar, click File New CCS Project. When the New CCS Project
dialogue appears, name the project Lab_1 and click Next. Note that this location will be under the workspace folder.
In the Select a type of project window, change the project type to MSP430 and click Next.
In the Additional Project Settings window, make no changes and click Next.
In the Project Settings window, change the Device Variant to MSP430F5XXX and select MSP430F5438A and click Finish.
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Lab 1: Setting up the Software and Hardware
Understanding the IDE Display 15. CCS 4.1 is a highly customizable tool, but your first view of it should look like below:
If the Cheat Sheets pane is open on the right, close it by clicking the X on the tab.
The left-hand pane is the Project pane. All of the components; libraries, source files, settings, etc. that comprise a project are displayed here. The middle pane is the Workspace pane. When you are editing, the Eclipse editor will be seen here, along with tabs to the files being edited. The Outline pane, on the right, displays C/C++ file elements, like structures, etc.
Click on the + next to Lab_1 to expand the project.
MSP430 Microcontroller Workshop - Introduction 1 - 25
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Lab 1: Setting up the Software and Hardware
Create and Add a Source File 16. Right-click in the Project pane and select New Source File. When the New Source
File window appears, name the Source File Blink_LED.c and click Finish. In the Project pane you will see that Blink_LED.c is now added to the project and that the file is open for editing in the Workspace pane. (If it is not open for editing, double-click on Blink_LED in the Project pane.)
In the Blink_LED.c editor window that appears, type the following code, or you can cut/paste it from the Blink_LED.txt file included in the Lab_1 folder.
To cut/paste, select File Open File from the menu bar. Navigate to: C:\5xx_ODW\Lab_1, select Blink_LED.txt, and then click Open. Cut/Paste to the Blink_LED.c editor window.
#include "msp430x54x.h" void main(void) { WDTCTL = WDTPW + WDTHOLD; // Hold WDT for clock/port config P1OUT = 0x00; P1DIR |= BIT0; // Enable LCD output WDTCTL = WDT_ADLY_1000; // WDT source by ACLK, 1s interval SFRIE1 |= WDTIE; // Enable WDT interrupt __enable_interrupt(); // Enable global interrupts } // Watc#pragma vector = WDT_VECTOR
hdog Timer interrupt service routine
__interrupt void WDT_ISR(void) { SFRIFG1 &= ~WDTIFG; P1OUT ^= 0x01; // Toggle P1.0 using exclusive-OR
}
On the menu bar, click the Save button .
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Lab 1: Setting up the Software and Hardware
Download and Run the Program
17. Click the Debug button (not the Debug perspective button). Clicking this button will compile the source file in your project and download the executable to the flash memory of the MSP430F5438A.
A Progress Information window will open and inform you of the status of the assembly and download.
Note: If the FET firmware does not match the CCS version, CCS will automatically prompt you to update it if you are prompted, select Update.
18. You should now have a screen that looks something like this:
The buttons on the top-left that look like this:
control the running of the code. Click on the Run button to run the code. You should notice that the red LED1 near the lower edge of the board is blinking about once per second.
MSP430 Microcontroller Workshop - Introduction 1 - 27
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Lab 1: Setting up the Software and Hardware
Halt Debugging and Close the Project
19. Click the Terminate All button to halt the program, terminate the debugger session and return to the editor view.
20. Right-click on Lab_1 in the project pane and select Close Project.
Youre done.
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Active and Low Power Operation
Introduction This module will explore the ultra-low power capabilities of the MSP430 architecture. The Power Management Module (PMM) and Unified Clock System (UCS) will be discussed along with techniques that are used to minimize power consumption. In the lab exercise we will experiment with the various active and low power modes.
MSP430 Workshop - Active and Low Power Mode Operation 2 - 1
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Module Topics
Module Topics Active and Low Power Operation............................................................................................................ 2-1
Module Topics......................................................................................................................................... 2-2 Active and Low Power Operation........................................................................................................... 2-3
Ultra-Low Power Best Practices......................................................................................................... 2-3 Unified Clocking System (UCS) ........................................................................................................ 2-5 Power Management Module (PMM).................................................................................................. 2-7 Interrupts and the Stack ...................................................................................................................... 2-9 Intrinsics ............................................................................................................................................. 2-9 Fail-Safe Behavior.............................................................................................................................2-10 Available Oscillators .........................................................................................................................2-10 Overview of Lab2 Exercise ...............................................................................................................2-11
Lab 2: Active and Low Power Mode Operation ....................................................................................2-12 Objective ...........................................................................................................................................2-12 Procedure...........................................................................................................................................2-14
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Active and Low Power Operation
Active and Low Power Operation
Ultra-Low Power Best Practices
Ultra Low Power (ULP) Operation Best Practices
Power-efficient MSP430 apps: Minimize instantaneous current draw Maximize time spent in low power modes
The MSP430 is inherently low-power, but your design has a big impact on power efficiency
Proper low-power design techniques make the difference
28ULP Best Practices
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Active and Low Power Operation
ULP Operation Best Practices Power draw increases with
Vcc CPU clock speed (MCLK) Temperature
Slowing MCLK reduces instantaneous power, but usually increases active duty cycle Power savings can be nullified The ULP sweet spot that maximizes performance for the
minimum current consumption per MIPS: 8 MHz MCLK Full operating range (down to 1.8V)
5xx has integrated LDO with variable output voltage Optimize core voltage for chosen MCLK speed
29ULP Best Practices
ULP Operation Best Practices Digital input pins subject to shoot-through current
Input voltages between VIL and VIH cause shoot-through if input is allowed to float (left unconnected)
Port I/Os should Driven as outputs Be driven at Vcc/ground by an external device Have a pull-up/down resistor
30ULP Clock Control (UCS)
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Active and Low Power Operation
Unified Clocking System (UCS)
ULP Clock Control: Unified Clocking System (UCS) Defaults
FLLREFCLK = XT1CLK ACLK = XT1CLK MCLK = DCOCLKDIV SMCLK = DCOCLKDIV DCOCKLDIV = DCOCLK / 2 DCO_freq ~= 2 MHz, so
MCLK_freq ~= 1 MHz SMCLK_freq ~= 1MHz
31ULP Clock Control (FLL)
ULP Clock Control: The 5xx Frequency Locked Loop (FLL)
FLLREFCLK sources: 32 kHz internal REFO LFXT1 / XT1
crystal oscillator XT2 crystal oscillator
DCO frequency equation fDCO = (fFLLREFCLK / n) * (N + 1) * D n = FLLREFDIV N = FLLN D = FLLD
32ULP Clock Control (DCO)
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Active and Low Power Operation
ULP Clock Control: The 5xx Digitally Controlled Oscillator (DCO)
DCO ranges from 200 kHz 60 MHz RSEL bits select the range DCO bits set one of 32 taps in each range MOD bits mix two frequencies
fDCO and fDCO+1 to produce DCOCLK
33PMM
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Active and Low Power Operation
Power Management Module (PMM)
Power Management Module (PMM) Integrated Low Dropout (LDO) regulator: VCC ? VCORE VCORE is programmable to four levels Brown Out Reset (BOR) is always ON PMM is password protected
Unlock: PMMCTL_H = 0xA5 Lock: PMMCTL_H = 0x00
Integrated Supervision and Monitoring Monitoring provides interrupts on low voltage condition Supervision generates Power On Reset (POR) on low voltage
condition Vcc domain is referred to as the high-side (SVSH, SVMH) Core voltage domain is referred to as the low-side (SVSL, SVML)
Accurate voltage supervision 200nA - Normal Performance Mode (20 us response time) 2 uA - Fast Performance Mode (2 us response time)
34V core
Steps to Change VCORE
Increasing the Core Voltage
1. Change the low-side monitor threshold 2. Change the core voltage level3. Wait until the core voltage level is reached4. Change supervisor threshold to match the monitor level
Decreasing the Core Voltage
5. Decrease supervisor and monitor levels6. Decrease the core voltage level
35Supervision and Mon ito ring
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Active and Low Power Operation
Voltage Supervision & Monitoring
Power on Default Mode
Normal Performance Mode +800 nA active current
consumption 0 nA LPM2,3,4 current
consumption
High-side Full Performance Mode
High-side Full Performance Mode Low-side SVS / SVM disabled +4uA active current consumption +0uA LPM2,3,4 current
consumption Automatic high-side protection
when CPU is active
SVS / SVM disabled
SVS / SVM disabled Zero-power BOR protection is
ALWAYS ON 5 us wakeup from LPM2,3,4 +0 uA active & LPM 2,3,4 current
consumption
High-side Fast Performance Mode
High-side Fast Performance Mode Low-side SVS / SVM disabled 5 us wakeup from LPM2,3,4 +4 uA active & LPM2,3,4 current
consumption Automatic high-side protection
when CPU is active
Maximum Robustness
Fast Performance Mode 5 us wakeup from LPM2,3,4 +8 uA active & LPMx current
consumption
Current
150 us wakeup from LPMx
5 us wakeup from LPMx
36Entering LPMs
Entering Low Power Modes
37In terrupts and Stack
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Active and Low Power Operation
Interrupts and the Stack
Interrupts and the StackEntering Interrupts
Any currently executing instruction is completed. The PC, which points to the next instruction, is pushed onto the stack. The SR is pushed onto the stack. The interrupt with the highest priority is selected The interrupt request flag resets automatically on single-source flags.
Multiple source flags remain set for servicing by software. The SR is cleared. This terminates any low-power mode. Because the
GIE bit is cleared, further interrupts are disabled. The content of the interrupt vector is loaded into the PC; the program
continues with the interrupt service routine at that address.
38Int rinsics
Intrinsics
Using Intrinsic Functions to Program the Status Register (SR)
Intrinsic Functions: __bic_SR_register(LPM3_bits);__bic_SR_register_on_exit(LPM3_bits);__bis_SR_register(LPM3_bits + GIE);__bis_SR_register_on_exit(unsigned short a);__get_SR_register(void) ; __get_SR_register_on_exit(void) ;__enable_interrupts( ) ;__disable_interrupts( );
Other useful intrinsics:__no_operation();__delay_cycles(1000000);__bcd_add_short( short, short ); __bcd_add_long( long, long ) ;__even_in_range( );
Refer to intrinsics.h or compiler documentation
39Fail-Safe
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Active and Low Power Operation
Fail-Safe Behavior
Fail-Safe Behavior & Clock Requests
LFXT1 reverts to REFO HFXT1 & XT2 revert to DCO On startup, LFXT1 will fail
because quartz crystals are not instant-on
Clearing the fault flags allows expected default operation
Modules place clock requests to the system clocks
LPM3 entry can be prevented if a module requires SMCLK to operate properly
User must be aware of the clocks required in the system.
40Available Oscilla tors
Available Oscillators
ULP Review of Available OscillatorsClock Frequency Precision Current Draw Crystal
Required
High-FrequencyDCO 100kHz
60MHzLow 60uA
HFXT1/ XT2
4 - 32MHz High 260uA @ 12MHz
X
MODOSC 5MHz n/a n/aLow-Frequency
LFXT1 32kHz High 300nA XVLO ~10kHz Low 60nA
REFO 32kHz Medium/High 3uA
RTC
41Lab_2
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Active and Low Power Operation
Overview of Lab2 Exercise
Lab2: Active & ULP Mode OperationLearn and understand how two key modules (PMM & UCS) achieve ultra low power operation by measuring the power consumption of various Active and LPM3 scenariosUsing an ammeter and measure the current through the PWR1 jumper
FET
42Agenda
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Lab 2: Active and Low Power Mode Operation
Lab 2: Active and Low Power Mode Operation
Objective The objective of this lab exercise is to gain an understanding on how two key modules of the MSP430F5438A are used to achieve ultra-low power operation. The Power Management Module (PMM) and Unified Clock System (UCS) will be configured and modified as we measure the typical average current consumption of the device in the following active and LPM3 scenarios:
Active running at 8 MHz initialize the FLL Active running at 25 MHz change the COREV levels for greater than 8 MHz
operation LPM3 REFO- enter LPM3 with default ACLK settings LPM3 LFXT1 handle oscillator faults to set LFXT1 ACLK LPM3 VLO evaluate ultra-low power tradeoffs for oscillators at VLO ACLK The LPM3 applications blink the LED on and off every 3 seconds. After you have verified that the application download and function, you can comment out the line P1OUT ^= ~BIT0; . This will allow you to measure the current without the spikes due to the LED.
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Lab 2: Active and Low Power Mode Operation
In the Active Running scenarios (first two in the box above) a function is called to provide a current consumption test. This test includes a mix of various MSP430 instructions (type I, II, JMP, emulations, etc.) and uses various MSP430 addressing modes. The function is called from C with the following code: // Call active mode current consumption test ACTIVE_MODE_TEST();
ACTIVE_MODE_TEST ( ) is written in assembly and consists of the following: .global ACTIVE_MODE_TEST .text ACTIVE_MODE_TEST MOV #0x2000, R4 MOV #0x4, 0(R4) MOV &0x2000, &0x2002 ADD @R4, 2(R4) SWPB @R4+ MOV @R4, R5 IDD_AM_L1 ; run 8 times XOR @R4+, &0x2020 DEC R5 JNZ IDD_AM_L1 JMP ACTIVE_MODE_TEST .end
- Code mixes with types of instructions: type I,II, JMP, emu - Code mixes with address modes - Type of Instructions # of instructions: 6+8*3 = 30 ALU inst: 2+2*8 = 18 -60% Data Read inst: 4+1*8 = 12 -40% Data Write inst: -40% Control/Jump : 8 -26%
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Lab 2: Active and Low Power Mode Operation
Procedure
Import CCS Project 1. Import the CCS project for this lab exercise by clicking:
Project Import Existing CCS/CCE Eclipse Project
Then in the Import dialog window click Browse and navigate to: C:\5xx_ODW\ Lab_2. Select Lab_2 in the Projects box, check the Copy projects into workspace checkbox and click Finish.
In the Project pane of CCS, click the plus sign (+) to the left of Lab_2 and notice the files are listed for the various low power measurement scenarios. Note that the ACTIVE_8_MHZ.c file is included in the build.
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Lab 2: Active and Low Power Mode Operation
Active Running at 8 MHz In this scenario we will measure current consumption of the device in the active mode running at 8 MHz.
2. Be sure that Lab_2 is set as the [Active ACTIVE_8_MHZ] build configuration. If not, then right-click in the Project pane, select Active Build Configuration and left-click ACTIVE_8_MHZ.
3. Open ACTIVE_8_MHZ.c for editing and notice the following:
halBoardInit( ) initializes the GPIO for minimum current consumptions and ultra-low power operation
Init_FLL_Settle( ) selects the RSEL, DCO taps, delay for FLL to settle, and MCLK, SMCLK, ACLK sources
For future reference: Check out #include hal_ucs.h Check the MSP430 application notes for hal_UCS and hal_PMM library
descriptions
4. Click the Debug button to assemble/compile and download the executable into the device flash memory.
5. Click the Run button to run the program, then click the Terminate All button to halt the program, terminate the debugger session, and return to the C/C++ perspective.
6. Disconnect the 14-pin JTAG cable from the Experimenters board.
7. Be sure that the batteries are in place on the underneath of the Experimenters board and move the SW1 FET/USB/BATT power supply switch to BATT.
SW1 JP2 JP3 JP1
8. Turn on your multimeter and set it to a range that can measure
-
Lab 2: Active and Low Power Mode Operation
10. Measure the current consumption:__________ (It should be between 1.9 mA 2.1 mA).
11. Some further information: Since the CPU performs a 32-bit fetch, code alignment can impact current consumption significantly
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Lab 2: Active and Low Power Mode Operation
Active Running at 25 MHz In this scenario we will change the core voltage levels for operation greater than 8 MHz and measure current consumption of the device in the active mode running at 25 MHz.
12. Disconnect and turn off your multimeter. Reconnect the JP1 MSP430 PWR jumper, and the 14-pin JTAG cable. Move the SW1 FET/USB/BATT power supply switch to FET.
13. Right-click in the CCS Project pane and select Active Build Configuration. Left-click ACTIVE_25_MHZ. Lab_2 should now be set as the [Active ACTIVE_25_MHZ] build configuration.
14. Open ACTIVE_25_MHZ.c for editing and notice the following:
SetVCore(PMMCOREV_3) is used to set one level at a time - //***********************************************************// // Set VCore //**********************************************************// unsigned int SetVCore (unsigned char level) { unsigned int actlevel; unsigned int status = 0; level &= PMMCOREV_3; actlevel = (PMMCTL0 & PMMCOREV_3); // step by step increase or decrease while (((level != actlevel) && (status == 0)) || (level < actlevel)) { if (level > actlevel) status = SetVCoreUp(++actlevel); else status = SetVCoreDown(--actlevel); } return status; }
SVSx & SVMx management turns off SVSL and SVSM, leaves SVSH in full performance mode, and delivers fast wake-up (5 s) time with SVS protection on DVcc
15. Click the Debug button, click the Run button and then click the Terminate
All button.
16. Disconnect the 14-pin JTAG cable from the Experimenters board and move the SW1 FET/USB/BATT power supply switch to BATT.
17. Turn on your multimeter and set it to a range that can measure
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Lab 2: Active and Low Power Mode Operation
LPM3 REFO Mode In this scenario we will enter the LPM3 mode with the default ACLK settings and measure current consumption of the device when the internal 32 kHz REFO clock sources ACLK.
20. Disconnect and turn off your multimeter. Reconnect the JP1 MSP430 PWR jumper, and the 14-pin JTAG cable. Move the SW1 FET/USB/BATT power supply switch to FET.
21. In the CCS Project pane, set LPM3_REFO as the active build configuration.
22. Open LPM3_REFO.c for editing and notice the following:
Entering LPM3 using intrinsic functions __bis_SR_register(LPM3_bits + GIE); // Enter LPM3, enable interrupts __no_operation(); // For debugger
Watchdog triggers an interrupt approximately every 3 seconds /* Initialize WDT to interval timer mode, triggering every 3 seconds */ WDTCTL = WDTPW+WDTSSEL__VLO+WDTTMSEL+WDTCNTCL+WDTIS2+WDTSSEL0; SFRIE1 |= WDTIE; // Enable WDT interrupt
Return from ISR using intrinsic function // Watchdog Timer interrupt service routine #pragma vector = WDT_VECTOR __interrupt void WDT_ISR(void) { __bic_SR_register_on_exit(LPM3_bits); }
23. Click the Debug button, click the Run button and then click the Terminate
All button.
24. Disconnect the 14-pin JTAG cable from the Experimenters board and move the SW1 FET/USB/BATT power supply switch to BATT.
25. Remove and save the JP1 MSP430 PWR jumper and connect the multimeter leads to the header with the red lead closest to the edge of the board.
26. Turn on your multimeter and set it to the lowest DC milliamp measurement range. (Be sure that the leads are connected to the proper jacks to read current).
27. LED1 on the Experimenters board will blink ON and OFF if the program is running correctly.
28. Measure the current consumption while LED1 is OFF:__________ (It should be between 4.3 A 4.9 A).
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Lab 2: Active and Low Power Mode Operation
LPM3 LFXT1 Mode In this scenario we will handle oscillator faults to set LFXT1 ACLK and measure current consumption of the device when the internal 32 kHz crystal on the LFXT1 oscillator sources ACLK.
29. Disconnect and turn off your multimeter. Reconnect the JP1 MSP430 PWR jumper, and the 14-pin JTAG cable. Move the SW1 FET/USB/BATT power supply switch to FET.
30. In the CCS Project pane, select LPM3_LFXT1 as the active build configuration.
31. Open LPM3_LFXT1.c for editing and notice the following:
Initializing crystal pins and LFXT_Start( ); /* Initialize LFXT1 */ P7SEL |= BIT1+BIT0; // Enable crystal pins LFXT_Start(XT1DRIVE_0);
LFXT_Start (XT1DRIVE_0); void LFXT_Start(unsigned int xtdrive) { UCSCTL6_L |= XT1DRIVE1_L+XT1DRIVE0_L; // Highest drive set - XT1 startup while (SFRIFG1 & OFIFG) { // check OFIFG fault flag UCSCTL7 &= ~(DCOFFG+XT1LFOFFG+XT1HFOFFG+XT2OFFG); // Clr OSC flt flags SFRIFG1 &= ~OFIFG; // Clear OFIFG fault flag } UCSCTL6 = (UCSCTL6 & ~(XT1DRIVE_3)) |(xtdrive); // set Drive mode }
32. Click the Debug button, click the Run button and then click the Terminate
All button.
33. Disconnect the 14-pin JTAG cable from the Experimenters board and move the SW1 FET/USB/BATT power supply switch to BATT.
34. Remove and save the JP1 MSP430 PWR jumper and connect the multimeter leads to the header with the red lead closest to the edge of the board.
35. Turn on your multimeter and set it to the lowest DC milliamp measurement range. (Be sure that the leads are connected to the proper jacks to read current).
36. LED1 on the Experimenters board will blink ON and OFF if the program is running correctly.
37. Measure the current consumption while LED1 is OFF:__________ (It should be between 1.9 A 2.4 A).
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Lab 2: Active and Low Power Mode Operation
LPM3 VLO Mode In this scenario we will evaluate the tradeoffs for oscillator at VLO ACLK and measure current consumption of the device when VLO sources ACLK.
38. Disconnect and turn off your multimeter. Reconnect the JP1 MSP430 PWR jumper, and the 14-pin JTAG cable. Move the SW1 FET/USB/BATT power supply switch to FET.
39. In the CCS Project pane, select LPM3_VLO as the active build configuration.
40. Open LPM3_VLO.c for editing and notice the following:
ACLK clock source selection SELECT_ACLK(SELA__VLOCLK); // Select VLO_CLOCK to source ACLK
Other UCS_Library macros
41. Click the Debug button, click the Run button and then click the Terminate
All button.
42. Disconnect the 14-pin JTAG cable from the Experimenters board and move the SW1 FET/USB/BATT power supply switch to BATT.
43. Remove and save the JP1 MSP430 PWR jumper and connect the multimeter leads to the header with the red lead closest to the edge of the board.
44. Turn on your multimeter and set it to the lowest DC milliamp measurement range. (Be sure that the leads are connected to the proper jacks to read current).
45. LED1 on the Experimenters board will blink ON and OFF if the program is running correctly.
46. Measure the current consumption while LED1 is OFF:__________ (It should be between 1.2 A 1.6 A).
Halt Debugging and Close the Project47. Turn off your multimeter.
48. Right-click on Lab_2 in the CCS Project pane and select Close Project.
Youre done.
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Analog Peripherals
Introduction This module will discover the mixed-signal capability of the MSP430 architecture and learn about its effect on low power operation. In the lab exercise we will measure an analog signal using the integrated temperature sensor, perform an analog-to-digital conversion, and send the results over a USB link to a CCS4 terminal window.
MSP430 Workshop Analog Peripherals 3 - 1
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Module Topics
Module Topics Analog Peripherals .................................................................................................................................... 3-1
Module Topics......................................................................................................................................... 3-2 Analog Peripherals ................................................................................................................................. 3-3
Comp_B Analog Comparator ............................................................................................................. 3-3 ADC12_A........................................................................................................................................... 3-4 Conversion Memory and Control ....................................................................................................... 3-5 Lab 3 Overview .................................................................................................................................. 3-6
Lab 3: Brute-Force Temperature Sampling............................................................................................ 3-8 Objective ............................................................................................................................................ 3-8 Procedure............................................................................................................................................ 3-9
3 - 2 MSP430 Workshop Analog Peripherals
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Analog Peripherals
Analog Peripherals
Comp_B Analog Comparator
Comp_B Analog Comparator Inverting and noninverting terminal
input multiplexer Software-selectable RC filter for the
comparator output Output provided to Timer_A capture
input Interrupt capability Selectable reference voltage
generator and voltage hysteresis generator
Reference voltage input from shared reference
Ultra-low-power comparator mode
44ADC12_A
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Analog Peripherals
ADC12_A
ADC12_A Features
12-bits, SAR, 200 ksps+ Timer_A/B, software
triggers Up to 12 external input Conversion Modes:
Single Sequence Repeat-single Repeat-sequence
Internal/external reference
16 conversion result storage
Input range: Vss Vref
45ADC12_A
ADC12_A Enhancements
VREF settling time 75us vs. 17ms
Tighter temp coefficient on internal reference 50ppm vs. 100ppm
Lower power modes Selectable speed vs power ADC12_A core is only enabled
when needed Higher clock dividers for
faster system clocks ~6x lower current than ADC12
150uA for ADC active 100uA for 2.5V VREF active
46Temp and Vcc
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Analog Peripherals
ADC12 Temperature & Vcc Sampling
On-chip temperature sensor channel On-chip Vcc/2 channel The temperature sample period > 30
us Temp sensor offset voltage is large
and must be calibrated 2-point calibration data inside
Factory Application Data
47Conversion Memory and Control
Conversion Memory and Control
ADC12 Conversion Memory & Control
Each memory register is configurable EOSx Identifies the end of a sequence-of-conversions.
When the conversion result is written into the EOS ADC12MEMx register, the interrupt will be triggered.
SREFx Selects the reference (internal, external, etc) INCHx Selects input channel for the ADC12MEMx register
Input channels can be mixed for a sequence-of-conversions
48Lab 3 Flowchart
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Analog Peripherals
Lab 3 Overview
Lab 3: Brute-force Temperature Sampling
49Lab 3 code
Lab 3.c Code
while(1){ REFCTL0 |= REFON; // Enable internal reference__delay_cycles(85); // Settling time for referenceADC12CTL0 |= ADC12ENC+ADC12SC; // (Re)enable & trigger conversion// Poll IFG until ADC12MEM1 loaded signifying sequence is completewhile(!(ADC12IFG & BIT1)); ADC12CTL0 &= ~ADC12ENC; // Disable conversions to configure REFREFCTL0 &= ~REFON; // Disable internal referencetemp_temp = ADC12MEM0; // Read ADC12 temperature conversiontemp_vcc = ADC12MEM1; // Read ADC12 Vcc/2 conversion// Calculate temperature in degrees Celsius & format display string accordingly...// Calculate temperature in degrees Fahrenheit & format display string accordingl...// Calculate Vcc in volts & format display string accordingly.../* Initialize serial communication module to send data over USB */halUsbInit();halUsbSendString(&USB_string[0],USB_STRING_LEN+2); halUsbShutDown(); // Shut down USB to enter sleep mode__delay_cycles(2200000); // Delay 2 seconds
} }
50Alphabet Soup
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Analog Peripherals
Decoding the Alphabet Soupvoid halADCInit(void){ ADC12CTL0 = ADC12SHT0_7 + ADC12ON + ADC12MSC;ADC12CTL1 = ADC12CONSEQ_1+ADC12SHP; ADC12MCTL0 = ADC12SREF_1 + ADC12INCH_10; ADC12MCTL1 = ADC12SREF_1 + ADC12INCH_11 + ADC12EOS;REFCTL0 |= REFMSTR + REFVSEL_1;
}
(User Guide)
(msp430x54xA.h file)
51Lab 3 Power
CPU is ALWAYS ON (~290 uA)Delay between ADC12 samples executed by software
__delay_cycles(2200000); ADC12 handled completely in software
Reference settling, Software trigger, IFG polling
Lab 3 Power
540uA
390uA
Active ADC
= 150uA
290uA
Curre
nt
Time2 seconds until next Sample
Active MCLK@1MHz=290uA
1.5V Internal Reference = 100uA
75us 80us
Active ADC
= 150uA
52Lab 3
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Lab 3: Brute-Force Temperature Sampling
Lab 3: Brute-Force Temperature Sampling
Objective The objective of the next three lab exercises (Lab 3 though Lab 6) is to gain an understanding on how the ultra-low power features of the MSP430F5438A compare in a mixed-signal application. In all three cases we will perform the same application task measure an analog signal using the integrated temperature sensor, perform an analog-to-digital conversion, and send the results over a USB link to a CCS4 terminal window. Each case will show significant differences in power consumption:
Lab 3 implements brute-force temperature sampling with the ADC12_A. This implementation had no interrupts, all CPU delays and flag polling. Current draw was about 300 uA.
Lab 4 will use timer interrupts. We will handle the two second delay with a hardware timer interrupt. This will prove to be the most significant decrease in power consumption.
Lab 5 will be a fully optimized ADC12 routine. We will use the ADC12 interrupts to signify end-of-conversion. The timer will automatically handle the reference settling time as well as trigger the ADC12 sampling. This will maximize the time that the CPU spends in LPM3.
Lab 3: Using the ADC12 Use ADC12 integrated temperature sensor Set up ADC12 to perform a single conversion Loop continuously, converting to Degrees F and C in software Touch the F5438A with a finger to change the temperature Open a watch window in the debugger to see the temperature values
FET
53Agenda
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Lab 3: Brute-Force Temperature Sampling
Procedure
Import CCS Project 1. Import the CCS project for the next three lab exercises by clicking:
Project Import Existing CCS/CCE Eclipse Project
In the Import dialog window click Browse and navigate to the C:\5xx_ODW folder and select OK. Next, in the Projects window check Lab_3, Lab_4, and Lab_5 (be sure all three labs are selected). Then check the Copy projects into workspace checkbox and click Finish.
2. Set Lab_3 as the [Active Lab3] project by right-clicking on Lab_3 in the Project pane and selecting Set as Active Project. Click the plus sign + to the left of Lab_3 and notice the files are listed for the project.
Determine COM port for MSP-EXP430 Board 3. Connect the small size connector of the USB-to-miniUSB cable to the
MSP-EXP430F5438 Experimenters board and the other end to the USB port on your computer.
4. Determine the COM port used for the board by clicking (in Windows) Start Run then type devmgmt.msc in the box and select OK. (In Windows 7, just type into the Search programs and files box) In the Device Manager window that opens, left-click the symbol left of Ports (COM & LPT) and record the COM port number for MSP-EXP430F5438 USB Serial Port (COMxx):________. Close the Device Manager.
MSP430 Workshop Analog Peripherals 3 - 9
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Lab 3: Brute-Force Temperature Sampling
Examine, Download, and Run Code 5. Back in CCS, open Lab_3_soln.c for editing and notice the code used to calculate the
temperature and voltage. The code that follows is used to format the data for displaying. At the bottom notice the code used to initialize the ADC12:
void halADCInit(void){ // 5.4MHz (MODOSC_max) * 30 us (t_sensor)= 162 cyc min samp time ADC12CTL0 = ADC12SHT0_7 + ADC12ON+ADC12MSC; ADC12CTL1 = ADC12CONSEQ_1+ADC12SHP; ADC12MCTL0 = ADC12SREF_1 + ADC12INCH_10; ADC12MCTL1 = ADC12SREF_1 + ADC12INCH_11 + ADC12EOS; /* Initialize the shared reference module */ REFCTL0 |= REFMSTR + REFVSEL_0; // Configure internal 1.5V ref }
ADC12SHT0_7 selects sample and hold time = 192 ADC12CLK cycles t_sensor must be > (5.4 MHz (MODOSC_max) * 30 us (t_sensor) = 162 cycles)
ADC12MSC selects multiple sample and conversion so multiple conversions are performed automatically (only a single trigger per SOC is required)
ADC12SHP is the sample-and-hold signal select which selects SAMPCON to be sourced from sampling timer (~5 MHz MODOSC)
ADC12SREF_1 selects the internal reference as the reference for ADC12MEM channels 0 and 1
ADC12INCH_x is the input channel select (x = 10 for the temperature sensor; x = 11 for Vcc/2)
ADC12EOS identifies channel 11 as the end-of-sequence of conversions REFMST disables backwards compatibility mode to leverage REF module REFVSEL selects 1.5V reference
To understand how the above code example works, first the bit field descriptions are found in the Users Guide:
3 - 10 MSP430 Workshop Analog Peripherals
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Lab 3: Brute-Force Temperature Sampling
And the bit fields are defined in msp430f5438a.h :
6. Turn on your multimeter and set it to a range that can measure about 300uA. Click the
Debug button to assemble/compile and download the executable into the device flash memory.
7. Click the Run button to run the program.
Open a CCS4 Terminal Window 8. Make sure the code has been downloaded and running. In CCS select:
Window Show View Other
In the Show View box, left-click the plus sign + next to Terminal. Click on Terminal and select OK. A terminal window will appear.
9. On the right side of the terminal pane ,click the Settings button. In the Terminal Settings window that appears, configure the Connection Type as Serial using the pull-down tab.
10. Make the following changes to the Terminal Settings and then click OK.
Port: COMxx as recorded in step 4
Baud Rate: 9600
Data Bits: 8
Stop Bits: 1
Parity: none
Flow Control: none
Timeout (sec): 5
11. Now you should see scrolling temperature (in C and F) and the voltage in the Terminal pane. Verify the temperature reading changes in the terminal window by placing your finger or breathing on the MSP430 device on the board.
MSP430 Workshop Analog Peripherals 3 - 11
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Lab 3: Brute-Force Temperature Sampling
Current Measurement
12. Disconnect the 14-pin JTAG cable from the Experimenters board.
13. Click the Disconnect button in the Terminal pane and disconnect the USB-to-miniUSB cable from your PCs USB port.
14. Observe the current consumption. Because of the timer delay and the meters inability to read quickly changing currents, your readings will jump around
In this application the CPU is always on.
The delay between ADC12 samples is executed by software __delay_cycles(2200000); // Delay 2 seconds
ADC12 is handled completely in software (i.e. reference settling, software trigger, IFG polling)
15. Turn off your multimeter and reconnect the 14-pin JTAG cable and the USB-to-miniUSB cable.
16. Click the Terminate All button.
Youre done.
3 - 12 MSP430 Workshop Analog Peripherals
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Hardware Timers
Introduction This module will discuss the features of the MSP430 hardware timers. Many microprocessors incorporate timer to generate simple time intervals. The timers on the MSP430 include additional capabilities for generating PWM waveforms, controlling the ADC hardware, and even implement UART communication functions. In the lab exercise we will build on the previous exercise and use the hardware timers to conserve power.
MSP430 Workshop Hardware Timers 4 - 1
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Module Topics
Module Topics Hardware Timers ...................................................................................................................................... 4-1
Module Topics......................................................................................................................................... 4-2 Hardware Timers .................................................................................................................................... 4-3
Timer Architecture ............................................................................................................................. 4-3 Counting Modes ................................................................................................................................. 4-4 Interrupts ............................................................................................................................................ 4-4 Timer_B vs Timer_A.......................................................................................................................... 4-5 Lab 4 Details....................................................................................................................................... 4-6
Lab 4: Using Hardware Timers to Conserve Power............................................................................... 4-7 Objective ............................................................................................................................................ 4-7 Procedure............................................................................................................................................ 4-8
4 - 2 MSP430 Workshop Hardware Timers
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HaTrdware Timers
Hardware Timers
Timer Architecture
Timer Architecture
Asynchronous 16-bit timer/counter
Continuous, up-down, up count modes
Multiple capture/compare registers
PWM outputs Interrupt vector register
for fast decoding Can trigger DMA
transfer On all MSP430s
55Timer Modes
MSP430 Workshop Hardware Timers 4 - 3
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HaTrdware Timers
Counting Modes
Timer Counting Modes
56Interrupts
Interrupts
Timer_B Interrupts
TBCCR1 CCIFG
TBCCR2 CCIFG
TBIFG
TIMER_B1_VECTORTBIV
TBCCR1-6 and TB interrupt flags are prioritized and combined using the Timer_B Interrupt Vector Register (TBIV) into anotherinterrupt vector
TBCCR0 CCIFG TIMERB0_VECTOR
The Timer_B Capture/Comparison Register 0 Interrupt Flag (TBCCR0) generates a single interrupt vector:
Your code must contain a handler to determine which Timer_Binterrupt triggered
No handler is required
The same applies to Timer_A57
B vs A
4 - 4 MSP430 Workshop Hardware Timers
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HaTrdware Timers
Timer_B vs Timer_A
Timer_B vs Timer_A Default function identical to Timer_A 8, 10, 12, or 16-bit timer or counter (16-bit only for Timer_A) Outputs double-buffered for simultaneous loading CCRx registers can be grouped for simultaneous updates Tri-state function from external pin
58Lab 4 Flowchart
MSP430 Workshop Hardware Timers 4 - 5
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HaTrdware Timers
Lab 4 Details
Lab 4 Temperature Measurement with Timer
Main loop Timer CCR0 ISR
59Lab 4 Power
Lab 4 Power
CPU is in LPM3 most of the time Delay between ADC12 samples handled by
hardware ADC12 handled completely in software
Reference settling, Software trigger and IFG polling
75us 80us
540uA
390uA
Active ADC
= 150uA
290uA
Curr
ent
Time2 seconds until next Sampl e
1.5V Internal Reference = 100uA
Acti ve ADC
= 150uA
Active MCLK@1MHz=290uA
2.1uA
60Lab 4
4 - 6 MSP430 Workshop Hardware Timers
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Lab 4: Using Hardware Timers to Conserve Power
Lab 4: Using Hardware Timers to Conserve Power
Objective In this lab exercise we will perform the same application task as the previous exercise, but we will make use of Low Power Mode 3 to reduce power consumption. Timer B will be configured to count in up-mode and trigger an interrupt which will replace the two second software delay used in the previous lab exercise. Also, Timer B CCR0 interrupt service routine (ISR) will software trigger an ADC12 sample/conversion. These modifications will provide the most significant decrease in power consumption.
Lab 4: Using Hardware Timers to Conserve Power
Perform same task as previous lab exercise, but use LPM3 to reduce power consumptionTimer B will be used to replace the 2 second software delay
FET
61Agenda
MSP430 Workshop Hardware Timers 4 - 7
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Lab 4: Using Hardware Timers to Conserve Power
Procedure
Set Active Project and Check COM Port Connection 1. Set Lab_4 as the [Active Lab 4] project by right-clicking on Lab_4 in the Project
pane and selecting Set as Active Project. Click the minus sign (-) next to Lab_3 to collapse the Lab_3 project. Click the plus sign (+) next to Lab_4 and notice the files are listed for the project.
2. Make sure that the small size connector of the USB-to-miniUSB cable is connected to the MSP-EXP430 board and the other end to the USB port on your computer. Also make sure your emulator cables are properly connected.
Examine, Download, and Run Code 3. Close any open editor panes. Open Lab_4_soln.c for editing and notice the code used to
integrate LPM3, the Timer_ISR ( ), and initialize a Timer_B to trigger a periodic wake-up using a timer capture event:
Integrate LPM3 into the code // Bit-set (LPM3_bits + GIE) in SR register to enter LPM3 mode __bis_SR_register(LPM3_bits + GIE); __no_operation();
Timer_ISR( ) Handle the ADC12_A reference enable and software trigger Clear the LPM3 bits in SR register on stack to exit active from the ISR
// Timer B0 CCR0 interrupt service routine #pragma vector=TIMER0_B0_VECTOR __interrupt void TIMER0_B0_ISR(void) { REFCTL0 |= REFON; // Enable internal 1.5V ref __delay_cycles(85); // 1.5V REF settling time ADC12CTL0 |= ADC12ENC+ADC12SC; // (Re)enable & trig conv __bic_SR_register_on_exit(LPM3_bits); }
Init Timer_B to trigger a periodic wake-up using a timer capture event void halTimerInit(void) { TB0CCR0 = 65535; TB0CCTL0 = CCIE; // CCR0 interrupt enabled TB0CTL = TBSSEL_1 + MC_1 + TBCLR; // ACLK, upmode, clr TBR }
4. Turn on your multimeter and set it to a range that can measure about 50uA. Click the
Debug button to assemble/compile and download the executable into the device flash memory.
5. Click the Run button to run the program.
4 - 8 MSP430 Workshop Hardware Timers
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Lab 4: Using Hardware Timers to Conserve Power
Connect the Terminal 6. Click the Terminal tab on the right of your screen, then click the Connect button.
Right-click in the Terminal pane and select Clear All.
7. You should see scrolling temperature (in C and F) and the voltage in the Terminal pane. Verify the temperature reading changes in the terminal window by placing your finger or breathing on the MSP430 device on the board.
Current Measurement8. Disconnect the 14-pin JTAG cable from the Experimenters board.
9. Click the Disconnect button in the Terminal pane and disconnect the USB-to-miniUSB cable from your PCs USB port.
10. Observe the current consumption. Because of the timer delay and the meters inability to read quickly changing currents, your readings will jump around
In this application the CPU is in LPM3 most of the time.
The delay between ADC12 samples is handled by hardware ADC12 is handled completely in software (i.e. reference settling, software
trigger, IFG polling)
MSP430 Workshop Hardware Timers 4 - 9
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Lab 4: Using Hardware Timers to Conserve Power
11. Turn off your multimeter and reconnect the 14-pin JTAG cable and the USB-to-miniUSB cable.
12. Click the Terminate All button.
Youre done.
4 - 10 MSP430 Workshop Hardware Timers
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Optimized ULP ADC12 Routine
Introduction This module will discuss how to optimize the data acquisition capability of the MSP430 ADC for ultra-low power operation. In the lab exercise optimize the routine by keeping the CPU inactive most of the time and only activating it when needed.
MSP430 Workshop - Optimized ULP ADC12 Routine 5 - 1
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Module Topics
Module Topics Optimized ULP ADC12 Routine.............................................................................................................. 5-1
Module Topics......................................................................................................................................... 5-2 Optimized ULP ADC12 Routine ............................................................................................................. 5-3
Timer Output and Triggering.............................................................................................................. 5-3 Timer_B Interrupts ............................................................................................................................. 5-4 Handler ............................................................................................................................................... 5-4 Interrupt Control ................................................................................................................................. 5-5 How to Write the ADC12IFG1 Handler............................................................................................. 5-5 Lab 5 Code ......................................................................................................................................... 5-6 Lab 5 Power........................................................................................................................................ 5-6
Lab 5: Fully Automated ADC12 Routine ................................................................................................ 5-7 Objective ............................................................................................................................................ 5-7 Procedure............................................................................................................................................ 5-8
5 - 2 MSP430 Workshop - Optimized ULP ADC12 Routine
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Optimized ULP ADC12 Routine
Optimized ULP ADC12 Routine
Timer Output and Triggering
Timer Output Continuous Mode
Continuous Mode
Each CCRx register can be used in the different timer modes to generate interrupt flags
Independent PWM frequencies with different duty cycles can be automatically generated in continuous mode using CCR0 and CCR1+
A new interrupt (TAIFG or TBIFG) occurs on every rollover of the timer
63Timer Triggering ADC12
Timer-Triggering the ADC12 Power Optimization:
Currently: Timer delays for 2 seconds, software ADC12 trigger Optimizat ion: Timer delays for 2 seconds, then:
[1] Enables reference on TBIFG rollover
[2] Triggers ADC12 sample/conversion using TBCCR1 output SHP bit selects whether the sample time is set by:
TBCCR1 output (SHP = 0) SHT0x * ADC12CLK [ lab uses SHT0x * ADC12CLK cycles (192 x 1/5MHz ~= 40 us)]
Time between TBIFG and TBCCR1 must be > 75 us for 2.0V REF to stabilize
64Timer Interrupts
MSP430 Workshop - Optimized ULP ADC12 Routine 5 - 3
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Optimized ULP ADC12 Routine
Timer_B Interrupts
Timer_B Interrupts
TBCCR1 CCIFG
TBCCR2 CCIFG
TBIFG
TIMER_B1_VECTORTBIV
TBCCR1-6 and TB interrupt flags are prioritized and combined using the Timer_B Interrupt Vector Register (TBIV) into anotherinterrupt vector
TBCCR0 CCIFG TIMERB0_VECTOR
The Timer_B Capture/Comparison Register 0 Interrupt Flag (TBCCR0) generates a single interrupt vector:
65Handler
Handler
TB0IV Handler Example
#pragma vector = TIMER0_B1_VECTOR__interrupt void TIMER0_B1_ISR(void){switch(__even_in_range(TB0IV,10)){case 2 : // TBCCR1 CCIFGP1OUT ^= 0x04; break;
case 4 : // TBCCR2 CCIFGP1OUT ^= 0x02; break;
case 10 : // TBIFGP1OUT ^= 0x01; break;
}}
#pragma vector = TIMER0_B1_VECTOR__interrupt void TIMER0_B1_ISR(void){switch({case 2 : // TBCCR1 CCIFGP1OUT =^ 0x04; break;
case 4 : // TBCCR2 CCIFGP1OUT =^ 0x02; break;
case 10 : // TBIFGP1OUT =^ 0x01; break;
}}
0xF814 add.0xF818 reti0xF81A jmp 0xF8240xF81C jmp 0xF82A0xF81E reti0xF820 reti0xF822 jmp 0xF8300xF824 xor.b #0x4,&P1OUT0xF828 reti0xF82A xor.b #0x2,&P1OUT0xF82E reti0xF830 xor.b #0x1,&P1OUT0xF834 reti
__even_in_range(TB0IV,10))
w &TB0IV,PC0xF814 0xF818 reti0xF81A jmp 0xF8240xF81C jmp 0xF82A0xF81E reti0xF820 reti0xF822 jmp 0xF8300xF824 xor.b #0x4,&P1OUT0xF828 reti0xF82A xor.b #0x2,&P1OUT0xF82E reti0xF830 xor.b #0x1,&P1OUT0xF834 reti
Source TAIV Contents
add.w &TB0IV,PC
No interrupt pending 0TBCCR1 CCIFGTBCCR2 CCIFG ReservedReserved TBIFGReservedReserved
02h04h06h08h0Ah0Ch0Eh
0TB0IV
15xxxx000000000 00
0
Highest-priority IFGs clearedwhen TB0IV is read
66Interrupt Control
5 - 4 MSP430 Workshop - Optimized ULP ADC12 Routine
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Optimized ULP ADC12 Routine
Interrupt Control
ADC12 Interrupt Control
Power optimization: Currently: Polling for ADC12MEM1IFG Optimization: Enable ADC12MEM1IFG interrupts & wake CPU
only to handle conversion data ADC12 Interrupt Enable (ADC12IE) bits enable interrupt request
on a write to the respective ADC12MEMx register ADC12MEM1 has EOS set, so interrupt will be requested after the
sequence of temperature and vcc/2 conversions is completeReading the ADC12MEMx register clears the respective interrupt
flag
67ADC12IFG1 Handler
How to Write the ADC12IFG1 Handler
How to Write the ADC12IFG1 Handler
switch(__even_in_range(ADC12IV,36)){
case 0: break; // No interruptcase 2: break; // Overflowcase 4: break; // Time overflowcase 6: break; // ADC12MEM0IFGcase 8: // ADC12MEM1IFG
Disable REF & ADC12 samples; Read ADC12MEM0 & ADC12MEM1;Exit active to main( ); break;
case 36: break;}
68Lab 5 Code
MSP430 Workshop - Optimized ULP ADC12 Routine 5 - 5
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Optimized ULP ADC12 Routine
Lab 5 Code
Lab 5 Code
Timer Overflow ISRADC12MEM1 ISRMain
69Lab 5 Power
Lab 5 Power
CPU is no longer active during: ADC12 reference settling ADC12 sampling
ADC12ISR wakes CPU for very short time: Entry/exit to ISR Disables the reference Stores the ADC12MEM0 & ADC12MEM1 values Wakes active on exit from LPMx
Lab 5 Power
252uA
102uA
Curr
ent
Time2 seconds until next Sampl e
2.1uA
Acti ve ADC
= 150uA
Active ADC
= 150uA
1.5V Internal Reference = 100uA
70Lab 5
5 - 6 MSP430 Workshop - Optimized ULP ADC12 Routine
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Lab 5: Fully Automated ADC12 Routine
Lab 5: Fully Automated ADC12 Routine
Objective In this lab exercise we will perform the same application task as the previous exercise, but we will use a fully automated ADC12 routine which will optimize the data acquisition for ultra-low power consumption. To minimize power consumption the CPU will not be active during the ADC12 reference settling and sampling. The ADC12ISR will wake the CPU for a very short period of time on entry/exit of the ISR and storing the ADC12MEM0 and ADC12MEM1 results.
Lab 5: Fully Automated ADC12 RoutinePerform same task as previous lab exercise, but use Timer B in continuous mode to trigger TBIFG interrupt and generate TBCCR1 outputTime between TBIFG and TBCCR1 will automatically handle internal reference settling time
FET
71Agenda
MSP430 Workshop - Optimized ULP ADC12 Routine 5 - 7
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Lab 5: Fully Automated ADC12 Routine
Procedure
Set Active Project and Check COM Port Connection 1. Set Lab_5 as the [Active Lab 5] project by right-clicking on Lab_5 in the Project
pane and selecting Set as Active Project. Click the minus sign (-) next to Lab_4 to collapse the Lab_3 project. Click the plus sign (+) next to Lab_5 and notice the files are listed for the project.
2. Make sure that the small size connector of the USB-to-miniUSB cable is connected to the MSP-EXP430 board and the other end to the USB port on your computer. Also make sure your emulator cables are properly connected.
Examine, Download, and Run Code 3. Close any open editor panes. Open Lab_5_soln.c for editing and notice the code used to:
Put TimerB into continuous mode, set/reset output mode on CCR1, enable TBIFG interrupts, and trigger CCR1 rising edge > 75 s (t_ref_settle) after TBIFG ISR turns on the reference void halTimerInit(void) { TB0CCR0 = 65535; TB0CCR1 = 3; // 3 x 1/32768kHZ = 91us TB0CCTL1 = OUTMOD_3; // CCR1 output mode to TB0CCR1 // ACLK, continuous mode, clear TBR TB0CTL = TBSSEL_1 + MC_2 + TBCLR + TBIE; }
Initialize ADC12_A to trigger an interrupt when conversion is complete void halADCInit(void){ // 5.4MHz (MODOSC_max) * 30 us (t_sensor)= 162 cycles min sampling time ADC12CTL0 = ADC12SHT0_7+ADC12ON+ADC12MSC; // Set samp time to 192 cyc // Enable TB0.OUT1 as ADC trigger (ADC12SHS_x), enable seq-chan ADC12CTL1 = ADC12SHS_3+ADC12CONSEQ_1+ADC12SHP;// En seq-chan & samp tim ADC12MCTL0 = ADC12SREF_1 + ADC12INCH_10; // ADC inchA10 => temp sense ADC12MCTL1 = ADC12SREF_1 + ADC12INCH_11 + ADC12EOS;// ADC inchA11 => Vcc ADC12IE |= BIT1; // Enable ch ADC12MEM1IFG interrupts /* Initialize the shared reference module */ REFCTL0 |= REFMSTR + REFVSEL_0 + REFON; // Config int 1.5V ref ADC12CTL0 |= ADC12ENC; // Disable conv to config REF }
5 - 8 MSP430 Workshop - Optimized ULP ADC12 Routine
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Lab 5: Fully Automated ADC12 Routine
Timer ISR enables the reference and conversions / Timer B0 overflow interrupt service routine #pragma vector=TIMER0_B1_VECTOR __interrupt void TIMER0_B1_ISR(void) { switch(__even_in_range(TB0IV,14)) { case 0: break; // No interrupt case 2: break; // TB0CCR1 not used case 4: break; // TB0CCR2 not used case 6: break; // TB0CCR3 not used case 8: break; // TB0CCR4 not used case 10: break; // TB0CCR5 not used case 12: break; // TB0CCR6 not used case 14: // TBIFG overflow handler REFCTL0 |= REFON; // Enable internal 1.5V reference ADC12CTL0 |= ADC12ENC; // Disable conversions to configure REF break; } }