Slide 1

Xcal commissioning Status report and plans Olivier Deschamps Universit Blaise Pascal/IN2P3/CNRS Clermont-Ferrand 0 Calorimeter commissioning meeting 16/01/08 Outline : - What has been achieved - Some problems - Plans Slide 2 What has been achieved ? Many nice achievements during the last 2 monthes Hcal C-side commissioning (november/december 2007) Hcal C-side commissioning (november/december 2007) Noise DAQ on full Hcal C-side including PIN-FEBs LED DAQ w/ calibration trigger and L0-external trigger (poorly succesful) attempt to see cosmics in Hcal with external L0 trigger Several detailed Analysis in previous commissioning meetings LED scan with varying the LED timing delay See yesterday Anatolis talk Slide 3 What has been achieved ? (Partial) Ecal C-side commissioning (december 2007) (Partial) Ecal C-side commissioning (december 2007) Noise DAQ including PIN-FEB LED DAQ with calibration trigger unreadable data but was useful to detect heavy CROC->TELL1 miscabling Successful Ecal+Hcal cosmics DAQ with external Hcal+Ecal L0 trigger see recent Patricks talk for detailed analysis 2 successive BX samples Slide 4 What has been achieved ? PreShower DAQ commissioning started: noise in Prs0 (end december) PreShower DAQ commissioning started: noise in Prs0 (end december) see Stephanes talk today Many progresses with DAQ and online experience with online histogram display experience with online histogram display Panoramix online Panoramix online Time alignment events Time alignment events DAQ with more and more subsystem DAQ with more and more subsystem (Hcal+ODIN+Ecal+L0Calo+L0DU) (Hcal+ODIN+Ecal+L0Calo+L0DU) A lot of problems and bugs have been fixed All relevant data are bookkeeped at All relevant data are bookkeeped at https://twiki.cern.ch/twiki/bin/view/LHCb/LHCbCaloComData Beyond bad quality or bad synchronisation of the data Beyond bad quality or bad synchronisation of the data NONE of the stored data are free of problem(s) along the readout path ! Patch(es) are needed to decode/analyse the events Need to re-filter to reject channels (at best) or events (at worse) Slide 5 Pending problems Most of the problems listed below already presented yesterday or today. Detailed description of the most recent problems in next slides Ecal crate problem Power supply problem with crate 8 and 12 in principle solved end december but no DAQ of the corresponding CROCs FEB/CROC setting problem FEB/CROC setting problem time-to-time : ADC = -256 on last readout channel changing CROC timing cure the problem (direct reverse mode) Need to have correct default setting/recipes Recurrent ADC = +256 (so-called stuck bit problem) switch off/on crate cure the problem (Frederic) Prs crate#0 FEB#6 have wrong crateID in data Prs crate#0 FEB#6 have wrong crateID in data TELL1 crates TELL1 crates problem with power supply for D3B02L crate several TELL1s out of order, e.g. hctell12 (the one with special cabling to 2 Ecal crates) hctell04 (time-to-time replace with A-side hctell06 to have full C-side) Slide 6 Pending problems cont in TELL1 firmware in TELL1 firmware Old fixed bug (may07) reappears in last f/w version 4 bytes missing in ADClength word : to be fixed in next version (next week) temporary patch in decoding software in online farm Problem with error bank after N consecutive triggers under investigation (see Stephane/Boleks talk yesterday) Reset/synchronisation problem to be fixed in next Guidos release (see Stephane/Boleks talk yesterday) problem with ODIN & L0DU wrong MEP struture in TAE mode (permutation of L0-ID) ODIN confused when several L0 during a TAE sequence Protection added in next ODIN f/w (available next week) Missing features in LODU PVSS L0-yes sent without Timing Trigger Bit when the trigger sequence does not match the TTB configuration mix TAE events with single BX shifted MEP content fixed in the new L0DU PVSS (includ. non-empty FSM !) to be installed next week Slide 7 Accumulation of events: For some events, N banks from the same TELL1 are recorded: all TELL1s are also repeated N times, and then the event is followed by (N-1) empty events. The problem is already in the MDF file, ie at the event building stage when recording data. One way of cleaning: decode only the first bank of each TELL1 in this case => loose the events But we have to assume that the ones we keep have the same event id (no way to check it) From Patrick (last week) ODIN software only decode the first bank (as a single one is expected) Decoding code modified to check that several bank are actually pile-up for ODIN According to ODIN : the pile-up events have different and not necessarly consecutive BX/L0-ID Problem is in Event Builder (maybe confused with different TELL1 Packing Factors ?) Slide 8 What triggered HCAL ? : when we see the problem, it is always when 2 consecutive BX have triggered From Patrick (last week) Slide 9 Very strange events: they last 3 clock cycles, but they happen several times (here, pictures of independent events ie not the 3 consecutive clock cycles) ! From Patrick (last week) Slide 10 L0ADC.vs. ADC problem 12-bits ADC 8-bits L0 ADC Ecal (cosmics 12/2007) conversion : L0-ADC(8b) ~ [ADC(12b)-256]/8 in [0, 255] L0ADC implemented in new Orwell under developpment Channel [0,31] #FEB (16*crate + slot) OK Not OK ~ 0.5% of point outside the expected conversion line ~ uniform over channels some are due to stuck bit (+256) problem in 12b ADC some accumulation at l0ADC = 128, 64, 32, 16 (stuck bit ?) Similar behaviour on Hcal data Slide 11 L0ADC.vs. ADC problem 12-bits ADC 8-bits L0 ADC Hcal (LED 11/2007) Having a look to older data strange shape with bunches can be explained as with LED each channel always see more or less the same signal in all events checked that each bunch match a single channel ! In these data it seems that only last readout channels were affected !! 128 64 32 16 OK Not OK Channel [0,31] #FEB (16*crate + slot) Slide 12 L0ADC.vs. ADC problem Looking in details to some problematic data : ADC L0ADC channel 4 6 1 OK channel 5 143 17 OK channel 6 448 56 OK channel 14846 104 OK channel 22 494 6 KO channel 23 52 83 KO channel 31 675 0 KO Ecal cosmics run (december) Data block from crate 9 slot 13 : Trigger block size = 11 bytes 11-4 = 7 non-0 L0-ADC(8b) trigger pattern = 1000000011000000010000000111000 channel 31 with L0ADC should not appear in the bank Block size should be 10 bytes and MSB of pattern should be 0 ! Seems to have a shift in data and L0ADC for channel22 is missing Slide 13 L0ADC.vs. ADC problem Similar feature in Hcal LED data (november) Everything OK for channels 1 to 28 ADC (12bits) L0ADC(8bit) canal 261440180OK canal 271118140OK canal 281384215KO canal 291722193KO canal 301541186KO canal 3114890KO Data block from crate 24 slot 4 Trigger block size = 36 36 4 = 32 non-0 L0-ADC(8b) Trigger pattern = ffffffff Conclusion : seems to have (at least) 3 problems Shift in L0-ADC data block Where ? bug in L0-block building in TELL1 f/w or the problem is already there in data sent by CROC ?? Probably in TELL1 as Trigger Pattern and block size are correct (so TELL1 received the correct data) ! unexpected fired bits in 8b L0-ADC (+128/64/32/16) unexpected fired bits in 12b ADC (+256) after conversion to 8bit Slide 14 Problem with PIN-FEB noise : Hcal Discovered yesterday night ! looking to noise on Hcal PIN-FEB in late december cosmics run Was there LED flash during the cosmics run ? Or have the 4th channels on both PIN-FEB a weird behaviour ? Crate22 feb#15 Crate22 feb#13 Slide 15 Problem with PIN-FEB noise : Ecal Crate 11 feb#1 Crate 11 feb#0 readout channel #15 in FEB0 and #11 in FEB1 have noise inconsistent with PIN channel Had the same problem on one Hcal PIN channel > bad cabling fixed by Iouri (?) Ecal PIN-channel noise Sigma = 3.4 ADC PedShift = 1.5 ADC Why different from Hcal ? Sigma = 11.9 ADC PedShift = 5.7 ADC Slide 16 Summary and plan Important achievements on Xcal commissioning but still a huge work ahead Many problems remains some are recurrent To go deeper in detail we need finer analysis of LED/cosmics data For that we need to perform cleaner DAQ Important to stabilize the system and have correct default setting Need to cure the most evident problems Slide 17 Summary and plan Next 2-3 weeks - restart the system - install new firmware/software with recent fixes & valid the fixes - valid the DAQ path of full Hcal C-side and check Ecal C-side can now be completed - fix the known recurrent problems and check stability - validate default configuration (recipes) - fix ADC = +-256, L0ID alignment, - Try to reproduce and debug the not yet understood problems - pile-up event, strange patterns, - Better using known pattern (RAM / LED) - re-validate and stabilize the configuration of L0 path - ODIN, L0CALO, L0DU, validate TAE using L0DU Timing Trigger Bit - Once all seem ok : -validate with long run data (LED scan w/o then w/ L0-path) and analyse in detail to detect remaing problems along the DAQ path - Once validated : - re-start cosmics and start A-side in cleaner environment 1st commissioning week in 3 weeks from now Calo is expected to deliver L0-trigger on many system Slide 18 Sample1Sample2 18 Slide 19 19 Sample1Sample2 Slide 20 20 Slide 21 21 Slide 22 22