xilinx xtp253 – vc7203 schematics (rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset...

83
of Sheet Date: Title: Ver: A B C D 1 2 3 4 D C B A 4 3 2 1 Sheet Size: B Rev: Drawn By MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NONINFRINGEMENT THE DOCUMENTATION IS DISCLOSED TO YOU “AS-IS” WITH NO WARRANTY OF ANY TO CHANGE THE DOCUMENTATION WITHOUT NOTICE AT ANY TIME. XILINX ASSUMES YOU MAY NOT REPRODUCE, DISTRIBUTE, REPUBLISH, DOWNLOAD, DISPLAY, POST, THE DEVELOPMENT OF DESIGNS TO OPERATE WITH XILINX HARDWARE DEVICES. AND/OR SPECIFICATION (THE “DOCUMENTATION”) TO YOU SOLELY FOR USE IN XILINX IS DISCLOSING THIS USER GUIDE, MANUAL, RELEASE NOTE, SCHEMATIC, XILINX EXPRESSLY DISCLAIMS ANY LIABILITY ARISING OUT OF YOUR USE OF BUT NOT LIMITED TO, ELECTRONIC, MECHANICAL, PHOTOCOPYING, RECORDING, OR OTHERWISE, WITHOUT THE PRIOR WRITTEN CONSENT OF XILINX. THE DOCUMENTATION. XILINX RESERVES THE RIGHT, AT ITS SOLE DISCRETION, NO OBLIGATION TO CORRECT ANY ERRORS CONTAINED IN THE DOCUMENTATION, OR TO ADVISE YOU OF ANY CORRECTIONS OR UPDATES. XILINX EXPRESSLY DISCLAIMS ANY LIABILITY IN CONNECTION WITH TECHNICAL SUPPORT OR ASSISTANCE THAT MAY BE PROVIDED TO YOU IN CONNECTION WITH THE DOCUMENTATION. KIND. XILINX MAKES NO OTHER WARRANTIES, WHETHER EXPRESS, IMPLIED, OR STATUTORY, REGARDING THE DOCUMENTATION, INCLUDING ANY WARRANTIES OF CONSEQUENTIAL, INDIRECT, EXEMPLARY, SPECIAL, OR INCIDENTAL DAMAGES, OF THIRD-PARTY RIGHTS. IN NO EVENT WILL XILINX BE LIABLE FOR ANY INCLUDING ANY LOSS OF DATA OR LOST PROFITS, ARISING FROM YOUR USE OF THE DOCUMENTATION. DISCLAIMER: SCHEM, ROHS COMPLIANT MGT CHARACTERIZATION BOARD RN ASSY P/N: 0431656 PCB P/N: 1280579 SCH P/N: 0381411 TEST P/N: TSS0XXX COVER SHEET OR TRANSMIT THE DOCUMENTATION IN ANY FORM OR BY ANY MEANS INCLUDING, HW-V7T-VC7203 VIRTEX-7 FFG/FHG/FLG1761 1.0 01 1 83 VC7203 V7 FFG1761 MGT CHAR 10-4-2012_16:59

Upload: others

Post on 14-Aug-2020

6 views

Category:

Documents


0 download

TRANSCRIPT

Page 1: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NONINFRINGEMENT

THE DOCUMENTATION IS DISCLOSED TO YOU “AS-IS” WITH NO WARRANTY OF ANY

TO CHANGE THE DOCUMENTATION WITHOUT NOTICE AT ANY TIME. XILINX ASSUMES

YOU MAY NOT REPRODUCE, DISTRIBUTE, REPUBLISH, DOWNLOAD, DISPLAY, POST,THE DEVELOPMENT OF DESIGNS TO OPERATE WITH XILINX HARDWARE DEVICES.AND/OR SPECIFICATION (THE “DOCUMENTATION”) TO YOU SOLELY FOR USE INXILINX IS DISCLOSING THIS USER GUIDE, MANUAL, RELEASE NOTE, SCHEMATIC,

XILINX EXPRESSLY DISCLAIMS ANY LIABILITY ARISING OUT OF YOUR USE OF

BUT NOT LIMITED TO, ELECTRONIC, MECHANICAL, PHOTOCOPYING, RECORDING,OR OTHERWISE, WITHOUT THE PRIOR WRITTEN CONSENT OF XILINX.

THE DOCUMENTATION. XILINX RESERVES THE RIGHT, AT ITS SOLE DISCRETION,

NO OBLIGATION TO CORRECT ANY ERRORS CONTAINED IN THE DOCUMENTATION, ORTO ADVISE YOU OF ANY CORRECTIONS OR UPDATES. XILINX EXPRESSLYDISCLAIMS ANY LIABILITY IN CONNECTION WITH TECHNICAL SUPPORT ORASSISTANCE THAT MAY BE PROVIDED TO YOU IN CONNECTION WITH THEDOCUMENTATION.

KIND. XILINX MAKES NO OTHER WARRANTIES, WHETHER EXPRESS, IMPLIED, ORSTATUTORY, REGARDING THE DOCUMENTATION, INCLUDING ANY WARRANTIES OF

CONSEQUENTIAL, INDIRECT, EXEMPLARY, SPECIAL, OR INCIDENTAL DAMAGES,OF THIRD-PARTY RIGHTS. IN NO EVENT WILL XILINX BE LIABLE FOR ANY

INCLUDING ANY LOSS OF DATA OR LOST PROFITS, ARISING FROM YOUR USE OFTHE DOCUMENTATION.

DISCLAIMER:

SCHEM, ROHS COMPLIANT

MGT CHARACTERIZATION BOARD

RN

ASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0XXX

COVER SHEET

OR TRANSMIT THE DOCUMENTATION IN ANY FORM OR BY ANY MEANS INCLUDING,

HW-V7T-VC7203VIRTEX-7 FFG/FHG/FLG1761

1.0

01

1 83

VC7203 V7 FFG1761 MGT CHAR

10-4-2012_16:59

Page 2: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

POWER MONITORING

USER CLOCKS

LEDS

PUSH BUTTONSDIP SWITCHES

I2C BUS MANAGEMENT

CONNECTORPMBUS CABLE

POWER IN 12V

PMBUS

SELECT I/O TERMINATION /

5V

3.3V

2.5V

INTERFACE 5V & 3.3V

12V

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

UTILITY POWER

ON-BOARD REGULATION:

5.0V @ 10 AMPS

DUT POWER

SAMTEC BULLSEYETEST CHANNELS

VCCBRAM 1.0V @ 10 AMPS

ON-BOARD REGULATION:

SHT 6

USB / UART

XADC

SYSTEMACE-2

SUPERCLOCK-2 MODULE INTERFACE

VCCAUX 1.8V @ 10 AMPSVCCAUX_IO 1.8V @ 10 AMPS

AFX SIDEBAND CONNPMBUS

BLOCK DIAGRAM

PMBUS

FMC INTERFACE(FMC1, FMC2, FMC3)

GTX & GTH

VCCINT 1.0V @ 40 AMPS

3.3V @ 20 AMPS2.5V @ 20 AMPS

GTX/GTH QUADS

111112113114115

116117118119

VCCO_HP 1.8V @ 10 AMPS

MGT POWER MODULE

VTT JACKSVIRTEX-7

FFG/FHG/FLG1761

SHT 6

SHT 9-11, 14-17, 19

VCCO_HR 2.5V @ 10 AMPSVCCO_0 2.5V @ 7.5 AMPS

SHT 18, 19

SHT 74

SHT 29

SHT 75-80

SHTS 25-28

SHT 30

SHT 35SHT 36SHT 37SHT 38SHT 39

SHT 40SHT 41SHT 42SHT 43

SHT 33, 34 SHT 31

SHT 30

VCCO_HP

SHT 11

SHT 22, 23

SHT 32

SHT 62-73

SHT 47

FPGA AND FPGAPWR PROBE CONNECTORS

SHT 24

10-4-2012_16:59 1.0

01

2 83

VC7203 V7 FFG1761 MGT CHAR

Page 3: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

TDI

TDO

SHT 4

TDI

TDO

SHT 4

TDI

TDO

TDI

TDO

TDI

TDO

JA3

U32

FMC1_TDI

SHT 4

FMC2

SYSTEMACE-2

FMC3

MICRO-BUSB CONNECTOR

U7

U19U8

EMBEDDEDUSB-JTAG MODULE

J7SHT 4

JTAG HEADER

JA4

U17SHT 64

U18SHT 68

REMOVE JUMPERS WHEN BOARD IS INSTALLED ON AFX2 MOTHERBOARD

JTAG BLOCK DIAGRAM

FMC1_TDI

TDI

TDO

TDI

TDO

JA2

U1

FMC1

FPGA

G16

H15

SHT 20U20

U12SHT 60

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

JTAG CHAIN

833

VC7203 V7 FFG1761 MGT CHAR

01

10-4-2012_16:59 1.0

1

Page 4: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GPIO2_SRST

GPIO0

GND1

GND2

TCK

TDI

VREF

TDO

TMS 3V3

GPIO1

GNDNC

NO

SEL

VCC

COM

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

74LVC125A

VCC

GND

TSSOP_14

4Y

3Y

2Y

1Y

3OE_B

4A

4OE_B

2A

1OE_B

1A

3A

2OE_B

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

JTAG CHAIN SELECTION

JUMPER OFF: SYSTEMACE-2 AND FPGA ONLYJUMPER ON: FMC MODULES, SYSTEMACE-2 AND FPGA

2 PLACES

JTAG DRIVER

USB / JTAG INTERFACE & DRIVERS

EMBEDDED USB-JTAG MODULE

JTAG HEADER

4 PLACES

EMBEDDED USB TO JTAG INTERFACE / EXTERNAL JTAG HEADER

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

4 83

2 1

R45

101/10W

2 1

R46

2 1

R36

2 1

R62

CABLE_TCK

CABLE_TDO

CABLE_TDI

UTIL_3V3

GND

NC

UTIL_3V3

1 23 45 67 89 10

11 1213 14

J7

87832-1420

14

7

11

8

6

3

10

12

13

5

1

2

9

4

U7GND

2

1 R16410.0K1/10W

UTIL_3V3

UTIL_3V3

2

1R16610.0K1/10W

FMC3_TDO

UTIL_3V3

FMC_TCK

2

1R165

FMC_TMS

FMC1_TDI

GND

1

2

J1

GND

SYSACE_TDI

23

1

6

5

4

U19SOT23_6

TS5A3159A

11

9

1

7

2

3

6

5

4 8

10

U8

DIGILENT_USB_JTAG2

NC

NC

NC

GND

1

225V0.1UFC98

NC

UTIL_3V3

GND

UTIL_3V3

NC

GND

CABLE_TMS

Page 5: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GND

GND

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

GND

GND

VCCBVCCA

SCLA

SDAA SDAB

SCLB

GND OE

VCCBVCCA

SCLA

SDAA SDAB

SCLB

GND OE

GND

GND

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

PMBUS LEVEL TRANSLATION

PMBUS LEVEL TRANSLATION

OTHERWISE, DO NOT INSTALL JUMPER.PMBUS LEVEL TRANSLATOR: INSTALL JUMPER IF FPGA IS THE PMBUS MASTER;

2 PLACES

2 PLACES

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

5 83

1

2

1R179

2

1

R177

10.0K1/10W

2

1R178

2

1

R180

10.0K1/10W

VCCO_HP_EXT

PMBUS_DATA

PMBUS_CLK

PMBUS_CTRL

PMBUS_ALERT

1

2

J3

VCCO_HP_EXT

DUT_PMB_CLK

DUT_PMB_DATA

DUT_PMB_CTRL

DUT_PMB_ALERT

UTIL_3V3

81

2

3 6

7

4 5

U40

PCA9517

81

2

3 6

7

4 5

U41

PCA9517

1

2

C1712.2UF10VX5R

UTIL_3V3

1

32

Q14

NDS331N460MW

2

1 R18110.0K1/10W

UTIL_3V3

1

2

C242.2UF10VX5R

1

Page 6: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GND

DGND1

GND

EPAD

EN2

EN1

TH1

TH0

VCC

CRESET

CDLY2

CDLY1

RST_B

OUT2

OUT1IN1

IN2

GND

TOL

MR_B

GND

GND

GND

COM

N/C

12V

12V

N/C

COM

12V

5V

COM

COM

GND

GNDGND

B CB

CG3PSGCG2CG1

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

2 PLACES

6-PIN MINI-FITAC ADAPTER (BRICK)

ATX 4-PIN MINI-FIT

12V MAIN POWER IN

FAN POWER CONNECTOR

PLACE FAN POWER CONNECTOR WITHIN 9-INCHES OF DUT

POWER SUPERVISORY

POR_B1 USED BY UCD9248 POWER CONTROLLERS AND REGULATORSPOR_B2 USED BY UTILITY REGULATORS (VCC5V0, VCC3V3, VCC2V5)

INHIBITPOWER 3 PLACES

SLIDE SWITCH NOISE SUPPRESSIONFILTER

MASTER POWER (12V)

TI PMBUS CONNECTOR

PMBUS CTRL SELECTPOS 2-3: UCD9248 ALWAYS ONPOS 1-2: TI PMBUS CABLE

OFF: AFX

INPUT POWER CONNECTORS / POWER SUPERVISORY / MASTER POWER SWITCH

1.0

836

VC7203 V7 FFG1761 MGT CHAR

01

10-4-2012_16:59

PMBUS_ALERT

PMBUS_DATA

POR_B1

1 8

5367

U63 50MOHM

PMBUS_CLK

UTIL_3V3

2

1R4110.0K1/10W

PMBUS_CTRL

VCC12_P_SW

INPUT_GND

1

2

C13081UF25V

VCC12_P

1

2

C30.068UF10V

1

2

C41

2

C2

0.1UF25V

POR_B2

2

1R3710.0K1/10W

1

2

1R34110.0K1/10W

2

1R3810.0K1/10W

VCC12_P

1

2

2

1

2

3

4

J131

1

4

3

6

2

5

J2

2

1 R42

2

1

R43

10.0K1/10W

1 2

3

5 6

7 8

9 10

4

J26

1

32

4

65

SW1

1201M2S3AQE2

J28

J29

NC

NCNC

NC

NC

VCC12_P_IN

NC

NC

NC NC

NC

1

2

C73147UF10V

2

1 R3910.0K1/10W

1

2

C10.1UF25V

VCC12_P

NC

17

7

6

8

9

1

14

15

16

12

10

112

3

5

4

13

U42 TQFN_16

MAX16025

1

2

J27

UTIL_3V3

UTIL_3V3

INPUT_GND

INPUT_GND

INPUT_GND

INPUT_GND

1

3

2

J210

UTIL_3V3

2

1R4010.0K1/10W

1

2

3

J121

22_11_2032 VCC12_P

NC

Page 7: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GND

GND

GND

A Y

OE_B

VCC

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

GNDGNDGND

GND GND GND

GND

GNDGNDGNDGNDGND

GNDGND GND GNDGND

GND

GRN

RED

2 PLACES

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

VCCAUX_IOVCCINT VCCAUX VCCBRAM

MASTERPOWER

UTIL_3V3 UTIL_5V0

POWER STATUS LEDS

UTIL_2V5

FPGA POWER STATUS LEDS

POWERGOOD

VCCO_HP

VCCO_HR

837

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

VCCINT_EXT_A

PGOOD

GND

GND

UTIL_3V3

UTIL_3V3

21

R385

21

R2

2611/10W

34

1 2

DS12

LED-GRN-RED

VCCO_HP_EXTVCCAUX_IO_EXTVCCBRAM_EXTVCCAUX_EXT

UTIL_3V3

2

1

DS6

1

32

Q11

NDS331N460MW

1

32

Q1

NDS331N460MW

1

32

Q2

NDS331N460MW

13

2

Q3

NDS331N460MW

1

32

Q6

NDS331N460MW

1

32

Q7

NDS331N460MW

1

32

Q8

NDS331N460MW

1

32

Q9

NDS331N460MW

1

32

Q10

NDS331N460MW

VCC12_P

2

1 R72611/10W

2

1 R62611/10W

2

1 R52611/10W

2

1 R42611/10W

2

1 R32611/10W

2

1 R92611/10W

2

1 R102611/10W

2

1 R112611/10W

2

1 R122611/10W

2

1

DS5

2

1R581.00K1/16W 2

1R591.00K1/16W 2

1R601.00K1/16W 2

1R611.00K1/16W 2

1R631.00K1/16W

2

1

DS22

1

DS32

1

DS4

2

1

DS8

2

1R641.00K1/16W

2

1R571.00K1/16W

2

1R671.00K1/16W 2

1R661.00K1/16W 2

1R651.00K1/16W

2

1

DS112

1

DS102

1

DS9

UTIL_2V5 UTIL_3V3 UTIL_5V0

UTIL_3V3

3

2 4

1

5

U60 SC70_5

NC7SV125

2

1R4410.0K1/10W

UTIL_3V3

GND

2

1

DS29

1

32

Q20

NDS331N460MW

2

1 R3912611/10W

2

1R3901.00K1/16W

VCCO_HR_EXT

Page 8: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

S1

E_B

VEE

A3

A1A0

A2

A4A5A6A7

GND

S0

S2

A

VCC

AGND1

AGND1

AGND1

S1

E_B

VEE

A3

A1A0

A2

A4A5A6A7

GND

S0

S2

A

VCC

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

CONTROLLER #2CONTROLLER #1

TEMPERATURE SENSOR MULTIPLEXERS

TEMP SENSOR MUX

838

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

1

2

C60.1UF25V

1

2

C50.1UF25V

41 32

568 7

RP11.00K1/16W

41 32

568 7

RP21.00K1/16W

10

6

7

12

1413

15

1524

8

11

9

3

16

U3

CD74HC4051

AGND2

10

6

7

12

1413

15

1524

8

11

9

3

16

U4

CD74HC4051

AGND2

AGND2

C2_TMUX1C2_TMUX0

C2_TMUX2

C2_TEMP

C1_TMUX0C1_TMUX1C1_TMUX2

C1_TEMP

C12_TEMPC13_TEMP

C21_TEMPC22_TEMPC23_TEMP

C11A_TEMPC11B_TEMP

PWRCTL1_VCC3V3A PWRCTL2_VCC3V3A

Page 9: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GND

DGND1

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

AGND1

DGND1AGND1

AGND1

AGND1

AGND1

TRST_B

ADC_REF

ADDR-0ADDR-1

AG

ND

3

AUX-IN_AD14AUX-IN_AD13

BPCAP

CS-1ACS-1B

CS-2ACS-2B

CS-3ACS-3B

CS-4ACS-4B

DG

ND

1D

GN

D2

DG

ND

3

DPWM-1ADPWM-1B

DPWM-2ADPWM-2B

DPWM-3ADPWM-3B

DPWM-4ADPWM-4B

EAN1

EAN2

EAN3

EAN4

EAP1

EAP2

EAP3

EAP4

SEQ-1

FAULT-1AFAULT-1B

FAULT-2AFAULT-2B

FAULT-3AFAULT-3B

FAULT-4AFAULT-4B

SRE-1ASRE-1B

SRE-2ASRE-2B

SRE-3ASRE-3B

SRE-4ASRE-4B

SYNC-INSYNC-OUT

TCK

TDITDO

TEMP

TMS

TMUX0TMUX1TMUX2

TRCK

V33

D

V33

DIO

1V

33D

IO2

V33

FB

AG

ND

2A

GN

D1

SEQ-2SEQ-3

PGOOD

V33

A

VIN_IIN

RESET_B

PMBUS_CTRLPMBUS_CLKPMBUS_DATAPMBUS_ALERT

VTRACK

O603_SHORT

O603_SHORT

AGND1

DGND1

GND

GND

GND

2 PLACES

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

NOTES

ALL PGOOD OUTPUTS WILL BE OPEN-DRAIN AND WIRE-ORED

2 PLACES

PWM SYSTEM CONTROLLER #1

PMBUS ADDRESS

HEX DECIMAL

520x34

2 PLACES

PWM SYSTEM CONTROLLER #1

2 PLACES

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

9 83

UTIL_3V3

2

1R17561.00K1/16W

POR_B12

1 R2351.1K1/10W

PWRCTL1_VCC3V3A

MGT_POR_B

2

1R41910.0K1/10W

1

32

Q31

NDS331N460MW

NC

C13_VCCBRAM_EA_N

1

2

C754.7UF10VX5R

1

2

C744.7UF10VX5R

1

2

C310.01UF25VX5R

1

2

C90.1UF

25V

1

2

C80.1UF

25V

1

2

C10

1

2

C70.1UF25V

C11A_VCCINT_FLT

C11A_VCCINT_SRE

C11A_VCCINT_PWM

21

R681.00K1/16W

C11A_VCCINT_CS

1

2

C728

1

2

C370.068UF10V

C11_VCCINT_EA_N

C13_VCCBRAM_FLT

21 Z1

21 Z2

C13_VCCBRAM_SRE

2

1R922.00K1/16W

2

1R9675K1/10W

48

1

7776

80

7271

59

7579

478

374

273

9 3455

2122

2324

2526

2728

63

65

67

69

62

64

66

68

32

1516

1718

2941

4243

35

1936

20

1211

5137

3852

3350

3130

44

4645

7

47

394054

14

578 56

70

6160

5310

49

58

5

136

U9

UCD9248PFC

1

3

2

J48

VCC12_P

C13_VCCBRAM_CS21

R691.00K1/16W

C1_VIN

2

1R4910.0K1/10W

2

1R9775K1/10W

2

1R47

10.0K1/10W

12

L1FERRITE-220

1

2C360.068UF10V

2

1R48

GND

CNTRL1_POR_B

1

1

PGOOD

NCNC

NC

NCNC

NC

NC

NC

CTRL1_SEQ_OUT

C13_VCCBRAM_EA_P

C11_VCCINT_EA_P

NCC13_VCCBRAM_PWM

NC

PMBUS_ALERTPMBUS_DATAPMBUS_CLKPMBUS_CTRL

C1_TMUX2C1_TMUX1C1_TMUX0

C1_TEMP

NC

41 32

568 7

RP3610.0K1/16W

NC

NCNC

NC

1

2C380.068UF10V

21

R711.00K1/16W

C12_VCCAUX_CSC12_VCCAUX_EA_NC12_VCCAUX_EA_P

C12_VCCAUX_FLT

C12_VCCAUX_SRE

C12_VCCAUX_PWM

NC

21

R352

C11B_VCCINT_CS

C11B_VCCINT_PWM

C11B_VCCINT_SRE

C11B_VCCINT_FLT

NC

UTIL_3V3

UTIL_3V3

UTIL_3V3

UTIL_3V3

2

1R17557871/10W2

1

25V1500PF

C1159

Page 10: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

O603_SHORT

O603_SHORT GND

TRST_B

ADC_REF

ADDR-0ADDR-1

AG

ND

3

AUX-IN_AD14AUX-IN_AD13

BPCAP

CS-1ACS-1B

CS-2ACS-2B

CS-3ACS-3B

CS-4ACS-4B

DG

ND

1D

GN

D2

DG

ND

3

DPWM-1ADPWM-1B

DPWM-2ADPWM-2B

DPWM-3ADPWM-3B

DPWM-4ADPWM-4B

EAN1

EAN2

EAN3

EAN4

EAP1

EAP2

EAP3

EAP4

SEQ-1

FAULT-1AFAULT-1B

FAULT-2AFAULT-2B

FAULT-3AFAULT-3B

FAULT-4AFAULT-4B

SRE-1ASRE-1B

SRE-2ASRE-2B

SRE-3ASRE-3B

SRE-4ASRE-4B

SYNC-INSYNC-OUT

TCK

TDITDO

TEMP

TMS

TMUX0TMUX1TMUX2

TRCK

V33

D

V33

DIO

1V

33D

IO2

V33

FB

AG

ND

2A

GN

D1

SEQ-2SEQ-3

PGOOD

V33

A

VIN_IIN

RESET_B

PMBUS_CTRLPMBUS_CLKPMBUS_DATAPMBUS_ALERT

VTRACK

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

NOTES

ALL PGOOD OUTPUTS WILL BE OPEN-DRAIN AND WIRE-ORED

PMBUS ADDRESS

HEX

2 PLACES

2 PLACES

PWM SYSTEM CONTROLLER #2

530x35

DECIMAL

PWM SYSTEM CONTROLLER #2

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

10 83

POR_B1

VCC12_P

C23_VCCO_HR_SRE

C23_VCCO_HR_PWM

C23_VCCO_HR_CSC23_VCCO_HR_EA_NC23_VCCO_HR_EA_P

1

2

C774.7UF10VX5R

1

2

C764.7UF10VX5R

1

2

C130.1UF

25V

2

1R51

C22_VCCO_HP_CS

21

R701.00K1/16W

1

2C350.068UF10V

1

2C390.068UF10V

C22_VCCO_HP_EA_NC22_VCCO_HP_EA_P

C22_VCCO_HP_FLT

C21_VCCAUX_IO_CSC21_VCCAUX_IO_EA_NC21_VCCAUX_IO_EA_P

C21_VCCAUX_IO_FLT

C22_VCCO_HP_SRE

C21_VCCAUX_IO_SRE

NC

NC

1

3

2

J49

48

1

7776

80

7271

59

7579

478

374

273

9 3455

2122

2324

2526

2728

63

65

67

69

62

64

66

68

32

1516

1718

2941

4243

35

1936

20

1211

5137

3852

3350

3130

44

4645

7

47

394054

14

578 56

70

6160

5310

49

58

5

136

U10

UCD9248PFC

AGND2

PWRCTL2_VCC3V3A

PGOOD

CTRL2_SEQ_OUT

1

2C420.068UF10V

21

R741.00K1/16W

21

R751.00K1/16W

AGND2

AGND2

AGND2

NC

2

1R9875K1/10W2

1R2786.6K1/10W

21 Z3

21 Z4

AGND2

AGND2 DGND2

C22_VCCO_HP_PWM

C21_VCCAUX_IO_PWM

NC

2

1R50

10.0K1/10W

NC

NC

NC

12

L2FERRITE-220

DGND2

GND

2

1R5210.0K1/10W

2

1R932.00K1/16W

C2_VIN

1

1

NCNC

CTRL1_SEQ_OUT

C2_TMUX0C2_TMUX1

C2_TEMPC2_TMUX2

PMBUS_CTRLPMBUS_CLKPMBUS_DATAPMBUS_ALERT

NCCNTRL2_POR_B

41 32

568 7

RP3710.0K1/16W

DGND2

NC

NCNC

NCNC

NC

1

2

C140.1UF

25V

1

2

C12

1

2

C110.1UF25V

1

2

C320.01UF25VX5R

C23_VCCO_HR_FLT

NC

NC

UTIL_3V3

UTIL_3V3

UTIL_3V3

UTIL_3V3

2

1 R2451.1K1/10W

Page 11: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

GND

O603_SHORT

TRST_B

ADC_REF

ADDR-0ADDR-1

AG

ND

3

AUX-IN_AD14AUX-IN_AD13

BPCAP

CS-1ACS-1B

CS-2ACS-2B

CS-3ACS-3B

CS-4ACS-4B

DG

ND

1D

GN

D2

DG

ND

3

DPWM-1ADPWM-1B

DPWM-2ADPWM-2B

DPWM-3ADPWM-3B

DPWM-4ADPWM-4B

EAN1

EAN2

EAN3

EAN4

EAP1

EAP2

EAP3

EAP4

SEQ-1

FAULT-1AFAULT-1B

FAULT-2AFAULT-2B

FAULT-3AFAULT-3B

FAULT-4AFAULT-4B

SRE-1ASRE-1B

SRE-2ASRE-2B

SRE-3ASRE-3B

SRE-4ASRE-4B

SYNC-INSYNC-OUT

TCK

TDITDO

TEMP

TMS

TMUX0TMUX1TMUX2

TRCK

V33

D

V33

DIO

1V

33D

IO2

V33

FB

AG

ND

2A

GN

D1

SEQ-2SEQ-3

PGOOD

V33

A

VIN_IIN

RESET_B

PMBUS_CTRLPMBUS_CLKPMBUS_DATAPMBUS_ALERT

VTRACK

O603_SHORT

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

NOTES

PMBUS ADDRESS

HEX DECIMAL

2 PLACES

ALL PGOOD OUTPUTS WILL BE OPEN-DRAIN AND WIRE-ORED

540x36

PWM SYSTEM CONTROLLER #3

PWM SYSTEM CONTROLLER #3

2 PLACES

8311

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

POR_B1

PWRCTL3_VCC3V3A

AGND3

1

C33_MGTVCCAUX_EA_NC33_MGTVCCAUX_EA_P

C32_MGTAVTT_CSC32_MGTAVTT_EA_NC32_MGTAVTT_EA_P

C31_MGTAVCC_CSC31_MGTAVCC_EA_NC31_MGTAVCC_EA_P

1

2

C794.7UF10VX5R

1

2

C784.7UF10VX5R

1

2

C150.1UF

25V

1

2C440.068UF10V

21 Z5

AGND3

AGND3

41 32

568 7

RP3810.0K1/16W

NC

NC

21

R761.00K1/16W

C33_MGTVCCAUX_CS

VCC12_P

48

1

7776

80

7271

59

7579

478

374

273

9 3455

2122

2324

2526

2728

63

65

67

69

62

64

66

68

32

1516

1718

2941

4243

35

1936

20

1211

5137

3852

3350

3130

44

4645

7

47

394054

14

578 56

70

6160

5310

49

58

5

136

U11

UCD9248PFC

NC

NC

CTRL2_SEQ_OUT

PGOOD

CTRL1_SEQ_OUT

21

R771.00K1/16W

21

R781.00K1/16W

1

2C450.068UF10V

1

AGND3

CNTRL3_POR_B

GND

2

1R54

10.0K1/10W

NC

2

1R9975K1/10W2

1R56100K1/10W

21 Z6

AGND3

AGND3 DGND3

NC

NC

NC

NC

2

1R55

1

2C430.068UF10V

NC

12

L3FERRITE-220

DGND3

1

3

2

J50

2

1R5310.0K1/10W

2

1R942.00K1/16W

C3_VIN

AGND3

NC

NC

NC

NC

NC

NC

NC

NC

NCNCNC

PMBUS_CTRLPMBUS_CLKPMBUS_DATAPMBUS_ALERT

NC

NC

NC

DGND3

NCNC

NCNC

1

2

C17

1

2

C180.1UF25V

1

2

C160.1UF

25V

1

2

C330.01UF25VX5R

UTIL_3V3

UTIL_3V3

UTIL_3V3

UTIL_3V3

2

1 R2551.1K1/10W

Page 12: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

VCCO_HR

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

NOTES

REMOTE VOLTAGE SENSE LOW-PASS FILTERS

PLACE LOW-PASS FILTER COMPONENTS ADJACENT TO CONTROLLER #1

PLACE LOW-PASS FILTER COMPONENTS ADJACENT TO CONTROLLER #2

ROUTE AS 100 OHM DIFFERENTIAL PAIR FROM LOAD SENSE POINT TO CONTROLLER

REMOTE VOLTAGE SENSE LOW-PASS FILTERS

CONTROLLER #1 RAILS CONTROLLER #2 RAILS

8312

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

C23_VCCO_HR_EA_P

Z14

Z16

Z13

Z17

Z12

Z7

Z8

Z15

Z10

GND1_SPY

VCCINT_SPY

GND

GND

GND

GND

VCCAUX

C12_VCCAUX_EA_N

3

2

C22_VCCO_HP_EA_P

C21_VCCAUX_IO_EA_P

C13_VCCBRAM_EA_N

1

2 1

R801.00K1/16W

VCCAUX_IO

VCCBRAM

2

1

J17

2

1

J16

2

1

J15

2

1

J14

2

1

25V1500PFC67

2 1

R831.00K1/16W

2

1

25V1500PFC66

2

1R157871/10W

2 1

R821.00K1/16W

2

1

25V1500PFC65

2 1

R811.00K1/16W

2

1

25V1500PFC64

2

1R147871/10W

VCCO_HP_EA_P

C11_VCCINT_EA_N

C22_VCCO_HP_EA_N

VCCINT_EA_P

VCCAUX_EA_P

VCCBRAM_EA_P

C11_VCCINT_EA_P

C13_VCCBRAM_EA_P

2

1

J192 1

R841.00K1/16W

2

1

25V1500PFC68

2

1R167871/10W

VCCAUX_IO_EA_P

C21_VCCAUX_IO_EA_N

1

1

1

1

2

3

3

3

3

3

VCCO_HP

C12_VCCAUX_EA_P

Z9

Z38

Z37

GND

2 1

R3841.00K1/16W

2

1

J193

2

1

25V1500PFC812

2

1R3687871/10W

2

3

VCCO_HR_EA_P

C23_VCCO_HR_EA_N

Page 13: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

ROUTE AS 100 OHM DIFFERENTIAL PAIR FROM LOAD SENSE POINT TO CONTROLLER

REMOTE VOLTAGE SENSE LOW-PASS FILTERS

PLACE LOW-PASS FILTER COMPONENTS ADJACENT TO CONTROLLER #3

REMOTE VOLTAGE SENSE LOW-PASS FILTERS

CONTROLLER #3 RAILS

---------------------

NOTES

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

13 83

Z232 MGTVCCAUX

GND

2

1

3

2 1

R891.00K1/16W

2

1

J20

2

1

25V1500PFC71

2

1R197871/10W

3

MGTVCCAUX_EA_PC33_MGTVCCAUX_EA_P

C33_MGTVCCAUX_EA_N Z24

Z27

Z26

Z25

Z29

GND2_SPY

MGTAVTT_SPY

MGTAVCC_SPY

GND3_SPY

2

2

2 1

R881.00K1/16W

2

1

J21

2

1

25V1500PFC72 3

2

1

J222 1

R871.00K1/16W

2

1

25V1500PFC73 3

C31_MGTAVCC_EA_N

C31_MGTAVCC_EA_P MGTAVCC_EA_P

C32_MGTAVTT_EA_N

MGTAVTT_EA_PC32_MGTAVTT_EA_P

Page 14: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GND

GND

VCCINT

FAULT

PWM

GND_1

GND_0

IOUT

AGND

VOVI

SRE

VBIAS

INH_B

TEMP

AGND1

GNDAGND1

GND

RG1 RG2

V_PVIN_N

VIN_P VOUT

REFV_N

GNDAGND1

RG1 RG2

V_PVIN_N

VIN_P VOUT

REFV_N

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

R2R1

S1 S2

VCCINT

FAULT

PWM

GND_1

GND_0

IOUT

AGND

VOVI

SRE

VBIAS

INH_B

TEMP

R2R1

S1 S2

AGND1

PLACE COMPONENTS AS CLOSE AS POSSIBLE TO VI PIN ON REGULATOR

CONTROLLER 1

CONTROLLER 1

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

VCCINT TWO PHASE 20A/20A REG

VCCINT 2-PHASE, 20A REGULATORS

VCCINT, 1.0 VDC, 20A

NOTES

VCCINT, 1.0 VDC, 20A

2 PLACES

CAUTION: TO AVOID DAMAGE PLACE THE REGULATORS IN RESET (POSITION 2-3) WHEN USING EXTERNAL SUPPLIESTO SOURCE THIS RAIL

CHANNEL 1B

CHANNEL 1A

8314

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

2

1

D23.9V320MA

VCCINT_EXT_B

VCCINT_EXT_A

1 2

L18FERRITE-78

1 2

L17FERRITE-78

1

VCC12_P_C11A

C11A_VCCINT_PWM

VCC12_P_C11B

C11B_VCCINT_PWM

GND

1

2

C1319180UF

16VELEC 2

1

25V10UFC1298

2

1

25V1UFC1309

VCC12_P

VCCINT_INH_B

VCCINT_INH_B

VCCINT_INH_B

POR_B12

1 R39651.1K1/10W

2

J61

2

1

1/10W10

R367

2

1R307

C11A_TEMP

VCCINT_EA_P

C11_VCCINT_EA_N

J188

C11B_VCCINT_CS

21

S1 S2

R3030.0053W 1%

1

3

2

J199

C11B_VCCINT_FLTC11B_VCCINT_SRE

911

32 6 7

41

1012 8

5U5

PTD08A020W

2

GNDGND

C11A_VCCINT_FLT

1 2

R905.23K1/16W

21

S1 S2

R10.0053W 1%

1

2

C6080.1UF25V

1 8

72

3 6

54

U53

INA333

GND

2

1

D1

BAT54T1G

GND

1

2

C4747UF10V

1

2C55330UF10VTANT

1

2

C190.1UF25V

1

J51

1 8

72

3 6

54

U14

INA333

PWRCTL1_VCC3V3A

GND

1

J32

1

J311

2

C46647UF10V

1

2

C80330UF25VELEC

1

2

C2622UF25V

GNDGND

911

32 6 7

41

1012 8

5U51

PTD08A020W

GND

1

2

C73247UF10V

1

2C744330UF10VTANT

1

J186

PWRCTL1_VCC3V3A

GND

1

J178

1

J1771

2

C46747UF10V

1

2

C767330UF25VELEC

1

2

C69722UF25V

NC

C11A_VCCINT_CS

1 2

R3165.23K1/16W

C11A_VCCINT_SRE

GND

NC

C11B_TEMP

VCCINT_EA_P

UTIL_3V3

GND

1

2

C1320180UF

16VELEC 2

1

25V10UFC1299

2

1

25V1UFC1310

VCC12_P

1

1

GND

2

1

D33.9V320MA

Page 15: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GND

GND

AGND1

INH_B

FAULT

SRE

PWM

GND_1

GND_0

TEMP

IOUT

AGND

VOVI

VBIAS

AGND1

RG1 RG2

V_PVIN_N

VIN_P VOUT

REFV_N

R2R1

S1 S2

AGND1

RG1 RG2

V_PVIN_N

VIN_P VOUT

REFV_N

R2R1

S1 S2

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

AGND1

INH_B

FAULT

SRE

PWM

GND_1

GND_0

TEMP

IOUT

AGND

VOVI

VBIAS

PLACE COMPONENTS AS CLOSE AS POSSIBLE TO VI PIN ON REGULATOR

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

VCCBRAM/VCCAUX DUAL 10A REG

CONTROLLER 1

VCCAUX / VCCBRAM 10A REGULATORS

VCCAUX, 1.8 VDC, 10A

VCCBRAM, 1.0 VDC, 10A

NOTES

CHANNEL 3

CAUTION: TO AVOID DAMAGE PLACE THE REGULATORS IN RESET (POSITION 2-3) WHEN USING EXTERNAL SUPPLIESTO SOURCE THIS RAIL

CONTROLLER 1CHANNEL 2

8315

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

VCCBRAM

VCCAUX

GND

GND

1 2

L20FERRITE-78

1 2

L19FERRITE-78

VCC12_P_C12

VCC12_P_C13

POR_B1

POR_B12

1 R39751.1K1/10W 1

3

2

J2012

2

2

1

1

2

C46947UF10V

1

2

C73347UF10V

GND

1

3

2

J200

8910

11

32 5 6 7

41

12

U6

PTD08A010W

GND

1

J35

VCCBRAM_EXT

21

S1 S2

R340.0053W 1%

1

2

C4947UF10V

21

R30

2.55K1/16W

1

2

C56330UF10VTANT

1

2

C210.1UF25V

GND

PWRCTL1_VCC3V3A

GND

1 8

72

3 6

54

U54

INA333

GND

J63

1

J54

21

S1 S2

R320.0053W 1%VCCAUX_EXT

1

J33

GND

1

J36 1

2

C4647UF10V

21

R28

2.55K1/16W

1

2C54330UF10VTANT

1

2

C200.1UF25V

1

J52

GND

GND

1 8

72

3 6

54

U15

INA333

PWRCTL1_VCC3V3A

J60

1

2

C99330UF25VELEC

1

2

C59722UF25V

8910

11

32 5 6 7

41

12

U56

PTD08A010W

GND

1

2

C818330UF25VELEC

1

2

C80722UF25V

C13_TEMP

NC

C13_VCCBRAM_FLT

C13_VCCBRAM_SRE

C13_VCCBRAM_PWM

C12_TEMP

NC

C12_VCCAUX_FLT

C12_VCCAUX_SRE

C12_VCCAUX_PWM

C12_VCCAUX_CS

C13_VCCBRAM_CS

UTIL_3V3

UTIL_3V3

2

1 R39851.1K1/10W

GND

1

2

C1321180UF16V

ELEC 2

1

25V10UFC1300

2

1

25V1UFC1311

VCC12_P

GND

1

2

C1322180UF16V

ELEC 2

1

25V10UFC1301

2

1

25V1UFC1312

VCC12_P

1

1

GND

GND

2

1

D53.9V320MA

2

1

D63.9V320MA

Page 16: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GND

INH_B

FAULT

SRE

PWM

GND_1

GND_0

TEMP

IOUT

AGND

VOVI

VBIAS

INH_B

FAULT

SRE

PWM

GND_1

GND_0

TEMP

IOUT

AGND

VOVI

VBIAS

RG1 RG2

V_PVIN_N

VIN_P VOUT

REFV_N

R2R1

S1 S2

VCCO_HP

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

R2R1

S1 S2

VCCAUX_IO

RG1 RG2

V_PVIN_N

VIN_P VOUT

REFV_N

PLACE COMPONENTS AS CLOSE AS POSSIBLE TO VI PIN ON REGULATOR

CAUTION: TO AVOID DAMAGE PLACE THE REGULATORS IN RESET (POSITION 2-3) WHEN USING EXTERNAL SUPPLIESTO SOURCE THIS RAIL

VCCO_HP, 1.2-1.8 VDC, 10A

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

VCCAUX_IO/VCCO_HP DUAL 10A REG

CONTROLLER 2CHANNEL 1

CHANNEL 2

VCCAUX_IO / VCCO_HP 10A REGULATORS

NOTES

CONTROLLER 2

VCCAUX_IO, 1.8 VDC, 10A

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

16 83

1 2

L22FERRITE-78

1 2

L21FERRITE-78

C22_VCCO_HP_PWM

VCC12_P_C22

VCC12_P_C21

POR_B1

POR_B1

AGND2

2

1

C21_VCCAUX_IO_CS

1 8

72

3 6

54

U16

INA333

GND

1

J37

1

J40

VCCO_HP_EXT

VCCAUX_IO_EXT

21

S1 S2

R330.0053W 1%

1

2

C230.1UF25V

21

S1 S2

R350.0053W 1%

J62

J65

21

R31

2.55K1/16W

21

R29

2.55K1/16W

GND

PWRCTL2_VCC3V3A

AGND2

1 8

72

3 6

54

U55

INA333

AGND2

PWRCTL2_VCC3V3A

1

2

C5147UF10V

1

2

C4847UF10V

1

2C57330UF10VTANT

1

2C59330UF10VTANT

1

2

C220.1UF25V

1

J53

1

J55

GND

GND

GND

GND

1

J34

GND

C22_VCCO_HP_CS

1

2

C47047UF10V

1

2

C46847UF10V

GND

8910

11

32 5 6 7

41

12

U57

PTD08A010W

GND

GND

1

2

C819330UF25VELEC

1

2

C80822UF25V

8910

11

32 5 6 7

41

12

U50

PTD08A010W

GND

1

2

C768330UF25VELEC

1

2

C2822UF25V

C21_TEMP

NC

C21_VCCAUX_IO_FLT

C21_VCCAUX_IO_SRE

C21_VCCAUX_IO_PWM

C22_TEMP

NC

C22_VCCO_HP_FLT

C22_VCCO_HP_SRE

AGND2

2

1

3

2

J203

2

1

3

2

J202

UTIL_3V3

UTIL_3V3

2

1 R40051.1K1/10W

2

1 R39951.1K1/10W

GND

1

2

C1323180UF16V

ELEC 2

1

25V10UFC1302

2

1

25V1UFC1313

VCC12_P

GND

1

2

C1324180UF16V

ELEC 2

1

25V10UFC1303

2

1

25V1UFC1314

VCC12_P

1

1

GND

GND

2

1

D73.9V320MA

Page 17: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

VCCO_HR

R2R1

S1 S2

RG1 RG2

V_PVIN_N

VIN_P VOUT

REFV_N

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

INH_B

FAULT

SRE

PWM

GND_1

GND_0

TEMP

IOUT

AGND

VOVI

VBIAS

PLACE COMPONENTS AS CLOSE AS POSSIBLE TO VI PIN ON REGULATOR

CONTROLLER 2

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

VCCO_HR 10A REGULATOR

VCCO_HR 10A REG

VCCO_HR, 2.5 VDC, 10A

CHANNEL 3

NOTES

TO SOURCE THIS RAILCAUTION: TO AVOID DAMAGE PLACE THE REGULATORS IN RESET (POSITION 2-3) WHEN USING EXTERNAL SUPPLIES

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

17 83

VCCO_HR_EXT

1 2

L23FERRITE-78

VCC12_P_C23

POR_B1

AGND2

8910

11

32 5 6 7

41

12

U58

PTD08A010W

C23_VCCO_HR_CS

J206

1

2

C7710.1UF25V

2

1

J196

GND

1 8

72

3 6

54

U61

INA333

GND

21

R369

2.55K1/16W

21

S1 S2

R3660.0053W 1%

1

2

C81147UF10V

J205

1

2

C80922UF25V

1

2

C820330UF25VELEC

GND

1

2

C81047UF10V

GND

1

2

C813330UF10VTANT

GND

C23_VCCO_HR_SREC23_VCCO_HR_PWM

C23_VCCO_HR_FLT

C23_TEMPNC

PWRCTL2_VCC3V3A

AGND2

2

1

3

2

J204

UTIL_3V3

2

1 R40151.1K1/10W

GND

1

2

C1325180UF16V

ELEC 2

1

25V10UFC1304

2

1

25V1UFC1315

VCC12_P

1

GND

Page 18: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

MRG_UP

VI

TRACK

INH_B

VOMRG_DN

SENSE

VO_ADJ

GND

GND

MRG_UP

VI

TRACK

INH_B

VOMRG_DN

SENSE

VO_ADJ

GND

GND

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

PLACE COMPONENTS AS CLOSE AS POSSIBLE TO VI PIN ON REGULATOR

UTIL_5V0, 10A

UTIL_3V3, 18A

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

UTIL_5V0 10A FIXED OUTPUT REGULATOR / UTIL_3V3 18A FIXED OUTPUT REGULATOR

UTIL_5V0 / UTIL_3V3 REGULATORS

NOTES

PWRDN_5V0_B IS AN OPEN-DRAIN DRIVER

PWRDN_3V3_B IS AN OPEN-DRAIN DRIVER

2 PLACES

2 PLACES

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

18 83

1 2

L25FERRITE-78

1 2

L24FERRITE-78

3

3

1

POR_B2

VCC12_P_UTIL5V0

VCC12_P_UTIL3V3

POR_B2

2

1

3

2

J24

2

1

1

2

C5347UF10V

1

2C61330UF10VTANT

1

2

C85

330UF25VELEC

1

2

C86

10

2

1

8

3

7

6

9 5

4U13

PTH12020W

10

2

1

8

3

7

6

9 5

4U2

PTH12060WAD

GND

1

2

C47347UF10V

1

J59

21

1/16W2.00KR95

21

R2982801/10W

1

2

C47647UF10V

1

2

C3447UF10V

UTIL_3V3

UTIL_5V0

GND

1

2

C3010UF25V

1

2

C2510UF25V

1

2

C84

330UF25VELEC

1

2C62330UF10VTANT

1

J58

GND

GND

GND

GND

1

2

C600

GND

NC

NC

NC

NC

1

3

2

J4

GND

GND

1

2

C1326180UF16VELEC 2

1

25V10UFC1305

2

1

25V1UFC1316

VCC12_P

GND

1

2

C1327180UF16VELEC 2

1

25V10UFC1306

2

1

25V1UFC1317

VCC12_P

3

Page 19: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

MRG_UP

VI

TRACK

INH_B

VOMRG_DN

SENSE

VO_ADJ

GND

GND

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

GND

TAB

INPG_BOUT

EN_B

2 PLACES

UTIL_2V5, 18A

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

UTIL_2V5 REGULATOR

PWRDN_5V0_B IS AN OPEN-DRAIN DRIVER

NOTES

UTIL_2V5 18A FIXED OUTPUT REGULATOR / VCCO_0 SEQUENCING REGULATOR

VCCO_0 (2.5V @ 7.5A)

PLACE COMPONENTS AS CLOSE AS POSSIBLE TO VI PIN ON REGULATOR

8319

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

1 2

L26FERRITE-78

2

VCC12_P_UTIL_2V5

POR_B2

VCCO_0

GND

UTIL_3V3

2

1R41110.0K1/10W

VCCAUX

GND

GND

1

J209

YELLOW

36

254

1

U62 DPAK5

TPS75925_DPAK5

GND

1

21

R3154.32K1/10W

UTIL_2V5

1

1

2

C73547UF10V

1

2

C73447UF10V

GND

1

2

C69610UF25V

1

2

C770

330UF25VELEC

1

2C745330UF10VTANT

GND

J187

GND

1

2

C769

1

3

2

J184

10

2

1

8

3

7

6

9 5

4U52

PTH12020W

NC

NC

1

2

C82447UF10V

GND

NC

1

32

Q21

NDS331N460MW

2

1 R4024.7K1/10W

1

2 25V1UFC821

GND

1

2

C1328180UF16VELEC 2

1

25V10UFC1307

2

1

25V1UFC1318

VCC12_P

2

Page 20: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RG1 RG2

V_PVIN_N

VIN_P VOUT

REFV_N

RG1 RG2

V_PVIN_N

VIN_P VOUT

REFV_N

R2R1

S1 S2

R2R1

S1 S2

TO GTX POWER MODULE

TO LOCAL UCD9248

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

TO LOCAL UCD9248

TO GTX POWER MODULE

MGT CURR SNS, EXT PWR JACKS

MGTAVCC AND MGTAVTT CURRENT SENSE AND EXT POWER JACKS

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

20 83

MGTAVTT

MGTAVCC

MGTAVTT_CS_P

MGTAVTT_CS_N

MGTAVCC_CS_N

1 2

R1382.05K1/10W

1 2

R2182.05K1/10W

1

2

C8290.1UF25V

GNDGND

C32_MGTAVTT_CS

MGTAVTT_MOD

MGTAVCC_MOD

21

S1 S2

R1450.0053W 1%

21

S1 S2

R1440.0053W 1%

1 8

72

3 6

54

U36 MSOP_8

INA333_MSOP-8

1 8

72

3 6

54

U37 MSOP_8

INA333_MSOP-8

J106

J104

J105

GND

GND

1

J189

C31_MGTAVCC_CS

1

J190

AGND3

AGND3

PWRCTL3_VCC3V3A

PWRCTL3_VCC3V3A

1

2

C8300.1UF25V

GND

MGTAVCC_CS_P

Page 21: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GND GND GND

GNDGNDGND

GND GNDGND

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RG1 RG2

V_PVIN_N

VIN_P VOUT

REFV_N

R2R1

S1 S2

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

TO GTX POWER MODULE

MGTAVCC MGTAVTT MGTVCCAUX

TO LOCAL UCD9248

MGT CURR SNS, EXT PWR JACKS, PWR LEDS

MGTVCCAUX CURRENT SENSE AND EXT POWER JACKS, GTX POWER STATUS LEDS

MGT POWER STATUS LEDS

MGT VOLTAGE CLAMPS

8321

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

MGTAVCC

MGTVCCAUX

C33_MGTVCCAUX_CS

2 1

R2161.00K1/16W

MGTVCCAUX_MOD

1

J191

MGTVCCAUX_MOD

MGTAVTT_MOD

21

S1 S2

R1460.0053W 1%

MGTVCCAUX_CS_P

MGTVCCAUX_CS_N

GND

J107

1 8

72

3 6

54

U38 MSOP_8

INA333_MSOP-8

2

1

DS27

1

32

Q16

NDS331N460MW

1

32

Q17

NDS331N460MW

1

32

Q18

NDS331N460MW

2

1

DS26

2

1 R2242611/10W

2

1 R2232611/10W

2

1 R2222611/10W

2

1R2211.00K1/16W 2

1R2201.00K1/16W 2

1R2191.00K1/16W

2

1

DS28

UTIL_3V3

MGTAVCC_MOD

AGND3

PWRCTL3_VCC3V3A

1

2

C8310.1UF25V

GND

MGTAVTT MGTVCCAUX

2

1

D83.9V320MA

2

1

D93.9V

320MA2

1

D103.9V

320MA

Page 22: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

MGTAVCC12V

5V

3.3V

GND

NC

MGTAVTT

POWER INTERFACE

MGTVCCAUX

7-SERIES GTX LOW-CUR PWR MOD

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411

5V INPUT FILTER

TEST P/N: TSS0150

PLACE ALL FILTER COMPONENTS AS CLOSE AS POSSIBLE TO THEIRRESPECTIVE PIN ON THE POWER CONNECTOR.

MGTAVCC: 1.0V @ 12.0A

MGTAVTT: 1.2V @ 8.0A

MGTVCCAUX: 1.8V @ 2.6A

MGT POWER MODULE INTERFACE - POWER CONNECTOR

MGT POWER MODULE INTERFACE

4 PLACES

12V INPUT FILTER

4 PLACES

3.3V INPUT FILTER

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

22 83

1

2 C493100UF6.3V

1

2

C4941

2

C4951

2

C496

1

2 C175100UF6.3V

1

2

C1731

2

C1741

2

C172

1

2

C820.1UF25V

1

GTX_3V3

2

1

25V10UFC63 1

2 25V1UFC70 1

2 25V0.1UFC58

1

2

C88180UF

16VELEC

1

2

C95330UF

25VELEC

1

2

1

25V1UFC87

GTX_VCC12_P

VCC12_P

UTIL_3V3

1 2

L64.9UH6.5A

UTIL_5V0 GTX_5V0

1 2

L164.3UH

8.0A

1

GND

A2

A3

A4

A5

A6

B1

B2

B3

B4

B5

B6

C1

C2

C3

C4

C5

C6

D5

D6

D1

D2

D3

D4

E1

E2

E3

E4

E5

E6

F1

F2

F3

F4

F5

F6

H1

H2

H3

H4

H5

H6

A1

G4

G5

G6

G1

G2

G3

J97 SAMTEC_MPT-08

1

2

C176DNP

1

2

C499DNP

NC

NC

MGTVCCAUX_MOD

MGTAVTT_MOD

MGTAVCC_MOD

NC

NC

NC

NC

GTX_5V0

GTX_3V3

1 2

L4FERRITE-78

GTX_VCC12_P

1

GND

GND

GND

1

2

C600.1UF25V2

1

25V1UFC81

2

1

25V10UFC69

2

1

25V10UFC83

Page 23: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

P

GND

GND

GND

VCCB VCCA

SCLA

SDAASDAB

SCLB

GNDOE

GND

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

GND

VCCB VCCA

SCLA

SDAASDAB

SCLB

GNDOE

MGTAVCC_CS-

MGTAVCC_CS+

MGTAVCC_SNS-

MGTAVTT_SNS+

MGTAVCC_SNS+

MGTAVTT_SNS-

SPI_CLK

SPI_D

SPI_Q

SPI_CS

PMBUS_CLK

PMBUS_CTRL

POR_B

INSTALLED BYPASS

MGTVCCAUX_CS+

MGTVCCAUX_CS-

MGTVCCAUX_SNS+

I2C_SDA

I2C_SCL

N/C

N/C

N/C

N/C

N/C

GND

GND

GND

GND

GND

GND

N/C

N/C

GND

GND

GND

GND

GND

GND

PMBUS_DATA

PMBUS_ALERT

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

N/C

N/C

GND

GND

GND

GND

GND

GND

GND

GND

N/C

N/C

MGTAVTT_CS+

MGTAVTT_CS-

GND

GND

N/C

ALT_PMBUS_ADDR

N/C

N/C N/C

MGTAVCCAUX_SNS-

N/C

7-SERIES GTX LOW-CUR PWR MODSIGNAL INTERFACE

GND

N/C

N/C

N/C

N/C

N/C4 PLACES

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

SPI LEVELTRANSLATION

4 PLACES

ROUTE AS 100 OHM DIFFERENTIAL PAIR FROM PINS TO PWR/GND

ROUTE AS 100 OHM DIFFEENTIAL PAIR

PINS OF A MGT DECOUPLING CAP NEAREST THE DUT.

MGT POWER MODULE INTERFACE - SIGNAL CONNECTOR

MGT POWER MODULE INTERFACE

ALTERNATE PMBUS ADDRESS.PULL DOWN ON ALT_PMBUS_ADDR PIN SWITCHES MODULE TO

8323

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:593

MGT_POR_B

2

1

1/10W10R388

2

1

1/10W10R389

2

1

1/10W10R3864

25

80

49 50

9

24

27 28

32

35 36

39 40

43

10

44

45 46

51 52

53 54

63 64

65

11

66

75

72

74

12

15 16

19 20

23

76

78

68

70

79

37

41

38

22

26

13

17

14

18

30

34

1

48

6

8

47

67

71

77

42

56

62

58

60

55

59

57

21

29

31

33

61

69

73

3

5

4

7

2

J66 SAMTEC_BTE-040

Z36

Z35

Z34

Z33

Z32

Z31

1

GND1_SPY

GND2_SPY

MGTAVTT_SPY

MGTAVCC_SPY

1

GTX_MOD_SPI_CS

MGT_MOD_SPI_D

MGT_MOD_SPI_SCK

MGTAVTT_CS_P

MGTVCCAUX_CS_P

2

2

MGTVCCAUX

1

VCCO_HP_EXT

8 1

2

36

7

45

U48

PCA95171

2

C6070.1UF25VX5R

UTIL_3V3

12

J23NC

NC

NC

NC

NC

NC

NC

NC

GTX_MOD_I2C_SCL

PMBUS_ALERT

PMBUS_CTRL

PMBUS_DATA

PMBUS_CLK

MGTAVCC_CS_N

GNDGND

NC

NC

GTX_MOD_I2C_SDA

MGTVCCAUX_CS_N

NC

MGTAVTT_CS_N

MGTAVCC_CS_P

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

8 1

2

36

7

45

U49

PCA9517

1

2

C5232.2UF10VX5R

2

1

R291

2

1

R292

2

1R293

2

1 R29010.0K1/10W

2

1

R295

2

1

R296

2

1R297

2

1 R29410.0K1/10W

UTIL_3V3

VCCO_HP_EXT

MGTVCCAUX_SNS_P

MGTVCCAUX_SNS_N

GND

2

1R361DNP

MGT_MOD_SPI_Q

GND

MGTAVTT_MODMGTAVCC_MOD

MGTAVTT_SNS_N

MGTAVCC_SNS_N

MGTAVCC_SNS_P

MGTAVTT_SNS_P

2

1

1/10W10R387

1TP10

GND

3

Page 24: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GND

VCCO_HP

GNDGND

GND

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCCINT

GNDGND

GNDGNDGND

RN

ASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

DUT POWER PROBE CHANNELS

POWER PROBE CHANNELS

SCHEM, ROHS COMPLIANTPOWER PROBE CHANNELS

PLACE POWER PROBE CHANNELS AS CLOSE AS POSSIBLE TO THE DUT

MGT POWER PROBE CHANNELS

8324

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

1

12

3

J91

CON_SMA_SCREW_ON

12

3

J90

CON_SMA_SCREW_ON

12

3

J92

CON_SMA_SCREW_ON

12

3

J93

CON_SMA_SCREW_ON

VCCAUX_IOVCCBRAM

VCCAUX

MGTVCCAUXMGTAVTT MGTAVCC

12

3

J94

CON_SMA_SCREW_ON

12

3

J88

CON_SMA_SCREW_ON

12

3

J89

CON_SMA_SCREW_ON

12

3

J96

CON_SMA_SCREW_ON

1

1

12

3

J208

CON_SMA_SCREW_ON

VCCO_HR

Page 25: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

VCCO_0_B5VCCO_0_E8VCCO_0_B9

VCCO_0_B13

IP_0_E6IO_L20P_0/VREF_0_C4IO_L20N_0/PUDC_B_D5

IO_L19P_0_A3IO_L19N_0_B3

IP_0_D6IO_L18P_0_A4IO_L18N_0_B4IO_L17P_0_A5IO_L17N_0_C5

IP_0_F7IO_L16P_0_D7IO_L16N_0_C6IO_L15P_0_A6IO_L15N_0_B6IO_L14P_0_F8

IO_L14N_0/VREF_0_E7IO_L13P_0_A7IO_L13N_0_C7

IP_0_F9IO_L12P_0/GCLK10_A8IO_L12N_0/GCLK11_B8IO_L11P_0/GCLK8_C8IO_L11N_0/GCLK9_D8

IP_0/VREF_0_E9IO_L10P_0/GCLK6_C9IO_L10N_0/GCLK7_A9IO_L09P_0/GCLK4_C10IO_L09N_0/GCLK5_D9

IP_0_F10IO_L08P_0_B10IO_L08N_0_A10IO_L07P_0_C11IO_L07N_0_A11IO_L06P_0_D10

IO_L06N_0/VREF_0_E10IO_L05P_0_B12IO_L05N_0_A12IO_L04P_0_A14IO_L04N_0_A13IO_L03P_0_C12IO_L03N_0_D11

IP_0_D12IO_L02P_0/VREF_0_B15

IO_L02N_0_B14IO_L01P_0_D13IO_L01N_0_C13

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCCO_1_J15VCCO_1_H12VCCO_1_E15VCCO_1_N15

IP_L25N_1_F11IP_L25P_1/VREF_1_F12

IO_L24N_1/A25_C15IO_L24P_1/A24_C16IO_L23N_1/A23_D14IO_L23P_1/A22_E13IO_L22N_1/A21_D15IO_L22P_1/A20_D16

IP_L21N_1_G11IP_L21P_1/VREF_1_G12

IO_L20N_1/A19_F13IO_L20P_1/A18_E14IO_L19N_1/A17_F14IO_L19P_1/A16_G13IO_L18N_1/A15_F15IO_L18P_1/A14_E16IO_L17N_1/A13_G14IO_L17P_1/A12_H13IO_L16N_1/A11_F16IO_L16P_1/A10_G16

IO_L15N_1/RHCLK7_H16IO_L15P_1/IRDY1/RHCLK6_H15

IO_L14N_1/RHCLK5_H14IO_L14P_1/RHCLK4_J14

IP_L13N_1_H11IP_L13P_1_H10

IO_L12N_1/TRDY1/RHCLK3_J16IO_L12P_1/RHCLK2_K16IO_L11N_1/RHCLK1_K14IO_L11P_1/RHCLK0_K15

IO_L10N_1/A9_J13IO_L10P_1/A8_J12

IP_L09N_1_J11IP_L09P_1/VREF_1_J10

IO_L08N_1/A7_L16IO_L08P_1/A6_L14IO_L07N_1/A5_M16IO_L07P_1/A4_M15IO_L06N_1/A3_K13IO_L06P_1/A2_L13

IO_L05N_1/VREF_1_M14IO_L05P_1_M13

IP_L04N_1/VREF_1_K12IP_L04P_1_K11

IO_L03N_1/A1_N16IO_L03P_1/A0_P16

IO_L02N_1/LDC0_P15IO_L02P_1/LDC1_R15IO_L01N_1/LDC2_N14IO_L01P_1/HDC_N13

74LVC125A

VCC

GND

TSSOP_14

4Y

3Y

2Y

1Y

3OE_B

4A

4OE_B

2A

1OE_B

1A

3A

2OE_B

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

SYSTEMACE-2 - S3AN FPGA BANKS 0, 1

SYSTEMACE-2 S3AN BANKS 0, 1

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

25 83

TDO_0

TDI_SYSACE

TMS_SYSACE

TCK_SYSACE

VCCO_0

NC

VCCO_0

GND

14

7

11

8

6

3

10

12

13

5

1

2

9

4

U20

1

2 25V0.1UFC100

VCCO_0

GND

F11F12C15C16D14E13D15D16G11G12F13E14F14G13F15E16G14H13F16G16H16H15H14J14H11H10J16K16K14K15J13J12J11J10L16L14M16M15K13L13M14M13K12K11N16P16P15R15N14N13

U32 FTG256

3S200AN

J15H12E15N15

U32 FTG256

3S200AN

UTIL_3V3

E6C4D5A3B3D6A4B4A5C5F7D7C6A6B6F8E7A7C7F9A8B8C8D8E9C9A9C10D9F10B10A10C11A11D10E10B12A12A14A13C12D11D12B15B14D13C13

U32 FTG256

3S200AN

2

1 R1885101/10W1%

NC

B5E8B9B13

U32 FTG256

3S200AN

SDCARD_WP

SDCARD_D2

SDCARD_D0

SDCARD_CMD

SDCARD_CLK

SDCARD_D3

SDCARD_D1NC

NCNCNCNC

NCNC

NC

NCNCNCNCNCNC

NCNCNC

NCNC

NC

NC

NCNCNCNC

NC

NC

NCNC

NCNCNC

NCNCNCNCNC

NCNC

NCNCNCNCNCNC

NCNCNCNC

NC

NC

NCNCNCNC

NCNCNCNCNCNC

NC

NC

NCNCNCNCNCNC

NCNCNCNC

NCNCNCNCNC

NC

NCNC

NC

SDCARD_DET

GNDTCK_0

TMS_0

TDI_0

GND

NC

Page 26: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

VCCO_3_J5VCCO_3_D2VCCO_3_M2VCCO_3_H2

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCCO_2_R4VCCO_2_R8VCCO_2_M9

VCCO_2_R12

IP_2/VREF_2_N5IO_L01N_2/M0_P4IO_L01P_2/M1_N4

IO_L02N_2/CSO_B_T2IO_L02P_2/M2_R2

IP_2_L7IO_L03N_2/VS2_T3

IO_L03P_2/RDWR_B_R3IP_2/VREF_2_M7

IO_L04N_2/VS0_P5IO_L04P_2/VS1_N6

IO_L05N_2_R5IO_L05P_2_T4

IO_L06N_2/D6_T6IO_L06P_2/D7_T5

IO_L07N_2_P6IO_L07P_2_N7

IO_L08N_2/D4_N8IO_L08P_2/D5_P7IP_2/VREF_2_M8

IO_L09N_2/GCLK13_T7IO_L09P_2/GCLK12_R7IO_L10N_2/GCLK15_T8IO_L10P_2/GCLK14_P8

IP_2_L8IO_L11N_2/GCLK1_P9IO_L11P_2/GCLK0_N9IO_L12N_2/GCLK3_T9IO_L12P_2/GCLK2_R9

IP_2/VREF_2_L9IO_L13N_2_M10IO_L13P_2_N10

IO_L14N_2/MOSI/CSI_B_P10IO_L14P_2_T10

IO_L15N_2/DOUT_R11IO_L15P_2/AWAKE_T11

IP_2/VREF_2_L10IO_L16N_2_N11IO_L16P_2_P11

IO_L17N_2/D3_P12IO_L17P_2/INIT_B_T12

IO_L18N_2/D1_R13IO_L18P_2/D2_T13IP_2/VREF_2_M11IO_L19N_2_P13IO_L19P_2_N12

IO_L20N_2/CCLK_R14IO_L20P_2/D0/DIN/MISO_T14

IO_L01P_3_C2IO_L01N_3_C1IO_L02P_3_D4IO_L02N_3_D3IO_L03P_3_D1IO_L03N_3_E1IP_L04P_3_E4

IP_L04N_3/VREF_3_F4IO_L05P_3_E3IO_L05N_3_E2IP_L06P_3_G6

IP_L06N_3/VREF_3_G5IO_L07P_3_F3IO_L07N_3_G4IO_L08P_3_F1

IO_L08N_3/VREF_3_G1IO_L09P_3_G3IO_L09N_3_H4IO_L10P_3_H6IO_L10N_3_H5

IO_L11P_3/LHCLK0_G2IO_L11N_3/LHCLK1_H1IO_L12P_3/LHCLK2_H3

IO_L12N_3/IRDY2/LHCLK3_J3IP_L13P_3_H7IP_L13N_3_J7

IO_L14P_3/LHCLK4_J2IO_L14N_3/LHCLK5_J1

IO_L15P_3/TRDY2/LHCLK6_K3IO_L15N_3/LHCLK7_K1IO_L16P_3/VREF_3_L1

IO_L16N_3_L2IO_L17P_3_J4IO_L17N_3_J6IO_L18P_3_K4IO_L18N_3_L3IO_L19P_3_M3IO_L19N_3_L4IO_L20P_3_M1IO_L20N_3_N1IP_L21P_3_K5IP_L21N_3_K6IO_L22P_3_N2IO_L22N_3_P1IO_L23P_3_R1IO_L23N_3_P2IO_L24P_3_N3IO_L24N_3_M4IP_L25P_3_L5

IP_L25N_3/VREF_3_L6

RN

ASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

SCHEM, ROHS COMPLIANTSYSTEMACE-2 S3AN BANKS 2, 3

SYSTEMACE-2 - S3AN FPGA BANKS 2, 3

SYSTEMACE-2 FAILSAFE MODE JUMPERS

10-4-2012_16:59 1.0

01

26 83

VC7203 V7 FFG1761 MGT CHAR

2

1R1034.7K

1/10W

12J70

DNP

12J69

DNP

GND

CABLE_TCK

CABLE_TMS

C2C1D4D3D1E1E4F4E3E2G6G5F3G4F1G1G3H4H6H5G2H1H3J3H7J7J2J1K3K1L1L2J4J6K4L3M3L4M1N1K5K6N2P1R1P2N3M4L5L6

U32 FTG256

3S200AN

VCCO_HP_EXT VCCO_HP_EXT

SA2_RESET_B

UTIL_3V3

N5P4N4T2R2L7T3R3M7P5N6R5T4T6T5P6N7N8P7M8T7R7T8P8L8P9N9T9R9L9M10N10P10T10R11T11L10N11P11P12T12R13T13M11P13N12R14T14

U32 FTG256

3S200AN

R4R8M9R12

U32 FTG256

3S200AN

J5D2M2H2

U32 FTG256

3S200AN

SA2_MODE1

SA2_MODE2

SA2_MODE0

2

1 R1054.7K1/10W5%

SA2_SDHOST_CMD

SA2_SDHOST_D1

SA2_SDHOST_CLK

SA2_SDHOST_D2

SA2_SDHOST_D3

SA2_SDHOST_D0

SA2_CFGADDR2

SA2_CLK

SA2_STAT_LED

SA2_CFGMODEPINSA2_CFGADDR0

SA2_CFGADDR1SA2_ERR_LEDSA2_RESET_B

NC

2

1 R1044.7K1/10W5%

2

1 R1895101/10W1%

NC

NCNC

NC

NCNC

NC

NC

NCNCNC

NCNCNCNCNC

NCNCNC

NCNCNCNCNCNC

NCNC

NC

NC

NC

NCNCNC

CABLE_TDONC

NC

NCNCNC

SYSACE_TDINCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC

SA2_PROG_B

VCCO_HP_EXT

Page 27: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

UTIL_3V3

VCCINT_J9VCCINT_H8VCCINT_G7VCCINT_G9VCCINT_K8

VCCINT_K10

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

GND_J8GND_R10GND_M12GND_A16GND_A1GND_K9GND_T1

GND_L11GND_F2

GND_G15GND_K2GND_G8GND_C3GND_H9GND_P3

GND_G10GND_E5

GND_B11GND_M5

GND_E12GND_F6

GND_C14GND_R6

GND_L15GND_B7

GND_T16GND_K7

GND_P14

VIN

GND

EN ADJ

VOUT

VCCAUX_E11VCCAUX_F5

VCCAUX_L12VCCAUX_M6

DONE_T15PROG_B_A2

SUSPEND_R16TCK_A15TDI_B1

TDO_B16TMS_B2

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

ADD SILKSCREEN TEXT "3AN DONE" BESIDE LED

SYSTEMACE-2 S3AN CONFIG, PWR/GND

DEDICATED SYSTEMACE-2 JTAG

SYSTEMACE-2 - S3AN FPGA CONFIGURATION, PWR/GND

8327

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

J207

T15A2R16A15B1B16B2

U32 FTG256

3S200AN

E11F5L12M6

U32 FTG256

3S200AN

1

2

C1791UF25VX5R

1

2

C920.1UF25VX5R

VCCO_0

1

2

C8230.01UF25VX5R

GND

1

2

3 4

5

U21TSOT_5

ADP123

VCCO_HP_EXT

J8R10M12A16A1K9T1L11F2G15K2G8C3H9P3G10E5B11M5E12F6C14R6L15B7T16K7P14

U32 FTG256

3S200AN

1

2

1

DS22LED-GRN-SMT

1

2

C5960.01UF25VX5R

1

2

C5950.01UF25VX5R

UTIL_3V3

2

1 R1414.7K1/10W5%

2

1 R1396.81K1/10W1%

1

2

C5001UF25VX5R

UTIL_3V3

1

2

C2050.01UF25VX5R

1

2

C2030.01UF25VX5R

1

2

C312470UF6.3VTANT

J9H8G7G9K8K10

U32 FTG256

3S200AN

2

1 R10227.41/10W1%

2

1 R19701/10W5%

2

1 R1473301/10W5%

1

2

C2110.01UF25VX5R

GND

1

2

C17010UF25VX5R

VCC1V2

1

2

C1781UF25VX5R

1

2

C900.1UF25VX5R

1

2

C890.1UF25VX5R

1

2

C2100.01UF25VX5R

1

2

C2090.01UF25VX5R

1

2

C310470UF6.3VTANT

1

2

C1801UF25VX5R

1

2

C930.1UF25VX5R

1

2

C960.1UF25VX5R

1

2

C910.1UF25VX5R

1

2

C2080.01UF25VX5R

1

2

C2070.01UF25VX5R

1

2

C2060.01UF25VX5R

1

2

C2040.01UF25VX5R

1

2

C2020.01UF25VX5R

VCC1V2

1

2

C16910UF25VX5R

GND

UTIL_3V3

UTIL_3V3

GND

GND

GND

GND GND

VCC1V2

1

2

C501470UF6.3VTANT

GND

1

GND

1

2

C940.01UF25VX5R

SA2_TMSSA2_TDOSA2_TDISA2_TCK

SA2_PROG_B

1

2

C8221UF25VX5R

1

2

C825470UF6.3VTANT

Page 28: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GND

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

OE

GND OUT

VCC

IOGND2

GNDTAB1GNDTAB2GNDTAB3

CMDVSS1

CLKVSS2DAT0DAT1DAT2

CD_DAT3

DETECT

VDD

PROTECTDETECT_PROTECT

GNDTAB4IOGND1

RN

ASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

JTAG CABLE CONNECTOR

SD CARDCONNECTOR

ADDRESS DIP SWITCH

PROGRAM RESET

STATUS LED

SYSTEMACE-2 - USER INTERFACE

SCHEM, ROHS COMPLIANTSYSTEMACE-2 USER INTERFACE

SYSTEMACE-2

SYSTEMACE-2 SYSTEMACE-2

SYSTEMACE-2 CONFIG

DEDICATED SYSTEMACE-2

SYSTEMACE-2 CLOCK

SYSTEMACE-2ERROR LED

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

28 83

GND GND

18

131415

23

56789

1

10

4

1112

1617

J211

67840-8001

VCCO_HP_EXT

SA2_TDOSA2_TDI

SA2_TCK

1

2 3

4

U22

50.00000MHZ

UTIL_3V3

UTIL_2V5

2

1

DS23

LED-GRN-SMT

SA2_RESET_B21

SW6

EVQ-11L07K

GNDGND

GND

1

2

C4630.1UF25VX5R

SA2_ERR_LED SA2_STAT_LED

2

1 R10751.1K1/10W1%

2

1 R10851.1K1/10W1% 2

1 R11351.1K1/10W1%

2

1 R11251.1K1/10W1%

2

1 R11151.1K1/10W1%

2

1 R10951.1K1/10W1%

2

1 R1164.7K1/10W5% 2

1 R1174.7K1/10W5%

2

1 R1154.7K1/10W5%

SDCARD_D3SDCARD_CMD

SDCARD_CLK

SDCARD_D0SDCARD_D1SDCARD_D2

SDCARD_DETSDCARD_WP

UTIL_3V3

2

1 R11051.1K1/10W1%

UTIL_3V3

SA2_TMS

21

SW7

EVQ-11L07K

2

1 R1064.7K1/10W5%

1234567891011121314

J67

87832-1420

1

2

C970.1UF25VX5R

NC

2

1 R1935101/10W1%2

1 R1905101/10W1%

UTIL_3V3

GND

21

DS24

LED-RED-SMT

NC

1

32

Q12

NDS331N460MW

2

1 R1941401/10W1%

GND

UTIL_3V3

1

32

Q13

NDS331N460MW

2

1 R1951401/10W1%

GND

GND

2

1 R1144.7K1/10W5%

2

1 R1915101/10W1% 2

1 R1925101/10W1%

SA2_PROG_B

2

1 R1184.7K1/10W5%

SA2_CLK

VCCO_HP_EXT

SA2_CFGADDR2SA2_CFGMODEPIN

SA2_CFGADDR1SA2_CFGADDR01

234 5

678

SDA04H1SBD

SW8

Page 29: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GND

GND

GND

REGIN

CN

R_G

ND

RT

S_O

_B

DT

R_O

_B

DC

D_I

_B

NC

1

NC10

NC

2

NC

3

NC4

GPIO3

GPIO2

GPIO1

GPIO0

NC9

RS

T_B

RX

D_I

TX

D_O

SU

SP

EN

D

SU

SP

EN

D_B

DS

R_I

_B

VB

US

VDD

CT

R_G

ND

CT

S_I

_B

D+

D-

GND1

VIO

RI_I_B

GND

GND

GND

SHLD4

VBUS

D_N

D_P

SHLD1

SHLD2

SHLD3

ID

GND

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

RS-232USB/UART BRIDGE

USB/UART BRIDGE

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

29 83

2

1 R1194.7K1/10W5%

USB_D_P

VCCO_HP_EXT

1

2

C6020.1UF25VX5R

USB_D_N

2

1

X5R25V1UFC181 1

2

C1010.1UF25VX5R

5

9

1

2

3

678

4

J79

CONN_USB_MINI_B_TH

1 2L8

FERRITE-220

1

2

C440DNPDNP

1 2L7

FERRITE-220

1

2 3

4

X1 SP0503BAHTG

12V

200MW

7

29

23

27

28

10

21

13

14

15

16

17

18

19

20

9

24

25

12

11

26

8

6

30

22

3

4

2

5

1

U34 QFN_28

CP2103GM_MLP-28

2

1

X5R25V1UFC604 1

2

C6030.1UF25VX5R

CP2103_VBUS

USB_TXD_0

NC

NC

USB_GPIO_0

USB_GPIO_1

USB_GPIO_2

USB_GPIO_3

USB_RTS_0_B

USB_CTS_I_B

USB_RXD_I

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

USB_SHIELD

USB_RTS_B

USB_VBUS

USB_GND

CP2103_VDD

Page 30: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

UTIL_2V5

GNDGND

GND

GND

GNDGND

A0A1

A2RESET_B

SC0

SC1

SC2

SC3 SC4

SC5

SC6

SC7

SCLSD0

SD1

SD2

SD3

SD4

SD5

SD6

SD7

SDAVDD

VSS

SPARE_40

SCL

SPARE_76SPARE_75SPARE_74SPARE_73SPARE_72SPARE_71SPARE_70SPARE_69SPARE_68SPARE_67SPARE_66SPARE_65SPARE_64SPARE_63SPARE_62SPARE_61SPARE_60SPARE_59SPARE_58SPARE_57SPARE_56SPARE_55SPARE_54SPARE_53SPARE_52SPARE_51

RESET

SPARE_45SPARE_44SPARE_43SPARE_42SPARE_41

SPARE_39SPARE_38SPARE_37SPARE_36SPARE_35SPARE_34SPARE_33SPARE_32

SDA

SPARE_50

VCCOVCCOVCCO

VCC2V5VCC2V5

VCC3V3VCC3V3VCC3V3

VCC5VCC5VCC5

GND

GND

GND

GND

VCC5

VCC3V3

VCC2V5

VCC2V5VCCO

QTH 120-PIN CONNECTOR

SUPERCLOCK-2 MODULE, B1

SPARE_15

CONTROL_0

CONTROL_3

SPARE_31SPARE_30SPARE_29SPARE_28SPARE_27SPARE_26

CONTROL_23CONTROL_22CONTROL_21CONTROL_20CONTROL_19CONTROL_18CONTROL_17CONTROL_16CONTROL_15CONTROL_14CONTROL_13CONTROL_12CONTROL_11CONTROL_10CONTROL_9CONTROL_8CONTROL_7CONTROL_6CONTROL_5CONTROL_4

CONTROL_2

SPARE_24SPARE_23SPARE_22

SPARE_20SPARE_19SPARE_18SPARE_17SPARE_16

SPARE_14SPARE_13SPARE_12SPARE_11

GCLK_NGCLK_P

LVDS3_NLVDS3_P

LVDS2_NLVDS2_P

LVDS1_NLVDS1_P

CONTROL_1

SPARE_21

GND

GND

GND

GND

GND

GND

GNDGND

GND

GND

GND

GND

QTH 120-PIN CONNECTOR

SUPERCLOCK-2 MODULE, A1

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

I2C BUS MUX

SUPERCLOCK-2 MODULE, I2C BUS MUX

SUPERCLOCK-2 MODULE INTERFACE

2 PLACES2 PLACES9 PLACES

8330

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

NCNC

FMC3_I2C_SDA

VCCO_HP_EXT

UTIL_3V3UTIL_3V3

2

1

R154

DUT_I2C_SCLDUT_I2C_SDA

GTX_MOD_I2C_SDACM_I2C_SCLCM_I2C_SDA

2

1R151

2

1 R1522.00K1/16W

2

1

R159

UTIL_5V0

41

61

67

11911711511311110910710510310199979593918987858381797775737169

65

595755

5149474543

3937353331292725

211917

13119

531

63

53

7

15

23

123

125

127

121

J82

SAMTEC_QTH-060

42

62

120118116114112110108106104102100989694929088868482807876747270

66

60585654

5250484644

40383634

32302826

24222018

16141210

64

8

64

124

126

68

122

128

2

J82

SAMTEC_QTH-060

CM_RSTCM_I2C_SDA

2

1R149

2

1 R1502.00K1/16W

2

1

R153

2

1

R155

2

1R156

2

1

R157

2

1

R158

1

2

C1060.1UF25V

12

213

5

7

9

11 14

16

18

20

224

6

8

10

13

15

17

19

2324

12

U39

PCA9547

UTIL_3V3UTIL_2V5

CM_LVDS3_NCM_LVDS3_P

CM_CTRL_0

CM_GCLK_NCM_GCLK_P

CM_LVDS2_NCM_LVDS2_P

CM_LVDS1_NCM_LVDS1_P CM_I2C_SCL

NC

NC

NCNCNCNC

NCNCNCNCNCNCNCNCNC

NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC

NC

NC

CM_CTRL_1

NCNCNCNC

NCNCNCNCNC

NCNC

CM_CTRL_2

CM_CTRL_4CM_CTRL_5CM_CTRL_6CM_CTRL_7CM_CTRL_8CM_CTRL_9CM_CTRL_10CM_CTRL_11CM_CTRL_12CM_CTRL_13CM_CTRL_14CM_CTRL_15CM_CTRL_16CM_CTRL_17CM_CTRL_18CM_CTRL_19CM_CTRL_20CM_CTRL_21CM_CTRL_22

NCNCNCNCNCNC

CM_CTRL_3

NC

CM_CTRL_23

FMC2_I2C_SDAFMC2_I2C_SCL NC

NC

GTX_MOD_I2C_SCLFMC1_I2C_SDAFMC1_I2C_SCL

2

1R365

2

1 R3642.00K1/16W

FMC3_I2C_SCL

VCCO_HP_EXT

NCNC

Page 31: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

GND

GND

GND

GND

SIG

GND1

GND4

GND3

GND2

SIG

GND1

GND4

GND3

GND2

SIG

GND1

GND4

GND3

GND2

SIG

GND1

GND4

GND3

GND2

GND

NCGND

VCCOUT_B

OUT

OE

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

200MHz LVDS CLOCK

DIFFERENTIAL SMA CLOCKS

USER CLOCKS

8331

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

23

654

1

U35

200MHZ

UTIL_2V5

NC LVDS_OSC_NLVDS_OSC_P

1

2

C1070.1UF25VX5R

1

2

5

4

3

J101

32K10K-400L5

1

2

5

4

3

J98

32K10K-400L5

1

2

5

4

3

J99

32K10K-400L5

1

2

5

4

3

J100

32K10K-400L5

CLK_DIFF_2_P

CLK_DIFF_1_N

CLK_DIFF_2_N

CLK_DIFF_1_P

Page 32: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

UTIL_5V0

VCCAUX

VIN

GND

EN ADJ

VOUTIN OUT

GND

REF3012

GND

STAR CONNECTION, SEE XADC

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

XADC INTERFACE

SELECT

SELECTVCCADC

VREF

DUT THERMAL DIODE TEST POINTS

XADC TEST INTERFACE / FPGA THERMAL DIODE TEST POINTS

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

32 83

VCCADC

J5

1 2

L9

FERRITE-600

AV_5V

1 2

3U45 SOT23_3

REF3012AIDBZT_SOT23_3

1

2

3 4

5

U43TSOT_5

ADP123

1

1

2

C46210UF25VX5R

NC

DXN_ADC

DXP_ADC

J150

HDR_1X1

J149

HDR_1X1

VREFP_ADC

XADC_AGND

2

1 R2451.00K1/16W1%

ADJ_ADP

2

1 R2462.00K1/16W1%

2

31

R2331K

1/4W10%

VCCADC_ADP

1

2

C4410.1UF25VX5R

XADC_AGND

1

2

C46110UF25VX5R

1 2

L10

FERRITE-600

1

2

C46010UF25VX5R

AV_5V 1

3

2

J142

1

3

2

J141

1 2

L11

FERRITE-600

VCCADC_FILTER

XADC_AGND

XADC_AGND

XADC_AGND

VREFP_3012

1

J6

Page 33: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

UTIL_3V3

UTIL_3V3

GNDGND

GND

GRN

RED

DIR

VCCB

B

VCCA

GND

A

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

UTIL_3V3

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

USER PUSH BUTTONSUSER SWITCHES

INIT_B LED DONE LED

8 PLACES

PROG_B PUSH BUTTON

I/O HEADER

CONFIG AND USER I/O

CONFIGURATION AND USER I/O

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

33 83

2

1R1214.7K

1/10W5%

DONE_0 1

32

Q15

NDS331N460MW

5

6

4

1

2

3

U26 SC70_6

SN74AVC1T45

1

J139YELLOW

VCCO_HP_EXT

1 2

34

DS25LED-GRN-RED

2

1R1204.7K

1/10W5%

INIT_B_0

2

1R2264.7K1/10W

5%

21

SW5

EVQ-11L07K

21

SW4

EVQ-11L07K

2

1R1224.7K

1/10W5%

GND

GND

1 2

3

5 6

7 8

9 10

4

1211

J125

HDR_2X6

21

R248

261

1/10W1%

21

R247

261

1/10W1%

USER_SW7

USER_SW2

2

1 R1402611/10W

2

1 R1483301/10W5%

USER_SW8

USER_SW6USER_SW5USER_SW4USER_SW3

USER_SW1

2

1

R130

2

1

R129

2

1

R128

2

1

R127

2

1

R126

2

1R125

2

1 R1244.7K1/10W5%

GND

GND

GND

21

DS21LED-GRN-SMT

21

SW3

EVQ-11L07K

12345678

161514131211109

SW2

SDA08H1SBD

GND

USER_PB1

USER_PB2

USER_SW1

USER_SW6

USER_SW5

USER_SW4

USER_SW3

USER_SW2

2

1

R131

VCCO_HP_EXT

PROGRAM_B_0

VCCO_0

VCCO_0

VCCO_0 VCCO_0

Page 34: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

USER APPLICATION LEDS

USER APPLICATION LEDS

8334

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

APP_LED1 APP_LED2 APP_LED3 APP_LED4 APP_LED5 APP_LED6 APP_LED7 APP_LED8

GND

UTIL_3V3

1

3

2

Q29

NDS331N460MW

2

1

DS14LED-GRN-SMT

2

1R4104.7K

1/10W

2

1 R2152611/10W

GND

UTIL_3V3

1

3

2

Q28

NDS331N460MW

2

1

DS13LED-GRN-SMT

2

1R4094.7K1/10W

2

1 R2142611/10W

GND

UTIL_3V3

1

3

2

Q27

NDS331N460MW

2

1

DS15LED-GRN-SMT

2

1R4084.7K

1/10W

2

1 R2132611/10W

GND

UTIL_3V3

1

3

2

Q26

NDS331N460MW

2

1

DS16LED-GRN-SMT

2

1R4074.7K

1/10W

2

1 R2122611/10W

GND

UTIL_3V3

1

3

2

Q25

NDS331N460MW

2

1

DS18LED-GRN-SMT

2

1R4064.7K

1/10W

2

1 R2112611/10W

GND

UTIL_3V3

1

3

2

Q24

NDS331N460MW

2

1

DS17LED-GRN-SMT

2

1R4054.7K1/10W

2

1 R2102611/10W

GND

UTIL_3V3

1

3

2

Q23

NDS331N460MW

2

1

DS20LED-GRN-SMT

2

1R4044.7K

1/10W

2

1 R2092611/10W

GND

UTIL_3V3

1

3

2

Q22

NDS331N460MW

2

1

DS19LED-GRN-SMT

2

1R4034.7K1/10W

2

1 R2082611/10W

Page 35: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GND2

NC2

NC1

GND1

P20P19P18P17P16P15P14P13P12P11P10P9P8P7P6P5P4P3P2P1

SAMTEC

MGTREFCLK1N_111_BA9MGTREFCLK1P_111_BA10MGTREFCLK0N_111_AW9MGTREFCLK0P_111_AW10MGTXRXN3_111_AW5MGTXRXP3_111_AW6MGTXTXN3_111_AW1MGTXTXP3_111_AW2MGTXRXN2_111_AY7MGTXRXP2_111_AY8MGTXTXN2_111_AY3MGTXTXP2_111_AY4MGTXRXN1_111_BA5MGTXRXP1_111_BA6MGTXTXN1_111_BA1MGTXTXP1_111_BA2MGTXRXN0_111_BB7MGTXRXP0_111_BB8MGTXTXN0_111_BB3MGTXTXP0_111_BB4

XC7V2000TFHG1761BANK 111

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

2 PLACES

2 PLACES

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

GTH BANK 111

GTX BANK 111

8335

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

BA9BA10AW9

AW10AW5AW6AW1AW2AY7AY8AY3AY4BA5BA6BA1BA2BB7BB8BB3BB4

U1SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

24

23

22

21

2019181716151413121110987654321

J84

CCC-J-020

1 2

C613

1 2

C612

0.1UF

1 2

C611

1 2

C6100.1UF

GND

111_REFCLK0_N111_REFCLK0_C_P

111_REFCLK1_C_P

111_REFCLK0_C_N

111_REFCLK1_P

111_REFCLK0_P

111_TX1_N111_TX1_P

111_RX1_P111_RX1_N

111_TX2_N111_TX2_P

111_RX2_P111_RX2_N

111_TX3_N111_TX3_P

111_RX3_P111_RX3_N

111_REFCLK0_N111_REFCLK0_P

111_REFCLK1_P111_REFCLK1_N

111_TX0_N111_TX0_P

111_RX0_P111_RX0_N

NC

NC

111_TX3_N111_TX3_P

111_TX2_N111_TX2_P

111_TX0_N111_TX0_P

111_RX0_P

111_TX1_P111_TX1_N

111_RX1_P111_RX1_N

111_RX2_P111_RX2_N

111_RX3_P111_RX3_N

111_RX0_N

111_REFCLK1_N111_REFCLK1_C_N

Page 36: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

MGTAVTTMGTRREF_112_W9MGTAVTTRCAL_112_W10MGTREFCLK1N_112_AU9MGTREFCLK1P_112_AU10MGTREFCLK0N_112_AT7MGTREFCLK0P_112_AT8MGTXRXN3_112_AP7MGTXRXP3_112_AP8MGTXTXN3_112_AR1MGTXTXP3_112_AR2MGTXRXN2_112_AR5MGTXRXP2_112_AR6MGTXTXN2_112_AT3MGTXTXP2_112_AT4MGTXRXN1_112_AU5MGTXRXP1_112_AU6MGTXTXN1_112_AU1MGTXTXP1_112_AU2MGTXRXN0_112_AV7MGTXRXP0_112_AV8MGTXTXN0_112_AV3MGTXTXP0_112_AV4

XC7V2000TFHG1761BANK 112

GND2

NC2

NC1

GND1

P20P19P18P17P16P15P14P13P12P11P10P9P8P7P6P5P4P3P2P1

SAMTEC

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

2 PLACES

2 PLACES

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

GTH BANK 112

TRACE LENGTH FROM RESISTOR PINS TO FPGA PINS MGTRREFAND MGTAVTTRCAL MUST BE OF EQUAL LENGTH AND GEOMETRY.

GTX BANK 112

8336

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

GND

1

1 2

C617

1 2

C616

0.1UF

1 2

C615

1 2

C6140.1UF

24

23

22

21

2019181716151413121110987654321

J85

CCC-J-020

112_REFCLK0_N112_REFCLK0_C_P

112_REFCLK1_C_P

112_REFCLK0_C_N

112_REFCLK1_P

112_REFCLK0_P

112_TX1_N112_TX1_P

112_RX1_P112_RX1_N

112_TX2_N112_TX2_P

112_RX2_P112_RX2_N

112_TX3_N112_TX3_P

112_RX3_P112_RX3_N

112_REFCLK0_N112_REFCLK0_P

112_REFCLK1_P112_REFCLK1_N

112_TX0_N112_TX0_P

112_RX0_P112_RX0_N

NC

NC

112_TX3_N112_TX3_P

112_TX2_N112_TX2_P

112_TX0_N112_TX0_P

112_RX0_P

112_TX1_P112_TX1_N

112_RX1_P112_RX1_N

112_RX2_P112_RX2_N

112_RX3_P112_RX3_N

112_RX0_N

112_REFCLK1_N112_REFCLK1_C_N

W9W10AU9

AU10AT7AT8AP7AP8AR1AR2AR5AR6AT3AT4AU5AU6AU1AU2AV7AV8AV3AV4

U1SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

2

1 R3401001/10W

1

112_MGTRREF

Page 37: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GND2

NC2

NC1

GND1

P20P19P18P17P16P15P14P13P12P11P10P9P8P7P6P5P4P3P2P1

SAMTEC

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

MGTREFCLK1N_113_AK7MGTREFCLK1P_113_AK8MGTREFCLK0N_113_AH7MGTREFCLK0P_113_AH8MGTXRXN3_113_AJ5MGTXRXP3_113_AJ6MGTXTXN3_113_AL1MGTXTXP3_113_AL2MGTXRXN2_113_AL5MGTXRXP2_113_AL6MGTXTXN2_113_AM3MGTXTXP2_113_AM4MGTXRXN1_113_AM7MGTXRXP1_113_AM8MGTXTXN1_113_AN1MGTXTXP1_113_AN2MGTXRXN0_113_AN5MGTXRXP0_113_AN6MGTXTXN0_113_AP3MGTXTXP0_113_AP4

XC7V2000TFHG1761BANK 1132 PLACES

2 PLACES

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

GTX BANK 113

GTX BANK 113

8337

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

GND

AK7AK8AH7AH8AJ5AJ6AL1AL2AL5AL6AM3AM4AM7AM8AN1AN2AN5AN6AP3AP4

U1SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

1 2

C621

1 2

C620

0.1UF

1 2

C619

1 2

C6180.1UF

24

23

22

21

2019181716151413121110987654321

J86

CCC-J-020

113_TX1_N113_TX1_P

113_RX1_P113_RX1_N

113_TX2_N113_TX2_P

113_RX2_P113_RX2_N

113_TX3_N113_TX3_P

113_RX3_P113_RX3_N

113_REFCLK0_N113_REFCLK0_P

113_REFCLK1_P113_REFCLK1_N

113_TX0_N113_TX0_P

113_RX0_P113_RX0_N

113_REFCLK0_N113_REFCLK0_C_P

113_REFCLK1_C_P

113_REFCLK0_C_N

113_REFCLK1_P

113_REFCLK0_P

NC

NC

113_TX3_N113_TX3_P

113_TX2_N113_TX2_P

113_TX0_N113_TX0_P

113_RX0_P

113_TX1_P113_TX1_N

113_RX1_P113_RX1_N

113_RX2_P113_RX2_N

113_RX3_P113_RX3_N

113_RX0_N

113_REFCLK1_N113_REFCLK1_C_N

Page 38: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GND2

NC2

NC1

GND1

P20P19P18P17P16P15P14P13P12P11P10P9P8P7P6P5P4P3P2P1

SAMTEC

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

MGTREFCLK1N_114_AF7MGTREFCLK1P_114_AF8MGTREFCLK0N_114_AD7MGTREFCLK0P_114_AD8MGTXRXN3_114_AD3MGTXRXP3_114_AD4MGTXTXN3_114_AG1MGTXTXP3_114_AG2MGTXRXN2_114_AE5MGTXRXP2_114_AE6MGTXTXN2_114_AH3MGTXTXP2_114_AH4MGTXRXN1_114_AF3MGTXRXP1_114_AF4MGTXTXN1_114_AJ1MGTXTXP1_114_AJ2MGTXRXN0_114_AG5MGTXRXP0_114_AG6MGTXTXN0_114_AK3MGTXTXP0_114_AK4

XC7V2000TFHG1761BANK 1142 PLACES

2 PLACES

RN

ASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

GTX BANK 114

SCHEM, ROHS COMPLIANTGTX BANK 114

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

38 83

GND

AF7AF8AD7AD8AD3AD4AG1AG2AE5AE6AH3AH4AF3AF4AJ1AJ2AG5AG6AK3AK4

U1SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

1 2

C625

1 2

C624

0.1UF

1 2

C623

1 2

C6220.1UF

24

23

22

21

2019181716151413121110987654321

J158

CCC-J-020

114_TX1_N114_TX1_P

114_RX1_P114_RX1_N

114_TX2_N114_TX2_P

114_RX2_P114_RX2_N

114_TX3_N114_TX3_P

114_RX3_P114_RX3_N

114_REFCLK0_N114_REFCLK0_P

114_REFCLK1_P114_REFCLK1_N

114_TX0_N114_TX0_P

114_RX0_P114_RX0_N

114_REFCLK0_N114_REFCLK0_C_P

114_REFCLK1_C_P

114_REFCLK0_C_N

114_REFCLK1_P

114_REFCLK0_P

NC

NC

114_TX3_N114_TX3_P

114_TX2_N114_TX2_P

114_TX0_N114_TX0_P

114_RX0_P

114_TX1_P114_TX1_N

114_RX1_P114_RX1_N

114_RX2_P114_RX2_N

114_RX3_P114_RX3_N

114_RX0_N

114_REFCLK1_N114_REFCLK1_C_N

Page 39: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

MGTAVTT

GND2

NC2

NC1

GND1

P20P19P18P17P16P15P14P13P12P11P10P9P8P7P6P5P4P3P2P1

SAMTEC

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

MGTRREF_115_B11MGTAVTTRCAL_115_A12MGTREFCLK1N_115_AB7MGTREFCLK1P_115_AB8MGTREFCLK0N_115_Y7MGTREFCLK0P_115_Y8MGTXRXN3_115_Y3MGTXRXP3_115_Y4MGTXTXN3_115_W1MGTXTXP3_115_W2MGTXRXN2_115_AA5MGTXRXP2_115_AA6MGTXTXN2_115_AA1MGTXTXP2_115_AA2MGTXRXN1_115_AB3MGTXRXP1_115_AB4MGTXTXN1_115_AC1MGTXTXP1_115_AC2MGTXRXN0_115_AC5MGTXRXP0_115_AC6MGTXTXN0_115_AE1MGTXTXP0_115_AE2

XC7V2000TFHG1761BANK 1152 PLACES

2 PLACES

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

GTX BANK 115

GTX BANK 115

AND MGTAVTTRCAL MUST BE OF EQUAL LENGTH AND GEOMETRY.TRACE LENGTH FROM RESISTOR PINS TO FPGA PINS MGTRREF

8339

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

GND

B11A12AB7AB8Y7Y8Y3Y4W1W2AA5AA6AA1AA2AB3AB4AC1AC2AC5AC6AE1AE2

U1SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

1

1 2

C629

1 2

C628

0.1UF

1 2

C627

1 2

C6260.1UF

24

23

22

21

2019181716151413121110987654321

J159

CCC-J-020

115_TX1_N115_TX1_P

115_RX1_P115_RX1_N

115_TX2_N115_TX2_P

115_RX2_P115_RX2_N

115_TX3_N115_TX3_P

115_RX3_P115_RX3_N

115_REFCLK0_N115_REFCLK0_P

115_REFCLK1_P115_REFCLK1_N

115_TX0_N115_TX0_P

115_RX0_P115_RX0_N

115_REFCLK0_N115_REFCLK0_C_P

115_REFCLK1_C_P

115_REFCLK0_C_N

115_REFCLK1_P

115_REFCLK0_P

NC

NC

115_TX3_N115_TX3_P

115_TX2_N115_TX2_P

115_TX0_N115_TX0_P

115_RX0_P

115_TX1_P115_TX1_N

115_RX1_P115_RX1_N

115_RX2_P115_RX2_N

115_RX3_P115_RX3_N

115_RX0_N

115_REFCLK1_N115_REFCLK1_C_N

2

1 R3381001/10W

1

115_MGTRREF

Page 40: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GND2

NC2

NC1

GND1

P20P19P18P17P16P15P14P13P12P11P10P9P8P7P6P5P4P3P2P1

SAMTEC

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

MGTREFCLK1N_116_V7MGTREFCLK1P_116_V8MGTREFCLK0N_116_T7MGTREFCLK0P_116_T8MGTXRXN3_116_R5MGTXRXP3_116_R6MGTXTXN3_116_P3MGTXTXP3_116_P4MGTXRXN2_116_U5MGTXRXP2_116_U6MGTXTXN2_116_R1MGTXTXP2_116_R2MGTXRXN1_116_V3MGTXRXP1_116_V4MGTXTXN1_116_T3MGTXTXP1_116_T4MGTXRXN0_116_W5MGTXRXP0_116_W6MGTXTXN0_116_U1MGTXTXP0_116_U2

XC7V2000TFHG1761BANK 116

AND MGTAVTTRCAL MUST BE OF EQUAL LENGTH AND GEOMETRY.TRACE LENGTH FROM RESISTOR PINS TO FPGA PINS MGTRREF

2 PLACES

2 PLACES

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

GTX BANK 116

GTX BANK 116

8340

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

GND

V7V8T7T8R5R6P3P4U5U6R1R2V3V4T3T4W5W6U1U2

U1SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

1 2

C633

1 2

C632

0.1UF

1 2

C631

1 2

C6300.1UF

24

23

22

21

2019181716151413121110987654321

J160

CCC-J-020

116_TX1_N116_TX1_P

116_RX1_P116_RX1_N

116_TX2_N116_TX2_P

116_RX2_P116_RX2_N

116_TX3_N116_TX3_P

116_RX3_P116_RX3_N

116_REFCLK0_N116_REFCLK0_P

116_REFCLK1_P116_REFCLK1_N

116_TX0_N116_TX0_P

116_RX0_P116_RX0_N

116_REFCLK0_N116_REFCLK0_C_P

116_REFCLK1_C_P

116_REFCLK0_C_N

116_REFCLK1_P

116_REFCLK0_P

NC

NC

116_TX3_N116_TX3_P

116_TX2_N116_TX2_P

116_TX0_N116_TX0_P

116_RX0_P

116_TX1_P116_TX1_N

116_RX1_P116_RX1_N

116_RX2_P116_RX2_N

116_RX3_P116_RX3_N

116_RX0_N

116_REFCLK1_N116_REFCLK1_C_N

1

Page 41: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GND2

NC2

NC1

GND1

P20P19P18P17P16P15P14P13P12P11P10P9P8P7P6P5P4P3P2P1

SAMTEC

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

MGTREFCLK1N_117_M7MGTREFCLK1P_117_M8MGTREFCLK0N_117_K7MGTREFCLK0P_117_K8MGTXRXN3_117_J5MGTXRXP3_117_J6MGTXTXN3_117_K3MGTXTXP3_117_K4MGTXRXN2_117_L5MGTXRXP2_117_L6MGTXTXN2_117_L1MGTXTXP2_117_L2MGTXRXN1_117_N5MGTXRXP1_117_N6MGTXTXN1_117_M3MGTXTXP1_117_M4MGTXRXN0_117_P7MGTXRXP0_117_P8MGTXTXN0_117_N1MGTXTXP0_117_N2

XC7V2000TFHG1761BANK 1172 PLACES

2 PLACES

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

GTX BANK 117

GTX BANK 117

8341

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

GND

M7M8K7K8J5J6K3K4L5L6L1L2N5N6M3M4P7P8N1N2

U1SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

1 2

C637

1 2

C636

0.1UF

1 2

C635

1 2

C6340.1UF

24

23

22

21

2019181716151413121110987654321

J161

CCC-J-020

117_TX1_N117_TX1_P

117_RX1_P117_RX1_N

117_TX2_N117_TX2_P

117_RX2_P117_RX2_N

117_TX3_N117_TX3_P

117_RX3_P117_RX3_N

117_REFCLK0_N117_REFCLK0_P

117_REFCLK1_P117_REFCLK1_N

117_TX0_N117_TX0_P

117_RX0_P117_RX0_N

117_REFCLK0_N117_REFCLK0_C_P

117_REFCLK1_C_P

117_REFCLK0_C_N

117_REFCLK1_P

117_REFCLK0_P

NC

NC

117_TX3_N117_TX3_P

117_TX2_N117_TX2_P

117_TX0_N117_TX0_P

117_RX0_P

117_TX1_P117_TX1_N

117_RX1_P117_RX1_N

117_RX2_P117_RX2_N

117_RX3_P117_RX3_N

117_RX0_N

117_REFCLK1_N117_REFCLK1_C_N

Page 42: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

MGTRREF_118_AC9MGTAVTTRCAL_118_AC10MGTREFCLK1N_118_G9MGTREFCLK1P_118_G10MGTREFCLK0N_118_E9MGTREFCLK0P_118_E10MGTXRXN3_118_E5MGTXRXP3_118_E6MGTXTXN3_118_F3MGTXTXP3_118_F4MGTXRXN2_118_F7MGTXRXP2_118_F8MGTXTXN2_118_G1MGTXTXP2_118_G2MGTXRXN1_118_G5MGTXRXP1_118_G6MGTXTXN1_118_H3MGTXTXP1_118_H4MGTXRXN0_118_H7MGTXRXP0_118_H8MGTXTXN0_118_J1MGTXTXP0_118_J2

XC7V2000TFHG1761BANK 118

GND2

NC2

NC1

GND1

P20P19P18P17P16P15P14P13P12P11P10P9P8P7P6P5P4P3P2P1

SAMTEC

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn ByAND MGTAVTTRCAL MUST BE OF EQUAL LENGTH AND GEOMETRY.TRACE LENGTH FROM RESISTOR PINS TO FPGA PINS MGTRREF

2 PLACES

2 PLACES

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

GTX BANK 118

GTX BANK 118

8342

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

GND

1 2

C641

1 2

C640

0.1UF

1 2

C639

1 2

C6380.1UF

24

23

22

21

2019181716151413121110987654321

J162

CCC-J-020

118_REFCLK0_N118_REFCLK0_C_P

118_REFCLK1_C_P

118_REFCLK0_C_N

118_REFCLK1_P

118_REFCLK0_P

NC

NC

118_TX3_N118_TX3_P

118_TX2_N118_TX2_P

118_TX0_N118_TX0_P

118_RX0_P

118_TX1_P118_TX1_N

118_RX1_P118_RX1_N

118_RX2_P118_RX2_N

118_RX3_P118_RX3_N

118_RX0_N

118_REFCLK1_N118_REFCLK1_C_N

118_TX1_N118_TX1_P

118_RX1_P118_RX1_N

118_TX2_N118_TX2_P

118_RX2_P118_RX2_N

118_TX3_N118_TX3_P

118_RX3_P118_RX3_N

118_REFCLK0_N118_REFCLK0_P

118_REFCLK1_P118_REFCLK1_N

118_TX0_N118_TX0_P

118_RX0_P118_RX0_N

2

1 R3391001/10W

1

118_MGTRREF AC9AC10

G9G10E9E10E5E6F3F4F7F8G1G2G5G6H3H4H7H8J1J2

U1SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

MGTAVTT

1

Page 43: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GND2

NC2

NC1

GND1

P20P19P18P17P16P15P14P13P12P11P10P9P8P7P6P5P4P3P2P1

SAMTEC

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

MGTREFCLK1N_119_C9MGTREFCLK1P_119_C10MGTREFCLK0N_119_A9MGTREFCLK0P_119_A10MGTXRXN3_119_A5MGTXRXP3_119_A6MGTXTXN3_119_B3MGTXTXP3_119_B4MGTXRXN2_119_B7MGTXRXP2_119_B8MGTXTXN2_119_C1MGTXTXP2_119_C2MGTXRXN1_119_C5MGTXRXP1_119_C6MGTXTXN1_119_D3MGTXTXP1_119_D4MGTXRXN0_119_D7MGTXRXP0_119_D8MGTXTXN0_119_E1MGTXTXP0_119_E2

XC7V2000TFHG1761BANK 1192 PLACES

2 PLACES

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

GTX BANK 119

GTX BANK 119

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

43 83

GND

C9C10A9A10A5A6B3B4B7B8C1C2C5C6D3D4D7D8E1E2

U1SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

1 2

C645

1 2

C644

0.1UF

1 2

C643

1 2

C6420.1UF

24

23

22

21

2019181716151413121110987654321

J163

CCC-J-020

119_TX1_N119_TX1_P

119_RX1_P119_RX1_N

119_TX2_N119_TX2_P

119_RX2_P119_RX2_N

119_TX3_N119_TX3_P

119_RX3_P119_RX3_N

119_REFCLK0_N119_REFCLK0_P

119_REFCLK1_P119_REFCLK1_N

119_TX0_N119_TX0_P

119_RX0_P119_RX0_N

119_REFCLK0_N119_REFCLK0_C_P

119_REFCLK1_C_P

119_REFCLK0_C_N

119_REFCLK1_P

119_REFCLK0_P

NC

NC

119_TX3_N119_TX3_P

119_TX2_N119_TX2_P

119_TX0_N119_TX0_P

119_RX0_P

119_TX1_P119_TX1_N

119_RX1_P119_RX1_N

119_RX2_P119_RX2_N

119_RX3_P119_RX3_N

119_RX0_N

119_REFCLK1_N119_REFCLK1_C_N

Page 44: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

MGTVCCAUX

MGTVCCAUX

MGTVCCAUX

MGTAVTT

MGTAVTT

MGTAVTT_G11_B6MGTAVTT_G11_C4MGTAVTT_G11_D6MGTAVTT_G11_E4MGTAVTT_G11_F6MGTAVTT_G11_G4MGTAVTT_G11_H6MGTAVTT_G11_J4MGTAVTT_G11_L4MGTAVTT_G11_N4MGTAVTT_G11_P6

XC7V2000TFHG1761BANK MGTAVTT_G11

MGTAVTT_G10_R4MGTAVTT_G10_W4

MGTAVTT_G10_AA4MGTAVTT_G10_AC4MGTAVTT_G10_AE4MGTAVTT_G10_AJ4MGTAVTT_G10_AL4MGTAVTT_G10_AM6MGTAVTT_G10_AN4MGTAVTT_G10_AP6MGTAVTT_G10_AR4MGTAVTT_G10_AU4MGTAVTT_G10_AV6MGTAVTT_G10_AW4MGTAVTT_G10_AY6MGTAVTT_G10_BA4

XC7V2000TFHG1761BANK MGTAVTT_G10

MGTAVCC

MGTAVCC

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

MGTAVCC_G10_AA8MGTAVCC_G10_AC8MGTAVCC_G10_AE8MGTAVCC_G10_AJ8MGTAVCC_G10_AL8MGTAVCC_G10_AN8MGTAVCC_G10_AR8MGTAVCC_G10_AU8MGTAVCC_G10_AW8MGTAVCC_G10_BA8MGTAVCC_G10_W8

XC7V2000TFHG1761BANK MGTAVCC_G10

MGTAVCC_G11_C8MGTAVCC_G11_E8MGTAVCC_G11_G8MGTAVCC_G11_J8MGTAVCC_G11_L8

XC7V2000TFHG1761BANK MGTAVCC_G11

MGTVCCAUX_G10_R8MGTVCCAUX_G10_U8

XC7V2000TFHG1761BANK MGTVCCAUX_G10

MGTVCCAUX_G11_N8

XC7V2000TFHG1761BANK MGTVCCAUX_G11

RN

ASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

SCHEM, ROHS COMPLIANTMGT POWER DECOUPLING

MGT POWER AND DECOUPLING

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

44 83

MGTAVTT_SPY

MGTAVCC_SPY

N8

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

R8U8

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

C8E8G8J8L8

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

AA8AC8AE8AJ8AL8AN8AR8AU8AW8BA8W8

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

1

2

C12364.7UF10VX5R

1

2

C12354.7UF10VX5R

MGTAVCC

GND

R4W4AA4AC4AE4AJ4AL4AM6AN4AP6AR4AU4AV6AW4AY6BA4

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

B6C4D6E4F6G4H6J4L4N4P6

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

1

2

C1924.7UF10VX5R

1

2

C1934.7UF10VX5R

GND

MGTAVTT

GND

1

2

C1954.7UF10VX5R

1

2

C1944.7UF10VX5R

Page 45: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

GND2

NC2

NC1

GND1

P20P19P18P17P16P15P14P13P12P11P10P9P8P7P6P5P4P3P2P1

SAMTEC

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

BULLSEYE TEST CHANNELS

SAMTEC BULLSEYE TEST CHANNELS

USE "FIGURE 8" PATTERN TO MATCH P AND N PAIRS. SEE LAYOUTGUIDELINES FOR DETAILS.

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

45 83

GND

1

1

24

23

22

21

2019181716151413121110987654321

J87

CCC-J-020

NC

NC

SAMTEC_TEST1_PSAMTEC_TEST1_NSAMTEC_TEST2_PSAMTEC_TEST2_NSAMTEC_TEST3_PSAMTEC_TEST3_NSAMTEC_TEST4_PSAMTEC_TEST4_NSAMTEC_TEST5_PSAMTEC_TEST5_N

Page 46: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

VCCO_0_M10VCCO_0_T11

M1_0_AK10M0_0_AL10M2_0_AJ10

DONE_0_AL11CFGBVS_0_AH10

PROGRAM_B_0_AJ11INIT_B_0_AG11

TDI_0_T10TDO_0_R10TMS_0_P11TCK_0_P10CCLK_0_N10

VCCBATT_0_N11VN_0_AB20VP_0_AA21

VREFP_0_AB21VREFN_0_AA20DXP_0_AC21

GNDADC_0_Y20VCCADC_0_Y21DXN_0_AC20

XC7V2000TFHG1761BANK 0

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCCAUX

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

BANK 0

STAR CONNECTION, SEE XADC

2 PLACES

PLACE CAPACITORS NEAR THE CENTER OF THE DUT BGA, AS CLOSEAS POSSIBLE TO THEIR RESPECTIVE DUT PINS

BANKS 14/15 ARE CONNECTED TO VCCO_HPTHE CVGBVS IS PULLED HIGH SINCE BANK 0 IS 2.5V AND CONFIGURATION

2 PLACES

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

46 83

GND

VREFP_ADC

2

1 R229DNP1/10W

2

1 R228DNP1/10W

2

1R227

3

2

DONE_0

DXP_ADC

1

VCCADC

TCK_0TMS_0TDO_0TDI_0

INIT_B_0PROGRAM_B_0

XADC_AGND

1

2

C4581

2

C4590.1UF25V

3

2

GND

2

1 R2321001/10W1%

1

2

1 R2311001/10W1%

XADC_AGND

DXN_ADC

CCLK_0

M1_0M0_0M2_0

M10T11

AK10AL10AJ10AL11AH10AJ11AG11T10R10P11P10N10N11AB20AA21AB21AA20AC21Y20Y21AC20

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

VCCO_0

VCCO_0

VCCO_0

VCCO_0

Page 47: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

VCCO_HRVCCO_HR

VCCO_HR

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCCO_HR

VCCO_13_BB30VCCO_13_BA33VCCO_13_AY36VCCO_13_AV32VCCO_13_AU35VCCO_13_AR31VCCO_13_AP34

IO_25_VRP_13_AT31IO_L24N_T3_13_AR33IO_L24P_T3_13_AP33IO_L23N_T3_13_AP31IO_L23P_T3_13_AN31IO_L22N_T3_13_AR32IO_L22P_T3_13_AP32

IO_L21N_T3_DQS_13_AP30IO_L21P_T3_DQS_13_AN30

IO_L20N_T3_13_AV31IO_L20P_T3_13_AU31

IO_L19N_T3_VREF_13_AT30IO_L19P_T3_13_AR30IO_L18N_T2_13_AW31IO_L18P_T2_13_AV30IO_L17N_T2_13_BB31IO_L17P_T2_13_BA30IO_L16N_T2_13_AY30IO_L16P_T2_13_AW30

IO_L15N_T2_DQS_13_BA32IO_L15P_T2_DQS_13_BA31

IO_L14N_T2_SRCC_13_AY33IO_L14P_T2_SRCC_13_AY32IO_L13N_T2_MRCC_13_AV35IO_L13P_T2_MRCC_13_AV34IO_L12N_T1_MRCC_13_AW33IO_L12P_T1_MRCC_13_AW32IO_L11N_T1_SRCC_13_AV33IO_L11P_T1_SRCC_13_AU32

IO_L10N_T1_13_AT35IO_L10P_T1_13_AR34

IO_L9N_T1_DQS_13_AU33IO_L9P_T1_DQS_13_AT32

IO_L8N_T1_13_AU36IO_L8P_T1_13_AT36IO_L7N_T1_13_AU34IO_L7P_T1_13_AT34

IO_L6N_T0_VREF_13_AY35IO_L6P_T0_13_AW35IO_L5N_T0_13_BB33IO_L5P_T0_13_BB32IO_L4N_T0_13_BB36IO_L4P_T0_13_BA36

IO_L3N_T0_DQS_13_BB34IO_L3P_T0_DQS_13_BA34

IO_L2N_T0_13_AW36IO_L2P_T0_13_AV36IO_L1N_T0_13_BA35IO_L1P_T0_13_AY34IO_0_VRN_13_AR35

XC7V2000TFHG1761BANK 13

GND

VCCO_12_AY26VCCO_12_AW29VCCO_12_AU25VCCO_12_AT28VCCO_12_AN27VCCO_12_AK26

IO_25_VRP_12_AP26IO_L24N_T3_12_AJ26IO_L24P_T3_12_AJ25IO_L23N_T3_12_AL26IO_L23P_T3_12_AL25IO_L22N_T3_12_AK25IO_L22P_T3_12_AK24

IO_L21N_T3_DQS_12_AM27IO_L21P_T3_DQS_12_AM26

IO_L20N_T3_12_AL27IO_L20P_T3_12_AK27

IO_L19N_T3_VREF_12_AM29IO_L19P_T3_12_AM28IO_L18N_T2_12_AN26IO_L18P_T2_12_AN25IO_L17N_T2_12_AR25IO_L17P_T2_12_AP25IO_L16N_T2_12_AT26IO_L16P_T2_12_AT25

IO_L15N_T2_DQS_12_AP28IO_L15P_T2_DQS_12_AN28IO_L14N_T2_SRCC_12_AR28IO_L14P_T2_SRCC_12_AP27IO_L13N_T2_MRCC_12_AT27IO_L13P_T2_MRCC_12_AR27IO_L12N_T1_MRCC_12_AU27IO_L12P_T1_MRCC_12_AU26IO_L11N_T1_SRCC_12_AV28IO_L11P_T1_SRCC_12_AU28

IO_L10N_T1_12_AW28IO_L10P_T1_12_AW27

IO_L9N_T1_DQS_12_AV26IO_L9P_T1_DQS_12_AV25

IO_L8N_T1_12_AT29IO_L8P_T1_12_AR29IO_L7N_T1_12_AW26IO_L7P_T1_12_AW25

IO_L6N_T0_VREF_12_BA29IO_L6P_T0_12_AY29IO_L5N_T0_12_BB27IO_L5P_T0_12_BB26IO_L4N_T0_12_BB29IO_L4P_T0_12_BB28

IO_L3N_T0_DQS_12_BA27IO_L3P_T0_DQS_12_BA26

IO_L2N_T0_12_AV29IO_L2P_T0_12_AU29IO_L1N_T0_12_AY28IO_L1P_T0_12_AY27IO_0_VRN_12_AN29

XC7V2000TFHG1761BANK 12

GNDRN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

I/O BANKS 12, 13

THIS BANK NOT BONDED OUT FOR 450T, 285T AND X485T

FOR ALL OTHER DEVICES IN THIS PACKAGE, THESE BANKS ARE HIGH PERFORMANCE (HP)ONLY. BANK VOLTAGE MUST NOT EXCEED 1.8V FOR THESE DEVICES.

THESE BANKS ARE HIGH RANGE (HR) CAPABLE ON 585T AND X330T ONLY.

HIGH RANGE CAPABLE BANKS 12, 13 (585T AND X330T ONLY)

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

47 83

2

1 R3701001/10W

2

1 R3711001/10W

2

1 R3721001/10W

2

1 R3731001/10W

AY26AW29AU25AT28AN27AK26

AP26AJ26AJ25AL26AL25AK25AK24AM27AM26AL27AK27AM29AM28AN26AN25AR25AP25AT26AT25AP28AN28AR28AP27AT27AR27AU27AU26AV28AU28AW28AW27AV26AV25AT29AR29AW26AW25BA29AY29BB27BB26BB29BB28BA27BA26AV29AU29AY28AY27AN29

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

BB30BA33AY36AV32AU35AR31AP34

AT31AR33AP33AP31AN31AR32AP32AP30AN30AV31AU31AT30AR30AW31AV30BB31BA30AY30AW30BA32BA31AY33AY32AV35AV34AW33AW32AV33AU32AT35AR34AU33AT32AU36AT36AU34AT34AY35AW35BB33BB32BB36BA36BB34BA34AW36AV36BA35AY34AR35

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

1

2 2

2

1

IO_L14P_T2_SRCC_12

IO_0_VRN_13IO_0_VRN_12

IO_25_VRP_13

IO_0_VRN_12IO_L1P_T0_AD0P_12IO_L1N_T0_AD0N_12IO_L2P_T0_AD8P_12IO_L2N_T0_AD8N_12

IO_L3P_T0_DQS_AD1P_12IO_L3N_T0_DQS_AD1N_12

IO_L4P_T0_12IO_L4N_T0_12

IO_L5P_T0_AD9P_12IO_L5N_T0_AD9N_12

IO_L6P_T0_12IO_L6N_T0_VREF_12IO_L7P_T1_AD2P_12IO_L7N_T1_AD2N_12

IO_L8P_T1_AD10P_12IO_L8N_T1_AD10N_12

IO_L9P_T1_DQS_AD3P_12IO_L9N_T1_DQS_AD3N_12IO_L10P_T1_AD11P_12IO_L10N_T1_AD11N_12IO_L11P_T1_SRCC_12IO_L11N_T1_SRCC_12IO_L12P_T1_MRCC_12IO_L12N_T1_MRCC_12IO_L13P_T2_MRCC_12IO_L13N_T2_MRCC_12

IO_L14N_T2_SRCC_12IO_L15P_T2_DQS_12

IO_L15N_T2_DQS_ADV_B_12IO_L16P_T2_A28_12IO_L16N_T2_A27_12IO_L17P_T2_A26_12IO_L17N_T2_A25_12IO_L18P_T2_A24_12IO_L18N_T2_A23_12IO_L19P_T3_A22_12

IO_L19N_T3_A21_VREF_12IO_L20P_T3_A20_12IO_L20N_T3_A19_12IO_L21P_T3_DQS_12

IO_L21N_T3_DQS_A18_12IO_L22P_T3_A17_12IO_L22N_T3_A16_12

IO_L23P_T3_FOE_B_12IO_L23N_T3_FWE_B_12

IO_L24P_T3_RS1_12IO_L24N_T3_RS0_12

IO_25_VRP_12

IO_0_VRN_13IO_L1P_T0_13IO_L1N_T0_13IO_L2P_T0_13IO_L2N_T0_13

IO_L3P_T0_DQS_13IO_L3N_T0_DQS_13

IO_L4P_T0_13IO_L4N_T0_13IO_L5P_T0_13IO_L5N_T0_13IO_L6P_T0_13

IO_L6N_T0_VREF_13IO_L7P_T1_13IO_L7N_T1_13IO_L8P_T1_13IO_L8N_T1_13

IO_L9P_T1_DQS_13IO_L9N_T1_DQS_13

IO_L10P_T1_13IO_L10N_T1_13

IO_L11P_T1_SRCC_13IO_L11N_T1_SRCC_13IO_L12P_T1_MRCC_13IO_L12N_T1_MRCC_13IO_L13P_T2_MRCC_13IO_L13N_T2_MRCC_13IO_L14P_T2_SRCC_13IO_L14N_T2_SRCC_13IO_L15P_T2_DQS_13IO_L15N_T2_DQS_13

IO_L16P_T2_13IO_L16N_T2_13IO_L17P_T2_13IO_L17N_T2_13IO_L18P_T2_13IO_L18N_T2_13IO_L19P_T3_13

IO_L19N_T3_VREF_13IO_L20P_T3_13IO_L20N_T3_13

IO_L21P_T3_DQS_13IO_L21N_T3_DQS_13

IO_L22P_T3_13IO_L22N_T3_13IO_L23P_T3_13IO_L23N_T3_13IO_L24P_T3_13IO_L24N_T3_13IO_25_VRP_13

IO_25_VRP_12

Page 48: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

VCCO_14_AN37VCCO_14_AM30VCCO_14_AL33VCCO_14_AK36VCCO_14_AJ29VCCO_14_AH32VCCO_14_AF28

IO_25_VRP_14_AG32IO_L24N_T3_A00_D16_14_AJ28IO_L24P_T3_A01_D17_14_AH28IO_L23N_T3_A02_D18_14_AG31IO_L23P_T3_A03_D19_14_AF30IO_L22N_T3_A04_D20_14_AK29IO_L22P_T3_A05_D21_14_AK28

IO_L21N_T3_DQS_A06_D22_14_AG29IO_L21P_T3_DQS_14_AF29

IO_L20N_T3_A07_D23_14_AK30IO_L20P_T3_A08_D24_14_AJ30

IO_L19N_T3A09D25_VREF_14_AH30IO_L19P_T3_A10_D26_14_AH29IO_L18N_T2_A11_D27_14_AL30IO_L18P_T2_A12_D28_14_AL29IO_L17N_T2_A13_D29_14_AN33IO_L17P_T2_A14_D30_14_AM33IO_L16N_T2_A15_D31_14_AM32

IO_L16P_T2_CSI_B_14_AM31IO_L15N_T2_DQSDOUT_CSOB_14_AN34

IO_L15P_T2_DQS_RDWR_B_14_AM34IO_L14N_T2_SRCC_14_AL32IO_L14P_T2_SRCC_14_AL31IO_L13N_T2_MRCC_14_AK32IO_L13P_T2_MRCC_14_AJ32IO_L12N_T1_MRCC_14_AL34IO_L12P_T1_MRCC_14_AK34IO_L11N_T1_SRCC_14_AK33IO_L11P_T1_SRCC_14_AJ33IO_L10N_T1_D15_14_AJ35IO_L10P_T1_D14_14_AH34

IO_L9N_T1_DQS_D13_14_AJ31IO_L9P_T1_DQS_14_AH31IO_L8N_T1_D12_14_AL35IO_L8P_T1_D11_14_AK35IO_L7N_T1_D10_14_AH33IO_L7P_T1_D09_14_AG33

IO_L6N_T0_D08_VREF_14_AM37IO_L6P_T0_FCS_B_14_AL36IO_L5N_T0_D07_14_AP35IO_L5P_T0_D06_14_AN35IO_L4N_T0_D05_14_AL37IO_L4P_T0_D04_14_AK37

IO_L3N_T0_DQS_EMCCLK_14_AP37IO_L3P_T0_DQS_PUDC_B_14_AP36

IO_L2N_T0_D03_14_AJ37IO_L2P_T0_D02_14_AJ36

IO_L1N_T0_D01_DIN_14_AN36IO_L1P_T0_D00_MOSI_14_AM36

IO_0_VRN_14_AH35

XC7V2000TFHG1761BANK 14

VCCO_15_BB40VCCO_15_AW39VCCO_15_AV42VCCO_15_AT38VCCO_15_AR41VCCO_15_AM40

IO_25_VRP_15_AU37IO_L24N_T3_RS0_15_AW42IO_L24P_T3_RS1_15_AW41

IO_L23N_T3_FWE_B_15_BB41IO_L23P_T3_FOE_B_15_BA41

IO_L22N_T3_A16_15_AV41IO_L22P_T3_A17_15_AU41

IO_L21N_T3_DQS_A18_15_BA42IO_L21P_T3_DQS_15_AY42IO_L20N_T3_A19_15_AU42IO_L20P_T3_A20_15_AT41

IO_L19N_T3_A21_VREF_15_BA40IO_L19P_T3_A22_15_BA39IO_L18N_T2_A23_15_BB39IO_L18P_T2_A24_15_BB38IO_L17N_T2_A25_15_AY38IO_L17P_T2_A26_15_AW38IO_L16N_T2_A27_15_BB37IO_L16P_T2_A28_15_BA37

IO_L15N_T2_DQS_ADV_B_15_AY37IO_L15P_T2_DQS_15_AW37

IO_L14N_T2_SRCC_15_AY40IO_L14P_T2_SRCC_15_AY39IO_L13N_T2_MRCC_15_AW40IO_L13P_T2_MRCC_15_AV40IO_L12N_T1_MRCC_15_AV38IO_L12P_T1_MRCC_15_AU38IO_L11N_T1_SRCC_15_AV39IO_L11P_T1_SRCC_15_AU39

IO_L10N_T1_AD11N_15_AT42IO_L10P_T1_AD11P_15_AR42

IO_L9N_T1_DQS_AD3N_15_AT40IO_L9P_T1_DQS_AD3P_15_AT39

IO_L8N_T1_AD10N_15_AP42IO_L8P_T1_AD10P_15_AP41IO_L7N_T1_AD2N_15_AR40IO_L7P_T1_AD2P_15_AP40IO_L6N_T0_VREF_15_AN39

IO_L6P_T0_15_AM39IO_L5N_T0_AD9N_15_AT37IO_L5P_T0_AD9P_15_AR37

IO_L4N_T0_15_AN41IO_L4P_T0_15_AN40

IO_L3N_T0_DQS_AD1N_15_AR39IO_L3P_T0_DQS_AD1P_15_AR38

IO_L2N_T0_AD8N_15_AM42IO_L2P_T0_AD8P_15_AM41IO_L1N_T0_AD0N_15_AP38IO_L1P_T0_AD0P_15_AN38

IO_0_VRN_15_AM38

XC7V2000TFHG1761BANK 15

VCCO_HP

VCCO_HP

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCCO_HP

VCCO_HP

GND

DEDICATED PINS

DEDICATED PINS

DEDICATED PINS

DEDICATED PINS

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

I/O BANKS 14, 15

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

48 83

2

1 R2891001/10W

2

1 R2881001/10W

2

1 R30110.0K1/10W

IO_25_VRP_14

IO_0_VRN_14

IO_0_VRN_14

IO_25_VRP_14

FMC1_CLK1_M2C_NFMC1_CLK1_M2C_PFMC1_CLK0_M2C_NFMC1_CLK0_M2C_P

FMC1_LA17_CC_P

FMC1_LA26_NFMC1_LA26_P

FMC1_LA21_NFMC1_LA21_PFMC1_LA20_NFMC1_LA20_P

FMC1_LA17_CC_N

FMC1_LA18_CC_PFMC1_LA18_CC_N

FMC1_LA19_PFMC1_LA19_N

FMC1_LA22_NFMC1_LA22_P

FMC1_LA23_NFMC1_LA23_P

FMC1_LA24_NFMC1_LA24_P

FMC1_LA25_NFMC1_LA25_P

FMC1_LA27_NFMC1_LA27_P

FMC1_LA28_NFMC1_LA28_P

FMC1_LA29_NFMC1_LA29_P

FMC1_LA30_NFMC1_LA30_P

FMC1_LA31_NFMC1_LA31_P

FMC1_LA32_NFMC1_LA32_P

FMC1_LA33_NFMC1_LA33_P

FMC1_HA11_PFMC1_HA11_N

FMC1_HA10_PFMC1_HA10_N

FMC1_HA09_PFMC1_HA09_N

FMC1_HA08_PFMC1_HA08_N

FMC1_HA07_PFMC1_HA07_N

FMC1_PRSNT_M2C_LFMC1_LA02_PFMC1_LA02_NFMC1_LA03_PFMC1_LA03_NFMC1_LA04_PFMC1_LA04_NFMC1_LA05_PFMC1_LA05_NFMC1_LA06_PFMC1_LA06_NFMC1_LA07_PFMC1_LA07_NFMC1_LA08_PFMC1_LA08_NFMC1_LA09_PFMC1_LA09_NFMC1_LA10_PFMC1_LA10_NFMC1_LA11_PFMC1_LA11_N

FMC1_LA01_CC_PFMC1_LA01_CC_NFMC1_LA00_CC_PFMC1_LA00_CC_NFMC1_HA00_CC_PFMC1_HA00_CC_NFMC1_HA01_CC_PFMC1_HA01_CC_N

FMC1_LA12_PFMC1_LA12_NFMC1_LA13_PFMC1_LA13_NFMC1_LA14_PFMC1_LA14_NFMC1_LA15_PFMC1_LA15_NFMC1_LA16_PFMC1_LA16_NFMC1_HA02_PFMC1_HA02_NFMC1_HA03_PFMC1_HA03_NFMC1_HA04_PFMC1_HA04_NFMC1_HA05_PFMC1_HA05_NFMC1_HA06_PFMC1_HA06_N

IO_25_VRP_15BB40AW39AV42AT38AR41AM40

AU37AW42AW41BB41BA41AV41AU41BA42AY42AU42AT41BA40BA39BB39BB38AY38AW38BB37BA37AY37AW37AY40AY39AW40AV40AV38AU38AV39AU39AT42AR42AT40AT39AP42AP41AR40AP40AN39AM39AT37AR37AN41AN40AR39AR38AM42AM41AP38AN38AM38

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

AN37AM30AL33AK36AJ29AH32AF28

AG32AJ28AH28AG31AF30AK29AK28AG29AF29AK30AJ30AH30AH29AL30AL29AN33AM33AM32AM31AN34AM34AL32AL31AK32AJ32AL34AK34AK33AJ33AJ35AH34AJ31AH31AL35AK35AH33AG33AM37AL36AP35AN35AL37AK37AP37AP36AJ37AJ36AN36AM36AH35

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

Page 49: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

VCCO_17_AJ39VCCO_17_AH42VCCO_17_AF38VCCO_17_AE41VCCO_17_AC37VCCO_17_AB40

IO_25_VRP_17_AG37IO_L24N_T3_17_AK42IO_L24P_T3_17_AJ42IO_L23N_T3_17_AL39IO_L23P_T3_17_AK39IO_L22N_T3_17_AJ41IO_L22P_T3_17_AJ40

IO_L21N_T3_DQS_17_AL42IO_L21P_T3_DQS_17_AL41

IO_L20N_T3_17_AH41IO_L20P_T3_17_AH40

IO_L19N_T3_VREF_17_AL40IO_L19P_T3_17_AK40IO_L18N_T2_17_AK38IO_L18P_T2_17_AJ38IO_L17N_T2_17_AH38IO_L17P_T2_17_AG38IO_L16N_T2_17_AG42IO_L16P_T2_17_AF42

IO_L15N_T2_DQS_17_AH39IO_L15P_T2_DQS_17_AG39

IO_L14N_T2_SRCC_17_AG41IO_L14P_T2_SRCC_17_AF41IO_L13N_T2_MRCC_17_AF40IO_L13P_T2_MRCC_17_AF39IO_L12N_T1_MRCC_17_AD41IO_L12P_T1_MRCC_17_AD40IO_L11N_T1_SRCC_17_AE40IO_L11P_T1_SRCC_17_AE39

IO_L10N_T1_17_AC41IO_L10P_T1_17_AC40

IO_L9N_T1_DQS_17_AE38IO_L9P_T1_DQS_17_AD38

IO_L8N_T1_17_AE42IO_L8P_T1_17_AD42IO_L7N_T1_17_AC39IO_L7P_T1_17_AC38

IO_L6N_T0_VREF_17_AA41IO_L6P_T0_17_AA40IO_L5N_T0_17_AB39IO_L5P_T0_17_AB38IO_L4N_T0_17_AA42IO_L4P_T0_17_Y42

IO_L3N_T0_DQS_17_AA39IO_L3P_T0_DQS_17_Y39

IO_L2N_T0_17_Y40IO_L2P_T0_17_W40

IO_L1N_T0_17_AB42IO_L1P_T0_17_AB41

IO_0_VRN_17_Y38

XC7V2000TFHG1761BANK 17

VCCO_HP

GND

VCCO_HP

VCCO_HP VCCO_HP

GNDofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCCO_16_Y36VCCO_16_AG35VCCO_16_AE31VCCO_16_AD34VCCO_16_AB30VCCO_16_AA33

IO_25_VRP_16_AB34IO_L24N_T3_16_AC29IO_L24P_T3_16_AB29IO_L23N_T3_16_AA30IO_L23P_T3_16_AA29IO_L22N_T3_16_AD30IO_L22P_T3_16_AC30

IO_L21N_T3_DQS_16_AA32IO_L21P_T3_DQS_16_AA31

IO_L20N_T3_16_AD31IO_L20P_T3_16_AC31

IO_L19N_T3_VREF_16_Y33IO_L19P_T3_16_Y32

IO_L18N_T2_16_AE30IO_L18P_T2_16_AE29IO_L17N_T2_16_AE35IO_L17P_T2_16_AE34IO_L16N_T2_16_AF32IO_L16P_T2_16_AF31

IO_L15N_T2_DQS_16_AE33IO_L15P_T2_DQS_16_AE32IO_L14N_T2_SRCC_16_AD35IO_L14P_T2_SRCC_16_AC34IO_L13N_T2_MRCC_16_AD33IO_L13P_T2_MRCC_16_AD32IO_L12N_T1_MRCC_16_AC33IO_L12P_T1_MRCC_16_AB33IO_L11N_T1_SRCC_16_AB32IO_L11P_T1_SRCC_16_AB31

IO_L10N_T1_16_AA35IO_L10P_T1_16_AA34

IO_L9N_T1_DQS_16_AB37IO_L9P_T1_DQS_16_AB36

IO_L8N_T1_16_AA36IO_L8P_T1_16_Y35IO_L7N_T1_16_AA37IO_L7P_T1_16_Y37

IO_L6N_T0_VREF_16_AH36IO_L6P_T0_16_AG36IO_L5N_T0_16_AC36IO_L5P_T0_16_AC35IO_L4N_T0_16_AD37IO_L4P_T0_16_AD36

IO_L3N_T0_DQS_16_AG34IO_L3P_T0_DQS_16_AF34

IO_L2N_T0_16_AF37IO_L2P_T0_16_AE37IO_L1N_T0_16_AF36IO_L1P_T0_16_AF35IO_0_VRN_16_Y34

XC7V2000TFHG1761BANK 16

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

I/O BANKS 16, 17

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

49 83

2

1 R3251001/10W

2

1 R3261001/10W

2

1 R3741001/10W

2

1 R3751001/10W

Y36AG35AE31AD34AB30AA33

AB34AC29AB29AA30AA29AD30AC30AA32AA31AD31AC31Y33Y32AE30AE29AE35AE34AF32AF31AE33AE32AD35AC34AD33AD32AC33AB33AB32AB31AA35AA34AB37AB36AA36Y35AA37Y37AH36AG36AC36AC35AD37AD36AG34AF34AF37AE37AF36AF35Y34

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

IO_0_VRN_17

IO_25_VRP_17

IO_0_VRN_16

IO_25_VRP_16

FMC1_HB06_CC_P

FMC1_HA16_N

FMC1_CLK2_BIDIR_NFMC1_CLK2_BIDIR_P

FMC1_CLK3_BIDIR_PFMC1_CLK3_BIDIR_N

FMC1_HA15_PFMC1_HA15_N

FMC1_HA12_NFMC1_HA12_P

FMC1_HA13_NFMC1_HA13_P

FMC1_HA14_NFMC1_HA14_P

FMC1_HA16_P

FMC1_HB05_N

FMC1_HB01_NFMC1_HB01_P

FMC1_HB00_CC_N

FMC1_HB03_P

FMC1_HB16_NFMC1_HB16_P

FMC1_HB14_PFMC1_HB14_N

FMC1_HB13_PFMC1_HB13_N

FMC1_HB12_PFMC1_HB12_N

FMC1_HB11_PFMC1_HB11_N

FMC1_HB10_PFMC1_HB10_N

FMC1_HB09_PFMC1_HB09_N

FMC1_HB08_PFMC1_HB08_N

FMC1_HB07_PFMC1_HB07_N

FMC1_HB06_CC_N

FMC1_HB05_PFMC1_HB04_N

FMC1_HB02_PFMC1_HB02_N

FMC1_HB00_CC_P

FMC1_HB15_NFMC1_HB15_P

FMC1_HB03_NFMC1_HB04_P

IO_0_VRN_17IO_L1P_T0_17IO_L1N_T0_17IO_L2P_T0_17IO_L2N_T0_17

IO_L3P_T0_DQS_17IO_L3N_T0_DQS_17

IO_L4P_T0_17IO_L4N_T0_17IO_L5P_T0_17IO_L5N_T0_17IO_L6P_T0_17

IO_L6N_T0_VREF_17IO_L7P_T1_17IO_L7N_T1_17IO_L8P_T1_17IO_L8N_T1_17

IO_L9P_T1_DQS_17IO_L9N_T1_DQS_17

IO_L10P_T1_17IO_L10N_T1_17

IO_L11P_T1_SRCC_17IO_L11N_T1_SRCC_17IO_L12P_T1_MRCC_17IO_L12N_T1_MRCC_17IO_L13P_T2_MRCC_17IO_L13N_T2_MRCC_17IO_L14P_T2_SRCC_17IO_L14N_T2_SRCC_17IO_L15P_T2_DQS_17IO_L15N_T2_DQS_17

IO_L16P_T2_17IO_L16N_T2_17IO_L17P_T2_17IO_L17N_T2_17IO_L18P_T2_17IO_L18N_T2_17IO_L19P_T3_17

IO_L19N_T3_VREF_17IO_L20P_T3_17IO_L20N_T3_17

IO_L21P_T3_DQS_17IO_L21N_T3_DQS_17

IO_L22P_T3_17IO_L22N_T3_17IO_L23P_T3_17IO_L23N_T3_17IO_L24P_T3_17IO_L24N_T3_17IO_25_VRP_17

IO_25_VRP_16

IO_0_VRN_16

AJ39AH42AF38AE41AC37AB40

AG37AK42AJ42AL39AK39AJ41AJ40AL42AL41AH41AH40AL40AK40AK38AJ38AH38AG38AG42AF42AH39AG39AG41AF41AF40AF39AD41AD40AE40AE39AC41AC40AE38AD38AE42AD42AC39AC38AA41AA40AB39AB38AA42Y42AA39Y39Y40W40AB42AB41Y38

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

Page 50: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

VCCO_19_R41VCCO_19_N37VCCO_19_M40VCCO_19_J39VCCO_19_H42VCCO_19_E41VCCO_19_B40

IO_25_VRP_19_N36IO_L24N_T3_19_N40IO_L24P_T3_19_N39IO_L23N_T3_19_P40IO_L23P_T3_19_R40IO_L22N_T3_19_M39IO_L22P_T3_19_N38

IO_L21N_T3_DQS_19_P42IO_L21P_T3_DQS_19_R42

IO_L20N_T3_19_M38IO_L20P_T3_19_M37

IO_L19N_T3_VREF_19_N41IO_L19P_T3_19_P41IO_L18N_T2_19_L37IO_L18P_T2_19_M36IO_L17N_T2_19_K38IO_L17P_T2_19_K37IO_L16N_T2_19_L42IO_L16P_T2_19_M42

IO_L15N_T2_DQS_19_J42IO_L15P_T2_DQS_19_K42

IO_L14N_T2_SRCC_19_L41IO_L14P_T2_SRCC_19_M41IO_L13N_T2_MRCC_19_L40IO_L13P_T2_MRCC_19_L39IO_L12N_T1_MRCC_19_K40IO_L12P_T1_MRCC_19_K39IO_L11N_T1_SRCC_19_J41IO_L11P_T1_SRCC_19_J40

IO_L10N_T1_19_F41IO_L10P_T1_19_F40

IO_L9N_T1_DQS_19_G42IO_L9P_T1_DQS_19_G41

IO_L8N_T1_19_G39IO_L8P_T1_19_H39IO_L7N_T1_19_H41IO_L7P_T1_19_H40

IO_L6N_T0_VREF_19_C41IO_L6P_T0_19_C40IO_L5N_T0_19_E42IO_L5P_T0_19_F42IO_L4N_T0_19_B42IO_L4P_T0_19_B41

IO_L3N_T0_DQS_19_D42IO_L3P_T0_DQS_19_D41

IO_L2N_T0_19_A41IO_L2P_T0_19_A40IO_L1N_T0_19_D40IO_L1P_T0_19_E40IO_0_VRN_19_L36

XC7V2000TFHG1761BANK 19

VCCO_HP VCCO_HP

VCCO_HP

GNDGNDofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCCO_HP

VCCO_18_W39VCCO_18_V42VCCO_18_V32VCCO_18_U35VCCO_18_T38VCCO_18_P34

IO_25_VRP_18_W35IO_L24N_T3_18_U42IO_L24P_T3_18_V41IO_L23N_T3_18_V38IO_L23P_T3_18_W38IO_L22N_T3_18_T42IO_L22P_T3_18_U41

IO_L21N_T3_DQS_18_W42IO_L21P_T3_DQS_18_W41

IO_L20N_T3_18_T41IO_L20P_T3_18_T40

IO_L19N_T3_VREF_18_V40IO_L19P_T3_18_V39IO_L18N_T2_18_W33IO_L18P_T2_18_W32IO_L17N_T2_18_U33IO_L17P_T2_18_U32IO_L16N_T2_18_W37IO_L16P_T2_18_W36

IO_L15N_T2_DQS_18_V34IO_L15P_T2_DQS_18_V33IO_L14N_T2_SRCC_18_V36IO_L14P_T2_SRCC_18_V35IO_L13N_T2_MRCC_18_T37IO_L13P_T2_MRCC_18_U36IO_L12N_T1_MRCC_18_T39IO_L12P_T1_MRCC_18_U39IO_L11N_T1_SRCC_18_U38IO_L11P_T1_SRCC_18_U37

IO_L10N_T1_18_R39IO_L10P_T1_18_R38

IO_L9N_T1_DQS_18_T35IO_L9P_T1_DQS_18_U34

IO_L8N_T1_18_P38IO_L8P_T1_18_P37IO_L7N_T1_18_R37IO_L7P_T1_18_T36

IO_L6N_T0_VREF_18_P33IO_L6P_T0_18_P32IO_L5N_T0_18_R32IO_L5P_T0_18_T32IO_L4N_T0_18_P36IO_L4P_T0_18_P35

IO_L3N_T0_DQS_18_R34IO_L3P_T0_DQS_18_R33

IO_L2N_T0_18_N34IO_L2P_T0_18_N33IO_L1N_T0_18_R35IO_L1P_T0_18_T34IO_0_VRN_18_N35

XC7V2000TFHG1761BANK 18

USER DIFF SMA CLOCK

PMBUS (DUT MASTER)

USER IO (SWITCHES)

USER IO (PUSH BUTTONS)

USER IO (LEDS)

I2C (DUT MASTER)

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

I/O BANKS 18, 19

8350

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:592

1 R3271001/10W

2

1 R3281001/10W

2

1 R3291001/10W

2

1 R3301001/10W

W39V42V32U35T38P34

W35U42V41V38W38T42U41W42W41T41T40V40V39W33W32U33U32W37W36V34V33V36V35T37U36T39U39U38U37R39R38T35U34P38P37R37T36P33P32R32T32P36P35R34R33N34N33R35T34N35

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

IO_L24N_T3_19IO_L24P_T3_19

IO_L18N_T2_19IO_L18P_T2_19IO_L17N_T2_19IO_L17P_T2_19IO_L16N_T2_19IO_L16P_T2_19

IO_L15N_T2_DQS_19IO_L15P_T2_DQS_19

IO_L13N_T2_MRCC_19IO_L13P_T2_MRCC_19

IO_L11N_T1_SRCC_19IO_L11P_T1_SRCC_19

IO_L10N_T1_19IO_L10P_T1_19

IO_L9N_T1_DQS_19

IO_L4N_T0_19IO_L4P_T0_19

IO_L3N_T0_DQS_19IO_L3P_T0_DQS_19

IO_25_VRP_18

IO_0_VRN_18

IO_25_VRP_19

IO_0_VRN_19

IO_0_VRN_18IO_L1P_T0_AD0P_18IO_L1N_T0_AD0N_18IO_L2P_T0_AD8P_18IO_L2N_T0_AD8N_18

IO_L3P_T0_DQS_AD1P_18IO_L3N_T0_DQS_AD1N_18

IO_L4P_T0_18IO_L4N_T0_18

IO_L5P_T0_AD9P_18IO_L5N_T0_AD9N_18

IO_L6P_T0_18IO_L6N_T0_VREF_18IO_L7P_T1_AD2P_18IO_L7N_T1_AD2N_18

IO_L8P_T1_AD10P_18IO_L8N_T1_AD10N_18

IO_L9P_T1_DQS_AD3P_18IO_L9N_T1_DQS_AD3N_18IO_L10P_T1_AD11P_18IO_L10N_T1_AD11N_18IO_L11P_T1_SRCC_18IO_L11N_T1_SRCC_18IO_L12P_T1_MRCC_18IO_L12N_T1_MRCC_18IO_L13P_T2_MRCC_18IO_L13N_T2_MRCC_18IO_L14P_T2_SRCC_18IO_L14N_T2_SRCC_18IO_L15P_T2_DQS_18

IO_L15N_T2_DQS_ADV_B_18IO_L16P_T2_A28_18IO_L16N_T2_A27_18IO_L17P_T2_A26_18IO_L17N_T2_A25_18IO_L18P_T2_A24_18IO_L18N_T2_A23_18IO_L19P_T3_A22_18

IO_L19N_T3_A21_VREF_18IO_L20P_T3_A20_18IO_L20N_T3_A19_18IO_L21P_T3_DQS_18

IO_L21N_T3_DQS_A18_18IO_L22P_T3_A17_18IO_L22N_T3_A16_18

IO_L23P_T3_FOE_B_18IO_L23N_T3_FWE_B_18IO_L24P_T3_RS1_18IO_L24N_T3_RS0_18

IO_25_VRP_18

IO_0_VRN_19

IO_25_VRP_19

USER_SW6USER_SW5

CLK_DIFF_2_N

DUT_I2C_SCL

APP_LED8

DUT_PMB_DATA

APP_LED7APP_LED6APP_LED5APP_LED4APP_LED3APP_LED2APP_LED1USER_PB2USER_PB1

DUT_PMB_CLKDUT_PMB_CTRLDUT_PMB_ALERT

CLK_DIFF_2_P

DUT_I2C_SDA

USER_SW1

USER_SW4USER_SW3USER_SW2

IO_L5P_T0_19

USER_SW8USER_SW7

R41N37M40J39H42E41B40

N36N40N39P40R40M39N38P42R42M38M37N41P41L37M36K38K37L42M42J42K42L41M41L40L39K40K39J41J40F41F40G42G41G39H39H41H40C41C40E42F42B42B41D42D41A41A40D40E40L36

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

Page 51: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

VCCO_32_BB20VCCO_32_AY16VCCO_32_AW19VCCO_32_AT18VCCO_32_AN17VCCO_32_AJ19

IO_25_VRP_32_AP16IO_L24N_T3_32_BA19IO_L24P_T3_32_AY19IO_L23N_T3_32_BB16IO_L23P_T3_32_BA16IO_L22N_T3_32_BA20IO_L22P_T3_32_AY20

IO_L21N_T3_DQS_32_BB17IO_L21P_T3_DQS_32_BA17

IO_L20N_T3_32_AW20IO_L20P_T3_32_AV20

IO_L19N_T3_VREF_32_BB18IO_L19P_T3_32_BB19IO_L18N_T2_32_AU16IO_L18P_T2_32_AT16IO_L17N_T2_32_AW16IO_L17P_T2_32_AV16IO_L16N_T2_32_AT19IO_L16P_T2_32_AT20

IO_L15N_T2_DQS_32_AV19IO_L15P_T2_DQS_32_AU19

IO_L14N_T2_SRCC_32_AW17IO_L14P_T2_SRCC_32_AW18IO_L13N_T2_MRCC_32_AY17IO_L13P_T2_MRCC_32_AY18IO_L12N_T1_MRCC_32_AU17IO_L12P_T1_MRCC_32_AT17IO_L11N_T1_SRCC_32_AV18IO_L11P_T1_SRCC_32_AU18

IO_L10N_T1_32_AR17IO_L10P_T1_32_AR18

IO_L9N_T1_DQS_32_AN18IO_L9P_T1_DQS_32_AN19

IO_L8N_T1_32_AR19IO_L8P_T1_32_AP20IO_L7N_T1_32_AP17IO_L7P_T1_32_AP18

IO_L6N_T0_VREF_32_AJ17IO_L6P_T0_32_AJ18IO_L5N_T0_32_AN16IO_L5P_T0_32_AM16IO_L4N_T0_32_AK18IO_L4P_T0_32_AK19

IO_L3N_T0_DQS_32_AM17IO_L3P_T0_DQS_32_AM18

IO_L2N_T0_32_AL17IO_L2P_T0_32_AK17IO_L1N_T0_32_AM19IO_L1P_T0_32_AL19IO_0_VRN_32_AR20

XC7V2000TFHG1761BANK 32

VCCO_HP

VCCO_HP

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCCO_HP

VCCO_31_BA13VCCO_31_AV12VCCO_31_AU15VCCO_31_AR11VCCO_31_AP14VCCO_31_AL13VCCO_31_AK16

IO_25_VRP_31_AP15IO_L24N_T3_31_BB12IO_L24P_T3_31_BA12IO_L23N_T3_31_BB13IO_L23P_T3_31_BB14IO_L22N_T3_31_AY13IO_L22P_T3_31_AY14

IO_L21N_T3_DQS_31_BA14IO_L21P_T3_DQS_31_BA15

IO_L20N_T3_31_AY12IO_L20P_T3_31_AW12

IO_L19N_T3_VREF_31_AY15IO_L19P_T3_31_AW15IO_L18N_T2_31_AV14IO_L18P_T2_31_AV15IO_L17N_T2_31_AU12IO_L17P_T2_31_AT12IO_L16N_T2_31_AT15IO_L16P_T2_31_AR15

IO_L15N_T2_DQS_31_AR12IO_L15P_T2_DQS_31_AP12IO_L14N_T2_SRCC_31_AW13IO_L14P_T2_SRCC_31_AV13IO_L13N_T2_MRCC_31_AU13IO_L13P_T2_MRCC_31_AU14IO_L12N_T1_MRCC_31_AR13IO_L12P_T1_MRCC_31_AP13IO_L11N_T1_SRCC_31_AT14IO_L11P_T1_SRCC_31_AR14

IO_L10N_T1_31_AP11IO_L10P_T1_31_AN11

IO_L9N_T1_DQS_31_AN14IO_L9P_T1_DQS_31_AN15

IO_L8N_T1_31_AM11IO_L8P_T1_31_AM12IO_L7N_T1_31_AN13IO_L7P_T1_31_AM13

IO_L6N_T0_VREF_31_AL12IO_L6P_T0_31_AK12IO_L5N_T0_31_AL15IO_L5P_T0_31_AL16IO_L4N_T0_31_AJ12IO_L4P_T0_31_AJ13

IO_L3N_T0_DQS_31_AL14IO_L3P_T0_DQS_31_AK15

IO_L2N_T0_31_AK13IO_L2P_T0_31_AK14IO_L1N_T0_31_AJ15IO_L1P_T0_31_AJ16IO_0_VRN_31_AM14

XC7V2000TFHG1761BANK 31

GND

RECOVERY CLOCK

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

I/O BANKS 18, 19

THIS BANK NOT BONDED OUT FOR 450T, 285T AND X485T

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

51 83

2

1 R3781001/10W

2

1 R3791001/10W

1

BA13AV12AU15AR11AP14AL13AK16

AP15BB12BA12BB13BB14AY13AY14BA14BA15AY12AW12AY15AW15AV14AV15AU12AT12AT15AR15AR12AP12AW13AV13AU13AU14AR13AP13AT14AR14AP11AN11AN14AN15AM11AM12AN13AM13AL12AK12AL15AL16AJ12AJ13AL14AK15AK13AK14AJ15AJ16AM14

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

IO_25_VRP_32

11

IO_0_VRN_31

IO_25_VRP_31CM_LVDS3_NCM_LVDS3_P

FMC3_LA10_P

IO_25_VRP_31

IO_0_VRN_31

FMC3_LA04_PFMC3_LA03_NFMC3_LA03_P

FMC3_LA15_PFMC3_LA15_N

FMC3_LA00_CC_NFMC3_LA00_CC_PFMC3_LA01_CC_NFMC3_LA01_CC_P

FMC3_LA02_NFMC3_LA02_P

FMC3_LA05_NFMC3_LA05_P

FMC3_LA06_NFMC3_LA06_P

FMC3_LA07_NFMC3_LA07_P

FMC3_LA08_NFMC3_LA08_P

FMC3_LA09_NFMC3_LA09_P

FMC3_LA10_N

FMC3_LA11_NFMC3_LA11_P

FMC3_LA12_NFMC3_LA12_P

FMC3_LA13_NFMC3_LA13_P

FMC3_LA14_NFMC3_LA14_P

FMC3_LA16_PFMC3_LA16_N

FMC3_LA04_N

FMC3_HA03_PFMC3_HA02_N

FMC3_HA05_PFMC3_HA05_N

FMC3_HA04_N

FMC3_HA02_P

FMC3_HA01_CC_PFMC3_HA01_CC_N

FMC3_HA00_CC_PFMC3_HA00_CC_N

FMC3_HA03_NFMC3_HA04_P

FMC3_PRSNT_M2C_LFMC3_LA19_PFMC3_LA19_NFMC3_LA20_PFMC3_LA20_NFMC3_LA21_PFMC3_LA21_NFMC3_LA22_PFMC3_LA22_NFMC3_LA23_PFMC3_LA23_NFMC3_LA24_PFMC3_LA24_NFMC3_LA25_PFMC3_LA25_NFMC3_LA26_PFMC3_LA26_NFMC3_LA27_PFMC3_LA27_NFMC3_LA28_PFMC3_LA28_N

FMC3_LA18_CC_PFMC3_LA18_CC_NFMC3_LA17_CC_PFMC3_LA17_CC_N

FMC3_CLK0_M2C_PFMC3_CLK0_M2C_NFMC3_CLK1_M2C_PFMC3_CLK1_M2C_N

FMC3_LA29_PFMC3_LA29_NFMC3_LA30_PFMC3_LA30_NFMC3_LA31_PFMC3_LA31_NFMC3_LA32_PFMC3_LA32_NFMC3_LA33_PFMC3_LA33_NFMC3_HA06_PFMC3_HA06_NFMC3_HA07_PFMC3_HA07_NFMC3_HA08_PFMC3_HA08_NFMC3_HA09_PFMC3_HA09_NFMC3_HA10_PFMC3_HA10_N

BB20AY16AW19AT18AN17AJ19

AP16BA19AY19BB16BA16BA20AY20BB17BA17AW20AV20BB18BB19AU16AT16AW16AV16AT19AT20AV19AU19AW17AW18AY17AY18AU17AT17AV18AU18AR17AR18AN18AN19AR19AP20AP17AP18AJ17AJ18AN16AM16AK18AK19AM17AM18AL17AK17AM19AL19AR20

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

Page 52: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

VCCO_HP

VCCO_HP

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCCO_33_BA23VCCO_33_AV22VCCO_33_AR21VCCO_33_AP24VCCO_33_AM20VCCO_33_AL23

IO_25_VRP_33_AN20IO_L24N_T3_33_BB23IO_L24P_T3_33_BB24IO_L23N_T3_33_BB21IO_L23P_T3_33_BA21IO_L22N_T3_33_BA24IO_L22P_T3_33_AY24

IO_L21N_T3_DQS_33_BB22IO_L21P_T3_DQS_33_BA22

IO_L20N_T3_33_BA25IO_L20P_T3_33_AY25

IO_L19N_T3_VREF_33_AY22IO_L19P_T3_33_AY23IO_L18N_T2_33_AV24IO_L18P_T2_33_AU24IO_L17N_T2_33_AW21IO_L17P_T2_33_AV21IO_L16N_T2_33_AT24IO_L16P_T2_33_AR24

IO_L15N_T2_DQS_33_AU21IO_L15P_T2_DQS_33_AT21IO_L14N_T2_SRCC_33_AW22IO_L14P_T2_SRCC_33_AW23IO_L13N_T2_MRCC_33_AV23IO_L13P_T2_MRCC_33_AU23IO_L12N_T1_MRCC_33_AU22IO_L12P_T1_MRCC_33_AT22IO_L11N_T1_SRCC_33_AR22IO_L11P_T1_SRCC_33_AR23

IO_L10N_T1_33_AP21IO_L10P_T1_33_AN21

IO_L9N_T1_DQS_33_AP22IO_L9P_T1_DQS_33_AP23

IO_L8N_T1_33_AN23IO_L8P_T1_33_AM23IO_L7N_T1_33_AN24IO_L7P_T1_33_AM24

IO_L6N_T0_VREF_33_AM22IO_L6P_T0_33_AL22IO_L5N_T0_33_AJ20IO_L5P_T0_33_AJ21IO_L4N_T0_33_AM21IO_L4P_T0_33_AL21

IO_L3N_T0_DQS_33_AK22IO_L3P_T0_DQS_33_AJ22

IO_L2N_T0_33_AL20IO_L2P_T0_33_AK20IO_L1N_T0_33_AK23IO_L1P_T0_33_AJ23IO_0_VRN_33_AL24

XC7V2000TFHG1761BANK 33

GNDRN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

I/O BANK 33

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

52 83

2

1 R3801001/10W

2

1 R3811001/10W

BA23AV22AR21AP24AM20AL23

AN20BB23BB24BB21BA21BA24AY24BB22BA22BA25AY25AY22AY23AV24AU24AW21AV21AT24AR24AU21AT21AW22AW23AV23AU23AU22AT22AR22AR23AP21AN21AP22AP23AN23AM23AN24AM24AM22AL22AJ20AJ21AM21AL21AK22AJ22AL20AK20AK23AJ23AL24

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

IO_25_VRP_33

IO_0_VRN_33

IO_0_VRN_33IO_L1P_T0_33IO_L1N_T0_33IO_L2P_T0_33IO_L2N_T0_33

IO_L3P_T0_DQS_33IO_L3N_T0_DQS_33

IO_L4P_T0_33IO_L4N_T0_33IO_L5P_T0_33IO_L5N_T0_33IO_L6P_T0_33

IO_L6N_T0_VREF_33IO_L7P_T1_33IO_L7N_T1_33IO_L8P_T1_33IO_L8N_T1_33

IO_L9P_T1_DQS_33IO_L9N_T1_DQS_33

IO_L10P_T1_33IO_L10N_T1_33

IO_L11P_T1_SRCC_33IO_L11N_T1_SRCC_33IO_L12P_T1_MRCC_33IO_L12N_T1_MRCC_33IO_L13P_T2_MRCC_33IO_L13N_T2_MRCC_33IO_L14P_T2_SRCC_33IO_L14N_T2_SRCC_33IO_L15P_T2_DQS_33IO_L15N_T2_DQS_33

IO_L16P_T2_33IO_L16N_T2_33IO_L17P_T2_33IO_L17N_T2_33IO_L18P_T2_33IO_L18N_T2_33IO_L19P_T3_33

IO_L19N_T3_VREF_33IO_L20P_T3_33IO_L20N_T3_33

IO_L21P_T3_DQS_33IO_L21N_T3_DQS_33

IO_L22P_T3_33IO_L22N_T3_33IO_L23P_T3_33IO_L23N_T3_33IO_L24P_T3_33IO_L24N_T3_33IO_25_VRP_33

Page 53: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

VCCO_HP

VCCO_HP

VCCO_HP

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCCO_34_W29VCCO_34_T28VCCO_34_R31VCCO_34_M30VCCO_34_L33VCCO_34_H32

IO_25_VRP_34_U28IO_L24N_T3_34_Y30IO_L24P_T3_34_Y29IO_L23N_T3_34_U29IO_L23P_T3_34_V29IO_L22N_T3_34_W31IO_L22P_T3_34_W30

IO_L21N_T3_DQS_34_T30IO_L21P_T3_DQS_34_T29

IO_L20N_T3_34_V31IO_L20P_T3_34_V30

IO_L19N_T3_VREF_34_T31IO_L19P_T3_34_U31IO_L18N_T2_34_P31IO_L18P_T2_34_R30IO_L17N_T2_34_N29IO_L17P_T2_34_N28IO_L16N_T2_34_P28IO_L16P_T2_34_R28

IO_L15N_T2_DQS_34_M29IO_L15P_T2_DQS_34_M28IO_L14N_T2_SRCC_34_N31IO_L14P_T2_SRCC_34_P30IO_L13N_T2_MRCC_34_M31IO_L13P_T2_MRCC_34_N30IO_L12N_T1_MRCC_34_K32IO_L12P_T1_MRCC_34_L31IO_L11N_T1_SRCC_34_L32IO_L11P_T1_SRCC_34_M32

IO_L10N_T1_34_H31IO_L10P_T1_34_J31

IO_L9N_T1_DQS_34_L30IO_L9P_T1_DQS_34_L29

IO_L8N_T1_34_H30IO_L8P_T1_34_J30IO_L7N_T1_34_K30IO_L7P_T1_34_K29

IO_L6N_T0_VREF_34_H35IO_L6P_T0_34_H34IO_L5N_T0_34_M34IO_L5P_T0_34_M33IO_L4N_T0_34_L35IO_L4P_T0_34_L34

IO_L3N_T0_DQS_34_K34IO_L3P_T0_DQS_34_K33

IO_L2N_T0_34_J33IO_L2P_T0_34_J32IO_L1N_T0_34_J35IO_L1P_T0_34_K35IO_0_VRN_34_R29

XC7V2000TFHG1761BANK 34

VCCO_35_K36VCCO_35_G35VCCO_35_F38VCCO_35_E31VCCO_35_D34VCCO_35_C37VCCO_35_A33

IO_25_VRP_35_G34IO_L24N_T3_35_H36IO_L24P_T3_35_J36IO_L23N_T3_35_G38IO_L23P_T3_35_H38IO_L22N_T3_35_J38IO_L22P_T3_35_J37

IO_L21N_T3_DQS_35_E39IO_L21P_T3_DQS_35_F39

IO_L20N_T3_35_G37IO_L20P_T3_35_G36

IO_L19N_T3_VREF_35_E38IO_L19P_T3_35_E37IO_L18N_T2_35_G33IO_L18P_T2_35_H33IO_L17N_T2_35_F35IO_L17P_T2_35_F34IO_L16N_T2_35_F37IO_L16P_T2_35_F36

IO_L15N_T2_DQS_35_F32IO_L15P_T2_DQS_35_G32

IO_L14N_T2_SRCC_35_D38IO_L14P_T2_SRCC_35_D37IO_L13N_T2_MRCC_35_E35IO_L13P_T2_MRCC_35_E34IO_L12N_T1_MRCC_35_C36IO_L12P_T1_MRCC_35_C35IO_L11N_T1_SRCC_35_D36IO_L11P_T1_SRCC_35_D35

IO_L10N_T1_AD15N_35_C34IO_L10P_T1_AD15P_35_C33

IO_L9N_T1_DQS_AD7N_35_D33IO_L9P_T1_DQS_AD7P_35_E33

IO_L8N_T1_AD14N_35_B33IO_L8P_T1_AD14P_35_B32IO_L7N_T1_AD6N_35_D32IO_L7P_T1_AD6P_35_E32IO_L6N_T0_VREF_35_B38

IO_L6P_T0_35_B37IO_L5N_T0_AD13N_35_C39IO_L5P_T0_AD13P_35_C38IO_L4N_T0_AD5N_35_A36IO_L4P_T0_AD5P_35_A35

IO_L3N_T0_DQS_AD12N_35_A39IO_L3P_T0_DQS_AD12P_35_B39

IO_L2N_T0_AD4N_35_A34IO_L2P_T0_AD4P_35_B34

IO_L1N_T0_35_A37IO_L1P_T0_35_B36IO_0_VRN_35_G31

XC7V2000TFHG1761BANK 35

GND

DEDICATED PINS

DEDICATED PINS

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

I/O BANKS 34, 35

DEDICATED PINS

8353

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:592

1 R3311001/10W

2

1 R3321001/10W

FMC2_CLK1_M2C_NFMC2_CLK1_M2C_PFMC2_CLK0_M2C_NFMC2_CLK0_M2C_P

FMC2_PRSNT_M2C_L

FMC2_HA01_CC_NFMC2_HA01_CC_PFMC2_HA00_CC_NFMC2_HA00_CC_P

IO_25_VRP_35

FMC2_LA17_CC_P

K36G35F38E31D34C37A33

G34H36J36G38H38J38J37E39F39G37G36E38E37G33H33F35F34F37F36F32G32D38D37E35E34C36C35D36D35C34C33D33E33B33B32D32E32B38B37C39C38A36A35A39B39A34B34A37B36G31

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

W29T28R31M30L33H32

U28Y30Y29U29V29W31W30T30T29V31V30T31U31P31R30N29N28P28R28M29M28N31P30M31N30K32L31L32M32H31J31L30L29H30J30K30K29H35H34M34M33L35L34K34K33J33J32J35K35R29

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

IO_25_VRP_34

IO_0_VRN_34

IO_0_VRN_34

IO_25_VRP_34

FMC2_LA04_PFMC2_LA03_NFMC2_LA03_P

FMC2_LA15_PFMC2_LA15_N

FMC2_LA00_CC_NFMC2_LA00_CC_PFMC2_LA01_CC_NFMC2_LA01_CC_P

FMC2_LA02_NFMC2_LA02_P

FMC2_LA05_NFMC2_LA05_P

FMC2_LA06_NFMC2_LA06_P

FMC2_LA07_NFMC2_LA07_P

FMC2_LA08_NFMC2_LA08_P

FMC2_LA09_NFMC2_LA09_P

FMC2_LA10_NFMC2_LA10_P

FMC2_LA11_NFMC2_LA11_P

FMC2_LA12_NFMC2_LA12_P

FMC2_LA13_NFMC2_LA13_P

FMC2_LA14_NFMC2_LA14_P

FMC2_LA16_PFMC2_LA16_N

FMC2_LA04_N

FMC2_LA26_NFMC2_LA26_P

FMC2_LA21_NFMC2_LA21_PFMC2_LA20_NFMC2_LA20_P

FMC2_LA17_CC_N

FMC2_LA18_CC_PFMC2_LA18_CC_N

FMC2_LA19_PFMC2_LA19_N

FMC2_LA22_NFMC2_LA22_P

FMC2_LA23_NFMC2_LA23_P

FMC2_LA24_NFMC2_LA24_P

FMC2_LA25_NFMC2_LA25_P

FMC2_LA27_NFMC2_LA27_P

FMC2_LA28_NFMC2_LA28_P

FMC2_LA29_NFMC2_LA29_P

FMC2_LA30_NFMC2_LA30_P

FMC2_LA31_NFMC2_LA31_P

FMC2_LA32_NFMC2_LA32_P

FMC2_LA33_NFMC2_LA33_P

FMC2_HA03_PFMC2_HA02_N

FMC2_HA11_PFMC2_HA11_N

FMC2_HA10_PFMC2_HA10_N

FMC2_HA09_PFMC2_HA09_N

FMC2_HA08_PFMC2_HA08_N

FMC2_HA07_PFMC2_HA07_N

FMC2_HA06_PFMC2_HA06_N

FMC2_HA05_PFMC2_HA05_N

FMC2_HA04_N

FMC2_HA02_P

FMC2_HA03_NFMC2_HA04_P

Page 54: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

VCCO_HP VCCO_HP

VCCO_HPVCCO_HP

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCCO_36_P24VCCO_36_N27VCCO_36_L23VCCO_36_K26VCCO_36_J29VCCO_36_H22VCCO_36_G25

IO_25_VRP_36_M26IO_L24N_T3_36_L27IO_L24P_T3_36_M27IO_L23N_T3_36_N24IO_L23P_T3_36_N23IO_L22N_T3_36_N26IO_L22P_T3_36_N25

IO_L21N_T3_DQS_36_P23IO_L21P_T3_DQS_36_P22

IO_L20N_T3_36_P26IO_L20P_T3_36_P25

IO_L19N_T3_VREF_36_N21IO_L19P_T3_36_P21IO_L18N_T2_36_L21IO_L18P_T2_36_M21IO_L17N_T2_36_J22IO_L17P_T2_36_K22IO_L16N_T2_36_L26IO_L16P_T2_36_L25

IO_L15N_T2_DQS_36_L22IO_L15P_T2_DQS_36_M22IO_L14N_T2_SRCC_36_J23IO_L14P_T2_SRCC_36_K23IO_L13N_T2_MRCC_36_L24IO_L13P_T2_MRCC_36_M24IO_L12N_T1_MRCC_36_J26IO_L12P_T1_MRCC_36_J25IO_L11N_T1_SRCC_36_K25IO_L11P_T1_SRCC_36_K24

IO_L10N_T1_36_J27IO_L10P_T1_36_K27

IO_L9N_T1_DQS_36_H29IO_L9P_T1_DQS_36_H28

IO_L8N_T1_36_J28IO_L8P_T1_36_K28IO_L7N_T1_36_G29IO_L7P_T1_36_G28

IO_L6N_T0_VREF_36_G23IO_L6P_T0_36_H23IO_L5N_T0_36_G27IO_L5P_T0_36_G26IO_L4N_T0_36_G22IO_L4P_T0_36_G21

IO_L3N_T0_DQS_36_H26IO_L3P_T0_DQS_36_H25

IO_L2N_T0_36_H21IO_L2P_T0_36_J21IO_L1N_T0_36_G24IO_L1P_T0_36_H24IO_0_VRN_36_M23

XC7V2000TFHG1761BANK 36

VCCO_37_F28VCCO_37_E21VCCO_37_D24VCCO_37_C27VCCO_37_B30VCCO_37_A23

IO_25_VRP_37_F24IO_L24N_T3_37_F31IO_L24P_T3_37_F30IO_L23N_T3_37_F27IO_L23P_T3_37_F26IO_L22N_T3_37_E29IO_L22P_T3_37_F29

IO_L21N_T3_DQS_37_E28IO_L21P_T3_DQS_37_E27

IO_L20N_T3_37_C30IO_L20P_T3_37_D30

IO_L19N_T3_VREF_37_D31IO_L19P_T3_37_E30IO_L18N_T2_37_B31IO_L18P_T2_37_C31IO_L17N_T2_37_A30IO_L17P_T2_37_A29IO_L16N_T2_37_A32IO_L16P_T2_37_A31

IO_L15N_T2_DQS_37_B29IO_L15P_T2_DQS_37_B28

IO_L14N_T2_SRCC_37_C29IO_L14P_T2_SRCC_37_C28IO_L13N_T2_MRCC_37_D28IO_L13P_T2_MRCC_37_D27IO_L12N_T1_MRCC_37_C26IO_L12P_T1_MRCC_37_C25IO_L11N_T1_SRCC_37_D26IO_L11P_T1_SRCC_37_D25

IO_L10N_T1_37_D23IO_L10P_T1_37_D22

IO_L9N_T1_DQS_37_E25IO_L9P_T1_DQS_37_F25

IO_L8N_T1_37_E22IO_L8P_T1_37_F22IO_L7N_T1_37_E24IO_L7P_T1_37_E23

IO_L6N_T0_VREF_37_B24IO_L6P_T0_37_C24IO_L5N_T0_37_B27IO_L5P_T0_37_B26IO_L4N_T0_37_B23IO_L4P_T0_37_C23

IO_L3N_T0_DQS_37_A27IO_L3P_T0_DQS_37_A26

IO_L2N_T0_37_A22IO_L2P_T0_37_B22IO_L1N_T0_37_A25IO_L1P_T0_37_A24IO_0_VRN_37_F21

XC7V2000TFHG1761BANK 37

GND GND

SPI - MGT PWR MODULE

SYSTEMACE-2

USB UART BRIDGE

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

I/O BANKS 36, 37

8354

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:592

1 R2861001/10W

2

1 R2871001/10W

2

1 R3821001/10W

2

1 R3831001/10W

IO_L3N_T0_DQS_37IO_L3P_T0_DQS_37

IO_0_VRN_37MGT_MOD_SPI_SCK

USB_GPIO_1

IO_0_VRN_36

FMC2_HB06_CC_P

IO_25_VRP_36FMC2_HA16_N F28

E21D24C27B30A23

F24F31F30F27F26E29F29E28E27C30D30D31E30B31C31A30A29A32A31B29B28C29C28D28D27C26C25D26D25D23D22E25F25E22F22E24E23B24C24B27B26B23C23A27A26A22B22A25A24F21

SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRONU1

P24N27L23K26J29H22G25

M26L27M27N24N23N26N25P23P22P26P25N21P21L21M21J22K22L26L25L22M22J23K23L24M24J26J25K25K24J27K27H29H28J28K28G29G28G23H23G27G26G22G21H26H25H21J21G24H24M23

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

IO_0_VRN_37

IO_25_VRP_37

IO_L7P_T1_37IO_L7N_T1_37IO_L8P_T1_37IO_L8N_T1_37

IO_L9P_T1_DQS_37IO_L9N_T1_DQS_37

IO_L10P_T1_37IO_L10N_T1_37

IO_L11P_T1_SRCC_37IO_L11N_T1_SRCC_37IO_L12P_T1_MRCC_37IO_L12N_T1_MRCC_37IO_L13P_T2_MRCC_37IO_L13N_T2_MRCC_37IO_L14P_T2_SRCC_37IO_L14N_T2_SRCC_37

IO_L19P_T3_37IO_L19N_T3_VREF_37

IO_L20P_T3_37IO_L20N_T3_37

IO_L21P_T3_DQS_37IO_L21N_T3_DQS_37

IO_L22P_T3_37IO_L22N_T3_37IO_L23P_T3_37IO_L23N_T3_37IO_L24P_T3_37IO_L24N_T3_37IO_25_VRP_37

FMC2_CLK2_BIDIR_NFMC2_CLK2_BIDIR_P

FMC2_CLK3_BIDIR_PFMC2_CLK3_BIDIR_N

FMC2_HA15_PFMC2_HA15_N

FMC2_HA12_NFMC2_HA12_P

FMC2_HA13_NFMC2_HA13_P

FMC2_HA14_NFMC2_HA14_P

FMC2_HA16_P

FMC2_HB05_N

FMC2_HB01_NFMC2_HB01_P

FMC2_HB00_CC_N

FMC2_HB03_P

FMC2_HB16_NFMC2_HB16_P

FMC2_HB14_PFMC2_HB14_N

FMC2_HB13_PFMC2_HB13_N

FMC2_HB12_PFMC2_HB12_N

FMC2_HB11_PFMC2_HB11_N

FMC2_HB10_PFMC2_HB10_N

FMC2_HB09_PFMC2_HB09_N

FMC2_HB08_PFMC2_HB08_N

FMC2_HB07_PFMC2_HB07_N

FMC2_HB06_CC_N

FMC2_HB05_PFMC2_HB04_N

FMC2_HB02_PFMC2_HB02_N

FMC2_HB00_CC_P

FMC2_HB15_NFMC2_HB15_P

FMC2_HB03_NFMC2_HB04_P

USB_CTS_I_BUSB_RTS_0_BUSB_RXD_IUSB_TXD_0USB_GPIO_3USB_GPIO_2

USB_GPIO_0

SA2_SDHOST_CLKSA2_SDHOST_D2SA2_SDHOST_D3SA2_SDHOST_D1SA2_SDHOST_D0

SA2_SDHOST_CMD

GTX_MOD_SPI_CS

MGT_MOD_SPI_DMGT_MOD_SPI_Q

IO_25_VRP_36

IO_0_VRN_36

Page 55: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

VCCO_HP

VCCO_HPVCCO_HP

VCCO_HP

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCCO_39_P14VCCO_39_L13VCCO_39_K16VCCO_39_H12VCCO_39_G15VCCO_39_D14

IO_25_VRP_39_J11IO_L24N_T3_39_M11IO_L24P_T3_39_M12IO_L23N_T3_39_N14IO_L23P_T3_39_N15IO_L22N_T3_39_M13IO_L22P_T3_39_N13

IO_L21N_T3_DQS_39_M16IO_L21P_T3_DQS_39_N16

IO_L20N_T3_39_L14IO_L20P_T3_39_M14

IO_L19N_T3_VREF_39_L11IO_L19P_T3_39_L12IO_L18N_T2_39_L15IO_L18P_T2_39_L16IO_L17N_T2_39_K13IO_L17P_T2_39_K14IO_L16N_T2_39_J15IO_L16P_T2_39_K15

IO_L15N_T2_DQS_39_J12IO_L15P_T2_DQS_39_K12

IO_L14N_T2_SRCC_39_H13IO_L14P_T2_SRCC_39_J13IO_L13N_T2_MRCC_39_H14IO_L13P_T2_MRCC_39_H15IO_L12N_T1_MRCC_39_G13IO_L12P_T1_MRCC_39_G14IO_L11N_T1_SRCC_39_F14IO_L11P_T1_SRCC_39_F15

IO_L10N_T1_39_F12IO_L10P_T1_39_G12

IO_L9N_T1_DQS_39_G16IO_L9P_T1_DQS_39_H16

IO_L8N_T1_39_E13IO_L8P_T1_39_E14IO_L7N_T1_39_E15IO_L7P_T1_39_F16

IO_L6N_T0_VREF_39_D12IO_L6P_T0_39_E12IO_L5N_T0_39_D15IO_L5P_T0_39_D16IO_L4N_T0_39_C13IO_L4P_T0_39_D13

IO_L3N_T0_DQS_39_C14IO_L3P_T0_DQS_39_C15

IO_L2N_T0_39_A14IO_L2P_T0_39_B14IO_L1N_T0_39_B16IO_L1P_T0_39_C16IO_0_VRN_39_J16

XC7V2000TFHG1761BANK 39

VCCO_38_N17VCCO_38_M20VCCO_38_J19VCCO_38_F18VCCO_38_C17VCCO_38_B20

IO_25_VRP_38_K20IO_L24N_T3_38_L19IO_L24P_T3_38_L20IO_L23N_T3_38_N20IO_L23P_T3_38_P20IO_L22N_T3_38_M18IO_L22P_T3_38_M19

IO_L21N_T3_DQS_38_N18IO_L21P_T3_DQS_38_N19

IO_L20N_T3_38_L17IO_L20P_T3_38_M17

IO_L19N_T3_VREF_38_P17IO_L19P_T3_38_P18IO_L18N_T2_38_G17IO_L18P_T2_38_H18IO_L17N_T2_38_H20IO_L17P_T2_38_J20IO_L16N_T2_38_J17IO_L16P_T2_38_K17

IO_L15N_T2_DQS_38_E20IO_L15P_T2_DQS_38_F20IO_L14N_T2_SRCC_38_J18IO_L14P_T2_SRCC_38_K19IO_L13N_T2_MRCC_38_G18IO_L13P_T2_MRCC_38_H19IO_L12N_T1_MRCC_38_E18IO_L12P_T1_MRCC_38_E19IO_L11N_T1_SRCC_38_F19IO_L11P_T1_SRCC_38_G19

IO_L10N_T1_38_D17IO_L10P_T1_38_D18

IO_L9N_T1_DQS_38_C21IO_L9P_T1_DQS_38_D21

IO_L8N_T1_38_E17IO_L8P_T1_38_F17IO_L7N_T1_38_C20IO_L7P_T1_38_D20

IO_L6N_T0_VREF_38_B18IO_L6P_T0_38_C18IO_L5N_T0_38_A21IO_L5P_T0_38_B21IO_L4N_T0_38_A17IO_L4P_T0_38_B17

IO_L3N_T0_DQS_38_A19IO_L3P_T0_DQS_38_A20

IO_L2N_T0_38_A15IO_L2P_T0_38_A16IO_L1N_T0_38_B19IO_L1P_T0_38_C19IO_0_VRN_38_K18

XC7V2000TFHG1761BANK 38

GNDGND

USER DIFF SMA CLOCK

SYSTEM CLOCK

CLOCK MODULE

CLOCK MODULE

RECOVERY CLOCK

RECOVERY CLOCK

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

I/O BANKS 38, 39

PLACE RESISTOR AS CLOSE AS POSSIBLE TO FPGA

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

55 83

2

1 R3331001/10W

2

1 R3341001/10W

2

1 R3351001/10W

2

1 R3361001/10W

2

1 R81001/10W

CLK_DIFF_1_NCM_GCLK_P

1

LVDS_OSC_N

LVDS_OSC_NLVDS_OSC_P

IO_L11N_T1_SRCC_38

IO_0_VRN_38

N17M20J19F18C17B20

K20L19L20N20P20M18M19N18N19L17M17P17P18G17H18H20J20J17K17E20F20J18K19G18H19E18E19F19G19D17D18C21D21E17F17C20D20B18C18A21B21A17B17A19A20A15A16B19C19K18

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

IO_25_VRP_39

IO_0_VRN_39FMC3_HA11_P

FMC3_HB01_P

CM_LVDS2_NCM_LVDS2_PFMC3_HB09_N

FMC3_HB06_CC_NFMC3_HB06_CC_P

P14L13K16H12G15D14

J11M11M12N14N15M13N13M16N16L14M14L11L12L15L16K13K14J15K15J12K12H13J13H14H15G13G14F14F15F12G12G16H16E13E14E15F16D12E12D15D16C13D13C14C15A14B14B16C16J16

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

IO_25_VRP_38

IO_0_VRN_38

IO_25_VRP_39

IO_0_VRN_39

CM_LVDS1_PCM_LVDS1_N

FMC3_CLK2_BIDIR_NFMC3_CLK2_BIDIR_P

FMC3_CLK3_BIDIR_PFMC3_CLK3_BIDIR_N

FMC3_HA14_PFMC3_HA14_N

FMC3_HA13_PFMC3_HA13_N

FMC3_HA12_PFMC3_HA12_N

FMC3_HA11_N

FMC3_HA15_NFMC3_HA15_P

FMC3_HB04_PFMC3_HB03_N

FMC3_HB02_NFMC3_HB02_P

FMC3_HB04_N

FMC3_HB05_P

FMC3_HB07_NFMC3_HB07_P

FMC3_HB08_NFMC3_HB08_P

FMC3_HB09_P

FMC3_HB10_NFMC3_HB10_P

FMC3_HB11_NFMC3_HB11_P

FMC3_HB12_NFMC3_HB12_P

FMC3_HB13_NFMC3_HB13_P

FMC3_HB14_NFMC3_HB14_P

FMC3_HB03_P

FMC3_HB01_N

FMC3_HB05_N

FMC3_HB00_CC_NFMC3_HB00_CC_P

CM_GCLK_N

CLK_DIFF_1_P

CM_CTRL_0CM_CTRL_1CM_CTRL_2

CM_CTRL_4CM_CTRL_5CM_CTRL_6CM_CTRL_7CM_CTRL_8CM_CTRL_9

CM_CTRL_10CM_CTRL_11CM_CTRL_12CM_CTRL_13CM_CTRL_14CM_CTRL_15CM_CTRL_16CM_CTRL_17CM_CTRL_18CM_CTRL_19

CM_CTRL_3

CM_CTRL_20CM_CTRL_21CM_CTRL_22CM_CTRL_23

CM_RST

IO_L11P_T1_SRCC_38

IO_L17N_T2_38IO_L18P_T2_38IO_L18N_T2_38IO_L19P_T3_38

IO_L19N_T3_VREF_38IO_L20P_T3_38IO_L20N_T3_38

IO_L21P_T3_DQS_38IO_L21N_T3_DQS_38

IO_L22P_T3_38IO_L22N_T3_38IO_L23P_T3_38IO_L23N_T3_38IO_L24P_T3_38IO_L24N_T3_38IO_25_VRP_38

LVDS_OSC_P

1

2

1 R131001/10W

1

CM_GCLK_N

CM_GCLK_P

Page 56: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

VCCAUX_IO

VCCAUX_IO

VCCBRAM

VCCAUX_IO

VCCAUX_IO

VCCAUX_IO

VCCAUX_IO

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCCAUX

VCCAUX_IO_G1_AD25VCCAUX_IO_G1_AB25VCCAUX_IO_G1_Y25

XC7V2000TFHG1761BANK VCCAUX_IO_G1

VCCAUX_IO_G2_V25VCCAUX_IO_G2_T25VCCAUX_IO_G2_R26

XC7V2000TFHG1761BANK VCCAUX_IO_G2

VCCAUX_IO_G3_AG18VCCAUX_IO_G3_AF19VCCAUX_IO_G3_AE18

XC7V2000TFHG1761BANK VCCAUX_IO_G3

VCCAUX_IO_G0_AH25VCCAUX_IO_G0_AF25

XC7V2000TFHG1761BANK VCCAUX_IO_G0

VCCAUX_IO_G4_AC18VCCAUX_IO_G4_AA18VCCAUX_IO_G4_W18

XC7V2000TFHG1761BANK VCCAUX_IO_G4

VCCAUX_IO_G5_U18VCCAUX_IO_G5_T19VCCAUX_IO_G5_R18

XC7V2000TFHG1761BANK VCCAUX_IO_G5

VCCAUX_AA26VCCAUX_AB17VCCAUX_AC26VCCAUX_AD17VCCAUX_AE26VCCAUX_AF17VCCAUX_AG26VCCAUX_T17VCCAUX_U26VCCAUX_V17VCCAUX_W26VCCAUX_Y17

XC7V2000TFHG1761BANK VCCAUX

VCCBRAM_AA22VCCBRAM_AC22VCCBRAM_AE22VCCBRAM_AG22VCCBRAM_AH21VCCBRAM_R22VCCBRAM_U22VCCBRAM_W22

XC7V2000TFHG1761BANK VCCBRAM

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

FPGA POWER

FPGA POWER, VCCAUX / VCCAUX_IO / VCCBRAM

8356

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

AA22AC22AE22AG22AH21R22U22W22

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

AA26AB17AC26AD17AE26AF17AG26T17U26V17W26Y17

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

U18T19R18

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

AC18AA18W18

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

AH25AF25

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

AG18AF19AE18

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

V25T25R26

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

AD25AB25Y25

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

Page 57: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VCCINT

VCCINT_AA10VCCINT_AA12VCCINT_AA14VCCINT_AA16VCCINT_AA24VCCINT_AA28VCCINT_AB11VCCINT_AB13VCCINT_AB15VCCINT_AB19VCCINT_AB23VCCINT_AB27VCCINT_AC12VCCINT_AC14VCCINT_AC16VCCINT_AC24VCCINT_AC28VCCINT_AD11VCCINT_AD13VCCINT_AD15VCCINT_AD19VCCINT_AD21VCCINT_AD23VCCINT_AD27VCCINT_AE10VCCINT_AE12VCCINT_AE14VCCINT_AE16VCCINT_AE20VCCINT_AE24VCCINT_AE28VCCINT_AF11VCCINT_AF13VCCINT_AF15VCCINT_AF21VCCINT_AF23VCCINT_AF27VCCINT_AG12VCCINT_AG14VCCINT_AG16VCCINT_AG20VCCINT_AG24VCCINT_AG28VCCINT_AH11VCCINT_AH13VCCINT_AH15VCCINT_AH19VCCINT_AH23VCCINT_AH27VCCINT_P13VCCINT_P15VCCINT_P27VCCINT_R12VCCINT_R14VCCINT_R16VCCINT_R20VCCINT_R24VCCINT_T13VCCINT_T15VCCINT_T21VCCINT_T23VCCINT_T27VCCINT_U12VCCINT_U14VCCINT_U16VCCINT_U20VCCINT_U24VCCINT_V11VCCINT_V13VCCINT_V15VCCINT_V19VCCINT_V21VCCINT_V23VCCINT_V27VCCINT_W12VCCINT_W14VCCINT_W16VCCINT_W20VCCINT_W24VCCINT_W28VCCINT_Y11VCCINT_Y13VCCINT_Y15VCCINT_Y19VCCINT_Y23VCCINT_Y27

XC7V2000TFHG1761BANK VCCINT

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

FPGA POWER

FPGA POWER, VCCINT

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

57 83

AA10AA12AA14AA16AA24AA28AB11AB13AB15AB19AB23AB27AC12AC14AC16AC24AC28AD11AD13AD15AD19AD21AD23AD27AE10AE12AE14AE16AE20AE24AE28AF11AF13AF15AF21AF23AF27AG12AG14AG16AG20AG24AG28AH11AH13AH15AH19AH23AH27P13P15P27R12R14R16R20R24T13T15T21T23T27U12U14U16U20U24V11V13V15V19V21V23V27W12W14W16W20W24W28Y11Y13Y15Y19Y23Y27

U1 SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

VCCINT_SPY

Page 58: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GND

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

GND

GND_A2

GND_A3

GND_A4

GND_A7

GND_A8

GND_A11

GND_A13

GND_A18

GND_A28

GND_A38

GND_AA3

GND_AA7

GND_AA9

GND_AA11

GND_AA13

GND_AA15

GND_AA17

GND_AA19

GND_AA23

GND_AA25

GND_AA27

GND_AA38

GND_AB1

GND_AB2

GND_AB5

GND_AB6

GND_AB9

GND_AB10

GND_AB12

GND_AB14

GND_AB16

GND_AB18

GND_AB22

GND_AB24

GND_AB26

GND_AB28

GND_AB35

GND_AC3

GND_AC7

GND_AC11

GND_AC13

GND_AC15

GND_AC17

GND_AC19

GND_AC23

GND_AC25

GND_AC27

GND_AC32

GND_AC42

GND_AD1

GND_AD2

GND_AD5

GND_AD6

GND_AD9

GND_AD10

GND_AD12

GND_AD14

GND_AD16

GND_AD18

GND_AD20

GND_AD22

GND_AD24

GND_AD26

GND_AD28

GND_AD29

GND_AD39

GND_AE3

GND_AE7

GND_AE9

GND_AE11

GND_AE13

GND_AE15

GND_AE17

GND_AE19

GND_AE21

GND_AE23

GND_AE25

GND_AE27

GND_AE36

GND_AF1

GND_AF2

GND_AF5

GND_AF6

GND_AF9

GND_AF10

GND_AF12

GND_AF14

GND_AF16

GND_AF18

GND_AF20

GND_AF22

GND_AF24

GND_AF26

GND_AF33

GND_AG3

GND_AG4

GND_AG7

GND_AG8

GND_AG9

GND_AG10

GND_AG13

GND_AG15

GND_AG17

GND_AG19

GND_AG21

GND_AG23

GND_AG25

GND_AG27

GND_AG30

GND_AG40

GND_AH1

GND_AH2

GND_AH5

GND_AH6

GND_AH9

GND_AH12

GND_AH14

GND_AH16

GND_AH17

GND_AH18

GND_AH20

GND_AH22

GND_AH24

GND_AH26

GND_AH37

GND_AJ3

GND_AJ7

GND_AJ9

GND_AJ14

GND_AJ24

GND_AJ27

GND_AJ34

GND_AK1

GND_AK2

GND_AK5

GND_AK6

GND_AK9

GND_AK11

GND_AK21

GND_AK31

GND_AK41

GND_AL3

GND_AL7

GND_AL9

GND_AL18

GND_AL28

GND_AL38

GND_AM1

GND_AM2

GND_AM5

GND_AM9

GND_AM10

GND_AM15

GND_AM25

GND_AM35

GND_AN3

GND_AN7

GND_AN9

GND_AN10

GND_AN12

GND_AN22

GND_AN32

GND_AN42

GND_AP1

GND_AP2

GND_AP5

GND_AP9

GND_AP10

GND_AP19

GND_AP29

GND_AP39

GND_AR3

GND_AR7

GND_AR9

GND_AR10

GND_AR16

GND_AR26

GND_AR36

GND_AT1

GND_AT2

GND_AT5

GND_AT6

GND_AT9

GND_AT10

GND_AT11

GND_AT13

GND_AT23

GND_AT33

GND_AU3

GND_AU7

GND_AU11

GND_AU20

GND_AU30

GND_AU40

GND_AV1

GND_AV2

GND_AV5

GND_AV9

GND_AV10

GND_AV11

GND_AV17

GND_AV27

GND_AV37

GND_AW3

GND_AW7

GND_AW11

GND_AW14

GND_AW24

GND_AW34

GND_AY1

GND_AY2

GND_AY5

GND_AY9

GND_AY10

GND_AY11

GND_AY21

GND_AY31

GND_AY41

GND_B1

GND_B2

GND_B5

GND_B9

GND_B10

GND_B12

GND_B13

GND_B15

GND_B25

GND_B35

GND_BA3

GND_BA7

GND_BA11

GND_BA18

GND_BA28

GND_BA38

GND_BB2

GND_BB5

GND_BB6

GND_BB9

GND_BB10

GND_BB11

GND_BB15

GND_BB25

GND_BB35

GND_C3

GND_C7

GND_C11

GND_C12

GND_C22

GND_C32

GND_C42

XC7V2000TFHG1761

BANK GND1

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

FPGA GROUND

FPGA GROUND

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

58 83

A2

A3

A4

A7

A8

A11

A13

A18

A28

A38

AA3

AA7

AA9

AA11

AA13

AA15

AA17

AA19

AA23

AA25

AA27

AA38

AB1

AB2

AB5

AB6

AB9

AB10

AB12

AB14

AB16

AB18

AB22

AB24

AB26

AB28

AB35

AC3

AC7

AC11

AC13

AC15

AC17

AC19

AC23

AC25

AC27

AC32

AC42

AD1

AD2

AD5

AD6

AD9

AD10

AD12

AD14

AD16

AD18

AD20

AD22

AD24

AD26

AD28

AD29

AD39

AE3

AE7

AE9

AE11

AE13

AE15

AE17

AE19

AE21

AE23

AE25

AE27

AE36

AF1

AF2

AF5

AF6

AF9

AF10

AF12

AF14

AF16

AF18

AF20

AF22

AF24

AF26

AF33

AG3

AG4

AG7

AG8

AG9

AG10

AG13

AG15

AG17

AG19

AG21

AG23

AG25

AG27

AG30

AG40

AH1

AH2

AH5

AH6

AH9

AH12

AH14

AH16

AH17

AH18

AH20

AH22

AH24

AH26

AH37

AJ3

AJ7

AJ9

AJ14

AJ24

AJ27

AJ34

AK1

AK2

AK5

AK6

AK9

AK11

AK21

AK31

AK41

AL3

AL7

AL9

AL18

AL28

AL38

AM1

AM2

AM5

AM9

AM10

AM15

AM25

AM35

AN3

AN7

AN9

AN10

AN12

AN22

AN32

AN42

AP1

AP2

AP5

AP9

AP10

AP19

AP29

AP39

AR3

AR7

AR9

AR10

AR16

AR26

AR36

AT1

AT2

AT5

AT6

AT9

AT10

AT11

AT13

AT23

AT33

AU3

AU7

AU11

AU20

AU30

AU40

AV1

AV2

AV5

AV9

AV10

AV11

AV17

AV27

AV37

AW3

AW7

AW11

AW14

AW24

AW34

AY1

AY2

AY5

AY9

AY10

AY11

AY21

AY31

AY41

B1

B2

B5

B9

B10

B12

B13

B15

B25

B35

BA3

BA7

BA11

BA18

BA28

BA38

BB2

BB5

BB6

BB9

BB10

BB11

BB15

BB25

BB35

C3

C7

C11

C12

C22

C32

C42

U1

SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

GND1_SPY

GND3_SPY

GND2_SPY

Page 59: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GND

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

GND

GND_D1

GND_D2

GND_D5

GND_D9

GND_D10

GND_D11

GND_D19

GND_D29

GND_D39

GND_E3

GND_E7

GND_E11

GND_E16

GND_E26

GND_E36

GND_F1

GND_F2

GND_F5

GND_F9

GND_F10

GND_F11

GND_F13

GND_F23

GND_F33

GND_G3

GND_G7

GND_G11

GND_G20

GND_G30

GND_G40

GND_H1

GND_H2

GND_H5

GND_H9

GND_H10

GND_H11

GND_H17

GND_H27

GND_H37

GND_J3

GND_J7

GND_J9

GND_J10

GND_J14

GND_J24

GND_J34

GND_K1

GND_K2

GND_K5

GND_K6

GND_K9

GND_K10

GND_K11

GND_K21

GND_K31

GND_K41

GND_L3

GND_L7

GND_L9

GND_L10

GND_L18

GND_L28

GND_L38

GND_M1

GND_M2

GND_M5

GND_M6

GND_M9

GND_M15

GND_M25

GND_M35

GND_N3

GND_N7

GND_N9

GND_N12

GND_N22

GND_N32

GND_N42

GND_P1

GND_P2

GND_P5

GND_P9

GND_P12

GND_P16

GND_P19

GND_P29

GND_P39

GND_R3

GND_R7

GND_R9

GND_R11

GND_R13

GND_R15

GND_R17

GND_R19

GND_R21

GND_R23

GND_R25

GND_R27

GND_R36

GND_T1

GND_T2

GND_T5

GND_T6

GND_T9

GND_T12

GND_T14

GND_T16

GND_T18

GND_T20

GND_T22

GND_T24

GND_T26

GND_T33

GND_U3

GND_U4

GND_U7

GND_U9

GND_U10

GND_U11

GND_U13

GND_U15

GND_U17

GND_U19

GND_U21

GND_U23

GND_U25

GND_U27

GND_U30

GND_U40

GND_V1

GND_V2

GND_V5

GND_V6

GND_V9

GND_V10

GND_V12

GND_V14

GND_V16

GND_V18

GND_V20

GND_V22

GND_V24

GND_V26

GND_V28

GND_V37

GND_W3

GND_W7

GND_W11

GND_W13

GND_W15

GND_W17

GND_W19

GND_W21

GND_W23

GND_W25

GND_W27

GND_W34

GND_Y1

GND_Y2

GND_Y5

GND_Y6

GND_Y9

GND_Y10

GND_Y12

GND_Y14

GND_Y16

GND_Y18

GND_Y22

GND_Y24

GND_Y26

GND_Y28

GND_Y31

GND_Y41

XC7V2000TFHG1761

BANK GND2

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

FPGA GROUND

FPGA GROUND

8359

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

D1

D2

D5

D9

D10

D11

D19

D29

D39

E3

E7

E11

E16

E26

E36

F1

F2

F5

F9

F10

F11

F13

F23

F33

G3

G7

G11

G20

G30

G40

H1

H2

H5

H9

H10

H11

H17

H27

H37

J3

J7

J9

J10

J14

J24

J34

K1

K2

K5

K6

K9

K10

K11

K21

K31

K41

L3

L7

L9

L10

L18

L28

L38

M1

M2

M5

M6

M9

M15

M25

M35

N3

N7

N9

N12

N22

N32

N42

P1

P2

P5

P9

P12

P16

P19

P29

P39

R3

R7

R9

R11

R13

R15

R17

R19

R21

R23

R25

R27

R36

T1

T2

T5

T6

T9

T12

T14

T16

T18

T20

T22

T24

T26

T33

U3

U4

U7

U9

U10

U11

U13

U15

U17

U19

U21

U23

U25

U27

U30

U40

V1

V2

V5

V6

V9

V10

V12

V14

V16

V18

V20

V22

V24

V26

V28

V37

W3

W7

W11

W13

W15

W17

W19

W21

W23

W25

W27

W34

Y1

Y2

Y5

Y6

Y9

Y10

Y12

Y14

Y16

Y18

Y22

Y24

Y26

Y28

Y31

Y41

U1

SOC_FHG1761_OZ_IRON

SOC_FHG1761_OZ_IRON

Page 60: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

DP5_C2M_N

DP5_C2M_P

DP4_C2M_N

DP4_C2M_P

DP3_C2M_N

DP3_C2M_P

DP2_C2M_N

DP2_C2M_P

DP1_C2M_N

DP1_C2M_P

DP5_M2C_N

DP5_M2C_P

DP4_M2C_N

DP4_M2C_P

DP3_M2C_N

DP3_M2C_P

DP2_M2C_N

DP2_M2C_P

DP1_M2C_N

DP1_M2C_P

DP6_C2M_P

DP7_C2M_N

DP7_C2M_P

DP8_C2M_N

DP8_C2M_P

DP9_C2M_N

DP9_C2M_P

GBTCLK1_M2C_N

GBTCLK1_M2C_P

DP6_M2C_P

DP7_M2C_N

DP7_M2C_P

DP8_M2C_N

DP8_M2C_P

DP9_M2C_N

DP6_C2M_N

DP9_M2C_P

RES0

CLK_DIR

DP6_M2C_N

3P3V_4

GA1

TRST_L

TMS

3P3VAUX

TDO

TDI

TCK

LA26_N

LA26_P

LA23_N

LA17_N_CC

LA17_P_CC

LA13_N

LA13_P

LA09_N

LA09_P

LA05_N

LA05_P

LA01_N_CC

LA01_P_CC

GBTCLK0_M2C_N

GBTCLK0_M2C_P

PG_C2M

LA23_P

3P3V_2

3P3V_3

3P3V_1

12P0V_2

12P0V_1

GA0

SDA

SCL

LA27_N

LA27_P

LA18_N_CC

LA18_P_CC

LA14_N

LA14_P

LA10_N

LA10_P

LA06_N

LA06_P

DP0_M2C_N

DP0_M2C_P

DP0_C2M_N

DP0_C2M_P

A

B

GND

OE

VCC

RN

ASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

FMC GLOBAL ADDRESS BIT GA[0:1]

FMC1 DECOUPLING CAPS

SCHEM, ROHS COMPLIANTFMC1 (ROWS A, B, C, D)

FMC1 INTERFACE

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

60 83

FMC1_TDI

FMC2_TDI

GND

FMC1_PRSNT_M2C_L

VCCO_HP_EXT

1

2

3

4

5

U12 SC70_5

NC7SZ66

UTIL_3V3

FMC_TMS

FMC_TCK

VCCO_HP_EXT

UTIL_3V3UTIL_3V3

1

2

C1981UF25VX5R

NC

NC

NC

FMC1_LA17_CC_N

C39

C37

C35

C34

C31

C30

C27

C26

C23

C22

C19

C18

C15

C14

C11

C10

C7

C6

C3

C2

JA2 ASP_134486_01

D40

D35

D34

D33

D32

D31

D30

D29

D27

D26

D24

D21

D20

D18

D17

D15

D14

D12

D11

D9

D8

D5

D4

D1

D23

D36

D38

JA2 ASP_134486_01

B36

B33

B32

B29

B28

B25

B24

B21

B20

B16

B13

B12

B9

B8

B5

B37

B4

B40

B1

B17

JA2 ASP_134486_01

A39

A38

A35

A34

A31

A30

A27

A26

A23

A22

A19

A18

A15

A14

A11

A10

A7

A6

A3

A2

JA2 ASP_134486_01

1

2

C1961UF25VX5R

GND

VCC12_P

GND GND

VCC12_P

2

1 R18310.0K1/10W1%

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

FMC1_LA06_P

FMC1_LA06_N

FMC1_LA10_P

FMC1_LA10_N

FMC1_LA14_P

FMC1_LA14_N

FMC1_LA18_CC_P

FMC1_LA18_CC_N

FMC1_LA27_P

FMC1_LA27_N

FMC1_I2C_SCL

FMC1_I2C_SDA

FMC1_LA23_P

NC

FMC1_LA01_CC_P

FMC1_LA01_CC_N

FMC1_LA05_P

FMC1_LA05_N

FMC1_LA09_P

FMC1_LA09_N

FMC1_LA13_P

FMC1_LA13_N

FMC1_LA17_CC_P

FMC1_LA23_N

FMC1_LA26_P

FMC1_LA26_N

1

2

C5931UF25VX5R

GND

1

1

1

VCCO_HP_EXT

GND

Page 61: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

HA01_P_CC

HA01_N_CC

HA05_P

HA05_N

HA09_P

HA09_N

HA13_P

HA13_N

HA16_P

HA16_N

HA20_P

HA20_N

HB03_P

HB03_N

HB05_P

HB05_N

HB09_P

HB09_N

HB13_P

HB13_N

HB19_P

HB19_N

HB21_P

HB21_N

VADJ_1

VADJ_2

HB20_N

HB20_P

HB16_N

HB16_P

HB12_N

HB12_P

HB08_N

HB08_P

HB04_N

HB04_P

HB02_N

HB02_P

HA19_N

HA19_P

HA15_N

HA15_P

HA12_N

HA12_P

HA08_N

HA08_P

HA04_N

HA04_P

HA00_N_CC

PG_M2C

HA00_P_CC

VADJ_3

LA33_N

LA33_P

LA31_N

LA31_P

LA29_N

LA29_P

LA25_N

LA25_P

LA22_N

LA22_P

LA20_N

LA20_P

LA16_N

LA16_P

LA12_N

LA12_P

LA08_N

LA08_P

LA03_N

LA03_P

LA00_N_CC

LA00_P_CC

CLK1_M2C_N

CLK1_M2C_P

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

FMC1 (ROWS E, F, G)

FMC1 INTERFACE

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

61 83

NC

NC

NC

NC

NC

NC

G39

G37

G36

G34

G33

G31

G30

G28

G27

G25

G24

G22

G21

G19

G18

G16

G15

G13

G12

G10

G9

G7

G6

G3

G2

JA2 ASP_134486_01

F40

F38

F37

F35

F34

F32

F31

F29

F28

F26

F25

F23

F22

F20

F19

F17

F16

F14

F13

F11

F10

F8

F7

F5

F1

F4

JA2 ASP_134486_01

E2

E3

E6

E7

E9

E10

E12

E13

E15

E16

E18

E19

E21

E22

E24

E25

E27

E28

E30

E31

E33

E34

E36

E37

E39

JA2 ASP_134486_01

2

1 R18410.0K1/10W1%

FMC1_HA00_CC_P

FMC1_HA00_CC_N

FMC1_CLK1_M2C_N

FMC1_CLK1_M2C_P

FMC1_HA15_P

FMC1_HA15_N

FMC1_HA12_P

FMC1_HA12_N

FMC1_HA08_P

FMC1_HA08_N

FMC1_HA04_P

FMC1_HA04_N

FMC1_HB16_P

FMC1_HB16_N

FMC1_HB12_P

FMC1_HB12_N

FMC1_HB08_P

FMC1_HB08_N

FMC1_HB04_P

FMC1_HB04_N

FMC1_HB02_P

FMC1_HB02_N

FMC1_HB13_P

FMC1_HB13_N

FMC1_HB09_P

FMC1_HB09_N

FMC1_HB05_P

FMC1_HB05_N

FMC1_HB03_P

FMC1_HB03_N

FMC1_HA16_P

FMC1_HA16_N

FMC1_HA13_P

FMC1_HA13_N

FMC1_HA09_P

FMC1_HA09_N

FMC1_HA05_P

FMC1_HA05_N

FMC1_HA01_CC_P

FMC1_HA01_CC_N

FMC1_LA00_CC_P

FMC1_LA00_CC_N

FMC1_LA03_P

FMC1_LA03_N

FMC1_LA08_P

FMC1_LA08_N

FMC1_LA12_P

FMC1_LA12_N

FMC1_LA16_P

FMC1_LA16_N

FMC1_LA20_P

FMC1_LA20_N

FMC1_LA22_P

FMC1_LA22_N

FMC1_LA25_P

FMC1_LA25_N

FMC1_LA29_P

FMC1_LA29_N

FMC1_LA31_P

FMC1_LA31_N

FMC1_LA33_P

FMC1_LA33_N

NC

NC

NC

NC

VCCO_HP_EXT

VCCO_HP_EXT

VCCO_HP_EXT

VCCO_HP_EXT

Page 62: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VADJ_4

LA32_N

LA32_P

LA30_N

LA30_P

LA28_N

LA28_P

LA24_N

LA24_P

LA21_N

LA21_P

LA19_N

LA19_P

LA15_N

LA15_P

LA11_N

LA11_P

LA07_N

LA07_P

LA04_N

LA04_P

LA02_N

LA02_P

CLK0_M2C_N

CLK0_M2C_P

PRSNT_M2C_L

VREF_A_M2C

VIO_B_M2C_1

HB18_N

HB18_P

HB15_N

HB15_P

HB11_N

HB11_P

HB07_N

HB07_P

HB01_N

HB01_P

HA22_N

HA22_P

HA18_N

HA18_P

HA14_N

HA14_P

HA11_N

HA11_P

HA07_N

HA07_P

HA03_N

HA03_P

CLK3_BIDIR_N

CLK3_BIDIR_P

VIO_B_M2C_2

HB17_N_CC

HB17_P_CC

HB14_N

HB14_P

HB10_N

HB10_P

HB06_N_CC

HB06_P_CC

HB00_N_CC

HB00_P_CC

HA23_N

HA23_P

HA21_N

HA21_P

HA17_N_CC

HA17_P_CC

HA10_N

HA10_P

HA06_N

HA06_P

HA02_N

HA02_P

CLK2_BIDIR_N

CLK2_BIDIR_P

VREF_B_M2C

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

FMC1 (ROWS H, J, K)

FMC1 INTERFACE

8362

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

NC

FMC1_HB14_N

FMC1_HB14_P

FMC1_PRSNT_M2C_L

FMC1_HA03_P

NC

NC

NC

NC

K40

K38

K37

K35

K34

K32

K31

K29

K28

K26

K25

K23

K22

K20

K19

K17

K16

K14

K13

K11

K10

K8

K7

K5

K4

K1

JA2 ASP_134486_01

J39

J37

J36

J34

J33

J31

J30

J28

J27

J25

J24

J22

J21

J19

J18

J16

J15

J13

J12

J10

J9

J7

J6

J3

J2

JA2 ASP_134486_01H40

H38

H37

H35

H34

H32

H31

H29

H28

H26

H25

H23

H22

H20

H19

H17

H16

H14

H13

H11

H10

H8

H7

H5

H4

H2

H1

JA2 ASP_134486_01

2

1 R1324.7K1/10W5%

FMC1_CLK0_M2C_N

FMC1_CLK0_M2C_P

FMC1_HA14_P

FMC1_HB15_P

FMC1_HB15_N

FMC1_HB11_P

FMC1_HB11_N

FMC1_HB07_P

FMC1_HB07_N

FMC1_HB01_P

FMC1_HB01_N

FMC1_HA14_N

FMC1_HA11_P

FMC1_HA11_N

FMC1_HA07_P

FMC1_HA07_N

FMC1_HA03_N

FMC1_HB10_P

FMC1_HB10_N

FMC1_HB06_CC_P

FMC1_HB06_CC_N

FMC1_HB00_CC_P

FMC1_HB00_CC_N

FMC1_HA10_P

FMC1_HA10_N

FMC1_HA06_P

FMC1_HA06_N

FMC1_HA02_P

FMC1_HA02_NFMC1_LA02_P

FMC1_LA02_N

FMC1_LA04_P

FMC1_LA04_N

FMC1_LA07_P

FMC1_LA07_N

FMC1_LA11_P

FMC1_LA11_N

FMC1_LA15_P

FMC1_LA15_N

FMC1_LA19_P

FMC1_LA19_N

FMC1_LA21_P

FMC1_LA21_N

FMC1_LA24_P

FMC1_LA24_N

FMC1_LA28_P

FMC1_LA28_N

FMC1_LA30_P

FMC1_LA30_N

FMC1_LA32_P

FMC1_LA32_N

NC

NC

NC

NC

NC

NC

NC

NC

NC

VCCO_HP_EXT

VCCO_HP_EXT

NC

NC

FMC1_CLK2_BIDIR_N

FMC1_CLK2_BIDIR_PFMC1_CLK3_BIDIR_N

FMC1_CLK3_BIDIR_P

NC

NC

Page 63: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

GND_1

GND_10

GND_100

GND_101

GND_102

GND_103

GND_104

GND_105

GND_106

GND_107

GND_108

GND_109

GND_11

GND_110

GND_111

GND_112

GND_113

GND_114

GND_115

GND_116

GND_117

GND_118

GND_119

GND_12

GND_120

GND_121

GND_122

GND_123

GND_124

GND_125

GND_126

GND_127

GND_128

GND_129

GND_13

GND_130

GND_131

GND_132

GND_133

GND_134

GND_135

GND_136

GND_137

GND_138

GND_139

GND_14

GND_140

GND_141

GND_142

GND_143

GND_144

GND_145

GND_146

GND_147

GND_148

GND_149

GND_15

GND_150

GND_151

GND_152

GND_153

GND_154

GND_155

GND_156

GND_157

GND_16

GND_17

GND_18

GND_19

GND_2

GND_20

GND_21

GND_22

GND_23

GND_24

GND_25

GND_26

GND_27

GND_28

GND_29

GND_3

GND_30

GND_31

GND_32

GND_33

GND_34

GND_35

GND_36

GND_37

GND_38

GND_39

GND_4

GND_40

GND_41

GND_42

GND_43

GND_44

GND_45

GND_46

GND_47

GND_48

GND_49

GND_5

GND_50

GND_51

GND_52

GND_53

GND_54

GND_55

GND_56

GND_57

GND_58

GND_59

GND_6

GND_60

GND_61

GND_62

GND_63

GND_64

GND_65

GND_66

GND_67

GND_68

GND_69

GND_7

GND_70

GND_71

GND_72

GND_73

GND_74

GND_75

GND_76

GND_77

GND_78

GND_79

GND_8

GND_80

GND_81

GND_82

GND_83

GND_84

GND_85

GND_86

GND_87

GND_88

GND_89

GND_9

GND_90

GND_91

GND_92

GND_93

GND_94

GND_95

GND_96

GND_97

GND_98

GND_99

GND_159

GND_158

GND_ST2

GND_ST1

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

FMC1 (GND)

FMC1 INTERFACE

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

63 83

GND

1

2

C27100PF500V

2

1 R171.0M1/10W

GND

K39

K36

K33

K30

K27

K24

K21

K18

K15

K12

K9

K6

K3

K2

J40

J38

J35

J32

J29

J26

J23

J20

J17

J14

J11

J8

J5

J4

J1

H39

H36

H33

H30

H27

H24

H21

H18

H15

H12

H9

H6

H3

G40

G38

G35

G32

G29

G26

G23

G20

G17

G14

G11

G8

G5

G4

G1

F39

F36

F33

F30

F27

F24

F21

F18

F15

F12

F9

F6

F3

F2

E40

E38

E35

E32

E29

E26

E23

E20

E17

E14

E11

E8

E5

E4

E1

D25

D22

D19

D16

D13

D10

D7

D6

D3

D2

C40

C38

C36

C33

C32

C29

C28

C25

C24

C21

C20

C17

C16

C13

C12

C9

C8

C5

C4

C1

B39

B38

B35

B34

B31

B30

B27

B26

B23

B22

B19

B18

B15

B14

B11

B10

B7

B6

B3

B2

A40

A37

A36

A33

A32

A29

A28

A25

A24

A21

A20

A17

A16

A13

A12

A9

A8

A5

A4

A1

D28

D37

D39

ST2

ST1

JA2ASP_134486_01

GND

1

2

C29100PF500V

2

1 R181.0M1/10W

GND

Page 64: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

DP5_C2M_N

DP5_C2M_P

DP4_C2M_N

DP4_C2M_P

DP3_C2M_N

DP3_C2M_P

DP2_C2M_N

DP2_C2M_P

DP1_C2M_N

DP1_C2M_P

DP5_M2C_N

DP5_M2C_P

DP4_M2C_N

DP4_M2C_P

DP3_M2C_N

DP3_M2C_P

DP2_M2C_N

DP2_M2C_P

DP1_M2C_N

DP1_M2C_P

DP6_C2M_P

DP7_C2M_N

DP7_C2M_P

DP8_C2M_N

DP8_C2M_P

DP9_C2M_N

DP9_C2M_P

GBTCLK1_M2C_N

GBTCLK1_M2C_P

DP6_M2C_P

DP7_M2C_N

DP7_M2C_P

DP8_M2C_N

DP8_M2C_P

DP9_M2C_N

DP6_C2M_N

DP9_M2C_P

RES0

CLK_DIR

DP6_M2C_N

3P3V_4

GA1

TRST_L

TMS

3P3VAUX

TDO

TDI

TCK

LA26_N

LA26_P

LA23_N

LA17_N_CC

LA17_P_CC

LA13_N

LA13_P

LA09_N

LA09_P

LA05_N

LA05_P

LA01_N_CC

LA01_P_CC

GBTCLK0_M2C_N

GBTCLK0_M2C_P

PG_C2M

LA23_P

3P3V_2

3P3V_3

3P3V_1

12P0V_2

12P0V_1

GA0

SDA

SCL

LA27_N

LA27_P

LA18_N_CC

LA18_P_CC

LA14_N

LA14_P

LA10_N

LA10_P

LA06_N

LA06_P

DP0_M2C_N

DP0_M2C_P

DP0_C2M_N

DP0_C2M_P

A

B

GND

OE

VCC

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

FMC GLOBAL ADDRESS BIT GA[0:1]

FMC2 DECOUPLING CAPS

FMC2 (ROWS A, B, C, D)

FMC2 INTERFACE

8364

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

FMC3_TDI

FMC2_TDI1

2

3

4

5

U17 SC70_5

NC7SZ66

FMC_TMS

FMC_TCK

FMC2_LA26_N

UTIL_3V3

UTIL_3V3

1

2

C2011UF25VX5R

UTIL_3V3

C39

C37

C35

C34

C31

C30

C27

C26

C23

C22

C19

C18

C15

C14

C11

C10

C7

C6

C3

C2

JA3 ASP_134486_01

D40

D35

D34

D33

D32

D31

D30

D29

D27

D26

D24

D21

D20

D18

D17

D15

D14

D12

D11

D9

D8

D5

D4

D1

D23

D36

D38

JA3 ASP_134486_01

B36

B33

B32

B29

B28

B25

B24

B21

B20

B16

B13

B12

B9

B8

B5

B37

B4

B40

B1

B17

JA3 ASP_134486_01

A39

A38

A35

A34

A31

A30

A27

A26

A23

A22

A19

A18

A15

A14

A11

A10

A7

A6

A3

A2

JA3 ASP_134486_01

1

2

C1991UF25VX5R

2

1 R18510.0K1/10W1%

VCC12_P

FMC2_I2C_SDA

FMC2_I2C_SCL

NC

NC

NC

NC

NC

NC

NC

FMC2_LA23_P

FMC2_LA01_CC_P

FMC2_LA01_CC_N

FMC2_LA05_P

FMC2_LA05_N

FMC2_LA09_P

FMC2_LA09_N

FMC2_LA13_P

FMC2_LA13_N

FMC2_LA17_CC_P

FMC2_LA17_CC_N

FMC2_LA23_N

FMC2_LA26_P

FMC2_LA06_P

FMC2_LA06_N

FMC2_LA10_P

FMC2_LA10_N

FMC2_LA14_P

FMC2_LA14_N

FMC2_LA18_CC_P

FMC2_LA18_CC_N

FMC2_LA27_P

FMC2_LA27_N

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

GND

VCC12_P

GND GND

GND

1

2

C5941UF25VX5R

GND

1

1

1

VCCO_HP_EXT

VCCO_HP_EXT

VCCO_HP_EXT

GND

FMC2_PRSNT_M2C_L

Page 65: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

HA01_P_CC

HA01_N_CC

HA05_P

HA05_N

HA09_P

HA09_N

HA13_P

HA13_N

HA16_P

HA16_N

HA20_P

HA20_N

HB03_P

HB03_N

HB05_P

HB05_N

HB09_P

HB09_N

HB13_P

HB13_N

HB19_P

HB19_N

HB21_P

HB21_N

VADJ_1

VADJ_2

HB20_N

HB20_P

HB16_N

HB16_P

HB12_N

HB12_P

HB08_N

HB08_P

HB04_N

HB04_P

HB02_N

HB02_P

HA19_N

HA19_P

HA15_N

HA15_P

HA12_N

HA12_P

HA08_N

HA08_P

HA04_N

HA04_P

HA00_N_CC

PG_M2C

HA00_P_CC

VADJ_3

LA33_N

LA33_P

LA31_N

LA31_P

LA29_N

LA29_P

LA25_N

LA25_P

LA22_N

LA22_P

LA20_N

LA20_P

LA16_N

LA16_P

LA12_N

LA12_P

LA08_N

LA08_P

LA03_N

LA03_P

LA00_N_CC

LA00_P_CC

CLK1_M2C_N

CLK1_M2C_P

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

FMC2 (ROWS E, F, G)

FMC2 INTERFACE

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

65 83

G39

G37

G36

G34

G33

G31

G30

G28

G27

G25

G24

G22

G21

G19

G18

G16

G15

G13

G12

G10

G9

G7

G6

G3

G2

JA3 ASP_134486_01

F40

F38

F37

F35

F34

F32

F31

F29

F28

F26

F25

F23

F22

F20

F19

F17

F16

F14

F13

F11

F10

F8

F7

F5

F1

F4

JA3 ASP_134486_01

E2

E3

E6

E7

E9

E10

E12

E13

E15

E16

E18

E19

E21

E22

E24

E25

E27

E28

E30

E31

E33

E34

E36

E37

E39

JA3 ASP_134486_01

2

1 R18610.0K1/10W1%

FMC2_HA00_CC_P

FMC2_HA00_CC_N

FMC2_CLK1_M2C_N

FMC2_CLK1_M2C_P

FMC2_HA15_P

FMC2_HA15_N

FMC2_HA12_P

FMC2_HA12_N

FMC2_HA08_P

FMC2_HA08_N

FMC2_HA04_P

FMC2_HA04_N

FMC2_HB13_P

FMC2_HB13_N

FMC2_HB09_P

FMC2_HB09_N

FMC2_HB05_P

FMC2_HB05_N

FMC2_HB03_P

FMC2_HB03_N

FMC2_HA16_P

FMC2_HA16_N

FMC2_HA13_P

FMC2_HA13_N

FMC2_HA09_P

FMC2_HA09_N

FMC2_HA05_P

FMC2_HA05_N

FMC2_HA01_CC_P

FMC2_HA01_CC_N

FMC2_LA00_CC_P

FMC2_LA00_CC_N

FMC2_LA03_P

FMC2_LA03_N

FMC2_LA08_P

FMC2_LA08_N

FMC2_LA12_P

FMC2_LA12_N

FMC2_LA16_P

FMC2_LA16_N

FMC2_LA20_P

FMC2_LA20_N

FMC2_LA22_P

FMC2_LA22_N

FMC2_LA25_P

FMC2_LA25_N

FMC2_LA29_P

FMC2_LA29_N

FMC2_LA31_P

FMC2_LA31_N

FMC2_LA33_P

FMC2_LA33_N

VCCO_HP_EXT

VCCO_HP_EXT

VCCO_HP_EXT

VCCO_HP_EXT

FMC2_HB02_N

FMC2_HB02_P

FMC2_HB04_N

FMC2_HB04_P

FMC2_HB08_N

FMC2_HB08_P

FMC2_HB12_N

FMC2_HB12_P

FMC2_HB16_P

FMC2_HB16_N

NC

NC

NC

NC

NC

NC

NC

NCNC

NC

Page 66: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VADJ_4

LA32_N

LA32_P

LA30_N

LA30_P

LA28_N

LA28_P

LA24_N

LA24_P

LA21_N

LA21_P

LA19_N

LA19_P

LA15_N

LA15_P

LA11_N

LA11_P

LA07_N

LA07_P

LA04_N

LA04_P

LA02_N

LA02_P

CLK0_M2C_N

CLK0_M2C_P

PRSNT_M2C_L

VREF_A_M2C

VIO_B_M2C_1

HB18_N

HB18_P

HB15_N

HB15_P

HB11_N

HB11_P

HB07_N

HB07_P

HB01_N

HB01_P

HA22_N

HA22_P

HA18_N

HA18_P

HA14_N

HA14_P

HA11_N

HA11_P

HA07_N

HA07_P

HA03_N

HA03_P

CLK3_BIDIR_N

CLK3_BIDIR_P

VIO_B_M2C_2

HB17_N_CC

HB17_P_CC

HB14_N

HB14_P

HB10_N

HB10_P

HB06_N_CC

HB06_P_CC

HB00_N_CC

HB00_P_CC

HA23_N

HA23_P

HA21_N

HA21_P

HA17_N_CC

HA17_P_CC

HA10_N

HA10_P

HA06_N

HA06_P

HA02_N

HA02_P

CLK2_BIDIR_N

CLK2_BIDIR_P

VREF_B_M2C

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

FMC2 (ROWS H, J, K)

FMC2 INTERFACE

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

66 83

NC

NC

NC

NC

FMC2_HB15_P

FMC2_HB15_N

FMC2_PRSNT_M2C_L

K40

K38

K37

K35

K34

K32

K31

K29

K28

K26

K25

K23

K22

K20

K19

K17

K16

K14

K13

K11

K10

K8

K7

K5

K4

K1

JA3 ASP_134486_01

J39

J37

J36

J34

J33

J31

J30

J28

J27

J25

J24

J22

J21

J19

J18

J16

J15

J13

J12

J10

J9

J7

J6

J3

J2

JA3 ASP_134486_01H40

H38

H37

H35

H34

H32

H31

H29

H28

H26

H25

H23

H22

H20

H19

H17

H16

H14

H13

H11

H10

H8

H7

H5

H4

H2

H1

JA3 ASP_134486_01

2

1 R1334.7K1/10W5%

NC

FMC2_CLK0_M2C_N

FMC2_CLK0_M2C_P

FMC2_HB11_P

FMC2_HB11_N

FMC2_HB07_P

FMC2_HB07_N

FMC2_HB01_P

FMC2_HB01_N

FMC2_HB14_P

FMC2_HB14_N

FMC2_HB10_P

FMC2_HB10_N

FMC2_HB06_CC_P

FMC2_HB06_CC_N

FMC2_HB00_CC_P

FMC2_HB00_CC_N

FMC2_HA10_P

FMC2_HA10_N

FMC2_HA06_P

FMC2_HA06_N

FMC2_HA02_P

FMC2_HA02_NFMC2_LA02_P

FMC2_LA02_N

FMC2_LA04_P

FMC2_LA04_N

FMC2_LA07_P

FMC2_LA07_N

FMC2_LA11_P

FMC2_LA11_N

FMC2_LA15_P

FMC2_LA15_N

FMC2_LA19_P

FMC2_LA19_N

FMC2_LA21_P

FMC2_LA21_N

FMC2_LA24_P

FMC2_LA24_N

FMC2_LA28_P

FMC2_LA28_N

FMC2_LA30_P

FMC2_LA30_N

FMC2_LA32_P

FMC2_LA32_N

NC

NC

VCCO_HP_EXT

VCCO_HP_EXT

FMC2_HA03_N

FMC2_HA03_P

FMC2_HA07_N

FMC2_HA07_P

FMC2_HA11_N

FMC2_HA11_P

FMC2_HA14_N

FMC2_HA14_P

NC

NCNC

NC NC

NCNC

NC

NC

NC

NC

FMC2_CLK3_BIDIR_N

FMC2_CLK3_BIDIR_P

FMC2_CLK2_BIDIR_N

FMC2_CLK2_BIDIR_P

Page 67: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

GND_1

GND_10

GND_100

GND_101

GND_102

GND_103

GND_104

GND_105

GND_106

GND_107

GND_108

GND_109

GND_11

GND_110

GND_111

GND_112

GND_113

GND_114

GND_115

GND_116

GND_117

GND_118

GND_119

GND_12

GND_120

GND_121

GND_122

GND_123

GND_124

GND_125

GND_126

GND_127

GND_128

GND_129

GND_13

GND_130

GND_131

GND_132

GND_133

GND_134

GND_135

GND_136

GND_137

GND_138

GND_139

GND_14

GND_140

GND_141

GND_142

GND_143

GND_144

GND_145

GND_146

GND_147

GND_148

GND_149

GND_15

GND_150

GND_151

GND_152

GND_153

GND_154

GND_155

GND_156

GND_157

GND_16

GND_17

GND_18

GND_19

GND_2

GND_20

GND_21

GND_22

GND_23

GND_24

GND_25

GND_26

GND_27

GND_28

GND_29

GND_3

GND_30

GND_31

GND_32

GND_33

GND_34

GND_35

GND_36

GND_37

GND_38

GND_39

GND_4

GND_40

GND_41

GND_42

GND_43

GND_44

GND_45

GND_46

GND_47

GND_48

GND_49

GND_5

GND_50

GND_51

GND_52

GND_53

GND_54

GND_55

GND_56

GND_57

GND_58

GND_59

GND_6

GND_60

GND_61

GND_62

GND_63

GND_64

GND_65

GND_66

GND_67

GND_68

GND_69

GND_7

GND_70

GND_71

GND_72

GND_73

GND_74

GND_75

GND_76

GND_77

GND_78

GND_79

GND_8

GND_80

GND_81

GND_82

GND_83

GND_84

GND_85

GND_86

GND_87

GND_88

GND_89

GND_9

GND_90

GND_91

GND_92

GND_93

GND_94

GND_95

GND_96

GND_97

GND_98

GND_99

GND_159

GND_158

GND_ST2

GND_ST1

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

FMC2 (GND)

FMC2 INTERFACE

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

67 83

K39

K36

K33

K30

K27

K24

K21

K18

K15

K12

K9

K6

K3

K2

J40

J38

J35

J32

J29

J26

J23

J20

J17

J14

J11

J8

J5

J4

J1

H39

H36

H33

H30

H27

H24

H21

H18

H15

H12

H9

H6

H3

G40

G38

G35

G32

G29

G26

G23

G20

G17

G14

G11

G8

G5

G4

G1

F39

F36

F33

F30

F27

F24

F21

F18

F15

F12

F9

F6

F3

F2

E40

E38

E35

E32

E29

E26

E23

E20

E17

E14

E11

E8

E5

E4

E1

D25

D22

D19

D16

D13

D10

D7

D6

D3

D2

C40

C38

C36

C33

C32

C29

C28

C25

C24

C21

C20

C17

C16

C13

C12

C9

C8

C5

C4

C1

B39

B38

B35

B34

B31

B30

B27

B26

B23

B22

B19

B18

B15

B14

B11

B10

B7

B6

B3

B2

A40

A37

A36

A33

A32

A29

A28

A25

A24

A21

A20

A17

A16

A13

A12

A9

A8

A5

A4

A1

D28

D37

D39

ST2

ST1

JA3ASP_134486_01

GND

GND

1

2

C41100PF500V

2

1 R211.0M1/10W

GND

1

2

C40100PF500V

2

1 R201.0M1/10W

GND

Page 68: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

A

B

GND

OE

VCC

DP6_C2M_P

DP7_C2M_N

DP7_C2M_P

DP8_C2M_N

DP8_C2M_P

DP9_C2M_N

DP9_C2M_P

GBTCLK1_M2C_N

GBTCLK1_M2C_P

DP6_M2C_P

DP7_M2C_N

DP7_M2C_P

DP8_M2C_N

DP8_M2C_P

DP9_M2C_N

DP6_C2M_N

DP9_M2C_P

RES0

CLK_DIR

DP6_M2C_N

3P3V_4

GA1

TRST_L

TMS

3P3VAUX

TDO

TDI

TCK

LA26_N

LA26_P

LA23_N

LA17_N_CC

LA17_P_CC

LA13_N

LA13_P

LA09_N

LA09_P

LA05_N

LA05_P

LA01_N_CC

LA01_P_CC

GBTCLK0_M2C_N

GBTCLK0_M2C_P

PG_C2M

LA23_P

3P3V_2

3P3V_3

3P3V_1

12P0V_2

12P0V_1

GA0

SDA

SCL

LA27_N

LA27_P

LA18_N_CC

LA18_P_CC

LA14_N

LA14_P

LA10_N

LA10_P

LA06_N

LA06_P

DP0_M2C_N

DP0_M2C_P

DP0_C2M_N

DP0_C2M_P

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

DP5_C2M_N

DP5_C2M_P

DP4_C2M_N

DP4_C2M_P

DP3_C2M_N

DP3_C2M_P

DP2_C2M_N

DP2_C2M_P

DP1_C2M_N

DP1_C2M_P

DP5_M2C_N

DP5_M2C_P

DP4_M2C_N

DP4_M2C_P

DP3_M2C_N

DP3_M2C_P

DP2_M2C_N

DP2_M2C_P

DP1_M2C_N

DP1_M2C_P

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

FMC GLOBAL ADDRESS BIT GA[0:1]

FMC3 INTERFACE

FMC3 (ROWS A, B, C, D)

FMC3 DECOUPLING CAPS

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

68 83

FMC3_TDI

FMC3_TDO

FMC_TCK

VCCO_HP_EXT

A39

A38

A35

A34

A31

A30

A27

A26

A23

A22

A19

A18

A15

A14

A11

A10

A7

A6

A3

A2

JA4 ASP_134486_01

UTIL_3V3

UTIL_3V3

1

2

C7151UF25VX5R

UTIL_3V3

C39

C37

C35

C34

C31

C30

C27

C26

C23

C22

C19

C18

C15

C14

C11

C10

C7

C6

C3

C2

JA4 ASP_134486_01

D40

D35

D34

D33

D32

D31

D30

D29

D27

D26

D24

D21

D20

D18

D17

D15

D14

D12

D11

D9

D8

D5

D4

D1

D23

D36

D38

JA4 ASP_134486_01

B36

B33

B32

B29

B28

B25

B24

B21

B20

B16

B13

B12

B9

B8

B5

B37

B4

B40

B1

B17

JA4 ASP_134486_01

1

2

C7141UF25VX5R

2

1 R35010.0K1/10W1%

VCC12_P

GND

VCC12_P

GND GND

GND

1

2

C7131UF25VX5R

GND

1

1

1

FMC3_I2C_SDA

FMC3_I2C_SCL

NC

NC

NC

NC

NC

NC

NC

FMC_TMS

FMC3_LA23_P

FMC3_LA01_CC_P

FMC3_LA01_CC_N

FMC3_LA05_P

FMC3_LA05_N

FMC3_LA09_P

FMC3_LA09_N

FMC3_LA13_P

FMC3_LA13_N

FMC3_LA17_CC_P

FMC3_LA17_CC_N

FMC3_LA23_N

FMC3_LA26_P

FMC3_LA26_N

FMC3_LA06_P

FMC3_LA06_N

FMC3_LA10_P

FMC3_LA10_N

FMC3_LA14_P

FMC3_LA14_N

FMC3_LA18_CC_P

FMC3_LA18_CC_N

FMC3_LA27_P

FMC3_LA27_N

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

VCCO_HP_EXT

1

2

3

4

5

U18 SC70_5

NC7SZ66

VCCO_HP_EXT

GND

FMC3_PRSNT_M2C_L

Page 69: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

HA01_P_CC

HA01_N_CC

HA05_P

HA05_N

HA09_P

HA09_N

HA13_P

HA13_N

HA16_P

HA16_N

HA20_P

HA20_N

HB03_P

HB03_N

HB05_P

HB05_N

HB09_P

HB09_N

HB13_P

HB13_N

HB19_P

HB19_N

HB21_P

HB21_N

VADJ_1

VADJ_2

HB20_N

HB20_P

HB16_N

HB16_P

HB12_N

HB12_P

HB08_N

HB08_P

HB04_N

HB04_P

HB02_N

HB02_P

HA19_N

HA19_P

HA15_N

HA15_P

HA12_N

HA12_P

HA08_N

HA08_P

HA04_N

HA04_P

HA00_N_CC

PG_M2C

HA00_P_CC

VADJ_3

LA33_N

LA33_P

LA31_N

LA31_P

LA29_N

LA29_P

LA25_N

LA25_P

LA22_N

LA22_P

LA20_N

LA20_P

LA16_N

LA16_P

LA12_N

LA12_P

LA08_N

LA08_P

LA03_N

LA03_P

LA00_N_CC

LA00_P_CC

CLK1_M2C_N

CLK1_M2C_P

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

FMC3 INTERFACE

FMC3 (ROWS E, F, G)

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

69 83

NC

NC

VCCO_HP_EXT

G39

G37

G36

G34

G33

G31

G30

G28

G27

G25

G24

G22

G21

G19

G18

G16

G15

G13

G12

G10

G9

G7

G6

G3

G2

JA4 ASP_134486_01

F40

F38

F37

F35

F34

F32

F31

F29

F28

F26

F25

F23

F22

F20

F19

F17

F16

F14

F13

F11

F10

F8

F7

F5

F1

F4

JA4 ASP_134486_01

E2

E3

E6

E7

E9

E10

E12

E13

E15

E16

E18

E19

E21

E22

E24

E25

E27

E28

E30

E31

E33

E34

E36

E37

E39

JA4 ASP_134486_01

2

1 R35110.0K1/10W1%

FMC3_HA00_CC_P

FMC3_HA00_CC_N

FMC3_CLK1_M2C_N

FMC3_CLK1_M2C_P

FMC3_HA15_P

FMC3_HA15_N

FMC3_HA12_P

FMC3_HA12_N

FMC3_HA08_P

FMC3_HA08_N

FMC3_HA04_P

FMC3_HA04_N

FMC3_HB12_P

FMC3_HB12_N

FMC3_HB08_P

FMC3_HB08_N

FMC3_HB04_P

FMC3_HB04_N

FMC3_HB02_P

FMC3_HB02_N

FMC3_HB13_P

FMC3_HB13_N

FMC3_HB09_P

FMC3_HB09_N

FMC3_HB05_P

FMC3_HB05_N

FMC3_HB03_P

FMC3_HB03_N

FMC3_HA13_P

FMC3_HA13_N

FMC3_HA09_P

FMC3_HA09_N

FMC3_HA05_P

FMC3_HA05_N

FMC3_HA01_CC_P

FMC3_HA01_CC_N

FMC3_LA00_CC_P

FMC3_LA00_CC_N

FMC3_LA03_P

FMC3_LA03_N

FMC3_LA08_P

FMC3_LA08_N

FMC3_LA12_P

FMC3_LA12_N

FMC3_LA16_P

FMC3_LA16_N

FMC3_LA20_P

FMC3_LA20_N

FMC3_LA22_P

FMC3_LA22_N

FMC3_LA25_P

FMC3_LA25_N

FMC3_LA29_P

FMC3_LA29_N

FMC3_LA31_P

FMC3_LA31_N

FMC3_LA33_P

FMC3_LA33_NVCCO_HP_EXT

VCCO_HP_EXT

VCCO_HP_EXT

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

Page 70: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

VADJ_4

LA32_N

LA32_P

LA30_N

LA30_P

LA28_N

LA28_P

LA24_N

LA24_P

LA21_N

LA21_P

LA19_N

LA19_P

LA15_N

LA15_P

LA11_N

LA11_P

LA07_N

LA07_P

LA04_N

LA04_P

LA02_N

LA02_P

CLK0_M2C_N

CLK0_M2C_P

PRSNT_M2C_L

VREF_A_M2C

VIO_B_M2C_1

HB18_N

HB18_P

HB15_N

HB15_P

HB11_N

HB11_P

HB07_N

HB07_P

HB01_N

HB01_P

HA22_N

HA22_P

HA18_N

HA18_P

HA14_N

HA14_P

HA11_N

HA11_P

HA07_N

HA07_P

HA03_N

HA03_P

CLK3_BIDIR_N

CLK3_BIDIR_P

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

VIO_B_M2C_2

HB17_N_CC

HB17_P_CC

HB14_N

HB14_P

HB10_N

HB10_P

HB06_N_CC

HB06_P_CC

HB00_N_CC

HB00_P_CC

HA23_N

HA23_P

HA21_N

HA21_P

HA17_N_CC

HA17_P_CC

HA10_N

HA10_P

HA06_N

HA06_P

HA02_N

HA02_P

CLK2_BIDIR_N

CLK2_BIDIR_P

VREF_B_M2C

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

FMC3 INTERFACE

FMC3 (ROWS H, J, K)

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

70 83

FMC3_CLK3_BIDIR_N

FMC3_CLK3_BIDIR_P

NC

NC

NC

NC

NC

NC

NC

NC

NC

K40

K38

K37

K35

K34

K32

K31

K29

K28

K26

K25

K23

K22

K20

K19

K17

K16

K14

K13

K11

K10

K8

K7

K5

K4

K1

JA4 ASP_134486_01

J39

J37

J36

J34

J33

J31

J30

J28

J27

J25

J24

J22

J21

J19

J18

J16

J15

J13

J12

J10

J9

J7

J6

J3

J2

JA4 ASP_134486_01H40

H38

H37

H35

H34

H32

H31

H29

H28

H26

H25

H23

H22

H20

H19

H17

H16

H14

H13

H11

H10

H8

H7

H5

H4

H2

H1

JA4 ASP_134486_01

2

1 R3024.7K1/10W5%

FMC3_PRSNT_M2C_L

FMC3_CLK0_M2C_N

FMC3_CLK0_M2C_P

FMC3_HA14_P

FMC3_HB11_P

FMC3_HB11_N

FMC3_HB07_P

FMC3_HB07_N

FMC3_HB01_P

FMC3_HB01_N

FMC3_HA14_N

FMC3_HA11_P

FMC3_HA11_N

FMC3_HA07_P

FMC3_HA07_N

FMC3_HA03_P

FMC3_HA03_N

FMC3_HB14_P

FMC3_HB14_N

FMC3_HB10_P

FMC3_HB10_N

FMC3_HB06_CC_P

FMC3_HB06_CC_N

FMC3_HB00_CC_P

FMC3_HB00_CC_N

FMC3_HA10_P

FMC3_HA10_N

FMC3_HA06_P

FMC3_HA06_N

FMC3_HA02_P

FMC3_HA02_NFMC3_LA02_P

FMC3_LA02_N

FMC3_LA04_P

FMC3_LA04_N

FMC3_LA07_P

FMC3_LA07_N

FMC3_LA11_P

FMC3_LA11_N

FMC3_LA15_P

FMC3_LA15_N

FMC3_LA19_P

FMC3_LA19_N

FMC3_LA21_P

FMC3_LA21_N

FMC3_LA24_P

FMC3_LA24_N

FMC3_LA28_P

FMC3_LA28_N

FMC3_LA30_P

FMC3_LA30_N

FMC3_LA32_P

FMC3_LA32_N

NC

NC

VCCO_HP_EXT

VCCO_HP_EXT

NC

NC

NCNC

NC

NC

NC

NC

NC

FMC3_CLK2_BIDIR_N

FMC3_CLK2_BIDIR_P

Page 71: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

GND_1

GND_10

GND_100

GND_101

GND_102

GND_103

GND_104

GND_105

GND_106

GND_107

GND_108

GND_109

GND_11

GND_110

GND_111

GND_112

GND_113

GND_114

GND_115

GND_116

GND_117

GND_118

GND_119

GND_12

GND_120

GND_121

GND_122

GND_123

GND_124

GND_125

GND_126

GND_127

GND_128

GND_129

GND_13

GND_130

GND_131

GND_132

GND_133

GND_134

GND_135

GND_136

GND_137

GND_138

GND_139

GND_14

GND_140

GND_141

GND_142

GND_143

GND_144

GND_145

GND_146

GND_147

GND_148

GND_149

GND_15

GND_150

GND_151

GND_152

GND_153

GND_154

GND_155

GND_156

GND_157

GND_16

GND_17

GND_18

GND_19

GND_2

GND_20

GND_21

GND_22

GND_23

GND_24

GND_25

GND_26

GND_27

GND_28

GND_29

GND_3

GND_30

GND_31

GND_32

GND_33

GND_34

GND_35

GND_36

GND_37

GND_38

GND_39

GND_4

GND_40

GND_41

GND_42

GND_43

GND_44

GND_45

GND_46

GND_47

GND_48

GND_49

GND_5

GND_50

GND_51

GND_52

GND_53

GND_54

GND_55

GND_56

GND_57

GND_58

GND_59

GND_6

GND_60

GND_61

GND_62

GND_63

GND_64

GND_65

GND_66

GND_67

GND_68

GND_69

GND_7

GND_70

GND_71

GND_72

GND_73

GND_74

GND_75

GND_76

GND_77

GND_78

GND_79

GND_8

GND_80

GND_81

GND_82

GND_83

GND_84

GND_85

GND_86

GND_87

GND_88

GND_89

GND_9

GND_90

GND_91

GND_92

GND_93

GND_94

GND_95

GND_96

GND_97

GND_98

GND_99

GND_159

GND_158

GND_ST2

GND_ST1

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

FMC3 INTERFACE

FMC3 GND

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

71 83

K39

K36

K33

K30

K27

K24

K21

K18

K15

K12

K9

K6

K3

K2

J40

J38

J35

J32

J29

J26

J23

J20

J17

J14

J11

J8

J5

J4

J1

H39

H36

H33

H30

H27

H24

H21

H18

H15

H12

H9

H6

H3

G40

G38

G35

G32

G29

G26

G23

G20

G17

G14

G11

G8

G5

G4

G1

F39

F36

F33

F30

F27

F24

F21

F18

F15

F12

F9

F6

F3

F2

E40

E38

E35

E32

E29

E26

E23

E20

E17

E14

E11

E8

E5

E4

E1

D25

D22

D19

D16

D13

D10

D7

D6

D3

D2

C40

C38

C36

C33

C32

C29

C28

C25

C24

C21

C20

C17

C16

C13

C12

C9

C8

C5

C4

C1

B39

B38

B35

B34

B31

B30

B27

B26

B23

B22

B19

B18

B15

B14

B11

B10

B7

B6

B3

B2

A40

A37

A36

A33

A32

A29

A28

A25

A24

A21

A20

A17

A16

A13

A12

A9

A8

A5

A4

A1

D28

D37

D39

ST2

ST1

JA4ASP_134486_01

GND

GND

1

2

C52100PF500V

2

1 R261.0M1/10W

GND

1

2

C50100PF500V

2

1 R221.0M1/10W

GND

Page 72: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

SELECT I/O TERMINATION

SELECT I/O TERMINATION - HR BANKS

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

72 83

IO_L12N_T1_MRCC_13

IO_L17P_T2_13

IO_L20P_T3_13

IO_L2N_T0_AD8N_12

IO_L2P_T0_AD8P_12

IO_L7P_T1_AD2P_12

IO_L11N_T1_SRCC_12

IO_L11P_T1_SRCC_12

IO_L24P_T3_13

IO_L16P_T2_A28_12

IO_L9P_T1_DQS_AD3P_12

IO_L24P_T3_RS1_12 IO_L21N_T3_DQS_13

IO_L22P_T3_13

IO_L22N_T3_13

IO_L20N_T3_A19_12

IO_L24N_T3_RS0_12

IO_L23P_T3_FOE_B_12

IO_L21N_T3_DQS_A18_12

IO_L21P_T3_DQS_12

IO_L10P_T1_13

IO_L2N_T0_13

IO_L8P_T1_13

IO_L24N_T3_13

IO_L16N_T2_A27_12

IO_L9N_T1_DQS_AD3N_12

IO_L21P_T3_DQS_13

IO_L18P_T2_A24_12

IO_L18N_T2_A23_12

IO_L19N_T3_A21_VREF_12

IO_L19P_T3_A22_12

IO_L20P_T3_A20_12

IO_L22P_T3_A17_12

IO_L23N_T3_FWE_B_12

IO_L22N_T3_A16_12

IO_L10N_T1_13

IO_L2P_T0_13

IO_L8N_T1_13

VTT_HR

VTT_HR

2

1 R18321001/10W

2

1 R18311001/10W

GND

VTT_HR

2

1 R18301001/10W

2

1 R18291001/10W

GND

VTT_HR

2

1 R18281001/10W

2

1 R18271001/10W

GND

VTT_HR

2

1 R18261001/10W

2

1 R18251001/10W

GND

VTT_HR

2

1 R18241001/10W

2

1 R18231001/10W

GND

VTT_HR

2

1 R18221001/10W

2

1 R18211001/10W

GND

VTT_HR

2

1 R18201001/10W

2

1 R18191001/10W

GND

VTT_HR

2

1 R18181001/10W

2

1 R18171001/10W

GND

VTT_HR

2

1 R18161001/10W

2

1 R18151001/10W

GND

VTT_HR

2

1 R18141001/10W

2

1 R18131001/10W

GND

VTT_HR

2

1 R18121001/10W

2

1 R18111001/10W

GND

VTT_HR

2

1 R18101001/10W

2

1 R18091001/10W

GND

VTT_HR

2

1 R18081001/10W

2

1 R18071001/10W

GND

VTT_HR

VTT_HR

2

1 R18061001/10W

2

1 R18051001/10W

2

1 R18041001/10W

2

1 R18031001/10W

GND GND

VTT_HR

2

1 R18021001/10W

2

1 R18011001/10W

GND

2

1 R18001001/10W

2

1 R17991001/10W

GND

VTT_HR

2

1 R17981001/10W

2

1 R17971001/10W

GND

VTT_HR

2

1 R17961001/10W

2

1 R17951001/10W

2

1 R17941001/10W

2

1 R17931001/10W

GND GND

VTT_HR VTT_HR

2

1 R17921001/10W

2

1 R17911001/10W

GND

VTT_HR

2

1 R17901001/10W

2

1 R17891001/10W

2

1 R17881001/10W

2

1 R17871001/10W

GND GND

VTT_HR VTT_HR

2

1 R17861001/10W

2

1 R17851001/10W

GND

VTT_HR

2

1 R17841001/10W

2

1 R17831001/10W

2

1 R17821001/10W

2

1 R17811001/10W

GND GND

VTT_HR VTT_HR

2

1 R17801001/10W

2

1 R17791001/10W

2

1 R17781001/10W

2

1 R17771001/10W

GND GND

VTT_HR VTT_HR

2

1 R17761001/10W

2

1 R17751001/10W

2

1 R17741001/10W

2

1 R17731001/10W

GND GND

VTT_HR

2

1 R17721001/10W

2

1 R17711001/10W

2

1 R17701001/10W

2

1 R17691001/10W

GND GND

VTT_HR VTT_HR

2

1 R17681001/10W

2

1 R17671001/10W

GND

VTT_HR

2

1 R17661001/10W

2

1 R17651001/10W

2

1 R17641001/10W

2

1 R17631001/10W

GND GND

VTT_HR VTT_HR

2

1 R17621001/10W

2

1 R17611001/10W

GND

VTT_HR

2

1 R17601001/10W

2

1 R17591001/10W

2

1 R17581001/10W

2

1 R17571001/10W

GND GND

VTT_HR VTT_HR

Page 73: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

SELECT I/O TERMINATION

SELECT I/O TERMINATION - HR BANKS

8373

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

IO_L3N_T0_DQS_13

IO_L1P_T0_AD0P_12

IO_L3P_T0_DQS_AD1P_12

IO_L5N_T0_AD9N_12

IO_L6N_T0_VREF_13

IO_L1N_T0_13

IO_L1P_T0_13

IO_L9N_T1_DQS_13

IO_L14P_T2_SRCC_13

IO_L7P_T1_13

IO_L3P_T0_DQS_13

IO_L13P_T2_MRCC_13

IO_L13N_T2_MRCC_13

IO_L1N_T0_AD0N_12

IO_L3N_T0_DQS_AD1N_12

IO_L5P_T0_AD9P_12

IO_L19N_T3_VREF_13

IO_L11P_T1_SRCC_13

IO_L11N_T1_SRCC_13

IO_L16P_T2_13

IO_L6P_T0_12

IO_L4N_T0_12

IO_L17N_T2_13

IO_L15P_T2_DQS_13

IO_L15N_T2_DQS_13

IO_L20N_T3_13

IO_L18P_T2_13

IO_L18N_T2_13

IO_L7N_T1_AD2N_12

IO_L10P_T1_AD11P_12

IO_L10N_T1_AD11N_12

IO_L12P_T1_MRCC_12

IO_L12N_T1_MRCC_12

IO_L19P_T3_13

IO_L16N_T2_13

IO_L6N_T0_VREF_12

IO_L12P_T1_MRCC_13

IO_L4P_T0_12

2

1 R19081001/10W

2

1 R19071001/10W

GND

VTT_HR

2

1 R19061001/10W

2

1 R19051001/10W

GND

VTT_HR

2

1 R19041001/10W

2

1 R19031001/10W

GND

VTT_HR

2

1 R19021001/10W

2

1 R19011001/10W

GND

VTT_HR

2

1 R19001001/10W

2

1 R18991001/10W

GND

VTT_HR

2

1 R18981001/10W

2

1 R18971001/10W

GND

VTT_HR

2

1 R18961001/10W

2

1 R18951001/10W

GND

VTT_HR

2

1 R18941001/10W

2

1 R18931001/10W

GND

VTT_HR

2

1 R18921001/10W

2

1 R18911001/10W

GND

VTT_HR

2

1 R18901001/10W

2

1 R18891001/10W

GND

VTT_HR

2

1 R18881001/10W

2

1 R18871001/10W

GND

VTT_HR

2

1 R18861001/10W

2

1 R18851001/10W

GND

VTT_HR

2

1 R18841001/10W

2

1 R18831001/10W

GND

VTT_HR

VTT_HR VTT_HR

2

1 R18821001/10W

2

1 R18811001/10W

2

1 R18801001/10W

2

1 R18791001/10W

GND GND

VTT_HR

2

1 R18781001/10W

2

1 R18771001/10W

GND

2

1 R18761001/10W

2

1 R18751001/10W

GND

VTT_HR

2

1 R18741001/10W

2

1 R18731001/10W

GND

VTT_HR

2

1 R18721001/10W

2

1 R18711001/10W

2

1 R18701001/10W

2

1 R18691001/10W

GND GND

VTT_HR VTT_HR

2

1 R18681001/10W

2

1 R18671001/10W

GND

VTT_HR

2

1 R18661001/10W

2

1 R18651001/10W

2

1 R18641001/10W

2

1 R18631001/10W

GND GND

VTT_HR VTT_HR

2

1 R18621001/10W

2

1 R18611001/10W

GND

VTT_HR

2

1 R18601001/10W

2

1 R18591001/10W

2

1 R18581001/10W

2

1 R18571001/10W

GND GND

VTT_HR VTT_HR

2

1 R18561001/10W

2

1 R18551001/10W

2

1 R18541001/10W

2

1 R18531001/10W

GND GND

VTT_HR VTT_HR

2

1 R18521001/10W

2

1 R18511001/10W

2

1 R18501001/10W

2

1 R18491001/10W

GND GND

VTT_HR VTT_HR

2

1 R18481001/10W

2

1 R18471001/10W

2

1 R18461001/10W

2

1 R18451001/10W

GND GND

VTT_HR VTT_HR

2

1 R18441001/10W

2

1 R18431001/10W

GND

VTT_HR

2

1 R18421001/10W

2

1 R18411001/10W

2

1 R18401001/10W

2

1 R18391001/10W

GND GND

VTT_HR VTT_HR

2

1 R18381001/10W

2

1 R18371001/10W

GND

VTT_HR

2

1 R18361001/10W

2

1 R18351001/10W

2

1 R18341001/10W

2

1 R18331001/10W

GND GND

VTT_HR VTT_HR

Page 74: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

SELECT I/O TERMINATION

SELECT I/O TERMINATION - HR BANKS

PLACE ONE 100UF CAP FOR EVERY 25 TERMINATED I/O SIGNALS.PLACE ONE 1UF CAP FOR EVERY 4 TERMINATED I/O SIGNALS.

DISTRIBUTE THE CAPS EVENLY WITH RESPECT TO THE TERMINATIONRESISTORS.

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

74 83

1

2

C12951UF16VX5R

1

2

C1161100UF6.3VX5R

1

2

C1163100UF6.3VX5R

1

2

C1162100UF6.3VX5R

1

1

2

C1160100UF6.3VX5R

1

2

C7731UF16VX5R

1

2

C1131UF16VX5R

1

2

C1081UF16VX5R

1

2

C11891UF16VX5R

1

2

C11871UF16VX5R

1

2

C11941UF16VX5R

1

2

C11961UF16VX5R

1

2

C11951UF16VX5R

1

2

C11931UF16VX5R

1

2

C11971UF16VX5R

1

2

C11911UF16VX5R

1

2

C11861UF16VX5R

1

2

C11881UF16VX5R

1

2

C11901UF16VX5R

1

2

C11851UF16VX5R

1

2

C11921UF16VX5R

1

2

C1151UF16VX5R

1

2

C1101UF16VX5R

1

2

C7741UF16VX5R

1

2

C1141UF16VX5R

1

2

C1091UF16VX5R

1

VTT_HR

IO_L17P_T2_A26_12

IO_L13P_T2_MRCC_12

IO_L8N_T1_AD10N_12

IO_L15N_T2_DQS_ADV_B_12

IO_L14P_T2_SRCC_12

IO_L14N_T2_SRCC_12

IO_L17N_T2_A25_12

IO_L13N_T2_MRCC_12

IO_L8P_T1_AD10P_12

IO_L23P_T3_13

IO_L23N_T3_13

IO_L15P_T2_DQS_12

IO_L6P_T0_13

IO_L4N_T0_13

IO_L4P_T0_13

IO_L9P_T1_DQS_13

IO_L14N_T2_SRCC_13

IO_L7N_T1_13

IO_L5P_T0_13

IO_L5N_T0_13

VTT_HR VTT_HR

2

1 R19481001/10W

2

1 R19471001/10W

2

1 R19461001/10W

2

1 R19451001/10W

GND GND

VTT_HR

2

1 R19441001/10W

2

1 R19431001/10W

GND

2

1 R19421001/10W

2

1 R19411001/10W

GND

VTT_HR

2

1 R19401001/10W

2

1 R19391001/10W

GND

VTT_HR

2

1 R19381001/10W

2

1 R19371001/10W

2

1 R19361001/10W

2

1 R19351001/10W

GND GND

VTT_HR VTT_HR

2

1 R19341001/10W

2

1 R19331001/10W

GND

VTT_HR

2

1 R19321001/10W

2

1 R19311001/10W

2

1 R19301001/10W

2

1 R19291001/10W

GND GND

VTT_HR VTT_HR

2

1 R19281001/10W

2

1 R19271001/10W

GND

VTT_HR

2

1 R19261001/10W

2

1 R19251001/10W

GND

VTT_HR

2

1 R19241001/10W

2

1 R19231001/10W

GND

VTT_HR

2

1 R19221001/10W

2

1 R19211001/10W

GND

VTT_HR

2

1 R19201001/10W

2

1 R19191001/10W

GND

VTT_HR

2

1 R19181001/10W

2

1 R19171001/10W

GND

VTT_HR

2

1 R19161001/10W

2

1 R19151001/10W

2

1 R19141001/10W

2

1 R19131001/10W

GND GND

VTT_HR VTT_HR

2

1 R19121001/10W

2

1 R19111001/10W

GND

VTT_HR

2

1 R19101001/10W

2

1 R19091001/10W

GND

VTT_HR

GND

VTT_HR

GND

VTT_HR

GND

GND

VTT_HR

1

2

C12961UF16VX5R

1

2

C12971UF16VX5R

Page 75: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

SELECT I/O TERMINATION - HP BANKS

SELECT I/O TERMINATION

8375

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

IO_L10N_T1_33

IO_L10P_T1_33

IO_L22N_T3_33

IO_L24P_T3_33

IO_L24N_T3_33

IO_L8N_T1_33

IO_L13P_T2_MRCC_33

IO_L13N_T2_MRCC_33

IO_L16P_T2_33

IO_L16N_T2_33

IO_L12P_T1_MRCC_33

IO_L4N_T0_33

IO_L4P_T0_33

IO_L2N_T0_33

IO_L19P_T3_33

IO_L1P_T0_33

IO_L19N_T3_VREF_33

IO_L12N_T1_MRCC_33

IO_L18P_T2_33

IO_L21N_T3_DQS_33

IO_L14N_T2_SRCC_33

IO_L14P_T2_SRCC_33

IO_L18N_T2_33

IO_L7P_T1_33

IO_L7N_T1_33

IO_L9N_T1_DQS_33

IO_L17N_T2_33

IO_L17P_T2_33

IO_L15N_T2_DQS_33

IO_L20N_T3_33

IO_L20P_T3_33

IO_L22P_T3_33

IO_L9P_T1_DQS_33

IO_L11N_T1_SRCC_33

IO_L11P_T1_SRCC_33

IO_L6N_T0_VREF_33

IO_L6P_T0_33

IO_L8P_T1_33

2

1 R20241001/10W

2

1 R20231001/10W

GND

VTT_HP

2

1 R20221001/10W

2

1 R20211001/10W

GND

VTT_HP

2

1 R20201001/10W

2

1 R20191001/10W

GND

VTT_HP

2

1 R20181001/10W

2

1 R20171001/10W

GND

VTT_HP

2

1 R20161001/10W

2

1 R20151001/10W

GND

VTT_HP

2

1 R20141001/10W

2

1 R20131001/10W

GND

VTT_HP

2

1 R20121001/10W

2

1 R20111001/10W

GND

VTT_HP

2

1 R20101001/10W

2

1 R20091001/10W

GND

VTT_HP

2

1 R20081001/10W

2

1 R20071001/10W

GND

VTT_HP

2

1 R20061001/10W

2

1 R20051001/10W

GND

VTT_HP

2

1 R20041001/10W

2

1 R20031001/10W

GND

VTT_HP

2

1 R20021001/10W

2

1 R20011001/10W

GND

VTT_HP

2

1 R20001001/10W

2

1 R19991001/10W

GND

VTT_HP

VTT_HP VTT_HP

2

1 R19981001/10W

2

1 R19971001/10W

2

1 R19961001/10W

2

1 R19951001/10W

GND GND

VTT_HP

2

1 R19941001/10W

2

1 R19931001/10W

GND

2

1 R19921001/10W

2

1 R19911001/10W

GND

VTT_HP

2

1 R19901001/10W

2

1 R19891001/10W

GND

VTT_HP

2

1 R19881001/10W

2

1 R19871001/10W

2

1 R19861001/10W

2

1 R19851001/10W

GND GND

VTT_HP VTT_HP

2

1 R19841001/10W

2

1 R19831001/10W

GND

VTT_HP

2

1 R19821001/10W

2

1 R19811001/10W

2

1 R19801001/10W

2

1 R19791001/10W

GND GND

VTT_HP VTT_HP

2

1 R19781001/10W

2

1 R19771001/10W

GND

VTT_HP

2

1 R19761001/10W

2

1 R19751001/10W

2

1 R19741001/10W

2

1 R19731001/10W

GND GND

VTT_HP VTT_HP

2

1 R19721001/10W

2

1 R19711001/10W

2

1 R19701001/10W

2

1 R19691001/10W

GND GND

VTT_HP VTT_HP

2

1 R19681001/10W

2

1 R19671001/10W

2

1 R19661001/10W

2

1 R19651001/10W

GND GND

VTT_HP VTT_HP

2

1 R19641001/10W

2

1 R19631001/10W

2

1 R19621001/10W

2

1 R19611001/10W

GND GND

VTT_HP VTT_HP

2

1 R19601001/10W

2

1 R19591001/10W

GND

VTT_HP

2

1 R19581001/10W

2

1 R19571001/10W

2

1 R19561001/10W

2

1 R19551001/10W

GND GND

VTT_HP VTT_HP

2

1 R19541001/10W

2

1 R19531001/10W

GND

VTT_HP

2

1 R19521001/10W

2

1 R19511001/10W

2

1 R19501001/10W

2

1 R19491001/10W

GND GND

VTT_HP VTT_HP

Page 76: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

SELECT I/O TERMINATION - HP BANKS

SELECT I/O TERMINATION

8376

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

IO_L21P_T3_DQS_18

IO_L21N_T3_DQS_37

IO_L13N_T2_MRCC_19

IO_L13P_T2_MRCC_19

IO_L10N_T1_19

IO_L10P_T1_19

IO_L3P_T0_DQS_19

IO_L3N_T0_DQS_19

IO_L19N_T3_VREF_37

IO_L19P_T3_37

IO_L11N_T1_SRCC_19

IO_L11P_T1_SRCC_19

IO_L14P_T2_SRCC_18

IO_L24N_T3_37

IO_L9N_T1_DQS_19

IO_L5P_T0_19

IO_L9P_T1_DQS_AD3P_18

IO_L9N_T1_DQS_AD3N_18

IO_L6P_T0_18

IO_L17P_T2_19

IO_L22P_T3_A17_18

IO_L24N_T3_RS0_18

IO_L2P_T0_33

IO_L5P_T0_33

IO_L5N_T0_33

IO_L1N_T0_33

IO_L3P_T0_DQS_33

IO_L3N_T0_DQS_33

IO_L21P_T3_DQS_33

IO_L23N_T3_33

IO_L23P_T3_33

IO_L1P_T0_AD0P_18

IO_L1N_T0_AD0N_18

IO_L4P_T0_18

IO_L17N_T2_19

IO_L8P_T1_AD10P_18

IO_L8N_T1_AD10N_18

IO_L15P_T2_DQS_33

2

1 R21001001/10W

2

1 R20991001/10W

GND

VTT_HP

2

1 R20981001/10W

2

1 R20971001/10W

GND

VTT_HP

2

1 R20961001/10W

2

1 R20951001/10W

GND

VTT_HP

2

1 R20941001/10W

2

1 R20931001/10W

GND

VTT_HP

2

1 R20921001/10W

2

1 R20911001/10W

GND

VTT_HP

2

1 R20901001/10W

2

1 R20891001/10W

GND

VTT_HP

2

1 R20881001/10W

2

1 R20871001/10W

GND

VTT_HP

2

1 R20861001/10W

2

1 R20851001/10W

GND

VTT_HP

2

1 R20841001/10W

2

1 R20831001/10W

GND

VTT_HP

2

1 R20821001/10W

2

1 R20811001/10W

GND

VTT_HP

2

1 R20801001/10W

2

1 R20791001/10W

GND

VTT_HP

2

1 R20781001/10W

2

1 R20771001/10W

GND

VTT_HP

2

1 R20761001/10W

2

1 R20751001/10W

GND

VTT_HP

VTT_HP VTT_HP

2

1 R20741001/10W

2

1 R20731001/10W

2

1 R20721001/10W

2

1 R20711001/10W

GND GND

VTT_HP

2

1 R20701001/10W

2

1 R20691001/10W

GND

2

1 R20681001/10W

2

1 R20671001/10W

GND

VTT_HP

2

1 R20661001/10W

2

1 R20651001/10W

GND

VTT_HP

2

1 R20641001/10W

2

1 R20631001/10W

2

1 R20621001/10W

2

1 R20611001/10W

GND GND

VTT_HP VTT_HP

2

1 R20601001/10W

2

1 R20591001/10W

GND

VTT_HP

2

1 R20581001/10W

2

1 R20571001/10W

2

1 R20561001/10W

2

1 R20551001/10W

GND GND

VTT_HP VTT_HP

2

1 R20541001/10W

2

1 R20531001/10W

GND

VTT_HP

2

1 R20521001/10W

2

1 R20511001/10W

2

1 R20501001/10W

2

1 R20491001/10W

GND GND

VTT_HP VTT_HP

2

1 R20481001/10W

2

1 R20471001/10W

2

1 R20461001/10W

2

1 R20451001/10W

GND GND

VTT_HP VTT_HP

2

1 R20441001/10W

2

1 R20431001/10W

2

1 R20421001/10W

2

1 R20411001/10W

GND GND

VTT_HP VTT_HP

2

1 R20401001/10W

2

1 R20391001/10W

2

1 R20381001/10W

2

1 R20371001/10W

GND GND

VTT_HP VTT_HP

2

1 R20361001/10W

2

1 R20351001/10W

GND

VTT_HP

2

1 R20341001/10W

2

1 R20331001/10W

2

1 R20321001/10W

2

1 R20311001/10W

GND GND

VTT_HP VTT_HP

2

1 R20301001/10W

2

1 R20291001/10W

GND

VTT_HP

2

1 R20281001/10W

2

1 R20271001/10W

2

1 R20261001/10W

2

1 R20251001/10W

GND GND

VTT_HP VTT_HP

Page 77: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

SELECT I/O TERMINATION - HP BANKS

SELECT I/O TERMINATION

8377

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

IO_L12P_T1_MRCC_17

IO_L12N_T1_MRCC_17

IO_L7N_T1_17

IO_L15P_T2_DQS_17

IO_L22N_T3_17

IO_L22P_T3_17

IO_L8N_T1_17

IO_L6P_T0_17

IO_L6N_T0_VREF_17

IO_L5N_T0_17

IO_L5P_T0_17

IO_L8P_T1_17

IO_L20N_T3_17

IO_L20P_T3_17

IO_L15N_T2_DQS_17

IO_L10P_T1_17

IO_L10N_T1_17

IO_L1P_T0_17

IO_L13P_T2_MRCC_17

IO_L9P_T1_DQS_17

IO_L9N_T1_DQS_17

IO_L4N_T0_17

IO_L3P_T0_DQS_17

IO_L3N_T0_DQS_17

IO_L2N_T0_17

IO_L2P_T0_17

IO_L4P_T0_17

IO_L16P_T2_17

IO_L16N_T2_17

IO_L13N_T2_MRCC_17

IO_L18N_T2_19

IO_L18P_T2_19

IO_L11N_T1_SRCC_18

IO_L11P_T1_SRCC_18

IO_L13P_T2_MRCC_18

IO_L13N_T2_MRCC_18

IO_L23P_T3_FOE_B_18

IO_L23N_T3_FWE_B_18

2

1 R21761001/10W

2

1 R21751001/10W

GND

VTT_HP

2

1 R21741001/10W

2

1 R21731001/10W

GND

VTT_HP

2

1 R21721001/10W

2

1 R21711001/10W

GND

VTT_HP

2

1 R21701001/10W

2

1 R21691001/10W

GND

VTT_HP

2

1 R21681001/10W

2

1 R21671001/10W

GND

VTT_HP

2

1 R21661001/10W

2

1 R21651001/10W

GND

VTT_HP

2

1 R21641001/10W

2

1 R21631001/10W

GND

VTT_HP

2

1 R21621001/10W

2

1 R21611001/10W

GND

VTT_HP

2

1 R21601001/10W

2

1 R21591001/10W

GND

VTT_HP

2

1 R21581001/10W

2

1 R21571001/10W

GND

VTT_HP

2

1 R21561001/10W

2

1 R21551001/10W

GND

VTT_HP

2

1 R21541001/10W

2

1 R21531001/10W

GND

VTT_HP

2

1 R21521001/10W

2

1 R21511001/10W

GND

VTT_HP

VTT_HP VTT_HP

2

1 R21501001/10W

2

1 R21491001/10W

2

1 R21481001/10W

2

1 R21471001/10W

GND GND

VTT_HP

2

1 R21461001/10W

2

1 R21451001/10W

GND

2

1 R21441001/10W

2

1 R21431001/10W

GND

VTT_HP

2

1 R21421001/10W

2

1 R21411001/10W

GND

VTT_HP

2

1 R21401001/10W

2

1 R21391001/10W

2

1 R21381001/10W

2

1 R21371001/10W

GND GND

VTT_HP VTT_HP

2

1 R21361001/10W

2

1 R21351001/10W

GND

VTT_HP

2

1 R21341001/10W

2

1 R21331001/10W

2

1 R21321001/10W

2

1 R21311001/10W

GND GND

VTT_HP VTT_HP

2

1 R21301001/10W

2

1 R21291001/10W

GND

VTT_HP

2

1 R21281001/10W

2

1 R21271001/10W

2

1 R21261001/10W

2

1 R21251001/10W

GND GND

VTT_HP VTT_HP

2

1 R21241001/10W

2

1 R21231001/10W

2

1 R21221001/10W

2

1 R21211001/10W

GND GND

VTT_HP VTT_HP

2

1 R21201001/10W

2

1 R21191001/10W

2

1 R21181001/10W

2

1 R21171001/10W

GND GND

VTT_HP VTT_HP

2

1 R21161001/10W

2

1 R21151001/10W

2

1 R21141001/10W

2

1 R21131001/10W

GND GND

VTT_HP VTT_HP

2

1 R21121001/10W

2

1 R21111001/10W

GND

VTT_HP

2

1 R21101001/10W

2

1 R21091001/10W

2

1 R21081001/10W

2

1 R21071001/10W

GND GND

VTT_HP VTT_HP

2

1 R21061001/10W

2

1 R21051001/10W

GND

VTT_HP

2

1 R21041001/10W

2

1 R21031001/10W

2

1 R21021001/10W

2

1 R21011001/10W

GND GND

VTT_HP VTT_HP

Page 78: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

SELECT I/O TERMINATION - HP BANKS

SELECT I/O TERMINATION

8378

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

IO_L20P_T3_A20_18

IO_L19P_T3_A22_18

IO_L10P_T1_AD11P_18

IO_L10N_T1_AD11N_18

IO_L22N_T3_A16_18

IO_L18P_T2_A24_18

IO_L18N_T2_A23_18

IO_L24P_T3_37

IO_L6N_T0_VREF_18

IO_L2N_T0_AD8N_18

IO_L2P_T0_AD8P_18

IO_L21N_T3_DQS_A18_18

IO_L19N_T3_A21_VREF_18

IO_L24P_T3_RS1_18

IO_L7P_T1_17

IO_L14P_T2_SRCC_17

IO_L14N_T2_SRCC_17

IO_L21N_T3_DQS_17

IO_L18N_T2_17

IO_L18P_T2_17

IO_L17N_T2_17

IO_L17P_T2_17

IO_L21P_T3_DQS_17

IO_L4N_T0_18

IO_L12N_T1_MRCC_18

IO_L12P_T1_MRCC_18

IO_L14N_T2_SRCC_18

IO_L16P_T2_A28_18

IO_L16N_T2_A27_18

IO_L1N_T0_17

IO_L11N_T1_SRCC_17

IO_L11P_T1_SRCC_17

IO_L19N_T3_VREF_17

IO_L23P_T3_17

IO_L23N_T3_17

IO_L24N_T3_17

IO_L24P_T3_17

IO_L19P_T3_17

2

1 R22521001/10W

2

1 R22511001/10W

GND

VTT_HP

2

1 R22501001/10W

2

1 R22491001/10W

GND

VTT_HP

2

1 R22481001/10W

2

1 R22471001/10W

GND

VTT_HP

2

1 R22461001/10W

2

1 R22451001/10W

GND

VTT_HP

2

1 R22441001/10W

2

1 R22431001/10W

GND

VTT_HP

2

1 R22421001/10W

2

1 R22411001/10W

GND

VTT_HP

2

1 R22401001/10W

2

1 R22391001/10W

GND

VTT_HP

2

1 R22381001/10W

2

1 R22371001/10W

GND

VTT_HP

2

1 R22361001/10W

2

1 R22351001/10W

GND

VTT_HP

2

1 R22341001/10W

2

1 R22331001/10W

GND

VTT_HP

2

1 R22321001/10W

2

1 R22311001/10W

GND

VTT_HP

2

1 R22301001/10W

2

1 R22291001/10W

GND

VTT_HP

2

1 R22281001/10W

2

1 R22271001/10W

GND

VTT_HP

VTT_HP VTT_HP

2

1 R22261001/10W

2

1 R22251001/10W

2

1 R22241001/10W

2

1 R22231001/10W

GND GND

VTT_HP

2

1 R22221001/10W

2

1 R22211001/10W

GND

2

1 R22201001/10W

2

1 R22191001/10W

GND

VTT_HP

2

1 R22181001/10W

2

1 R22171001/10W

GND

VTT_HP

2

1 R22161001/10W

2

1 R22151001/10W

2

1 R22141001/10W

2

1 R22131001/10W

GND GND

VTT_HP VTT_HP

2

1 R22121001/10W

2

1 R22111001/10W

GND

VTT_HP

2

1 R22101001/10W

2

1 R22091001/10W

2

1 R22081001/10W

2

1 R22071001/10W

GND GND

VTT_HP VTT_HP

2

1 R22061001/10W

2

1 R22051001/10W

GND

VTT_HP

2

1 R22041001/10W

2

1 R22031001/10W

2

1 R22021001/10W

2

1 R22011001/10W

GND GND

VTT_HP VTT_HP

2

1 R22001001/10W

2

1 R21991001/10W

2

1 R21981001/10W

2

1 R21971001/10W

GND GND

VTT_HP VTT_HP

2

1 R21961001/10W

2

1 R21951001/10W

2

1 R21941001/10W

2

1 R21931001/10W

GND GND

VTT_HP VTT_HP

2

1 R21921001/10W

2

1 R21911001/10W

2

1 R21901001/10W

2

1 R21891001/10W

GND GND

VTT_HP VTT_HP

2

1 R21881001/10W

2

1 R21871001/10W

GND

VTT_HP

2

1 R21861001/10W

2

1 R21851001/10W

2

1 R21841001/10W

2

1 R21831001/10W

GND GND

VTT_HP VTT_HP

2

1 R21821001/10W

2

1 R21811001/10W

GND

VTT_HP

2

1 R21801001/10W

2

1 R21791001/10W

2

1 R21781001/10W

2

1 R21771001/10W

GND GND

VTT_HP VTT_HP

Page 79: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

SELECT I/O TERMINATION - HP BANKS

SELECT I/O TERMINATION

8379

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

IO_L22P_T3_38

IO_L22N_T3_38

IO_L20P_T3_38

IO_L8N_T1_37

IO_L20N_T3_37

IO_L20P_T3_37

IO_L13N_T2_MRCC_37

IO_L14N_T2_SRCC_37

IO_L14P_T2_SRCC_37

IO_L11P_T1_SRCC_37

IO_L11N_T1_SRCC_37

IO_L12P_T1_MRCC_37

IO_L19N_T3_VREF_38

IO_L24N_T3_38

IO_L24P_T3_38

IO_L9P_T1_DQS_37

IO_L9N_T1_DQS_37

IO_L7N_T1_37

IO_L12N_T1_MRCC_37

IO_L3N_T0_DQS_AD1N_18

IO_L3P_T0_DQS_AD1P_18

IO_L15N_T2_DQS_ADV_B_18

IO_L17P_T2_A26_18

IO_L17N_T2_A25_18

IO_L4P_T0_19

IO_L4N_T0_19

IO_L24P_T3_19

IO_L7P_T1_AD2P_18

IO_L7N_T1_AD2N_18

IO_L16P_T2_19

IO_L16N_T2_19

IO_L24N_T3_19

IO_L3P_T0_DQS_37

IO_L3N_T0_DQS_37

IO_L21P_T3_DQS_37

IO_L15P_T2_DQS_19

IO_L15N_T2_DQS_19

IO_L20N_T3_A19_18

2

1 R23281001/10W

2

1 R23271001/10W

GND

VTT_HP

2

1 R23261001/10W

2

1 R23251001/10W

GND

VTT_HP

2

1 R23241001/10W

2

1 R23231001/10W

GND

VTT_HP

2

1 R23221001/10W

2

1 R23211001/10W

GND

VTT_HP

2

1 R23201001/10W

2

1 R23191001/10W

GND

VTT_HP

2

1 R23181001/10W

2

1 R23171001/10W

GND

VTT_HP

2

1 R23161001/10W

2

1 R23151001/10W

GND

VTT_HP

2

1 R23141001/10W

2

1 R23131001/10W

GND

VTT_HP

2

1 R23121001/10W

2

1 R23111001/10W

GND

VTT_HP

2

1 R23101001/10W

2

1 R23091001/10W

GND

VTT_HP

2

1 R23081001/10W

2

1 R23071001/10W

GND

VTT_HP

2

1 R23061001/10W

2

1 R23051001/10W

GND

VTT_HP

2

1 R23041001/10W

2

1 R23031001/10W

GND

VTT_HP

VTT_HP VTT_HP

2

1 R23021001/10W

2

1 R23011001/10W

2

1 R23001001/10W

2

1 R22991001/10W

GND GND

VTT_HP

2

1 R22981001/10W

2

1 R22971001/10W

GND

2

1 R22961001/10W

2

1 R22951001/10W

GND

VTT_HP

2

1 R22941001/10W

2

1 R22931001/10W

GND

VTT_HP

2

1 R22921001/10W

2

1 R22911001/10W

2

1 R22901001/10W

2

1 R22891001/10W

GND GND

VTT_HP VTT_HP

2

1 R22881001/10W

2

1 R22871001/10W

GND

VTT_HP

2

1 R22861001/10W

2

1 R22851001/10W

2

1 R22841001/10W

2

1 R22831001/10W

GND GND

VTT_HP VTT_HP

2

1 R22821001/10W

2

1 R22811001/10W

GND

VTT_HP

2

1 R22801001/10W

2

1 R22791001/10W

2

1 R22781001/10W

2

1 R22771001/10W

GND GND

VTT_HP VTT_HP

2

1 R22761001/10W

2

1 R22751001/10W

2

1 R22741001/10W

2

1 R22731001/10W

GND GND

VTT_HP VTT_HP

2

1 R22721001/10W

2

1 R22711001/10W

2

1 R22701001/10W

2

1 R22691001/10W

GND GND

VTT_HP VTT_HP

2

1 R22681001/10W

2

1 R22671001/10W

2

1 R22661001/10W

2

1 R22651001/10W

GND GND

VTT_HP VTT_HP

2

1 R22641001/10W

2

1 R22631001/10W

GND

VTT_HP

2

1 R22621001/10W

2

1 R22611001/10W

2

1 R22601001/10W

2

1 R22591001/10W

GND GND

VTT_HP VTT_HP

2

1 R22581001/10W

2

1 R22571001/10W

GND

VTT_HP

2

1 R22561001/10W

2

1 R22551001/10W

2

1 R22541001/10W

2

1 R22531001/10W

GND GND

VTT_HP VTT_HP

Page 80: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

SELECT I/O TERMINATION - HP BANKS

SELECT I/O TERMINATION

10-4-2012_16:59 1.0

01

VC7203 V7 FFG1761 MGT CHAR

80 83

VTT_HP

IO_25_VRP_32

IO_25_VRP_35

IO_25_VRP_15

IO_L22P_T3_37

IO_L22N_T3_37

IO_L13P_T2_MRCC_37

IO_L20N_T3_38

IO_L18P_T2_38

IO_L18N_T2_38

IO_L17N_T2_38

IO_L11P_T1_SRCC_38

IO_L11N_T1_SRCC_38

IO_L5P_T0_AD9P_18

IO_L5N_T0_AD9N_18

IO_L15P_T2_DQS_18

IO_L7P_T1_37

IO_L10P_T1_37

IO_L10N_T1_37

IO_L23N_T3_37

IO_L23P_T3_37

IO_L23N_T3_38

IO_L23P_T3_38

IO_L8P_T1_37

IO_L19P_T3_38

IO_L21N_T3_DQS_38

IO_L21P_T3_DQS_38

2

1 R24021001/10W

2

1 R24011001/10W

GND

VTT_HPVTT_HP VTT_HP

2

1 R23781001/10W

2

1 R23771001/10W

2

1 R23761001/10W

2

1 R23751001/10W

GND GND

VTT_HP

2

1 R23741001/10W

2

1 R23731001/10W

GND

2

1 R23721001/10W

2

1 R23711001/10W

GND

VTT_HP

2

1 R23701001/10W

2

1 R23691001/10W

GND

VTT_HP

2

1 R23681001/10W

2

1 R23671001/10W

2

1 R23661001/10W

2

1 R23651001/10W

GND GND

VTT_HP VTT_HP

2

1 R23641001/10W

2

1 R23631001/10W

GND

VTT_HP

2

1 R23621001/10W

2

1 R23611001/10W

2

1 R23601001/10W

2

1 R23591001/10W

GND GND

VTT_HP VTT_HP

2

1 R23581001/10W

2

1 R23571001/10W

GND

VTT_HP

2

1 R23561001/10W

2

1 R23551001/10W

2

1 R23541001/10W

2

1 R23531001/10W

GND GND

VTT_HP VTT_HP

2

1 R23521001/10W

2

1 R23511001/10W

2

1 R23501001/10W

2

1 R23491001/10W

GND GND

VTT_HP VTT_HP

2

1 R23481001/10W

2

1 R23471001/10W

2

1 R23461001/10W

2

1 R23451001/10W

GND GND

VTT_HP VTT_HP

2

1 R23441001/10W

2

1 R23431001/10W

2

1 R23421001/10W

2

1 R23411001/10W

GND GND

VTT_HP VTT_HP

2

1 R23401001/10W

2

1 R23391001/10W

GND

VTT_HP

2

1 R23381001/10W

2

1 R23371001/10W

2

1 R23361001/10W

2

1 R23351001/10W

GND GND

VTT_HP

2

1 R23341001/10W

2

1 R23331001/10W

GND

VTT_HP

2

1 R23321001/10W

2

1 R23311001/10W

2

1 R23301001/10W

2

1 R23291001/10W

GND GND

VTT_HP VTT_HP

Page 81: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

ASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

SCHEM, ROHS COMPLIANTSELECT I/O TERMINATION

SELECT I/O TERMINATION - HP BANKS

PLACE ONE 1UF CAP FOR EVERY 4 TERMINATED I/O SIGNALS.PLACE ONE 100UF CAP FOR EVERY 25 TERMINATED I/O SIGNALS.DISTRIBUTE THE CAPS EVENLY WITH RESPECT TO THE TERMINATIONRESISTORS. 8381

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

1

2

C1164100UF6.3VX5R

1

2

C1165100UF6.3VX5R

1

2

C1166100UF6.3VX5R

1

2

C1170100UF6.3VX5R

1

2

C1167100UF6.3VX5R

1

2

C1168100UF6.3VX5R

1

2

C1169100UF6.3VX5R

1

2

C1171100UF6.3VX5R

1

2

C1172100UF6.3VX5R

1

1

1

2

C7831UF16VX5R

1

2

C1171UF16VX5R

1

2

C7751UF16VX5R

1

2

C7721UF16VX5R

1

2

C1161UF16VX5R

1

2

C1111UF16VX5R

1

2

C7821UF16VX5R

1

2

C7811UF16VX5R

1

2

C7801UF16VX5R

GND

GND

1

2

C7851UF16VX5R

2

1

X5R16V1UFC789 1

2

C7861UF16VX5R

1

2

C7901UF16VX5R

1

2

C7871UF16VX5R

1

2

C7881UF16VX5R

1

2

C7911UF16VX5R

GND

1

2

C7841UF16VX5R

1

2

C7761UF16VX5R

VTT_HP

VTT_HP

VTT_HP

1

2

C11981UF16VX5R

1

2

C11991UF16VX5R

1

2

C12061UF16VX5R

1

2

C12051UF16VX5R

1

2

C12041UF16VX5R

1

2

C12031UF16VX5R

1

2

C12021UF16VX5R

1

2

C12011UF16VX5R

1

2

C12001UF16VX5R

1

2

C12241UF16VX5R

GND

1

2

C12231UF16VX5R

2

1

X5R16V1UFC1222 1

2

C12211UF16VX5R

1

2

C12201UF16VX5R

1

2

C12191UF16VX5R

1

2

C12181UF16VX5R

1

2

C12171UF16VX5R

GND

1

2

C12161UF16VX5R

1

2

C12151UF16VX5R

VTT_HP

VTT_HP

1

2

C12141UF16VX5R

1

2

C12131UF16VX5R

1

2

C12121UF16VX5R

1

2

C12111UF16VX5R

1

2

C12101UF16VX5R

1

2

C12091UF16VX5R

1

2

C12081UF16VX5R

1

2

C12071UF16VX5R

GND

VTT_HP

GND

1

2

C12331UF16VX5R

1

2

C12321UF16VX5R

VTT_HP

1

2

C12311UF16VX5R

1

2

C12301UF16VX5R

1

2

C12291UF16VX5R

1

2

C12281UF16VX5R

1

2

C12271UF16VX5R

1

2

C12261UF16VX5R

1

2

C12251UF16VX5R

Page 82: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

GROUND TURRETSFIDUCIAL HOLES

EXT VTT JACK, BOARD MECHANICALS

SUPERCLOCK-2

BOARD STANDOFFS

MOUNTING HOLESVTT_HR SOURCE, PROBE POINTS

EXT VTT_HR JACK

VTT_HR SENSE

VTT_HP SOURCE, PROBE POINTS

EXT VTT_HP JACK

VTT_HP SENSE

EXT VTT JACKS / MOUNTING HOLES / FIDUCIALS / GND TURRETS

PLACE EXT VTT JACK AND VTT SENSE HEADER AT THE OPPOSITEENDS OF VTT PLANE. 8382

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

1

VTT_HP

VCCO_HP_EXTVCCO_HR_EXT

VTT_HR

1

MH261

MH251

MH27

1MH24MH_125_250

GND

1

M2

1

M1

NC

1

E1

10-109-3-01

1MH21MH_125_250

1

E3

10-109-3-01

1MH18MH_125_250

1

E2

10-109-3-01

1MH22MH_125_250

1MH23MH_125_250

1MH20MH_125_250

1MH19MH_125_250

1MH17MH_125_250

1MH16MH_125_250

J108

2

1

3

J78

1

2

J77

J109

GNDGNDGND

GND

GND

GND

GND

NCNC

NC

NCNCNC

NC

1

1

1

M3

1

M4

1

M5

1

M6

NC

VTT_HR

J198

2

1

3

J195

1

2

J192

J197

GND

GND

GND

1

1

VTT_HP

Page 83: Xilinx XTP253 – VC7203 Schematics (Rev 1.0) · gnd dgnd1 gnd epad en2 en1 th1 th0 vcc creset cdly2 cdly1 rst_b out2 in1 out1 in2 gnd tol mr_b gnd gnd gnd com n/c 12v 12v n/c com

GND

GND

GND

GND

VCCINT

GND

VCCINT

GND

VCCINT

GND

GND

VCCO_HP

VCCO_HP

GND

GND

GND

GND

VCCINT

VCCINT

GND

GND

ofSheet

Date:

Title:

Ver:A

B

C

D

1234

D

C

B

A

4 3 2 1

Sheet Size: B Rev:

Drawn By

RN

SCHEM, ROHS COMPLIANTASSY P/N: 0431656PCB P/N: 1280579SCH P/N: 0381411TEST P/N: TSS0150

FPGA DECOUPLING

VCCINT

FPGA DECOUPLING

VCCO (BANKS 14 - 19, 31 - 39)

VCCO (BANKS 12 - 13) VCCO_0 (BANK 0)

VCCAUX

VCCBRAM

VCCAUX_IO

FOR 7VX2000T-FFG1761 PER UG483 (V1.4).MARCH 19, 2012: RECOMMENDED FPGA DECOUPLING NETWORK

8383

VC7203 V7 FFG1761 MGT CHAR

01

1.010-4-2012_16:59

1

2

C520680UF6.3VTANT

1

2

C1234680UF6.3VTANT

1

2

C517680UF6.3VTANT

1

2

C51447UF6.3VTANT

1

2

C57347UF6.3VTANT

1

2

C579100UF6.3VX5R

1

2

C815680UF6.3VTANT

1

2

C817680UF6.3VTANT

1

2

C816680UF6.3VTANT

1

2

C521680UF6.3VTANT

1

2

C519680UF6.3VTANT

1

2

C518680UF6.3VTANT

VCCBRAM

1

2

C12394.7UF10VX5R

1

2

C803100UF6.3VX5R

1

1

1

2

C581100UF6.3VX5R

1

2

C571100UF6.3VX5R

1

2

C576100UF6.3VX5R

1

2

C575100UF6.3VX5R

1

2

C585100UF6.3VX5R

1

2

C584100UF6.3VX5R

1

2

C580100UF6.3VX5R

VCCAUX

1

2

C586100UF6.3VX5R

1

2

C583100UF6.3VX5R

1

2

C582100UF6.3VX5R

1

2

C572100UF6.3VX5R

1

2

C802100UF6.3VX5R

1

2

C804100UF6.3VX5R

1

2

C806100UF6.3VX5R

1

2

C805100UF6.3VX5R

VCCO_HR VCCO_0

1

2

C12404.7UF10VX5R

1

2

C12414.7UF10VX5R

1

2

C12424.7UF10VX5R

1

2

C12434.7UF10VX5R

1

2

C12444.7UF10VX5R

1

2

C12454.7UF10VX5R

1

2

C12524.7UF10VX5R

1

2

C12514.7UF10VX5R

1

2

C12504.7UF10VX5R

1

2

C12494.7UF10VX5R

1

2

C12484.7UF10VX5R

1

2

C12474.7UF10VX5R

1

2

C12464.7UF10VX5R

1

2

C12594.7UF10VX5R

1

2

C12584.7UF10VX5R

1

2

C12574.7UF10VX5R

1

2

C12564.7UF10VX5R

1

2

C12554.7UF10VX5R

1

2

C12544.7UF10VX5R

1

2

C12534.7UF10VX5R

1

2

C12664.7UF10VX5R

1

2

C12654.7UF10VX5R

1

2

C12644.7UF10VX5R

1

2

C12634.7UF10VX5R

1

2

C12624.7UF10VX5R

1

2

C12614.7UF10VX5R

1

2

C12604.7UF10VX5R

1

2

C12814.7UF10VX5R

1

2

C12804.7UF10VX5R

1

2

C12794.7UF10VX5R

1

2

C12784.7UF10VX5R

1

2

C12774.7UF10VX5R

1

2

C12764.7UF10VX5R

1

2

C12754.7UF10VX5R

1

2

C12744.7UF10VX5R

1

2

C12734.7UF10VX5R

1

2

C12724.7UF10VX5R

1

2

C12714.7UF10VX5R

1

2

C12704.7UF10VX5R

1

2

C12694.7UF10VX5R

1

2

C12684.7UF10VX5R

VCCBRAM

VCCBRAM

1

2

C12674.7UF10VX5R

1

2

C516100UF6.3VX5R

1

2

C1294100UF6.3VX5R

1

2

C1293100UF6.3VX5R

1

2

C1292100UF6.3VX5R

1

2

C1291100UF6.3VX5R

1

2

C1290100UF6.3VX5R

VCCAUX_IO