xmc4400 motor control application kit · 24/2/2011 · rgb led connected to gpios p1.10, p1.11 and...

XMC4400 Motor Control Application Kit

Part Number: KIT_XMC44_AE3_001

How long does it take to get a motor turn?

Few minutes with the XMC4400 Motor Control Application Kit. It has everything you need to make a plug&play experience for 3 –Phase drives. This kit has a XMC4400 Microcontroller Board, the respective 24V power board including N-Channel Optimos™ power transistors and 3 phase gate driver EiceDRIVER™ from Infineon, completed with a brushless DC motor. It’s supported by the DAVE™ Motor Control Apps library, including sinusoidal and block commutation as well as various position detection and sensing schemes with encoder, resolver, hall sensors and shunts.

Features

XMC4400 Microcontroller Board

Power board: - 24V/7.5 A - 3-Phase Inverter with N-Channel Optimos™ power transistors (BSC031N06NS3 G) and EiceDRIVER™ gate driver

(6ED003L02-F2)

- 3-Phase Inverter by Reverse Conduction IGBT

PLEASE SEE THE FOLLOWING PAGES FOR THE USERS MANUAL: User manuals included below: - Board User's Manual "CPU Board XMC4400 General Purpose" - Board User's Manual "General Purpose Motor Drive Card"

Microcontrol ler

Hexagon Appl icat ion Ki t For XMC4000 Family

Board User‘s Manual

Revision 1.0, 2013-02-19

CPU_44A-V2 CPU Board XMC4400 General Purpose

Edition 2013-02-19

Published by Infineon Technologies AG 81726 Munich, Germany

© 2013 Infineon Technologies AG All Rights Reserved.

Legal Disclaimer

The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party.

Information

For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com).

Warnings

Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office.

Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.


Template: IFX_Template_2011-02-24.dot

Revision History

Page or Item Subjects (major changes since previous revision)

Revision 1.0,

2013-02-19

Initial release

Trademarks of Infineon Technologies AG

AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, EconoPACK™, CoolMOS™, CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OptiMOS™, ORIGA™, PRIMARION™, PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™, SINDRION™, SIPMOS™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™, TRENCHSTOP™, TriCore™.

Other Trademarks

Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™, PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™, FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG. FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc. RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited.

Last Trademarks Update 2011-02-24


Table of Contents

Board User's Manual 4 Revision 1.0, 2013-02-19

Table of Contents

Introduction ............................................................................................................................................................ 7

1 Overview ............................................................................................................................................. 7 1.1 Key Features ........................................................................................................................................ 7 1.2 Block Diagram ...................................................................................................................................... 8

2 Hardware Description ........................................................................................................................ 9 2.1 Power Supply ....................................................................................................................................... 9 2.2 Reset .................................................................................................................................................. 12 2.3 Clock Generation................................................................................................................................ 13 2.4 Boot Option ........................................................................................................................................ 13 2.5 Debug Interface .................................................................................................................................. 14 2.5.1 On-board USB Debugger ................................................................................................................... 15 2.5.2 Cortex Debug Connector (10-pin) ...................................................................................................... 16 2.5.3 Cortex Debug+ETM Connector (20-pin) ............................................................................................ 17 2.6 RGB LED ............................................................................................................................................ 19 2.7 USB .................................................................................................................................................... 19 2.8 RTC .................................................................................................................................................... 21 2.9 User LEDs and User Buttons ............................................................................................................. 22 2.10 Potentiometer ..................................................................................................................................... 22 2.11 Satellite Connectors ........................................................................................................................... 23 2.11.1 COM Connector ................................................................................................................................. 24 2.11.2 HMI Connector ................................................................................................................................... 25 2.11.3 ACT Satellite Connector ..................................................................................................................... 26

3 Production Data................................................................................................................................ 26 3.1 Schematics ......................................................................................................................................... 26 3.2 Component Placement and Geometry ............................................................................................... 31 3.3 Bill of Material (BOM) ......................................................................................................................... 32


List of Figures


List of Figures

Figure 1 CPU_44A-V2 Board Block Diagram..................................................................................................... 8 Figure 2 CPU Board XMC4400 General Purpose (CPU_44A-V2)..................................................................... 9 Figure 3 Powering Option ................................................................................................................................. 10 Figure 4 Block Diagram Of Power Supply ........................................................................................................ 10 Figure 5 Reset Circuit ....................................................................................................................................... 12 Figure 6 Reset LED and Reset Button ............................................................................................................. 12 Figure 7 Clock Generation................................................................................................................................ 13 Figure 8 Boot Options Switch ........................................................................................................................... 13 Figure 9 Installation of Serial Port Driver .......................................................................................................... 15 Figure 10 On-Board USB Debugger .................................................................................................................. 15 Figure 11 Cortex Debug Connector (10-pin) ...................................................................................................... 16 Figure 12 Cortex Debug Connector (10-pin) Layout .......................................................................................... 16 Figure 13 Cortex Debug+ETM Connector (20-pin) ............................................................................................ 17 Figure 14 Cortex Debug+ETM Connector (20-pin) Layout ................................................................................ 18 Figure 15 RGB LED ............................................................................................................................................ 19 Figure 16 USB Connector .................................................................................................................................. 19 Figure 17 USB power generation - Host/OTG mode ......................................................................................... 20 Figure 18 Battery Holder for Coin Cells .............................................................................................................. 21 Figure 19 XMC4400 Power Domains and Real Time Clock .............................................................................. 21 Figure 20 User LEDs and User Buttons ............................................................................................................. 22 Figure 21 Satellite Connectors ........................................................................................................................... 23 Figure 22 Satellite Connector Type COM .......................................................................................................... 24 Figure 23 Satellite Connector Type HMI ............................................................................................................ 25 Figure 24 Satellite Connector Type ACT ............................................................................................................ 26 Figure 25 Satellite Connectors, USB-OTG ......................................................................................................... 27 Figure 26 XMC4400 ........................................................................................................................................... 28 Figure 27 Power, Debug Connectors, Reset...................................................................................................... 29 Figure 28 On-board Debugger ........................................................................................................................... 30 Figure 29 Component Placement and Geometry ............................................................................................... 31


List of Figures


List of Tables

Table 1 Power status LED’s ............................................................................................................................ 10 Table 2 Power Measurement .......................................................................................................................... 11 Table 3 Boot Options Settings ........................................................................................................................ 13 Table 4 Cortex Debug Connector (10 Pin) ...................................................................................................... 16 Table 5 Cortex Debug+ETM Connector (20 Pin) ............................................................................................ 17 Table 6 RGB LED Connections ...................................................................................................................... 19 Table 7 USB micro AB connector Pinot .......................................................................................................... 20 Table 8 User LEDs .......................................................................................................................................... 22 Table 9 User Buttons ....................................................................................................................................... 22 Table 10 Potentiometer ..................................................................................................................................... 22 Table 11 BOM of CPU_44A-V2 Board .............................................................................................................. 32


Overview


Introduction

This document describes the features and hardware details of the CPU Board XMC4400 General Purpose (CPU_44A-V2) designed to work with Infineon’s XMC4400 Microcontroller. This board is part of Infineon’s Hexagon Application Kits.

1 Overview

The CPU board CPU_44A-V2 houses the XMC4400 Microcontroller and three satellite connectors (HMI, COM, ACT) for application expansion. The board along with satellite cards (e.g. HMI_OLED-V1, COM_ETH-V1, AUT_ISO-V1 boards) demonstrates the capabilities of the XMC4400. The main use case for this board is to demonstrate the generic features of the XMC4400 device including tool chain. The focus is safe operation under evaluation conditions. The board is neither cost nor size optimized and does not serve as a reference design.

1.1 Key Features

The CPU_44A-V2 board is equipped with the following features

XMC4400 (ARM® Cortex™-M4-based) Microcontroller, 512 kByte on-chip Flash, LQFP-100

Connection to satellite cards via the satellite connectors COM, HMI and ACT

USB OTG Host/Device support via micro USB connector

Debug options − On-board Debugger via the Debug USB connector − Cortex Debug connector 10-pin (0.05”) − Cortex Debug+ETM connector 20-pin (0.05”)

Reset push button

RGB LED connected to GPIOs P1.10, P1.11 and P5.7

Boot option switch

PowerScale Connector: Ready for power consumption analysis

7 LED’s − 3 Power indicating LEDs − 2 User LEDs (P5.2 and P1.8) − 1 RESET LED − 1 Debug LED

Two User Buttons connected to HIB_IO_0 and P0.10

Potentiometer, connected to analog input P14.1

Power supply − Via Micro-USB connector in USB device mode − Via satellite connector pins (COM/ACT satellites cards can supply power to CPU board) − Via Debug USB connector − RTC backup battery


Overview


1.2 Block Diagram

Figure 1 shows the functional block diagram of the CPU_44A-V2 board. For more information about the power supply please refer to chapter 2.1.

The CPU board has got the following building blocks:

3 Satellite Connectors (COM, HMI ACT)

2 User LEDs connected to GPIOs P5.2 and P1.8

2 User Buttons connected to HIB_IO_0 and P0.10

RGB LED connected to GPIOs P1.10, P1.11 and P5.7

2 Cortex Debug Connectors

Variable resistor (POTI) connected to GPIO P14.1

USB On-The-Go Connector (Micro-USB)

On-board Debugger via Debug USB connector (Micro-USB)

Figure 1 CPU_44A-V2 Board Block Diagram

Block_Diag.emf

EE

XMC4400

LQFP100

2xISOFACE

I2C

CAN CAN1

CAPCOM

ENCODER

DSMOD

SENSOR

OPAMP

TO

UC

H

U1C0

CPU Board XMC4400

General Purpose

CPU_44A-V2

U0C0

ETH ETHRMII

USB

OTG

USB

CCU81

POSIF

DSD

DAC

ADC

rese

t

QSPI

RS485

CAN

CAN

I2C_IOEX

Debug

20pin

I2C_IOEX

SD

CA

RD

U0C1

3xCS

SP

I

GP

IOcm

d

OL

ED

I2C

_IO

EX

JTAG

SW

D

SW

V

Debug

10pin

HE

AD

SE

T

GPIO

POTI

I2C

2xLED

2xButtonSW

D

SW

V

I2C

SPIRGB

LED

UART

SPI

CCU

4/8

GP

IO

HMI

4xGPIO

AC

T

GPIO

CO

M

Debug

USB

EXTBUS

UA

RT

On-board

Debugger

XMC4200


Hardware Description


2 Hardware Description

The following sections give a detailed description of the hardware and how it can be used.

Figure 2 CPU Board XMC4400 General Purpose (CPU_44A-V2)

2.1 Power Supply

The CPU_44A-V2 board can be powered via either of the USB plugs (5 V); however, there is a current limit that can be drawn from the host PC through USB. If the CPU_44A-V2 board is used to drive other satellite cards e.g. MOT_GPDLV-V2 and the total system current required exceeds 500 mA, then the CPU_44A-V2 board needs to be powered by a satellite cards. These satellite cards support external power supply.

The typical current drawn by the CPU board without any satellite cards connected is about 190 mA (@5 V).

For powering the board through an USB interface, connect the USB cable provided with the kit to either of the Micro-USB connector on board as shown in Figure 3.

USB OTG

ConnectorDebug USB

Connector

On-board

Debugger

ACT

Satellite

Connector

Power

indicating

LEDs

Reset

Circuit

HMI Satellite

Connector

Battery

HolderPotentiometer

Debug

Connectors

XMC4400

CPU

Boot

Option

Switch

COM Satellite

Connector

User LEDs

and User

Buttons

RGB

LED

Board_Interfaces.emf




Figure 3 Powering Option

To indicate the power status of the CPU_44A-V2 board three power indicating LED’s are provided on board (see Figure 3). The LED will be “ON” when the corresponding power rail is powered.

Table 1 Power status LED’s

LED Reference Power Rail Voltage Note

V401 VDD5 5 V Must always be “ON”

V402 VDD5USB 5 V “ON” if powered by USB OTG connector X203

“OFF” in all other supply cases

V403 VDD3.3 3.3 V Must always be “ON”

Figure 4 Block Diagram Of Power Supply

USB OTG Debug USB

Power.emf

IFX1763

3.3V Linear

LDO Voltage

Regulator

PowerScale

Probe

Power

indicating

LEDs

CPU Board XMC4400 General Purpose

CPU_44A-V2

ACT Sat.

Connector

COM Sat.

Connector

HMI Sat.

Connector

Debug

USB

VDD5USB

Lin. Voltage

Regulator

IFX1763

VDDP

U403

U401

JP300U300

EN

Power

LED

HIB_IO_1

P3.2

VDD5 VDD5 VBAT

XMC4400

LQFP100

BATTERY

VDD3.3 On Board Devices

VDD3.3

Power_Block.emf

USB

OTG Power

LEDPower

LED

VDD5USB +5V VDD5 +5V VDD3.3 +3.3V




Hitex PowerScale probe is provided on the CPU_44A-V2 board to measure the power consumption of the XMC4400 device.

Table 2 Power Measurement

Jumper Function Description

JP300 PowerScale A Hitex PowerScale probe can be connected for current sensing the VDD3.3 (CPU power source). Default: pos. 1-2 (closed)

Note: On the PCB there is a shorting trace between pin 1-2. This trace has to be cut first, before using PowerScale. Pin 3 is GND.




2.2 Reset

A reset signal connected to the low-active PORST# pin of the target CPU (U300) can be issued by

an on-board Reset Button (SW400, RESET)

an on-board debug device (U500)

an external debugger connected to either Cortex Debug connector X400 or X401

The RESET signal is routed to all satellite connectors. The reset circuit includes a red LED (V407) to indicate the reset status: The Reset LED (V407) will be “ON” during active reset state and will be “OFF” if reset is not active.

Be aware that PORST# is a bidirectional reset pin of the XMC4000 family which can also be pulled low by the XMC4000 device itself.

Figure 5 Reset Circuit

Figure 6 Reset LED and Reset Button

Reset Button

Reset LED

RST.emf




2.3 Clock Generation

An external 12 MHz crystal provides the clock signal to the XMC4400 microcontroller. The drive strength of the oscillator is set to maximum by software, in order to ensure a safe start-up of the oscillator even under worst case conditions. Therefore a serial 510 Ohm resistor will attenuate the oscillations during operations.

For the RTC clock a separate external 32.768 kHz crystal is used on board.

Figure 7 Clock Generation

2.4 Boot Option

During power-on-reset the XMC4400 latches the dip switch SW300 settings via the TCK and the TMS pin. Based on the values latched different boot options are possible.

Table 3 Boot Options Settings

BSL (TMS) CAN/UART (TCK) Boot Option

OFF (1) UART (0) Normal Mode (Boot from flash)

ON (0) UART (0) ASC BSL Enabled (Boot from UART)

OFF (1) CAN (1) BMI Customized Boot Enabled

ON (0) CAN (1) CAN BSL Enabled (Boot from CAN)

Figure 8 Boot Options Switch

Boot

Option

Switch

Boot_Switch.emf




2.5 Debug Interface

The CPU_44A-V2 board supports debugging via 3 different channels:

On-board Debugger

Cortex Debug Connector (10-pin)

Cortex Debug+ETM Connector (20-pin)

The Hexagon Application Boards are designed to use “Serial Wire Debug” as debug interface. JTAG debug is not supported by default because the GPIO P0.7, where the required TDI function is mapped to also, is used by various Actuator boards connected to the ACT satellite connector.

Note: It is strongly recommended not to use JTAG debug mode, especially if satellites boards are connected, which uses the GPIO 0.7. For the same reason also do not use the on-board debugger in JTAG mode.

If you want to use the JTAG debug mode through the cortex debug connectors (X400, X401) anyway, enable the JTAG interface of the XMC device by assembling the pull-up resistor R427 (4k7 Ohm) and the resistor R410 (0 - 33 Ohm).




2.5.1 On-board USB Debugger

The on-board debugger [1] supports

Serial Wire Debug

Serial Wire Viewer

Full Duplex UART communication via a USB Virtual COM

[1] Attention: Newer firmware versions of the on-board debugger require the latest J-Link driver (V4.62 or higher) and a Serial Port Driver (CDC driver) installed on your computer. Please check “Install J-Link Serial Port Driver” when installing the latest J-Link driver (see Figure 9)

Figure 9 Installation of Serial Port Driver

The on-board debugger can be accessed through the Debug USB connector shown in Figure 10. The Debug LED V502 shows the status during debugging.

Figure 10 On-Board USB Debugger

When using an external debugger connected to the 10pin/20pin Cortex Debug Connector, the on-board debugger is switched off.

When using the USB virtual COM port function of the on-board debugger the UART interface to the COM satellite is disabled through the switches U301 and U303.

Debugger.emf

Debug USB

On-board

Debugger

Debug LED




2.5.2 Cortex Debug Connector (10-pin)

The CPU_44A-V2 board supports Serial Wire Debug operation and Serial Wire Viewer operation (via the SWO signal when Serial Wire Debug mode is used) through the 10-pin Cortex Debug Connector.

Figure 11 Cortex Debug Connector (10-pin)

Table 4 Cortex Debug Connector (10 Pin)

Pin No. Signal Name Serial Wire Debug JTAG Debug

1 VCC +3.3 V +3.3 V

2 SWDIO / TMS Serial Wire Data I/O Test Mode Select

3 GND Ground Ground

4 SWDCLK / TCK Serial Wire Clock Test Clock

5 GND Ground Ground

6 SWO / TDO Trace Data OUT Test Data OUT

7 KEY KEY KEY

8 NC / TDI Not connected Test Data IN

9 GNDDetect Ground Detect Ground Detect

10 nRESET Reset (Active Low) Reset (Active Low)

Figure 12 Cortex Debug Connector (10-pin) Layout

Cortex Debug

Connector (10-pin)

GNDDetect

SWDIO / TMS

SWDCLK / TCK

1 2

3 4

5 6

7 8

9 10

VCC

GND

GND

KEY

SWO / TDO

NC / TDI

nRESET

cortex-10pin.emf

Cortex Debug

Connector (10 Pin)

10Pin_Conn.emf




2.5.3 Cortex Debug+ETM Connector (20-pin)

The CPU_44A-V2 board supports Serial Wire Debug operation, Serial Wire Viewer operation (via SWO connection when Serial Wire Debug mode is used) through the 20-pin Cortex Debug+ETM Connector. The board does not support the Instruction Trace operation.

JTAG Debug operation additionally would require the TDI (P0.7) signal. By default the TDI signal is disconnected from the Cortex Debug Connectors by a not assembled resistor R410, because the pin P0.7 is used by some Actuator boards connected to the ACT satellite connector.

Figure 13 Cortex Debug+ETM Connector (20-pin)

Table 5 Cortex Debug+ETM Connector (20 Pin)


1 VCC +3.3 V +3.3 V

2 SWDIO / TMS Serial Wire Data I/O Test Mode Select

3 GND Ground Ground

4 SWDCLK / TCK Serial Wire Clock Test Clock

5 GND Ground Ground

6 SWO / TDO Trace Data OUT Test Data OUT

7 KEY KEY KEY

8 NC / TDI Not connected Test Data IN

9 GNDDetect Ground Detect Ground Detect

10 nRESET Reset (Active Low) Reset (Active Low)

11 GND/TgtPwr+Cap Ground Ground

12 TRACECLK* TRACECLK* TRACECLK*

13 GND/TgtPwr+Cap Ground Ground

14 TRACEDATA[0]* TRACEDATA[0]* TRACEDATA[0]*

15 GND Ground Ground

cortex_20pin.emf

SWO / TDO / EXTa / TRACECTL

Cortex Debug+ETM

Connector (20-pin)

GNDDetect

SWDIO / TMS

SWDCLK / TCK

1 2

3 4

5 6

7 8

9 10

VCC

GND

GND

KEY

nRESET

11 12

13 14

15 16

17 18

19 20

NC/EXTb/TDI

TRACECLK(NC)

TRACEDATA[0] (NC)

TRACEDATA[1] (NC)

TRACEDATA[2] (NC)

TRACEDATA[3] (NC)

GND/TgtPwr+Cap

GND/TgtPwr+Cap

GND

GND

GND




Table 5 Cortex Debug+ETM Connector (20 Pin)







Note: * Not connected on the CPU_44A-V2 board.

Figure 14 Cortex Debug+ETM Connector (20-pin) Layout

Cortex Debug+ETM

Connector (20 Pin)

20Pin_Conn.emf




2.6 RGB LED

The CPU_44A-V2 board has a tricolored LED. The LED glows with either Red/Blue/Green colors as controlled by the GPIO pins given below.

Table 6 RGB LED Connections

Pin No. / Function LED Color

P5.7 / CCU81.OUT02 RED

P1.11 / CCU81.OUT11 GREEN

P1.10 / CCU81.OUT21 BLUE

Figure 15 RGB LED

2.7 USB

The XMC4400 supports USB interface in host only mode, device only mode or as an OTG Dual Role Device (DRD). In USB device mode, power is expected through VBUS (pin 1 of X203C) from an external host (e.g. PC). When the current consumption of the application running on the Hexagon Application system is higher than 500 mA, power from an external source through satellite cards shall be used.

Note: Some PCs, notebooks or hubs have a weak USB supply which is not sufficient for proper supply. In this case use an external 5 Volt power supply or a powered USB hub.

Figure 16 USB Connector




USB ID pin of the USB connector (pin 4 of X203C) is connected to the port pin P0.9 of the XMC4400. On this port pin the USD identification signal (USB.ID) of XMC4000 USB module is mapped to. An OTG device will detect whether a USB Micro-A or Micro-B plug is inserted by checking the ID pin. When the ID = FALSE a Micro-A connector is plugged in and when ID = TRUE a Micro-B connector is plugged in. When the ID is true the XMC4400 acts as a USB host else as a USB device.

Table 7 USB micro AB connector Pinot

Pin No. Pin Name Pin Description

1 VBUS 5 V

2 D- Data Minus

3 D+ Data Plus

4 ID Identification

5 GND Ground

Figure 17 USB power generation - Host/OTG mode

In the host only mode and OTG mode the CPU_44A-V2 board is capable of supplying power to the connected device (e.g. USB mouse). The board has a power-switch which is controlled by the USB.BUSDRIVE signal of the XMC4400. The USB.BUSDRIVE signal is mapped to port pin P3.2 (active high). In the Host/OTG mode a low active FAULT signal indicates to the port pin P3.1 of the XMC4400, if more than 500 mA current is drawn by the external device. Diode V400 will allow powering the board through USB in all USB modes via e.g. a PC.




2.8 RTC

The XMC4400 CPU has two power domains, the Core Domain and Hibernate Domain.

The Core Domain (VDDP pins) is connected to the VDD3.3 rail. An on-board LDO voltage regulator generates VDD3.3 (3.3 V) from VDD5 (5 V).

The Hibernate Domain is powered via the auxiliary supply pin VBAT, which is supplied by either a 3 V coin cell (size 1216, 1220, 1225) plugged into the battery holder or 3.3 V (VDD3.3) generated by the on-board voltage regulator.

Figure 18 Battery Holder for Coin Cells

The Real Time Clock (RTC) is located in the hibernate domain. The XMC4400 uses the HIB_IO_1 signal (active low) to shut down the external LDO voltage regulator which generates the VDD3.3 (Core Domain). Even if the Core Domain is not powered the Hibernate Domain will operate if VBAT is available. The RTC keeps running as long as the Hibernate Domain is powered via the auxiliary supply VBAT. The RTC is capable to wake-up the whole system from Hibernate mode by setting HIB_IO_1 to high.

Figure 19 XMC4400 Power Domains and Real Time Clock

Battery

Holder

Battery.emf

Core Domain

CPU

Internal OSC

Hibernate Domain

VBAT32.768 kHz

XMC4400

VDDPIFX1763

LDO

Voltage Reg.

VDD3.3

+

RTC

SP

I

RTC.emf

Battery

12 MHz

External OSC

Hibernate

Control

HIBIO_1

EN




2.9 User LEDs and User Buttons

The port pins P5.2 and P1.8 of the XMC4400 are connected to the LEDs V300 and V301 respectively. More User LED’s are available through the I2C GPIO expander on most of the satellite cards.

Table 8 User LEDs

LED Connected to Port Pin

V300 GPIO P5.2

V301 GPIO P1.8

Two User Buttons, SW301 and SW302 are connected to P0.10 and HIB_IO_0 of XMC4400.

Table 9 User Buttons

Button Connected to Port Pin

BUTTON1 / SW301 HIB_IO_0

BUTTON2 / SW302 P0.10

Figure 20 User LEDs and User Buttons

2.10 Potentiometer

The CPU_44A-V2 board provides a potentiometer POT1 for ease of use and testing of the on-chip analog to digital converter. The potentiometer is connected to the analog input G0_CH1 (P14.1). The analog output of the potentiometer ranges from 0 V to 3.3 V.

Table 10 Potentiometer

Potentiometer Connected to Port Pin

R300 P14.1 / G0_CH1 (Group 0, channel 1)

Button_LED.emf

2 User

Button

User

LED2

User

LED1




2.11 Satellite Connectors

The CPU_44A-V2 board provides three satellite connectors for application extension by satellite cards:

COM satellite connector (Communication)

HMI satellite connector (Human Machine Interface)

ACT satellite connector (Actuator)

Note: Satellite cards shall be connected to their matching satellite connectors only. (For e.g. COM satellite cards shall be connected to COM satellite connector only)

Figure 21 Satellite Connectors

ACT Satellite

ConnectorCOM Satellite

Connector

HMI Satellite

Connector Sat_Con.emf




2.11.1 COM Connector

The COM satellite connector on the CPU_44A-V2 board allows interface expansion through COM satellite cards (e.g. COM_ETH-V1)

XM

C P

in

VS

S

nc

nc

nc

nc

nc

P2

.9

P2

.8

P1

5.9

P2

.4

P1

5.8

VS

S

nc

P1

.12

P1

.4

nc

nc

nc

P0

.11

P0

.6

PO

RS

T

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

VS

S

XM

C F

un

ctio

n

GN

D

nc

nc

nc

nc

nc

ET

H0

_T

XD

1

ET

H0

_T

XD

0

ET

H0

_C

RS

_D

VC

ET

H0

_R

XE

RA

ET

H0

_C

LK

_R

MII

C

GN

D

nc

CA

N_

N1

_T

XD

CA

N_

N1

_R

XD

C

nc

nc

nc

U1

C0

_S

CLK

OU

T

P0

.6

RE

SE

T#

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

GN

D

Fu

nct

ion

GN

D

qS

PI_

D0

qS

PI_

D1

qS

PI_

D2

qS

PI_

D3

RS

VD

ET

H_

RM

II

ET

H_

RM

II

ET

H_

RM

II

ET

H_

RM

II

ET

H_

RM

II

GN

D

RS

VD

CA

N_

TX

D

CA

N_

RX

D

SP

I_M

TS

R

SP

I_M

RS

T

SP

I_S

CLK

I2C

_S

CL

GP

IO

RE

SE

T

VD

D5

VD

D5

EB

U_

AD

EB

U_

AD

EB

U_

AD

EB

U_

AD

EB

U_

AD

EB

U_

AD

EB

U_

AD

EB

U_

AD

EB

U_

AD

EB

U_

AD

EB

U_

AD

EB

U_

AD

EB

U_

AD

EB

U_

AD

EB

U_

AD

EB

U_

AD

GN

D

Satellite 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80

Connector 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79

Fu

nct

ion

GN

D

qS

PI_

SC

LK

qS

PI_

CS

qS

PI_

CS

RS

VD

RS

VD

ET

H_

RM

II

ET

H_

RM

II

ET

H_

RM

II

ET

H_

RM

II

ET

H_

RM

II

RS

VD

AS

C_

DIR

AS

C_

RX

D

AS

C_

TX

D

SP

I_C

SC

0

SP

I_C

SC

1

SP

I_C

SC

2

I2C

_S

DA

CO

M_

GP

IO1

CO

M_

GP

IO0

VD

D5

VD

D5

EB

U_

AD

V

EB

U_

WR

EB

U_

RD

EB

U_

BC

EB

U_

BC

EB

U_

CS

EB

U_

CS

GN

D

EB

U_

A

EB

U_

A

EB

U_

A

EB

U_

A

EB

U_

A

EB

U_

A

EB

U_

A

EB

U_

A

GN

D

XM

C F

un

ctio

n

GN

D

nc

nc

nc

nc

nc

ET

H0

_R

XD

1A

ET

H0

_R

XD

0A

ET

H0

_M

DO

ET

H0

_M

DC

ET

H0

_T

X_

EN

nc

nc

U0

C0

_D

X0

A

U0

C0

_D

OU

T0

nc

nc

nc

U1

C0

_D

X0

D/D

OU

T0

nc

nc

nc

nc

nc

nc

nc

nc

nc

GN

D

nc

nc

nc

nc

nc

nc

nc

nc

GN

D

XM

C P

in

VS

S

nc

nc

nc

nc

nc

P2

.3

P2

.2

P2

.0

P2

.7

P2

.5

nc

nc

P1

.5

P1

.7

nc

nc

nc

P2

.14

nc

nc

nc

nc

nc

nc

nc

nc

nc

VS

S

nc

nc

nc

nc

nc

nc

nc

nc

VS

S

CPU_44A-V2

Pin

COM

COM

COM

CPU_44A-V2

Figure 22 Satellite Connector Type COM




2.11.2 HMI Connector

The HMI satellite connector on the CPU_44A-V2 board allows interface expansion through HMI satellite cards.

XM

C P

in

VSS nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

P0

.12

/OLE

D_

RS

nc

nc

nc

P3

.5

P4

.0

P3

.6

P0

.11

P0

.6

PO

RST

VA

RE

F

nc

P1

4.4

P1

4.3

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

VSS

XM

C F

un

ctio

n

GN

D

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

P0

.12

/OLE

D_

RS

nc

nc

nc

U0

C1

_D

OU

T0

U0

C1

_D

X0

E

U0

C1

_SC

LKO

UT

U1

C0

_SC

LKO

UT

P0

.6

RE

SET

#

VA

RE

F

nc

VA

DC

_G

0C

H4

VA

DC

_G

0C

H3

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

GN

D

Fun

ctio

n

GN

D

MM

C_

nR

ST

MM

C_

DA

TA

0

MM

C_

DA

TA

2

MM

C_

DA

TA

4

MM

C_

DA

TA

6

MM

C_

CM

D

MM

C_

LED

MM

C_

SDW

C

RSV

D

RSV

D

OLE

D_

CM

D

I2S_

MT

SR

I2S_

MR

ST

I2S_

SCLK

SPI_

MT

SR

SPI_

MR

ST

SPI_

SCLK

I2C

_SC

L

GP

IO

RE

SET

VD

D5

VD

D5

AR

EF

DA

C1

/AD

C0

AD

C2

/DA

CR

EF

AD

C1

4

AD

C1

6

AD

C1

8

RSV

D

RSV

D

TP

7

TP

6

TP

5

TP

4

TP

3

TP

2

TP

1

TP

0

GN

D

Satellite 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80

Connector 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79

Fu

nct

ion

GN

D

MM

C_

CLK

MM

C_

DA

TA

1

MM

C_

DA

TA

3

MM

C_

DA

TA

5

MM

C_

DA

TA

7

MM

C_

BU

SPO

W

MM

C_

nSD

CD

RSV

D

RSV

D

RSV

D

Au

dio

RST

I2S_

WA

I2S_

MC

LK

I2S_

SYN

CLK

SPI_

CSH

0

SPI_

CSH

1

SPI_

CSH

2

I2C

_SD

A

HM

I_G

PIO

1

HM

I_G

PIO

0

VD

D5

VD

D5

AG

ND

DA

C0

/AD

C1

AD

C3

/OR

C0

AD

C1

5

AD

C1

7

AD

C1

9

RSV

D

RSV

D

RSV

D

TP

x1

TP

x0

CO

L3

CO

L2

CO

L1

CO

L0

CO

LA

GN

D

XM

C F

un

ctio

n

GN

D

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

U0

C1

_SE

LO3

nc

nc

U1

C0

_D

X0

D/D

OU

T0

nc

nc

AG

ND

nc

nc

VA

DC

_G

1C

H4

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

GN

D

XM

C P

in

VSS nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

P1

.13

nc

nc

P2

.14

nc

nc

VA

GN

D

nc

nc

P1

4.1

2

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

nc

VSS

CPU_44A-V2

Pin

HMI

HMI

HMI

CPU_44A-V2

Figure 23 Satellite Connector Type HMI


Production Data


2.11.3 ACT Satellite Connector

The ACT satellite connector on the CPU_44A-V2 board allows interface expansion through ACT satellite cards.

XM

C P

in

VSS

P1

4.7

P1

4.6

P1

4.5

nc

P2

.6

P1

.6

P0

.8 (

2)

nc

P1

.0

P1

.1

P1

.2

P1

.15

P2

.15

P2

.10

P3

.5

P4

.0

P3

.6

P0

.11

P0

.6

PO

RST

VA

RE

F

P1

4.8

P1

4.4

nc

P1

4.1

5

P1

4.2

P1

5.2

nc

P0

.5 (

6)

P0

.2 (

6)

P0

.4 (

6)

P0

.1

P0

.3 (

6)

P0

.0

P3

.3

P3

.0

VSS

XM

C F

un

ctio

n

GN

D

PIF

0_

IN0

B

PIF

0_

IN1

B

PIF

0_

IN2

B

nc

DSD

_IN

1B

DSD

_D

IN2

A

DSD

_D

IN0

A

nc

HR

PW

M.C

0IN

A

HR

PW

M.C

1IN

A

HR

PW

M.C

1IN

A

P1

.15

P2

.15

P2

.10

U0

C1

_D

OU

T0

U0

C1

_D

X0

E

U0

C1

_SC

LKO

UT

U1

C0

_SC

LKO

UT

P0

.6

RE

SET

#

VA

RE

F

VA

DC

_G

1C

H0

VA

DC

_G

0C

H4

nc

VA

DC

_G

1C

H7

VA

DC

_G

0C

H2

VA

DC

_G

2C

H2

nc

CC

U8

0_

OU

T0

0

CC

U8

0_

OU

T0

1

CC

U8

0_

OU

T1

0

CC

U8

0_

OU

T1

1

CC

U8

0_

OU

T2

0

CC

U8

0_

OU

T2

1

CC

U4

2_

OU

T3

CC

U4

2_

OU

T0

GN

D

Fun

ctio

n

GN

D

PIF

0IN

1

PIF

0IN

2

PIF

0IN

3

DSD

IN0

DSD

IN1

DSD

IN2

DSD

IN3

RSV

D

CC

_IN

0

CC

_IN

1

CC

_IN

2

EN

A_

A

EN

A_

B

EN

A_

X

SPI_

MT

SR

SPI_

MR

ST

SPI_

SCLK

I2C

_SC

L

GP

IO

RE

SET

VD

D5

VD

D5

AR

EF

DA

C1

/AD

C0

AD

C2

/DA

CR

EF

AD

C4

/OR

C1

AD

C6

/OR

C3

AD

C8

AD

C1

0

AD

C1

2

PW

MA

0_

H

PW

MA

0_

L

PW

MA

1_

H

PW

MA

1_

L

PW

MA

2_

H

PW

MA

2_

L

PW

MX

0

PW

MX

1

GN

D

Satellite 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80

Connector 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79

Fu

nct

ion

GN

D

PIF

1IN

0

PIF

1IN

1

PIF

1IN

2

PW

MN

PW

MP

DSD

CLK

0

DSD

CLK

1

RSV

D

CC

_IN

3

CC

_IN

4

CC

_IN

5

TR

AP

_A

TR

AP

_B

TR

AP

_X

SPI_

CSA

0

SPI_

CSA

1

SPI_

CSA

2

I2C

_SD

A

AC

T_

GP

IO1

AC

T_

GP

IO0

VD

D5

VD

D5

AG

ND

DA

C0

/AD

C1

AD

C3

/OR

C0

AD

C5

/OR

C2

AD

C7

AD

C9

AD

C1

1

AD

C1

3

PW

MB

0_

H

PW

MB

0_

L

PW

MB

1_

H

PW

MB

1_

L

PW

MB

2_

H

PW

MB

2_

L

PW

MX

2

PW

MX

3

GN

D

XM

C F

un

ctio

n

GN

D

nc

nc

nc

PW

MN

PW

MP

nc

DSD

_M

CLK

0

nc

nc

nc

nc

CC

U8

0_

IN0

A

CC

U4

0.I

N0

A

CC

U4

2_

IN2

A

U0

C1

_SE

LO2

U0

C1

_SE

LO0

nc

U1

C0

_D

X0

C/D

OU

T0

nc

nc

AG

ND

VA

DC

_G

1C

H1

nc

VA

DC

_G

0C

H0

(4

)

VA

DC

_G

1C

H6

VA

DC

_G

2C

H3

VA

DC

_G

1C

H5

nc

nc

nc

nc

nc

nc

nc

nc

nc

GN

D

XM

C P

in

VSS nc

nc

nc

P5

.0

P5

.1

nc

P1

.9

nc

nc

nc

nc

P0

.7 (

1,6

)

P1

.3

P3

.4

P1

.14

P4

.1

nc

P2

.14

nc

nc

VA

GN

D

P1

4.9

nc

P1

4.0

P1

4.1

4

P1

5.3

P1

4.1

3

nc

nc

nc

nc

nc

nc

nc

nc

nc

VSS

CPU_44A-

V2

Pin

ACT

ACT

ACT

CPU_44A-

V2

Figure 24 Satellite Connector Type ACT

(1) P0.7 can also be used for JTAG Debugging (TDI)

(2) P0.8 is used as TRST in order to enable JTAG Debug

(3) This pin is connected with the satellite connector via an analog switch

(4) This ADC input does not support “Out of Range Detection”

(5) This pin must be “enabled” by a solder jump.

(6) Support High Resolution PWM

3 Production Data

3.1 Schematics

This chapter contains the schematics for the CPU board:

Satellite Connectors, USB-OTG

XMC4400

Power, Debug Connectors, Reset

On-board Debugger

The board has been designed with Eagle. The full PCB design data of this board can also be downloaded from www.infineon.com/xmc-dev.

http://www.infineon.com/xmc-dev


Production Data


Figure 25 Satellite Connectors, USB-OTG

AGND

AGND

100nF

/0402

100nF/0402

100nF/0402

100nF/0402

100nF/0402

100nF/0402

100nF/0402

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

BLM

18P

G600

1M/0402

33R

/0402

33R

/040210k/0402

VDD5

VDD5USBVDD5

VDD5

VDD5

VDD5

VDD5

VDD3.3VDD5

VDD5

VDD5

VDD5

VDD5

VDD5

ES

D8V

0L2B

-03L

HS

EC

8_M

AT

ING

-CA

RD

HS

EC

8_M

AT

ING

-CA

RD

HS

EC

8_M

AT

ING

-CA

RD

ZX62-AB-5PAP0.[0..15],P

1.[0..15],P

2.[0..15],P

3.[0..15],P

4.[0..7],P

5.[0..11],P

6.[0..6],P

14.[0..15],P

15.[2..15]

CO

M_R

XD

CO

M_T

XD

OT

G_

FS

_D

MO

TG

_F

S_

DP

P0

.0

P0

.1

P0

.2

P0

.3

P0

.4

P0

.5

P0.6

P0.6

P0.6

P0

.7

P0.8

P0

.9

P0

.11

P0

.11

P0

.11

P0.1

2

P1

.0P

1.1

P1.2

P1.3

P1.4

P1

.6P

1.9

P1.1

2

P1.1

3P

1.1

4

P1

.15

P2

.0P

2.2

P2

.3

P2

.4P

2.5

P2

.6

P2

.7

P2

.8P

2.9

P2

.10

P2

.14

P2

.14

P2

.14

P2

.15

P3

.0P

3.3

P3

.4P

3.5

P3

.5

P3

.6P

3.6

P4

.0P

4.0

P4

.1

P5

.0P

5.1

P1

4.0

P1

4.2

P1

4.3

P1

4.4

P1

4.4

P1

4.5

P1

4.6

P1

4.7

P1

4.8

P1

4.9

P1

4.1

2

P1

4.1

3

P1

4.1

4P

14

.15

P1

5.2

P1

5.3

P1

5.8

P1

5.9

RE

SE

T#

RE

SE

T#

RE

SE

T#

VA

RE

FV

AR

EF

C200

C201

C202

C205

C206

C209

C210

L201

R200

R202

R203

R204

1

23

V201

11

22

33

44

55

66

77

88

99

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

40

40

41

41

42

42

43

43

44

44

45

45

46

46

47

47

48

48

49

49

50

50

51

51

52

52

53

53

54

54

55

55

56

56

57

57

58

58

59

59

60

60

61

61

62

62

63

63

64

64

65

65

66

66

67

67

68

68

69

69

70

70

71

71

72

72

73

73

74

74

75

75

76

76

77

77

78

78

79

79

80

80

X200

11

22

33

44

55

66

77

88

99

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

40

40

41

41

42

42

43

43

44

44

45

45

46

46

47

47

48

48

49

49

50

50

51

51

52

52

53

53

54

54

55

55

56

56

57

57

58

58

59

59

60

60

61

61

62

62

63

63

64

64

65

65

66

66

67

67

68

68

69

69

70

70

71

71

72

72

73

73

74

74

75

75

76

76

77

77

78

78

79

79

80

80

X201

11

22

33

44

55

66

77

88

99

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

40

40

41

41

42

42

43

43

44

44

45

45

46

46

47

47

48

48

49

49

50

50

51

51

52

52

53

53

54

54

55

55

56

56

57

57

58

58

59

59

60

60

61

61

62

62

63

63

64

64

65

65

66

66

67

67

68

68

69

69

70

70

71

71

72

72

73

73

74

74

75

75

76

76

77

77

78

78

79

79

80

80

X202

1 2 3 4 5X203C

X203S

HMI

ACT

COM

12

34

56

78

ABCDE

87

65

43

21

E D C B A

CP

U_

44

A-V

2

2/7

/20

13

5:0

5:5

4 P

M

2/5

Sh

ee

t:

Legal D

iscla

imer

Th

e in

form

atio

n g

ive

n in

th

is d

ocu

me

nt

sh

all

in n

o e

ve

nt

be

re

ga

rde

d a

s a

gu

ara

nte

e o

f co

nd

itio

ns o

r

ch

ara

cte

ristics.

With

re

sp

ect

to a

ny e

xa

mp

les o

r h

ints

giv

en

he

rein

, a

ny t

yp

ica

l va

lue

s s

tate

d h

ere

in a

nd

/or

an

y

info

rma

tio

n r

eg

ard

ing

th

e a

pp

lica

tio

n o

f th

e d

evic

e,

Infin

eo

n T

ech

no

log

ies h

ere

by d

iscla

ims a

ny a

nd

all

wa

rra

ntie

s

an

d lia

bili

tie

s o

f a

ny k

ind

, in

clu

din

g w

ith

ou

t lim

ita

tio

n,

wa

rra

ntie

s o

f n

on

-in

frin

ge

me

nt

of

inte

llectu

al p

rop

ert

y r

igh

ts

of

an

y t

hird

pa

rty.

D1

D2

US

B-O

TG

Connecto

r

Sa

telli

te C

on

., U

SB

-OT

G

V2 / 0

8.1

0.2

012 / M

a


Production Data


Figure 26 XMC4400

AGND

AGND

AGND

AGND

VDD3.3VDDP

VDD5USB

VBAT

VDDP

VBAT

100nF/0402

100nF/0402

100nF/0402

100nF/0402

100nF/0402

100nF/0402

100nF/0402

100nF/0402

10uF/10V/0805

100nF

/0402

100nF/0402

100nF

/0402

15pF/0402

15pF/0402

15pF/0402

15pF/0402

100nF

/0402

100nF

/0402

100nF/0402

10uF/10V/0805

10uF/10V/0805

10uF/10V/0805

10uF/10V/0805

GN

D

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

D

GN

DG

ND

GN

DG

ND

GN

D

GN

D

GN

DG

ND

GN

D

GN

D

GN

D

GN

D

BLM18PG600

BLM18PG600

32.7

68K

Hz

12M

HZ

/S/3

.2X

2.5

POTI/10K/VERT

680R/0603

4k7/0402

270R/0603

4k7/0402

680R/0603

2k2/0603

2k2/0603

100R/0603

100R/0603

10k/0402 10k/0402

510R

/0603VDD3.3

VDD3.3

219-0

2

TM

PS

2-S

MD

TM

PS

2-S

MD

VDD3.3

VDD3.3

VDD3.3

VDD3.3

VDD3.3

XM

C4400_LQ

FP

100

74LV

C1G

66D

CK

74LV

C1G

66D

CK

LED-GE/D/0603

LED-GE/D/0603

LE

D/R

GB

/D/L

CC

4_S

MA

LL

P0.[0..15],P1.[0..15],P2.[0..15],P3.[0..15],P4.[0..7],P5.[0..11],P6.[0..6],P14.[0..15],P15.[2..15]

P0.[0..15],P1.[0..15],P2.[0..15],P3.[0..15],P4.[0..7],P5.[0..11],P6.[0..6],P14.[0..15],P15.[2..15]

CO

MD

IS#

CO

M_

RX

D

CO

M_

TX

D

HIB

_IO

_0

HIB

_IO

_0

HIB

_IO

_1

OT

G_

FS

_D

MO

TG

_F

S_

DPP

0.0

P0

.1P

0.2

P0

.3P

0.4

P0

.5P

0.6

P0

.7P

0.8

P0

.9P

0.1

0

P0.1

0

P0

.11

P0

.11

P0

.12

P1

.0P

1.1

P1

.2P

1.3

P1

.4P

1.5

P1

.5

P1

.6P

1.7

P1

.7

P1

.8

P1

.8

P1

.9P

1.1

0

P1.1

0

P1

.11

P1.1

1

P1

.12

P1

.13

P1

.14

P1

.15

P2.0

P2.1

P2.2

P2.3

P2.4

P2.5

P2.6

P2.7

P2.8

P2.9

P2.1

0P

2.1

4

P2

.14

P2.1

5

P3.0

P3.1

P3.2

P3.3

P3.4

P3.5

P3.6

P4.0

P4.1

P5.0

P5.1

P5.2

P5

.2

P5.7

P5.7

P1

4.0

P1

4.1

P1

4.1

P1

4.2

P1

4.3

P1

4.4

P1

4.5

P1

4.6

P1

4.7

P1

4.8

P1

4.9

P1

4.1

2P

14

.13

P1

4.1

4P

14

.15

P15.2

P15.3

P15.8

P15.9

RE

SE

T#

TC

K

TC

K

TM

S

TM

S

VA

RE

F

VD

DA

VD

DC

C300

C301

C302

C303

C304

C305

C306

C307

C308

C309

C310

C311

C312

C315

C316

C317

C318

C319

C322

C323

C324

C325

C326

G

MPJP300

L300

L301

Q301

Q302

AE

S

R300

R301

R302

R303

R304

R305

R306

R307

R308

R309

R311 R312

R313

1 234

SW

300

PP

1S S

1

SW

301

PP

1S S

1

SW

302

EP

AD

EX

P

HIB

_IO

_0

14

HIB

_IO

_1

13

P0

.02

P0

.11

P0

.21

00

P0

.39

9P

0.4

98

P0

.59

7P

0.6

96

P0

.78

9P

0.8

88

P0

.94

P0

.10

3P

0.1

19

5P

0.1

29

4

P1

.07

9P

1.1

78

P1

.27

7P

1.3

76

P1

.47

5P

1.5

74

P1

.68

3P

1.7

82

P1

.88

1P

1.9

80

P1

.10

73

P1

.11

72

P1

.12

71

P1

.13

70

P1

.14

69

P1

.15

68

P2

.05

2P

2.1

51

P2

.25

0P

2.3

49

P2

.44

8P

2.5

47

P2

.65

4P

2.7

53

P2

.84

6P

2.9

45

P2

.10

44

P2

.14

41

P2

.15

40

P3

.07

P3

.16

P3

.25

P3

.39

3P

3.4

92

P3

.59

1P

3.6

90

P4

.08

5

P4

.18

4

P5

.05

8P

5.1

57

P5

.25

6P

5.7

55

P1

4.0

31

P1

4.1

30

P1

4.2

29

P1

4.3

28

P1

4.4

27

P1

4.5

26

P1

4.6

25

P1

4.7

24

P1

4.8

37

P1

4.9

36

P1

4.1

22

3P

14

.13

22

P1

4.1

42

1P

14

.15

20

P1

5.2

19

P1

5.3

18

P1

5.8

39

P1

5.9

38

PO

RS

T#

65

RT

C_

XT

AL

_1

15

RT

C_

XT

AL

_2

16

TC

K6

7

TM

S6

6

US

B_

D+

9U

SB

_D

-8

VA

GN

D3

2V

AR

EF

33

VB

AT

17

VB

US

10

VD

DA

35

VD

DC

12

VD

DC

14

2V

DD

C2

64

VD

DC

38

6

VD

DP

11

VD

DP

14

3V

DD

P2

60

VD

DP

38

7

VS

S5

9

VS

SA

34

VS

SO

63

XT

AL

16

1

XT

AL

26

2

U300

A1

B2

EN

4G

ND

3V

CC

5

U301

A1

B2

EN

4G

ND

3V

CC

5

U303

V300

V301

2

3

4

1

V302

+

-P

S

1 2

ON

12

34

56

78

ABCDE

87

65

43

21

E D C B A

CP

U_

44

A-V

2

2/7

/20

13

5:0

5:5

4 P

M

3/5

Sh

ee

t:

Legal D

iscla

imer

Th

e in

form

atio

n g

ive

n in

th

is d

ocu

me

nt

sh

all

in n

o e

ve

nt

be

re

ga

rde

d a

s a

gu

ara

nte

e o

f co

nd

itio

ns o

r

ch

ara

cte

ristics.

With

re

sp

ect

to a

ny e

xa

mp

les o

r h

ints

giv

en

he

rein

, a

ny t

yp

ica

l va

lue

s s

tate

d h

ere

in a

nd

/or

an

y

info

rma

tio

n r

eg

ard

ing

th

e a

pp

lica

tio

n o

f th

e d

evic

e,

Infin

eo

n T

ech

no

log

ies h

ere

by d

iscla

ims a

ny a

nd

all

wa

rra

ntie

s

an

d lia

bili

tie

s o

f a

ny k

ind

, in

clu

din

g w

ith

ou

t lim

ita

tio

n,

wa

rra

ntie

s o

f n

on

-in

frin

ge

me

nt

of

inte

llectu

al p

rop

ert

y r

igh

ts

of

an

y t

hird

pa

rty.

US

B

Supply

Analo

g

Dig

ital

Hib

ern

ate

/RT

C

RG

B

CP

U

Pote

ntiom

ete

r, G

PIO

LE

Ds, I2

C P

ullu

ps

RG

B L

ED

Jumper closed with a cutable trace on bottom layer

HitexPowerScale

Boot O

ptions

BS

LO

FF

O

N

UART

CAN

CO

M B

oard

Sw

itch

Push B

uttons

CP

U

V2 / 0

8.1

0.2

012 / M

a

LED1

LED2

BU

TT

ON

1

BU

TT

ON

2

P1.5

P1.7

US

IC_R

xD

US

IC_T

xD

UA

RT

US

IC0C

H0


Production Data


Figure 27 Power, Debug Connectors, Reset

VDD3.3

VDD3.3

VDD3.3

VDD3.3

VDD3.3

VDD3.3

VDD3.3

VDD5

VDD5

VDD5

VDD5

VDD5USB

VDD5USB

VBAT

100nF

/0402

100nF

/0402

10uF/10V/0805

10nF/0402 10uF/10V/0805

100uF

/T/1

0V

/C4u7F

/0805

100nF/0402

100uF

/T/1

0V

/C10nF

/0402

GN

D

GN

D

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

D

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

D

BC

858C

VDD3.3

10k/0402

33R

/0402

33R

/0402

33R

/0402

1k5/0603

1k5/0603

680R/0603

no a

ss./33R

/0402

no ass./10k/0402

10k/0402

no ass./10k/0402

10k/0

402

270k/0402

0R

/0603

no ass./0R/0603

10k/0402

2k2/0603

10k/0

402

no a

ss./4k7/0

402

10k/0402

TM

PS

2-S

MD

no ass.

no ass.

no ass.

no ass.

IFX

1763_P

AD

NO

P

TP

S2051B

DB

V

VDD3.3

VDD3.3

VDD5

VDD3.3

BA

S3010A

-03W

LED-GN/D/0603

LED-GN/D/0603

LED-GN/D/0603

BAT54-02V BAT54-02V

BAV70W

LED-RT/D/0603

BAS3010A-03W

S2*1

0/1

.27S

O

XE

3K

_D

M2+

CT

X

BK

-885

CO

MD

IS#

DB

GP

RE

S#

DB

GP

RE

S#

HIB

_IO

_1

P0

.7

P0

.8

P1

.5P

1.7

P2

.1

P3

.1P

3.2

RE

SE

T#

RE

SE

T#

TC

KT

MS

C400

C401

C405

C406C407

C411

C412

C413

C414

C415

Q404

R401

R402

R403

R404

R405

R406

R407

R410

R411

R412

R413

R414

R415

R416

R417

R419

R420

R422

R427

R428

PP

1S S

1

SW

400

1

TP404

1

TP405

1

TP406

1

TP407BY

P4

EN

5

EX

P9

GN

D3

GN

D6

GN

D7

IN8

OU

T1

SE

NS

E/A

DJ

2

U401

EN

4F

AU

LT

#3

GND2

VIN

5V

OU

T1

U403

AC

V400

V401

V402

V403

21V404

2 1V405

1

23

V406

V407

ACV408

12

34

56

78

91

01

11

21

31

41

51

61

71

81

92

0

X400

C1

C2

C3

C4

C5

C6

C7

C8

C9

C1

0

D1

D2

D3

D4

D5

D6

X401

1+2+

-

X402

7.6

2m

m

DM2 extension PCB

+

+

12

34

56

78

ABCDE

87

65

43

21

E D C B A

CP

U_

44

A-V

2

2/7

/20

13

5:0

5:5

4 P

M

4/5

Sh

ee

t:

Legal D

iscla

imer

Th

e in

form

atio

n g

ive

n in

th

is d

ocu

me

nt

sh

all

in n

o e

ve

nt

be

re

ga

rde

d a

s a

gu

ara

nte

e o

f co

nd

itio

ns o

r

ch

ara

cte

ristics.

With

re

sp

ect

to a

ny e

xa

mp

les o

r h

ints

giv

en

he

rein

, a

ny t

yp

ica

l va

lue

s s

tate

d h

ere

in a

nd

/or

an

y

info

rma

tio

n r

eg

ard

ing

th

e a

pp

lica

tio

n o

f th

e d

evic

e,

Infin

eo

n T

ech

no

log

ies h

ere

by d

iscla

ims a

ny a

nd

all

wa

rra

ntie

s

an

d lia

bili

tie

s o

f a

ny k

ind

, in

clu

din

g w

ith

ou

t lim

ita

tio

n,

wa

rra

ntie

s o

f n

on

-in

frin

ge

me

nt

of

inte

llectu

al p

rop

ert

y r

igh

ts

of

an

y t

hird

pa

rty.

FT

SH

-10

5-0

1-L

-DV

-K

FL

E-1

03

-01

-G-D

V

Cort

ex D

ebug

Debugger

pulls

sig

nal to

GN

D

Ext. d

evic

e p

ulls

sig

nal to

GN

Dand d

isconnects

RX

/TX

sig

nals

from

CO

M c

onnecto

r

Layout pla

cem

ent

The D

riveM

onitor

exte

nsio

n P

CB

hosts

the C

AN

tra

nsceiv

er

and the U

AR

T s

witch logic

connecte

d to X

401

PCB edge CPU-Board

1

1

FLE-103

FTSH-105

US

B-O

TG

Supply

VD

D3.3

Supply

RT

C B

attery

Reset

Pow

er

LE

D a

nd T

estp

oin

ts

Po

we

r, D

eb

ug

, R

ese

t

V2 / 0

8.1

0.2

012 / M

a

RE

SE

T

and k

eeps the o

nboard

wig

gle

rin

reset sta

te

Battery

Hold

er

P1.5

P1.7

US

IC_R

xD

US

IC_T

xD

UA

RT

US

IC0C

H0

TD

O/S

WO

TD

I

TR

ST


Production Data


Figure 28 On-board Debugger

VDD5

15pF/0402

15pF/0402

100nF

/0402

no a

ss./10nF

/0402

100nF/0402

100nF/0402

10uF/10V/0805

100nF/0402

100nF/0402

100nF/0402

10uF/10V/0805

100nF

/0402

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

D

GN

D

GN

D

GN

D

GN

DG

ND

BLM

18P

G600

12M

HZ

/S/3

.2X

2.5

510R

/0603

33R

/0402

33R

/0402

10k/0402

680R/0603

1M/0402

4k7/0402 10k/0402

XM

C4200_Q

FN

48

VDD3.3

VDD3.3

VDD3.3

VDD3.3

ESD8V0L2B-03L

BAS3010A-03W

LED-GN/D/0603

ZX62-AB-5PA

no a

ss.

CO

MD

IS#

CS

CS

DB

GP

RE

S#

DE

BU

G_LE

D

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Production Data


3.2 Component Placement and Geometry

Figure 29 Component Placement and Geometry

2.4

Alle Angaben in [mm] +/-0.1

21.0317.82

25.08

86.60

14.70

20

.99

37

.50

93.57

75

.00

81

.03

12

34

+

-A P

SGND

ON

1

2

80

46

44

2

80

46

44

2

80 46 44 2

FLEFTSH

ADJ_1

ADJ_2

ADJ_3

C200

C201

C202

C205

C206

C209 C210

C30

0

C301

C302

C303

C30

4

C305

C306

C307C

308

C309

C310

C311

C31

2

C315

C31

6C31

7

C318

C319

C322

C323C324

C32

5

C326

C400

C401

C405

C406

C407

C411

C412

C413

C414

C415

C500

C501

C502

C503C504

C505

C506

C507

C508

C509

C510

C511

JP300

L201

L300

L301

L500

Q301

Q302

Q404

Q500

R200

R202R203

R204

R300

R301

R302

R303

R304

R305

R306

R307

R308R309

R311

R312

R313

R401

R402

R403

R404 R405R406

R407

R410

R411

R412

R413R

414

R415

R416

R417

R419

R420

R422

R427

R428

R500

R501R502

R503

R504

R505

R506

R507

SW300

SW301 SW302

SW400

TP404

TP405

TP406

TP407

U300

U301U303

U401

U403

U500

V201

V300

V301

V302

V400

V401V402

V403

V404

V405

V406

V407

V408

V500 V501V502

X200

X201

X202

X203

X400

X401

X402

X500

X501


Production Data


3.3 Bill of Material (BOM)

Table 11 BOM of CPU_44A-V2 Board

Pos. No.

Qty Value Device Reference Des.

1 1 0R/0603 Resistor R416

2 2 1M/0402 Resistor R200, R505

3 2 1k5/0603 Resistor R405, R406

4 3 2k2/0603 Resistor R306, R307, R420

5 3 4k7/0402 Resistor R302, R304, R506

6 1 4u7F/0805 Capacitor, ceramic C412

7 11 10k/0402 Resistor R204, R311, R312, R401, R412, R414, R419, R422, R428, R503, R507

8 2 10nF/0402 Capacitor C406, C415

9 9 10uF/10V/0805 Capacitor, ceramic C308, C323, C324, C325, C326, C405, C407, C506, C510

10 2 12MHZ/S/3.2X2.5 Crystal, NX3225GD, NDK Q302, Q500

11 6 15pF/0402 Capacitor C312, C315, C316, C317, C500, C501

12 1 32.768KHz Crystal, NX3215SA, NDK Q301

13 5 33R/0402 Resistor R402, R403, R404, R501, R502

14 2 33R/0402 Resistor R202, R203

15 2 74LVC1G66DCK IC, Single Analog Switch U301, U303

16 2 100R/0603 Resistor R308, R309

17 31 100nF/0402 Capacitor

C200, C201, C202, C205, C206, C209, C210, C300, C301, C302, C303, C304, C305, C306, C307, C309, C310, C311, C318, C319, C322, C400, C401, C413, C502, C504, C505, C507, C508, C509, C511

18 2 100uF/T/10V/C Capacitor, bipolar C411, C414

19 1 219-02 Dual DIP-Switch, 0.1" SMD SW300

20 1 270R/0603 Resistor R303

21 1 270k/0402 Resistor R415

22 2 510R/0603 Resistor R313, R500

23 4 680R/0603 Resistor R301, R305, R407, R504

24 3 BAS3010A-03W Diode, SOD323, Infineon V400, V408, V501

25 2 BAT54-02V Diode, SC79, Infineon V404, V405

26 1 BAV70W Diode, SOT323, Infineon V406

27 1 BC858C Transistor, SOT23-3, Infineon Q404

28 1 BK-885 Battery Holder, 12mm Coin Cell X402

29 4 BLM18PG600 Ferrite Bead, 0603, Murata L201, L300, L301, L500

30 2 ESD8V0L2B-03L Diode, TSLP-3-1, Infineon V201, V500

31 3 FIDUCIAL FIDUCIAL ADJ_1, ADJ_2, ADJ_3

32 3 HSEC8_MATING-CARD Connector, Edgecard, Samtec X200, X201, X202

33 1 IFX1763-3.3 Voltage Regulator, 3.3V LDO, Infineon U401

34 2 LED-GE/D/0603 LED, yellow V300, V301

35 4 LED-GN/D/0603 LED, green V401, V402, V403, V502

36 1 LED-RT/D/0603 LED, red V407

37 1 LED/RGB/D/LCC4_SMALL LED, RGB, LCC4_SMALL V302

38 1 POTI/10K/VERT Potentiometer, K09K1130A8G, ALPS R300

39 1 S2*10/1.27SO Connector, FTSH-110-01-L-DV-K-P, Samtec X400


Production Data


Table 11 BOM of CPU_44A-V2 Board

Pos. No.

Qty Value Device Reference Des.

40 3 TMPS2-SMD Switch, tactile SW301, SW302, SW400

41 1 TPS2051BDBV IC, Power Switch U403

42 1 XE3K_DM2+CTX

Connector, FTSH-105-01-LM-DV-K, without pin 7, Samtec Connector, FLE-103-01-G-DV, Samtec X401

43 1 XMC4200_QFN48 IC, XMC4200, QFN48, Infineon U500

44 1 XMC4400_LQFP100 IC, XMC4400, LQFP100, Infineon U300

45 2 ZX62-AB-5PA Connector, Micro-USB, Hirose X203, X500

46 1 no ass. Pinheader, 4-pin, 0.1" TH X501

47 4 no ass. Pinheader, 1-pin, 0.1" TH TP404, TP405, TP406, TP407

48 1 no ass./0R/0603 Resistor R417

49 1 no ass./4k7/0402 Resistor R427

50 2 no ass./10k/0402 Resistor R411, R413

51 1 no ass./10nF/0402 Capacitor C503


53 1 no ass. Pinheader, 3-pin, 0.1" TH, Hitex PowerScale JP300

w w w . i n f i n e o n . c o m

Published by Infineon Technologies AG

Microcontrol ler

Hexagon Appl icat ion Ki t For XMC4000 Family

Board User‘s Manual

Revision 1.0, 2012-09-21

MOT_GPDLV-V2 General Purpose Motor Drive Card

Edition 2012-09-21

Published by Infineon Technologies AG 81726 Munich, Germany

© 2012 Infineon Technologies AG All Rights Reserved.

Legal Disclaimer

The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party.

Information

For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com).

Warnings

Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office.

Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.


Template: IFX_Template_2011-02-24.dot

Revision History

Page or Item Subjects (major changes since previous revision)

Revision 1.0,

2012-09-21

Initial release

Trademarks of Infineon Technologies AG

AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, EconoPACK™, CoolMOS™, CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OptiMOS™, ORIGA™, PRIMARION™, PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™, SINDRION™, SIPMOS™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™, TRENCHSTOP™, TriCore™.

Other Trademarks

Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™, PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™, FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG. FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc. RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited.

Last Trademarks Update 2011-02-24

MOT_GPDLV-V2 General Purpose Motor Drive Card Table of Contents

Board Users Manual 4 Revision 1.0, 2012-09-21

Table of Contents

Introduction ............................................................................................................................................................ 7

1 Overview ............................................................................................................................................. 7 1.1 Key Features ........................................................................................................................................ 7 1.2 Block Diagram ...................................................................................................................................... 8

2 Hardware Description ........................................................................................................................ 9 2.1 Power Supply ..................................................................................................................................... 10 2.2 Satellite Connector ............................................................................................................................. 11 2.3 Gate Driver and Power Stage ............................................................................................................ 13 2.4 Voltage and Current Measurements .................................................................................................. 15 2.4.1 Phase Current Measurement ............................................................................................................. 15 2.4.2 Phase Voltage Measurement ............................................................................................................. 15 2.5 Resolver Interface .............................................................................................................................. 16 2.6 Encoder and Hall Interface ................................................................................................................. 18

3 Production Data................................................................................................................................ 19 3.1 Schematics ......................................................................................................................................... 19 3.2 Components Placement and Geometry ............................................................................................. 23 3.3 List of Material .................................................................................................................................... 24

MOT_GPDLV-V2 General Purpose Motor Drive Card List of Figures


List of Figures

Figure 1 Block Diagram of the General Purpose Motor Drive Card ................................................................... 8 Figure 2 General Purpose Motor Drive Card...................................................................................................... 9 Figure 3 Block Diagram of the Power Circuit ................................................................................................... 10 Figure 4 Connection to the CPU Board ............................................................................................................ 11 Figure 5 Pin Mapping on ACT Satellite Connector .......................................................................................... 11 Figure 6 Pin Mapping to XMC4500 on CPU Board CPU_45A-V2 ................................................................... 12 Figure 7 Block Diagramm of the Gate Driver and the Power Stage ................................................................ 14 Figure 8 Measurement of Voltages and Currents ............................................................................................ 15 Figure 9 Connection Scheme of the Resolver Connector ................................................................................ 16 Figure 10 Resolver Excitation Circuit ................................................................................................................. 16 Figure 11 Resolver Modulator Circuit ................................................................................................................. 17 Figure 12 Encoder Connector for differential encoder signals ........................................................................... 18 Figure 13 Encoder Line Receiver (differential signals) and hall interface .......................................................... 18 Figure 14 Satellite Connector, Power Supply..................................................................................................... 20 Figure 15 Gate Driver, Power Stage, Shunt Amplifier, Motor Connector ........................................................... 21 Figure 16 Resolver, Encoder, Hall Connector .................................................................................................... 22 Figure 17 Components Placement and Geometry ............................................................................................. 23


List of Tables


List of Tables

Table 1 Power LED ......................................................................................................................................... 10 Table 2 Power rail connection to the ACT Satellite Connector ....................................................................... 10 Table 3 Gate Driver signals connection to the ACT Satellite Connector ........................................................ 14 Table 4 Voltage and Current signals at the ACT Satellite Connector ............................................................. 15 Table 5 Resolver signals at the ACT Satellite Connector ............................................................................... 17 Table 6 Encoder / hall signals at the ACT Satellite Connector ....................................................................... 18 Table 7 List of Material for General Purpose Motor Drive Card (MOT_GPDLV-V2-002) ............................... 24

MOT_GPDLV-V2 General Purpose Motor Drive Card Overview


Introduction

This document describes the features and hardware details of the General Purpose Motor Drive Card (MOT_GPDLV-V2) designed to work with Infineon’s CPU boards of the XMC4000 family. This board is a member of Infineon’s Hexagon Application Kits.

1 Overview

The MOT_GPDLV-V2 board is an application expansion satellite card of the Hexagon Application Kits. The satellite card along with a CPU board (e.g. CPU_45A-V2 board) demonstrates the motor control capabilities of XMC4000 family. The main use case for this satellite card is proofing software algorithms and methods for motor control. The focus is safe operation under evaluation conditions. The board is neither cost nor size optimized and does not serve as a reference design.

1.1 Key Features

The MOT_GPDLV-V2 satellite card is equipped with following features

Seamless connection to the CPU board (e.g. CPU_45A-V2) via the ACT satellite connector

3 phase low voltage half-bridge inverter using Infineon’s N-channel OptiMOS™3 power transistors

Gate Driver IC (6ED003L02-F2) with over-current detection circuit (ITRIP)

Current measurement by using single or triple shunts (amplified)

Position sensing via o Inductive resolver interface using delta-sigma modulator and pattern generator for resolver

excitation o Quadrature encoder interface for both single ended and differential signals o Hall sensor interface

Input voltage range: 24 V +/-20%

Power supply o Switch mode power supply for 5V power generation o Low drop voltage regulators (15 V) for MOSFET gate driver and resolver excitation o Low drop voltage regulators (3.3V) for logic

Maximum DC-link current: 7.5 A, nominal DC-link current 5 A

MOT_GPDLV-V2 General Purpose Motor Drive Card Overview


1.2 Block Diagram

Figure 1 shows the block diagram of the MOT_GPDLV-V2 satellite card. There are following building blocks:

Connectors to CPU Board, power supply, motor and position interfaces

Analog signal measurement

Position sensing

Figure 1 Block Diagram of the General Purpose Motor Drive Card

General Purpose Motor Drive Card (MOT_GPDLV-V2)

Gate Driver

Encoder Line Driver

ADC

24VPower Supply

CCU8

Plu

g

AC

T S

ate

llit

e C

on

ne

cto

r

En

co

de

r

Co

nn

ec

tor

Re

so

lve

r

Co

nn

ec

tor

3-Phase

Power

Half-Bridge

Current & Voltage Sensing

Resolver Excitation

Resolver

Reader

5V

Mo

tor

Co

nn

ec

tor

EN

DSD

DSD Pattern

EN#

POSIF

FAULT#

BlockDiag.emf

MOT_GPDLV-V2 General Purpose Motor Drive Card Hardware Description


2 Hardware Description

The following sections give a detailed description of the hardware and how it can be used.

Figure 2 General Purpose Motor Drive Card

Resolver

Connector

Power Stage

and Motor Connector

Resolver

Signal Reader

Power

Plug 24 V Power

15 V LDO

Power LEDs

ACT Satellite

Connector

Hall

ConnectorPower 5 V SMPS

Power 3.3 V LDO

Shunt Amplifier

Gate Driver

Encoder

Connector

Emitter Shunts

Resolver

Coil Excitation

Encoder

Line

Receiver

PCB_Block.emf

DC-Link Shunt



2.1 Power Supply

The General Purpose Motor Drive Card must be supplied by an external 24 Volt DC power supply connected to its power jack X240. The power to be delivered by the external power supply depends on the overall load mainly defined by the power consumption of the motor. The power supply unit (24V / 2A) delivered with the motor control kit is sufficient to drive the enclosed motor as well as other satellite cards connected to the CPU board. The power supply concept is shown in Figure 3.

A diode protects the power supply units and the circuit if more than one power supply is connected to the system via other satellite cards or via the CPU board (USB). The General Purpose Motor Drive Card is able to supply all other boards with 5V (VDD5) via the ACT satellite connector.

An on-board DC-DC converter (U240) steps down the 24 V input voltage from the power jack to 5 V (VDD5). The input voltage VDD24 must be 24 V +/-20%. The 5 Volt supply for analog circuits VDDA5 is derived from VDD5 filtered by a low pass. A LDO voltage regulator generates 3.3 V (VDD3.3) out of VDD5 and another voltage regulator generates 15 V (VDD15) power supply out of the 24 V input voltage.

Three power LEDs indicate the presence of the generated supply voltages.

Table 1 Power LED

LED Power Rail Voltage Note

V210 VDD5 5.0 V Must always be “ON”

V211 VDD3.3 3.3 V Must always be “ON”

V212 VDD15 15.0V Must always be “ON”

Figure 3 Block Diagram of the Power Circuit

Table 2 shows the connection of the power rails to the ACT satellite connector.

Table 2 Power rail connection to the ACT Satellite Connector

Pin No. Power rail Description

43,44,45,46 VDD5 5 V

1,2,79,80 GND Ground

VDD3.3

General Purpose Motor Drive Card (MOT_GPDLV-V2)

Plu

g

AC

T S

ate

llit

e C

on

ne

cto

r15V

3.3V

Lin. Voltage

Regulator

TLE4276

Lin. Voltage

Regulator

IFX1763

24V

DC/DC

Converter

IFX910415V

Gate Driver IC,

Resolver Excitation

VDD15 LED

VDD5 LED

VDD3.3 LED

5V

Resolver Excitation,

Encoder/Hall Con.

24V3-Phase

Power Stage

Shunt Amplifier,

Resolver

Encoder Line Driver,

Resolver

VDDA5A

VDD15

VDD24

VDD5

VDD5A

LP

Low Pass

Reverse

ProtectionU240

PowerSupply.emf



2.2 Satellite Connector

The satellite connector of the General Purpose Motor Drive Card is the interface to the CPU board e.g. CPU_45A-V2. Take care to connect the General Purpose Motor Drive Card always to the corresponding ACT satellite connector of the CPU board only as shown in Figure 4.

Figure 4 Connection to the CPU Board

The signal mapping details of the ACT satellite connector and the General Purpose Motor Drive Card are provided in Figure 5. The inner rows show the general function of the 80 pins of the ACT connector, which is common for all ACT satellites cards. The outer rows show the signals of the General Purpose Motor Drive Card. The General Purpose Motor Drive Card provides 5 functional groups of signals (marked by color code) at its pins of the satellite connector:

The encoder signals (ENCA, ENCB, ENCI): pin 4, 6 and 8

Resolver signals (PWMN/P, MCLK, MCOS, MSIN): pin 9, 11, 13, 14, 15, 16

Control and TRAP signals (FAULT#, ENPOW, ENENC#): pin 25, 26, 30

Voltage and current measurement signals: (UU, UV, UW, UZ, AMP_IW…) located from pin 49 to 60

PWM signals for the 3-Phase power stage (HIN1#, LIN1#, HIN2 …): pin 64, 66, 68,70, 72, 74

Figure 5 Pin Mapping on ACT Satellite Connector

ACT_Connection.emf



Figure 6 is an extended view of the signal mapping between the General Purpose Motor Drive Card (MOT_GPDLV-V2) and the “XMC4500 CPU Board General Purpose” (CPU_45A-V2). It shows in details which pin of the XMC4500 is mapped to which signal on the motor drive card.

Figure 6 Pin Mapping to XMC4500 on CPU Board CPU_45A-V2



2.3 Gate Driver and Power Stage

The power stage consists of three half-bridges using Infineon’s N-channel OptiMOS™ power transistors. They are selected for a safe operation area with huge headroom, hence no cooling is needed when using at nominal current of 5 Ampere.

The gate driver (6ED003L02-F2) is Infineon’s full bridge driver in SOI-technology offering an excellent ruggedness on transient voltages. The external bootstrap circuitry has been dimensioned according to the formula (see Infineon application note AN-EICEDRIVER-6EDL04-1):

( )

( )

With

CBS: Bootstrap Capacity (1 uF)

iQBS: highside driver quiescent current (max. 100 uA)

QG: Gate charge (max. 130 nC)

∆VBS: max. allowed voltage drop at the bootstrap capacitor (5 V)

Factor 1.2: 20% margin for capacitor

the minimum switching period tP is 40 ms:

( )

The gate driver offers several protection features like under-voltage lockout, signal interlocking of every phase to prevent cross-conduction and overcurrent detection.

In an error situation a FAULT# signal is generated and must be handled by the microcontroller. The FAULT# signal changes to low state if an over-current condition has been detected by the ITRIP circuit. The ITRIP current level is measured as the amplified voltage drop over the DC-link shunt (see Figure 7). The minimum input voltage level to trigger an over-current event is specified at 380 mV. With an amplifier gain of 1 + (40.2/10) = 5.02 and a DC-Link shunt with 10 mΩ the ITRIP will be triggered at a DC-Link current higher than 7.57 A:

I = U / R,

I = (0.38 V / 5.02) / 10 mΩ,

I = 7.57 A.

The overcurrent condition must be present for longer than about 100 us (3 * RC time constant of the RC filter R322, C310) in order to trigger the ITRIP. This shall protect the PCB traces and the components in the high current path.

The microcontroller must provide the PWM signals (LIN1/2/3#, HIN1/2/3#) for the high-side and low-side switches. The PWM signals must be generated low-active.

The gate driver must be enabled via signal ENPOW.

A phase current measurement is provided via shunt resistors

a) single shunt (10 mΩ) in the DC-link path and/or b) triple shunt (10 mΩ) in the low-side path

The resistance of the shunts limits the system behavior and may not fit to the low-ohmic power transistors. This is intended as the main purpose of this board is to proof SW algorithms and methods over a wide range.



Figure 7 Block Diagram of the Gate Driver and the Power Stage

Table 3 shows the connection of the Gate Driver signals to the ACT satellite connector.

Table 3 Gate Driver signals connection to the ACT Satellite Connector

Pin No. Signal Name Description

25 FAULT# this signal indicates over-current and under-voltage (low-active)

26 ENPOW High level enables the power stage (high-active)

64 HIN1# High-side logic input 1 (low-active)

66 LIN1# Low-side logic input 1 (low-active)





PowerStage.emf

VDD15 VDD24

COM

U

V

W

LO1,2,3

HO1,2,3

VS1,2,3

VB1,2,3

IZ

ITRIP

VCC

HIN1,2,3

LIN1,2,3

FAULT#

EN

RCIN

VSS

FAULT#

VDD3.3

ENPOW

GND GND

VDD15

GND

LIN1#

HIN1#

LIN2#

LIN3#

HIN3#

HIN2#

GND

GND

IV

IU

IW

Ground Star

COM

GND

Bootstrap

6ED003L02-F2

Gate Driver

GND



2.4 Voltage and Current Measurements

The phase current measurement is illustrated on the left side of Figure 8; the right side shows the voltage divider for the voltage measurement.

Figure 8 Measurement of Voltages and Currents

2.4.1 Phase Current Measurement

The current measurement can be done via a single shunt (signal IZ) in the DC-link path or via triple shunts (IU, IV, IW) in the emitter path. In both cases the measurement is dimensioned for the following requirements:

Motor power range up to 120W which leads to a nominal DC-link current of about 5 Ampere and a maximum phase peak current of about 20 Ampere. The phase current range is 75 mA to 20 A.

A shunt resistance of 10 mΩ leads to 0.75 mV voltage drop @ 75 mA and 200 mV voltage drop @ 20 A. This voltage is amplified by a non-inverting amplifier. The output of the operational amplifier (AMP_IU, AMP_IV, AMP_IW, AMP_IZ) is available at the ACT Satellite Connector and connected to ADC input channels of the XMC4000 microcontroller.

The gain of the operational amplifier is set to 21 (G = 1 + (R1 / R2)), which leads to an output voltage of 15.75 mV @ 75 mA and 4.20 V @ 20A.

The XMC4000 offers a DAC output which is used as DC offset generator for the OpAmps (signal OFFS). The DAC voltage must be adjusted to a voltage level of about 1.2 V in order to get 0 V at the output of the OpAmps when there is no current flow through the shunts. Alternatively the offset can be generated by a resistive voltage divider.

2.4.2 Phase Voltage Measurement

The phase voltage is directly measured using resistive dividers at the phases (signals UZ, UU, UV, and UW). The divider is dimensioned to divide the measured voltage UZ, UU, UV, UW by factor 10.21. The formula to calculate the phase voltage UPHx from the measured voltage Ux is:

UPHx = 10.21 * Ux

Table 4 summarizes all voltage signals and current signals available at the ACT satellite connector.

Table 4 Voltage and Current signals at the ACT Satellite Connector


50 OFFS Offset voltage input required for the shunt amplifier

IVIU

VDDA5

AGND AGND

U

V

W

VDD24

IZ

GND

IW

IZ

AGND

AGND

OFFS

OFFS

AMP_IW

AMP_IV

AMP_IU

AMP_IZ

ShuntAmp.emf

AGND AGNDAGND

VDDA5

UW

UV

UU

UZ



Table 4 Voltage and Current signals at the ACT Satellite Connector


53 AMP_IU Amplified shunt voltage output representing the current of phase U

57 AMP_IV Amplified shunt voltage output representing the current of phase V

49 AMP_IW Amplified shunt voltage output representing the current of phase W

59 AMP_IZ Amplified shunt voltage output representing the DC-link current

56 UU Divided voltage output of phase U (divided by 10.21)

52 UV Divided voltage output of phase V (divided by 10.21)

60 UW Divided voltage output of phase W (divided by 10.21)

55, 58, 61 UZ Divided DC-link output voltage (divided by 10.21)

2.5 Resolver Interface

For rotor position detection a resolver can be used. The three coils of the resolver must be connected to the connector X400 as shown in Figure 9.

Figure 9 Connection Scheme of the Resolver Connector

The XMC4000 devices use an on-chip pattern generator for the excitation of the primary coil and a decimation filter to read the SIN/COS feedback measured by a delta-sigma modulator.

The primary coil excitation is done via the microcontroller signals PWMP/PWMN which is a digital data stream with a selectable clock rate in the MHz range. These signals are integrated, amplified and fed to the primary coil of the resolver as shown in Figure 10.

Figure 10 Resolver Excitation Circuit

The feedback signals (SINA/B and COSA/B) of the secondary coils are fed to a delta-sigma modulator ADS1205 which has an internal clock and generates the SIN/COS serial data stream on the signals MSIN/MCOS. It also provides the modulator clock MCLK. The circuit is shown in Figure 11.

PRIMA

PRIMB

SINA

SINB

COSA

COSB

ResolverCon.emf

1

X400

2

3

4

5

6

PRIMA

ResolverExc.emf

PWMP

GND

VDD5

GND

VDD15

PWMN PRIMB



Figure 11 Resolver Modulator Circuit

Table 5 summarizes all signals of the resolver which are connected to the ACT satellite connector.

Table 5 Resolver signals at the ACT Satellite Connector


9 PWMN Excitation input signal (inverted)

11 PWMP Excitation input signal

14 MCOS COS signal output of the delta sigma modulator

16 MSIN SIN signal output of the delta sigma modulator

15, 13 MCLK Clock output of the delta sigma modulator

SINB

SINA

COSA

COSB

Resolver.emf

MSIN

MCOS

MCLK



2.6 Encoder and Hall Interface

A quadrature encoder can be used for detecting the actual rotor position. There are single-ended and differential encoders, the board supports both types. For the differential types an encoder line receiver is required as the microcontroller needs single ended signals.

Figure 12 Encoder Connector for differential encoder signals

The differential signals from the encoder (ENCA+/-, ENCB+/-, ENCI+/-) must be connected to the 10-pin encoder connector X441 (Figure 13). The receiver must be enabled by the signal ENENC# (set to “0”).

In case of using a single ended encoder or a hall sensor the signals must be applied to the connector X440 and the encoder line receiver must be disabled by setting the signal ENENC# to high level (default).

The parallel operation of both a differential encoder and a hall sensor is possible by adapting the resistor values shown in Figure 13. The pull-up resistors value must be changed to 4.7 kΩ, the serial resistors must be set to 680 Ω. This will ensure appropriate signal levels for the encoder signals ENCx in all use cases and limits the current to about 5 mA.

Figure 13 Encoder Line Receiver (differential signals) and hall interface

Figure 6 shows the connection of the encoder/hall signals available at the ACT satellite connector.

Table 6 Encoder / hall signals at the ACT Satellite Connector


30 ENCEN# enable signal for the encoder line receiver (active low)

4 ENCA Encoder channel A

6 ENCB Encoder channel B

8 ENCI Encoder channel I

1 2

ENCA+ENCA-

ENCB+ENCB-

ENCI+ENCI-

GND

VDD5

Encoder Connector

(top view)

9 10

EncoderCon.emf

X441

ENCI

ENCI+ENCI-

ENCA

ENCA+ENCA-

ENCB

ENCB+ENCB-

ENENC#

Encoder.emf

1

X440

2

3

4

5

VDD3.3 VDD5

GND

MOT_GPDLV-V2 General Purpose Motor Drive Card Production Data


3 Production Data

3.1 Schematics

This chapter contains the schematics for the General Purpose Motor Drive Card (MOT_GPDLV-V2):

Figure 14: Satellite Connector, Power Supply

Figure 15: Gate Driver, Power Stage, Shunt Amplifier, Motor Connector

Figure 16: Resolver, Encoder, Hall Connector



Figure 14 Satellite Connector, Power Supply

100nF/0603

100nF/0603

47uF/E/50V/6.6

100nF/0603

22uF/25V/C

47uF/E/50V/6.6

100nF/0603

22

nF

/06

03

220nF/0603

470pF/0603

100uF/T/10V/C

100nF/0603

100nF/0603

100nF/0603

10uF/25V/0805

10uF/25V/0805

no ass./10nF/0603

10uF/25V/0805

100nF/0603

GN

D

GN

D

GN

DG

ND

GN

DG

ND

GN

D

GN

DG

ND

GN

D

GN

D

GN

D

GN

DG

ND

GN

D

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

D

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

DG

ND

GN

D

33

uH

/3.2

A

BL

M1

8P

G6

00

1k8/0603

680R/0603

6k8/0603

41k2/0603 8k25/0603

22

k/0

60

3

1k8/0603

14

k/0

60

3

no

ass./

08

05

no ass./0R/0603

0R

/06

03

AG

ND

VDD5

VDDA5

VDD3.3

VDD5

VDD5

VDD15

VDD5

VDD24

VDD3.3

VDD15

VDD24

VDD5

VDD5

VDD5

VDD5

TL

E4

27

6-2

DV

IFX

17

63

SJV

33

LED-GN/D/0603

LED-GN/D/0603

LED-GN/D/0603

B3

40

A-1

3-F

B3

40

A-1

3-F

HS

EC

8-1

40

-01

-S-R

A

BU

CH

SE

-LP

-5A

AM

P_

IU

AM

P_

IV

AM

P_

IW

AM

P_

IZ

EN

CA

EN

CB

EN

CI

EN

EN

C#

EN

PO

WF

AU

LT

#

HIN

1#

HIN

2#

HIN

3#

LIN

1#

LIN

2#

LIN

3#

MC

LK

MC

OS

MS

IN

OF

FS

P0

.6_

GP

IO

PW

MN

PW

MP

UU

UV

UW

UZ

UZ

UZ

C200

C202

C230

C231

C232

C240

C241

C2

42

C243

C244

C245

C246

C247

C248

C249

C250

C251

C252

C253

3

21JP242

L2

40

L2

41

R210

R211

R212

R230 R232

R2

43

R244

R2

45

R2

46

R253

R2

54

12

SJ1

TP201

TP

21

0T

P2

11

TP

21

2

TP

21

3

GN

DT

AB

IN1

INH

#2

OU

T5

VA

4

U2

30

BD

S5

BU

O6

CO

MP

3

E-PAD9

EN

7

FB

4

GND2

SY

NC

1

VS

8

U2

40

IFX

91

04

1E

JV

BY

P4

EN

5

EX

P9

GN

D3

GN

D6

GN

D7

IN8

OU

T1

SE

NS

E/A

DJ

2

U2

50

V210

V211

V212

AC

V2

41

AC

V2

42

12

34

56

78

91

01

11

21

31

41

51

61

71

81

92

02

12

22

32

42

52

62

72

82

93

03

13

23

33

43

53

63

73

83

94

04

14

24

34

44

54

64

74

84

95

05

15

25

35

45

55

65

75

85

96

06

16

26

36

46

56

66

76

86

97

07

17

27

37

47

57

67

77

87

98

0

X2

00

123X

24

0

+

+

+

+

12

34

56

78

ABCDE

87

65

43

21

E D C B A

MO

T_

GP

DL

V-V

2-2

14.0

9.2

012 1

3:4

0:1

2

2/4

Sh

ee

t:

+ -

PS

V2 / 0

8.0

5.2

012 / M

a

Sate

llite

Connecto

r, P

ow

er

AC

T-B

OA

RD

CO

NN

EC

TO

R

+3

V3

PO

WE

R S

UP

PL

Y

PO

WE

R L

ED

+1

5V

PO

WE

R S

UP

PL

Y

Re

sis

tor

clo

se

d w

ith

a c

uta

ble

tra

ce

be

twe

en

pa

ds

Hitex PowerScale

Jumper closed with a cutable trace on bottom layer

+5

V P

OW

ER

SU

PP

LY

+5

V A

NA

LO

G P

OW

ER

SU

PP

LY

+2

4V

5.2

6V



Figure 15 Gate Driver, Power Stage, Shunt Amplifier, Motor Connector

10uF/25V/0805

1u

F/0

60

3

1u

F/0

60

3

1u

F/0

60

3

22nF/0603

100nF/0603

10nF/0603

33

0u

F/5

0V

/10

.0

no

ass./

06

03

33

pF

/06

03

100nF/0603

10uF/25V/0805

no

ass./

06

03

33

pF

/06

03

no

ass./

06

03

33

pF

/06

03

no

ass./

06

03

33

pF

/06

03

GN

D

GN

D

GN

DG

ND

GN

D

GN

D

BSC031N06NS3G

BSC031N06NS3G

BSC031N06NS3G

BSC031N06NS3G

BSC031N06NS3G

BSC031N06NS3G

10k/0603

no ass./0603

3R

3/0

60

3

3R

3/0

60

3

3R

3/0

60

3

10K/0603

13

R/0

60

3

no

ass./

06

03

13

R/0

60

3

no

ass./

06

03

13

R/0

60

3

no

ass./

06

03

13

R/0

60

3

no

ass./

06

03

13

R/0

60

3

no

ass./

06

03

13

R/0

60

3

no

ass./

06

03

3k3

/06

03

47

k/0

60

3

5k1/0603

47

k/0

60

3

5k1/0603

47

k/0

60

3

5k1/0603

47

k/0

60

3

5k1/0603

40

k2

/06

03

10k/0603

15

k/0

60

3

1k1

/06

03

1k1

/06

03

no

ass./

22

k/0

60

32

2k/0

60

3

1k/0

60

3

15

k/0

60

3

1k1

/06

03

1k1

/06

03

no

ass./

22

k/0

60

32

2k/0

60

3

1k/0

60

3

15

k/0

60

3

1k1

/06

03

1k1

/06

03

no

ass./

22

k/0

60

32

2k/0

60

3

1k/0

60

3

15

k/0

60

3

1k1

/06

03

1k1

/06

03

no

ass./

22

k/0

60

32

2k/0

60

3

1k/0

60

3

0R010/2010

0R010/2010

0R010/2010

0R010/2010

AG

ND

AG

ND

AG

ND

AG

ND

AG

ND

AG

ND

AG

ND

AG

ND

AG

ND

AG

ND

AG

ND

AG

ND

VDD3.3

VDDA5

VDD24

VDD24

VDD15

VDD5

6E

D0

03

L0

2-F

2

LM

V3

21

DB

V

VSSVCC

OP

A4

83

0IP

W

OP

A4

83

0IP

WO

PA

48

30

IPW

OP

A4

83

0IP

W

V-V+

DF

LU

14

00

DF

LU

14

00

DF

LU

14

00

MK

DS

1/3

-3,8

1

AM

P_

IUA

MP

_IV

AM

P_

IWA

MP

_IZ

EN

PO

W

FA

UL

T#

GN

D

HIN

1#

HIN

2#

HIN

3#

HO

1

HO

1

HO

2

HO

2

HO

3

HO

3

ITR

IP

ITR

IP_

AM

P

ITR

IP_

AM

P

IU

IU

IV

IVIV

IW

IWIZ

IZ

IZ

IZ IZ

IZ

LIN

1#

LIN

2#

LIN

3#

LO

1

LO

1

LO

2

LO

2

LO

3

LO

3

OF

FS

OF

FS

OF

FS

OF

FS

U

U

U

U

UU

UV

UWUZ

V

V

V

V

W

W

W

W

C300

C3

01

C3

02

C3

03

C304

C305

C310

C3

11

C3

40

C3

41

C342

C343

C3

50

C3

51

C3

60

C3

61

C3

70

C3

71

5678

4

123

Q310

5678

4

123

Q311

5678

4

123

Q312

5678

4

123

Q313

5678

4

123

Q314

5678

4

123

Q315

R300

R301

R3

02

R3

03

R3

04

R305

R3

10

R3

11

R3

12

R3

13

R3

14

R3

15

R3

16

R3

17

R3

18

R3

19

R3

20

R3

21

R3

22

R3

30

R331

R3

32

R333

R3

34

R335

R3

36

R337

R3

38

R339

R3

40

R3

41

R3

42

R3

43

R3

44

R3

45

R3

50

R3

51

R3

52

R3

53

R3

54

R3

55

R3

60

R3

61

R3

62

R3

63

R3

64

R3

65

R3

70

R3

71

R3

72

R3

73

R3

74

R3

75

RS310

RS311

RS312

RS313

CO

M1

3

EN

10

FA

UL

T8

HIN

12

HIN

23

HIN

34

HO

12

7

HO

22

3

HO

31

9IT

RIP

9

LIN

15

LIN

26

LIN

37

LO

11

6

LO

21

5

LO

31

4R

CIN

11

VB

12

8

VB

22

4

VB

32

0

VC

C1

VS

12

6

VS

22

2

VS

31

8

VS

S1

2

U3

00

1 34

U3

10

A

5 2

U3

10

P

3 21

U3

40

A

5 67

U3

40

B

10 9

8

U3

40

C

12

13

14

U3

40

D

4 11

U3

40

P

V3

00

V3

01

V3

02

1X

30

0-1

2X

30

0-2

3X

30

0-3

+

12

34

56

78

ABCDE

87

65

43

21

E D C B A

MO

T_

GP

DL

V-V

2-2

14.0

9.2

012 1

3:4

0:1

2

3/4

Sh

ee

t:

Driver,

Pow

er

Sta

ge, S

hunt A

mp

GA

TE

DR

IVE

R A

ND

IS

OL

AT

ION

V2 / 0

8.0

5.2

012 / M

a

PO

WE

R S

TA

GE

AN

D S

HU

NT

S

SH

UN

T A

MP

LIF

IER

MO

TO

R C

ON

NE

CT

OR

Ga

in =

1 +

R3

38

R3

39

Ua

=

1 +

R3

38

R3

39

* U

e

ITR

IP(t

h)

= 0

.44

5V

(ty

p.)



Figure 16 Resolver, Encoder, Hall Connector

22

p/0

60

3

22

p/0

60

3

10

0n

F/0

60

3

10

0n

F/0

60

3

10

uF

/25

V/0

80

5

10

uF

/25

V/0

80

5

10

0n

F/0

60

3

10uF/25V/0805

1uF/0603

10

0p

F/0

60

3

1uF/0603

10

0p

F/0

60

3

100nF/0603

10uF/25V/0805

10

uF

/25

V/0

80

5

10

uF

/25

V/0

80

5

15

nF

/06

03

15

nF

/06

03

15

nF

/06

03

10

0n

F/0

60

3

10

uF

/25

V/0

80

5

GN

D

GN

D

GN

D

GN

D

GN

D

GN

D

GN

D

GN

D

GN

D

GN

D

GN

D

GN

D

GN

DG

ND

GN

DG

ND

GN

D

GN

D

GN

D

BC

81

7K

-40

BC

80

7-4

0

BC

81

7K

-40

BC

80

7-4

0

4k99/0603 4k99/0603

20

R/0

60

3

20

R/0

60

3

4k99/0603 4k99/0603

20

R/0

60

3

20

R/0

60

3

0R

/06

03

0R

/06

03

10k/0603 10k/0603

442R/0603 1k24/0603

20

k/0

60

3

20

k/0

60

3

2k2/0603 2k2/0603no

ass./

1k2

/06

03

18

R/1

20

6

18R/1206

18R/1206

18

R/1

20

6

10k/0603 10k/0603

442R/0603 1k24/0603

20

k/0

60

3

20

k/0

60

3

2k2/0603 2k2/0603no

ass./

1k2

/06

03

18

R/1

20

6

18R/1206

18R/1206

18

R/1

20

6

12

0R

/06

03

12

0R

/06

03

12

0R

/06

03

10k/0603

10

0R

/06

03

10

0R

/06

03

10

0R

/06

03

1k/0603

1k/0603

1k/0603

AG

ND

AG

ND

AG

ND

AG

ND

AG

ND

AG

ND

AG

ND

AG

ND

VDD15

VDDA5

VD

D3

.3

VDD5

VDD3.3

VDD3.3VDDA5

VDD15

VDD5

VDD5

VDD5

VDD15

VDD3.3

VDD3.3

VDD3.3

VDD3.3

AD

S1

20

5

OP

A2

34

7E

A

OP

A2

34

7E

A

TL

08

4C

PW

TL

08

4C

PW

TL

08

4C

PW

TL

08

4C

PW

V-V+

AM

26

LV

32

EIP

W

MP

T0

,5/6

-2,5

4

MP

T0

,5/5

-2,5

4

EN

CO

DE

R

CO

SA

CO

SA

CO

SB

CO

SB

EN

CA

EN

CA

EN

CA

+

EN

CA

+

EN

CA

-

EN

CA

-

EN

CB

EN

CB

EN

CB

+

EN

CB

+

EN

CB

-

EN

CB

-

EN

CI

EN

CI

EN

CI+

EN

CI+

EN

CI-

EN

CI-

EN

EN

C#

MC

LK

MC

OS

MS

IN

PR

IMA

PR

IMA

PR

IMB

PR

IMB

PW

MN

PW

MP

SIN

A

SIN

A

SIN

B

SIN

B

C4

00

C4

01

C4

02

C4

03

C4

04

C4

05

C4

06

C407

C410

C4

11

C412

C4

13

C414

C415

C4

16

C4

17

C4

40

C4

41

C4

42

C4

43

C4

44

Q4

10

Q4

11

Q4

12

Q4

13

R400 R401

R4

02

R4

03

R404 R405

R4

06

R4

07

R4

08

R4

09

R410 R411

R412 R413

R4

14

R4

15

R416 R417

R4

18

R4

19

R420

R421

R4

22

R423 R424

R425 R426

R4

27

R4

28

R429 R430

R4

31

R4

32

R433

R434

R4

35

R4

40

R4

41

R4

42

R443

R4

44

R4

45

R4

46

R447

R448

R449

AGND2

AGND5

AGND13

AGND17

AVDD3

AVDD4

AVDD15

AVDD16

CH

_A

+20

CH

_A

-21

CH

_B

+23

CH

_B

-22

CL

KIN

7

CL

KO

UT

10

CLK

SE

L6

DGND9

DVDD8

EX

PE

XP

OU

T_

A1

2

OU

T_

B1

1

RE

FIN

_A

18

RE

FIN

_B

1

RE

FO

UT

14

U4

00

3 21

8 4

U4

01

A

5 67

U4

01

B

3 21

U4

10

A

5 67

U4

10

B

10 9

8

U4

10

C

12

13

14

U4

10

D

4 11

U4

10

P

1A

2

1B

11

Y3

2A

6

2B

72

Y5

3A

10

3B

93

Y1

1

4A

14

4B

15

4Y

13

G4

G#

12

GN

D8

VC

C1

6

U4

40

1 2 3 4 5 6

X4

00

12345

X4

40

12

34

56

78

91

0

X4

41

12

34

56

78

ABCDE

87

65

43

21

E D C B A

MO

T_

GP

DL

V-V

2-2

14.0

9.2

012 1

3:4

0:1

2

4/4

Sh

ee

t:

Resolv

er,

Encoder

V2 / 0

8.0

5.2

012 / M

a

RE

SO

LV

ER

CO

NN

EC

TO

R

EN

CO

DE

R L

INE

RE

CE

IVE

R

RE

SO

LV

ER

SE

CO

ND

AR

Y S

IGN

AL

RE

AD

ER

RE

SO

LV

ER

PR

IMA

RY

CO

IL E

XC

ITA

TIO

N

EN

CO

DE

R C

ON

NE

CT

OR

HA

LL

SE

NS

OR

CO

NN

EC

TO

R

3.6

86

V



3.2 Components Placement and Geometry

Figure 17 Components Placement and Geometry

Dimensions in mm +/-0.1

21.65

86.60

4.4

7

37

.50

75

.00

43.30 21.65

43.30

A :B :

A

BE :D :

DE

HJ :

H

J

1

43

45

79

+

-

APS

12

3

123456

12

34

5

A D J_1

A D J_2

A D J_3

C200

C202

C 230

C231

C232

C 240

C241

C242

C243

C 244

C245

C246

C247

C248 C249

C2

50

C 251

C 252

C 253

C300

C301

C302

C 303

C 304

C305

C310

C 311

C340

C341

C342

C343

C350

C351

C360

C361C370

C371

C400C

401

C402

C 403

C404

C405

C406

C407

C410

C411

C 412

C413

C414

C415

C416

C4

17

C 440

C441

C 442

C443

C444

JP242

L240

L241

Q 310

Q 311

Q 312

Q 313

Q 314

Q 315

Q410Q411

Q 412 Q 413

R210

R211

R 212

R230

R232

R243

R 244R245

R246

R 253

R2

54

R300

R 301

R302R303

R304

R 305

R310R311

R 312 R 313 R314

R 315

R316

R317

R318

R319

R 320

R321

R322

R 330

R 331

R 332

R 333

R 334

R 335

R 336

R 337

R338

R339

R340

R341

R342

R343

R344

R345

R 350R 351

R 352

R 353

R354

R 355

R360

R361

R362

R363

R364

R3

65

R370

R371

R372R373

R374

R375

R400

R 401 R402

R 403R404

R 405

R406

R407

R408R409

R410

R411

R412

R 413

R414

R415

R416

R417

R418

R419

R 420

R421

R422

R423

R 424

R425

R 426

R 427R

428 R

42

9 R4

30

R431

R4

32

R4

33

R 434

R4

35

R 440R441

R 442

R443

R444

R445

R446

R447R448R449

RS

310

RS

311

RS

312

RS313

SJ1

TP201

TP

21

0

TP

21

1

TP

21

2

TP

21

3

U230

U 240

U2

50

U 300

U310

U 340

U 400

U401

U 410

U 440

V210

V211V212

V241

V242

V3

00

V 301

V302

X 240

X 300

X 400

X440

X441



3.3 List of Material

The list of material is valid for a certain assembly version for the General Purpose Motor Drive Card. This version is stated in the header of the Table 7. The assembly version number can be identified by the board identification code printed on the PCB. The last digit field “002” of the board identification codes “MOT_GPDLV-V2-002“ is representing the assembly version. If there is no assembly version number printed on the PCB (white empty field) than the PCB has the assembly version number 1.

The only difference between both assembly version 1 and 2 is the value of the resistor R322. In version 1 it is 100 kΩ, whereas in assembly version 2 R322 is 3.3 kΩ.

Table 7 List of Material for General Purpose Motor Drive Card (MOT_GPDLV-V2-002)

Sl. No. Qty Value Device Reference Designator

1 3 0R/0603 Resistor R254, R408, R409

2 4 0R010/2010 Shunt RS310, RS311, RS312, RS313

3 7 1k/0603 Resistor R345, R355, R365, R375, R447, R448, R449

4 8 1k1/0603 Resistor R341, R342, R351, R352, R361, R362, R371, R372

5 2 1k8/0603 Resistor R210, R244

6 2 1k24/0603 Resistor R413, R426

7 5 1uF/0603 Capacitor C301, C302, C303, C410, C412

8 4 2k2/0603 Resistor R416, R417, R429, R430

9 3 3R3/0603 Resistor R302, R303, R304

10 1 3k3/0603 Resistor R322

11 4 4k99/0603 Resistor R400, R401, R404, R405

12 4 5k1/0603 Resistor R331, R333, R335, R337

13 1 6ED003L02-F2 Gate Driver 6ED003L02-F2 U300

14 1 6k8/0603 Resistor R212

15 1 8k25/0603 Resistor R232

16 8 10k/0603 Resistor R300, R305, R339, R410, R411, R423, R424, R443

17 1 10nF/0603 Capacitor C310

18 12 10uF/25V/0805 Capacitor C249, C250, C252, C300, C343, C404, C405, C407, C415, C416, C417, C444

19 6 13R/0603 Resistor R310, R312, R314, R316, R318, R320

20 1 14k/0603 Resistor R245

21 4 15k/0603 Resistor R340, R350, R360, R370

22 3 15nF/0603 Capacitor C440, C441, C442

23 8 18R/1206 Resistor R419, R420, R421, R422, R432, R433, R434, R435

24 4 20R/0603 Resistor R402, R403, R406, R407

25 4 20k/0603 Resistor R414, R415, R427, R428

26 5 22k/0603 Resistor R243, R344, R354, R364, R374

27 2 22nF/0603 Capacitor C242, C304

28 2 22p/0603 Capacitor C400, C401

29 1 22uF/25V/C Capacitor unipolar C232

30 4 33pF/0603 Capacitor C341, C351, C361, C371

31 1 33uH/3.2A Inductor IHLP-3232DZ-11 L240





32 1 40k2/0603 Resistor R338

33 1 41k2/0603 Resistor R230

34 4 47k/0603 Resistor R330, R332, R334, R336

35 2 47uF/E/50V/6.6 Capacitor unipolar C230, C240

36 3 100R/0603 Resistor R444, R445, R446

37 15 100nF/0603 Capacitor

C200, C202, C231, C241, C246, C247, C248, C253, C305, C342, C402, C403, C406, C414, C443

38 2 100pF/0603 Capacitor C411, C413

39 1 100uF/T/10V/C Capacitor unipolar C245

40 3 120R/0603 Resistor R440, R441, R442

41 1 220nF/0603 Capacitor C243

42 1 330uF/50V/10.0 Capacitor unipolar C311

43 2 442R/0603 Resistor R412, R425

44 1 470pF/0603 Capacitor C244

45 1 680R/0603 Resistor R211

46 1 ADS1205 Delta-Sigma Modulator U400

47 1 AM26LV32EIPW Differential Line Receiver U440

48 2 B340A-13-F Schottky Diode V241, V242

49 2 BC807-40 Transistor Q411, Q413

50 2 BC817K-40 Transistor Q410, Q412

51 1 BLM18PG600 Inductor L241

52 6 BSC031N06NS3G Infineon OptiMOS3 Power-Transistor Q310, Q311, Q312, Q313, Q314, Q315

53 1 BUCHSE-LP-5A Power Plug X240

54 3 DFLU1400 Diode V300, V301, V302

55 1 ENCODER Connector X441

56 3 FIDUCIAL FIDUCIAL ADJ_1, ADJ_2, ADJ_3

57 1 HSEC8-140-01-S-RA SAMTEC 80-pin connetor X200

58 1 IFX1763SJV33 Voltage Regulator U250

59 1 IFX91041EJV Voltage Regulator U240

60 3 LED-GN/D/0603 LED green V210, V211, V212

61 1 LMV321DBV OpAmp U310

62 1 MKDS1/3-3,81 PHOENIX Connector X300

63 1 MPT0,5/5-2,54 PHOENIX Connector X440

64 1 MPT0,5/6-2,54 PHOENIX Connector X400

65 1 OPA2347EA OpAmp U401

66 1 OPA4830IPW OpAmp U340

67 1 TL084CPW OpAmp U410

68 1 TLE4276-2DV Voltage Regulator U230


70 2 no ass./1k2/0603 Resistor R418, R431





71 1 no ass./10nF/0603 Capacitor C251

72 4 no ass./22k/0603 Resistor R343, R353, R363, R373

73 4 no ass./0603 Capacitor C340, C350, C360, C370

74 7 no ass./0603 Resistor R301, R311, R313, R315, R317, R319, R321

75 1 no ass./0805 Resistor R246

76 1 3-pin header PowerScale Connector JP242

77 1 0402 Solder Jumper SJ1

78 5 no assembly SMD Pads TP201, TP210, TP211, TP212, TP213

w w w . i n f i n e o n . c o m

Published by Infineon Technologies AG

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