zero copytcp

Zero-Copy TCP/IPNikos Kontorinis Dustin McIntireEE201A Spring 2003

EE201A Spring 2003 Zero-Copy TCP/IP

Zero-Copy TCP/IP OverviewPart I: Optimizing TCP/IP software performanceEliminate data copy functions in TCP/IP software stackPart II: Creating TCP hardwareWhen software optimization is not enough


Where do copies occur?


Why copy is needed?Application->OS buffersSender: protect from modification before sendingReceiver: arbitrary virtual addresses specified by the applicationOS->Network interfaceSender: Many NICs support simple DMA (data alignment required)Receiver: Fragmentation may hide recipient until packet is reassembled


To eliminate copiesMain idea: Pass data by reference all the way down through the protocol stackWe need:Advanced Network devices: scatter/gather DMAModification of OS kernel


The role of Network devicesScatter/gather DMA : Send packets from a list of memory referencesAllow header to be constructed separately from packet payloadReceiver: Too complicated, but we dont care! (server implementation)


Page remapping

Packet data in linked chains of buffers (external mbufs in FreeBSD)Note:In FreeBSD send/receive path based on variable-size kernel network buffers (mbufs)Implementation: Change I/O read-write system callSender:Create new External mbuff and pass it down the stack (headers attached separately)Receiver: New virtual translation for the data page frame Avoid overwriting from application: copy-on-write flag


TCP/IP HardwareWhy specialized TCP/IP hardware?Speed, Power, SizeTwo basic design applicationsHigh performance applications (Speed)Used in:Internet routersVoIP call centersIntelligent network interface cards (I-NIC)Embedded applications (Power,Size)Used in:Internet AppliancesEmbedded web serversPDAs and web tablets


High Performance TCP/IPDesigned to maximize throughput by speeding up the common path protocol processing via dedicated TCP/IP hardwareTermed Transport Offload technology

Partial Offload: Involves offloading TCP/IP tasks that handle data movement from the host CPU. Also known as data path offload.

Full Offload: Involves offloading the entire TCP/IP stack from the host CPU. The network may run autonomously from the host CPU.Source: iReady Offload Whitepaper Offload Terminology


High Performance ImplementationsFrom the familiar design motivationHigh performance TCP/IP Hardware


High Performance ImplementationsMultiple architectural implementationsRetargetable coprocessors (network processors)Usually contain 1 supervisor CPU + several general purpose programmable mEnginesExamples:LevelOne (Intel) IXP1200 familySiByte (Broadcom) SB family Special purpose HW (dedicated IP routers, VoIP)Usually contain 1 supervisor CPU + dedicated function blocks (checksums, CAM, hash tables, DES, etc.)Examples:Agere NP familyNavaro Networks (Cisco)Custom ASICs May have entire networking protocols in dedicated hardware. (IPv6, IPsec, iSCSI, etc.)Examples:iReady EthernetMAX


High Performance ExampleIXP2850Source: Intel IXP2850 Whitepaper Sixteen programmable mEnginesDedicated crypto engines and hash tableLarge number of data bus channels


Embedded TCP/IPEmbedded TCP/IP hardware usually targeted for high volume, price sensitive applications.The internet toaster applicationEmbedded TCP/IP designs optimized for:low powerlow costsmall sizerobustness


Embedded ImplementationsAgain the design motivationASICSpecialPurposeRetargetableCoprocessorDSPDSP extentionsfor mPSpecification: Matlab, SPW, C++, JavaFloating PointFixed PointAlgorithm TransformationsEmbedded TCP/IP Hardware


Embedded ImplementationsTwo main architectural implementationsSimple 8 bit or 16 bit microcontrollersLimited TCP functionality (no SACK or fragmentation support)Typically no operating system, just a single polling loopExamples: Zilog eZ80 Internet EngineUMass iPIC based on Microchip PICUniversity of Washington HydraCustom ASIC hardwareMay be used in extremely high volume marketsLimited programmability Examples:Seiko iChip S-7600 and S-7601AUniversity of Oulu WebChip


Embedded Example - WebChipDesigned as research project at University of Oulu in FinlandImplemented in an Altera APEX 20K100 FPGA (100K gates max.)Total Logic size: 10K gatesMemory Size: 4KB for HTML homepage and HTTP headerProcessing time per IP packet: 60ms @ 20Mhz gives 150Mb/s performanceMay be extended in the future to include Ethernet MAC or PPP cores.

Source: Providing Network Connectivity for Small Appliances


Embedded Example - WebChipWebChip componentsIPv6 Packet FilterFilters IP packets from promiscuous MAC devicesNo IPv6 extensions, fragmentation, or IPsecTCP Connection HandlerTracks current TCP connection status. (max 1 active)No congestion control (backoff), window management, or retransmissionsStarts in LISTEN state waiting for request.Connections automatically closed after HTTP reply sentErrors force immediate reset of connectionTCP Connection TimerResets lost connectionsICMPv6 protocol interpreterResponds to basic ICMP messaging requestsNeighbor solicitation only (ARP message replies)HTTP memoryContains received HTTP header information of last packetHTTP protocol interpreterProcesses HTTP packet data to build reply messagesRequests and replies must fit in a single minimum sized segmentHTML home page memoryContains the data sent by HTTP replies


ReferencesEvaluation of a Zero-Copy Protocol Implementation by Karl-Andre Skevic, Thomas Plagemann, and Vera Goebel, IEEE, 2001End-System Optimizations for High-Speed TCP by Jeff Chase, Andrew Gallatin, and Ken Yocum, IEEE, 2000Intel Server Adapters http://developer.intel.comConnectOne http://www.connectone.comiReady http://www.iready.comInternet toasters as a Capstone Design Project by Bill Lovegrove, Don Congdon and Stephen Schuab, IEEE Frontiers in Education, Oct. 2000.UW Hydra http://portolano.cs.washington.edu/projects/hydra/Seiko USA http://www.seiko-usa-ecd.com/intcir/products/rtc_assp/s7600a.htmlThe eZ80 Webserver by James Antonakos, Circuit Cellar Magazine, Jan. 2002Providing Network Connectivity for Small Appliances: A Functionally Minimized Embedded Web Server by Janne Riihijrvi and Petry Mhnen, IEEE Communications, Oct. 2001, pp 74-79.


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