zqk ulv system block diagram · dual channel ddr iii 1333/1600 mhz 256mb x 16 * 8pcs usb3.0/2.0...
TRANSCRIPT
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ZQK ULV SYSTEM BLOCK DIAGRAM
P8
SPI ROM*2
P41
DischargerThermal Protection
SATA 0
VRAM Max. 2G
P21
INT_DP
INT_HDMI
Azalia
BATTERYP8
INT_eDP
RTL8411AARGiga LAN
P28
PCIE-3 RJ45 CONNP28
MINI CARD1WLAN+BT
PCIE-8
P26
SATA 1P26
GPU
MINI CARD 2mSATA SSD
SATA - HDDP27
DDR3
Display
P42
TPS51211DSCR+1.5V_GFX/1.05V_GFX/3V_GFX
P37
P39TPS51463VCCSA
TPS51219RTER+1.05V_VTT
TPS51216RUKR+1.5V_SUS
P40TPS51650RSLR
+VCC_CORE/+VCC_GFX
P38
P35BQ24737RGRRBatery Charger
P36TPS51225RUKR3V/5V
P43uP1642PQAG+VGPU_CORE
N14P-GV2
P16~P21
USB3.0-(1)
CCD(Camera)
P24
SpeakerP30
AMP P30
P32
P34
ALC3225AUDIO CODEC P30
P27
TPM
P31 HDMI Con. P25
eDP Con.Touch Panel (option)
P24
Mini DP Con. P23
ALC1001
USB2.0 PCI-E x1
PCI-EX8
SATA
Display
eDP
IMC
BGA 1023 17W
P2,3,4,5,6
FDI
PCI-E x1
PCHBGA 989
Panther Point
USB3.0
DMI
P7, 8, 9, 10, 11, 12
FDI
DMI(x4)
DMI
IHDA
LPC
SPI
Ivy Bridge
RTC
Dual Channel DDR III 1333/1600 MHZ
256Mb X 16 * 8pcs
USB3.0/2.0 Port(Charger)
USB2.0 Port
P31
P31
USB2.0
X'TAL 27.0MHz
Display
W/Card Reader
P30
K/B Conn
AH9249NTR-G1HALL SENSOR
P30Touch Pad Con.
Fan*2 (PWM Type)
Int. DMIC
P30
2M+4M(EC)
X'TAL25MHz
X'TAL32.768KHz
SATA
EC ITE 8587
Max. 4G P13,14
Memory Down x8pcs
DDRIII-SODIMM x1pc
P15
Channel A
Channel B
Card Reader CONNP29
4 Lane reserve
TPL@
NP@
CH@
NCH@
EV@
RAMID@
SUG@
NSW@
SW@
Touch panel
Normal panel(Default)
Charge function(Default)
No Charge function
Optimize SKU
RAMID strap pin
LAN Surge
w/o Dongle switch
w Dongle switch
I/O board
USB2.0 Port
USB2.0-(0)
USB2.0-(1)
USB2.0-(4)
USB2.0-(8)
Combo Jack
P30
P24
USB2.0-(10)
Dongle SW
P23HD3SS2521RHUR
USB3.0-(3)
128Mb X 16 * 4pcs = 1GB
USB2.0-(3)
TPM@ TPM module
KBL@ KB Backlight LED
256Mb X 16 * 4pcs = 2GB
RD@ mSATA Re-driver Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Block Diagram 1A
1 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Block Diagram 1A
1 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Block Diagram 1A
1 46Monday, January 07, 2013
ZQK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
eDP_ICOMPO 12mileDP_COMPIO 4mil
PEG_ICOMPO 12milPEG_ICOMPI, PEG_RCOMPO 4mil,
DG 1.0 : The recommended AC cap value is changed to 220nF for compatibility withPCIe Gen3 on future platforms. For Gen2 only designs, it is acceptable to continue to use the 100nF capacitor.
DP & PEG CompensationeDP Hot-plug (Disable)HPD PU/PD resistor values basedon CRB and different to DGCAD Note: Place PU resistor
within 2 inches of CPU
0.22uF AC coupling Caps for PCIE GEN1/2/3
DP_COMPIO and ICOMPO signalsshould be shorted near balls and routed with- typical impedance < 25 mohms
PEG_ICOMPI and RCOMPO signalsshould be shorted and routed with- max length = 500 mils- typical impedance = 43 mohmsPEG_ICOMPO signals should be routed with- max length = 500 mils- typical impedance = 14.5 mohms
02Ivy Bridge Processor (DMI,PEG,FDI) (CPU)
PEG_COMP
EDP_COMPINT_EDP_HPD#
PEG_COMP
EDP_COMP
EDP_AUXPEDP_AUXN
EDP_TXN0
EDP_TXP0
INT_EDP_HPD#
EDP_TXP1EDP_TXP2EDP_TXP3
EDP_TXN1EDP_TXN2EDP_TXN3
DMI_RXN0[7]DMI_RXN1[7]DMI_RXN2[7]DMI_RXN3[7]
DMI_RXP0[7]DMI_RXP1[7]DMI_RXP2[7]DMI_RXP3[7]
DMI_TXN0[7]DMI_TXN1[7]DMI_TXN2[7]DMI_TXN3[7]
DMI_TXP0[7]DMI_TXP1[7]DMI_TXP2[7]DMI_TXP3[7]
FDI_TXN0[7]FDI_TXN1[7]FDI_TXN2[7]FDI_TXN3[7]FDI_TXN4[7]FDI_TXN5[7]FDI_TXN6[7]FDI_TXN7[7]
FDI_TXP0[7]FDI_TXP1[7]FDI_TXP2[7]FDI_TXP3[7]FDI_TXP4[7]FDI_TXP5[7]FDI_TXP6[7]FDI_TXP7[7]
FDI_INT[7]
FDI_FSYNC0[7]FDI_FSYNC1[7]
FDI_LSYNC0[7]FDI_LSYNC1[7]
EDP_AUXN[24]EDP_AUXP[24]
EDP_TXN0[24]
EDP_TXP0[24]
EDP_HPD [24]
EDP_TXP1[24]EDP_TXP2[24]EDP_TXP3[24]
EDP_TXN1[24]EDP_TXN2[24]EDP_TXN3[24]
PEG_RX#13 [16]PEG_RX#12 [16]
PEG_RX#15 [16]PEG_RX#14 [16]
PEG_RX#8 [16]PEG_RX#9 [16]PEG_RX#10 [16]PEG_RX#11 [16]
PEG_RX13 [16]PEG_RX12 [16]PEG_RX11 [16]PEG_RX10 [16]PEG_RX9 [16]PEG_RX8 [16]
PEG_RX15 [16]PEG_RX14 [16]
PEG_TX#11 [16]PEG_TX#10 [16]
PEG_TX#13 [16]
PEG_TX#9 [16]
PEG_TX#15 [16]PEG_TX#14 [16]
PEG_TX#12 [16]
PEG_TX#8 [16]
PEG_TX9 [16]
PEG_TX11 [16]PEG_TX10 [16]
PEG_TX13 [16]
PEG_TX15 [16]PEG_TX14 [16]
PEG_TX12 [16]
PEG_TX8 [16]
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Ivy Bridge 1/5 (HOST & PCIE) 1A
Monday, January 07, 2013
ZQK
462
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Ivy Bridge 1/5 (HOST & PCIE) 1A
Monday, January 07, 2013
ZQK
462
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Ivy Bridge 1/5 (HOST & PCIE) 1A
Monday, January 07, 2013
ZQK
462
R669 24.9/F_4
R675 24.9/F_4
R3271K/J_4
Q232N7002K
3
2
1
PCI EXPRESS -- GRAPHICS
DMI
Intel(R) FDI
DP
U47A
Ivy Bridge
DMI_RX#[0]M2
DMI_RX#[1]P6
DMI_RX#[2]P1
DMI_RX#[3]P10
DMI_RX[0]N3
DMI_RX[1]P7
DMI_RX[2]P3
DMI_RX[3]P11
DMI_TX#[0]K1
DMI_TX#[1]M8
DMI_TX#[2]N4
DMI_TX#[3]R2
DMI_TX[0]K3
DMI_TX[1]M7
DMI_TX[3]T3 DMI_TX[2]P4
FDI0_TX#[0]U7
FDI0_TX#[1]W11
FDI0_TX#[2]W1
FDI0_TX#[3]AA6
FDI1_TX#[0]W6
FDI1_TX#[1]V4
FDI1_TX#[2]Y2
FDI1_TX#[3]AC9
FDI0_TX[0]U6
FDI0_TX[1]W10
FDI0_TX[2]W3
FDI0_TX[3]AA7
FDI1_TX[0]W7
FDI1_TX[1]T4
FDI1_TX[2]AA3
FDI1_TX[3]AC8
FDI0_FSYNCAA11
FDI1_FSYNCAC12
FDI_INTU11
FDI0_LSYNCAA10
FDI1_LSYNCAG8
PEG_ICOMPIG3
PEG_ICOMPOG1
PEG_RCOMPOG4
PEG_RX#[0]H22
PEG_RX#[1]J21
PEG_RX#[2]B22
PEG_RX#[3]D21
PEG_RX#[4]A19
PEG_RX#[5]D17
PEG_RX#[6]B14
PEG_RX#[7]D13
PEG_RX#[8]A11
PEG_RX#[9]B10
PEG_RX#[10]G8
PEG_RX#[11]A8
PEG_RX#[12]B6
PEG_RX#[13]H8
PEG_RX#[14]E5
PEG_RX#[15]K7
PEG_RX[0]K22
PEG_RX[1]K19
PEG_RX[2]C21
PEG_RX[3]D19
PEG_RX[4]C19
PEG_RX[5]D16
PEG_RX[6]C13
PEG_RX[7]D12
PEG_RX[8]C11
PEG_RX[9]C9
PEG_RX[10]F8
PEG_RX[11]C8
PEG_RX[12]C5
PEG_RX[13]H6
PEG_RX[14]F6
PEG_RX[15]K6
PEG_TX#[0]G22
PEG_TX#[1]C23
PEG_TX#[2]D23
PEG_TX#[3]F21
PEG_TX#[4]H19
PEG_TX#[5]C17
PEG_TX#[6]K15
PEG_TX#[7]F17
PEG_TX#[8]F14
PEG_TX#[9]A15
PEG_TX#[10]J14
PEG_TX#[11]H13
PEG_TX#[12]M10
PEG_TX#[13]F10
PEG_TX#[14]D9
PEG_TX#[15]J4
PEG_TX[0]F22
PEG_TX[1]A23
PEG_TX[2]D24
PEG_TX[3]E21
PEG_TX[4]G19
PEG_TX[5]B18
PEG_TX[6]K17
PEG_TX[7]G17
PEG_TX[8]E14
PEG_TX[9]C15
PEG_TX[10]K13
PEG_TX[11]G13
PEG_TX[12]K10
PEG_TX[13]G10
PEG_TX[14]D8
PEG_TX[15]K4
eDP_AUXAF4 eDP_AUX#AG4
eDP_TX[0]AC1
eDP_TX[1]AA4
eDP_TX[2]AE10
eDP_TX[3]AE6
eDP_COMPIOAF3
eDP_HPDAG11 eDP_ICOMPO
AD2
eDP_TX#[0]AC3
eDP_TX#[1]AC4
eDP_TX#[2]AE11
eDP_TX#[3]AE7
R310
100K/J_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Over 130 degree C will drive low
IN OUT
L L
H High-Z
When MP, JTAG PU/PD resistor can beremoved? (Yes Intel, TDI, TDO, TMS, TRST#,TCK,PREQ#, PRDY#)
+1.5V_CPU
DRAM_PWRGD
SYS_PWROK
SM_DRAMPWROK
Boot S3 S3 RSM
100 ns after +1.5V_CPUreaches 80%
Option for Prochot# function68 ohm for unused, 62 ohm for used
Layout Notes: Place near to XDP connector05/15：PCH_XDP_TDO_VT already pull high+3V_S5 on PCH side
SM_RCOMP Impedance 85ohm
20111030 add resistor.
Isolate Space:20milsCAD NOTE: All DDR_COMP signalsshould be routed such that :-- max length = 500 mils- trace width = 15mils and- MB trace impedance < 68 mohms(worst case resistance)
If PM_DRAM_PWEGD connector,the R5180 must stuff.
20111121 add Q31 becaue Vh=2.1/Vl=0.9.
20111128 change net to PCI_PLTRST#
Momory Down Layout notes
03Ivy Bridge Processor (CLK,MISC,JTAG) (CPU)
Thermal Trip (CPU) S3 leakage circuit (CPU)
Isolate Space:20mils
If motherboard only supports external graphics or if it supportsProcessor Graphics but without eDP:Connect DPLL_REF_SSCLK on Processor to GND through 1K +/- 5% resistor.Connect DPLL_REF_SSCLK# on Processor to VCCP through 1K +/- 5% resistor
PM_DRAM_PWRGD_R
H_PROCHOT#_R
PM_SYNC_R
SM_RCOMP_0
SM_RCOMP_2SM_RCOMP_1
XDP_TRST#
XDP_TDI_VT
XDP_TCLK_VT
XDP_TMS_VT
H_PWRGOOD_R
TP_CATERR#
CPU_PLTRST#_R
CPU_PLTRST#
CPU_PLTRST#_R
XDP_TDI_VT
H_PROCHOT#
PM_THRMTRIP#
CPU_PLTRST#
XDP_PREQ#
XDP_TRST# PCH_XDP_TDO_VT
PM_DRAM_PWRGD_RPM_DRAM_PWRGD_Q
XDP_DBRST#_R
CLK_PCIE_XDPP_R
XDP_PRDY#
CLK_DPLL_SSCLKN_RCLK_DPLL_SSCLKP_R
CLK_PCIE_XDPN_R
XDP_PREQ#
EC_PECI[10,34]
SYS_SHDN# [27,36,41]
IMVP_PWRGD[7,40]
PM_SYNC[7]
H_PWRGOOD[10]
H_SNB_IVB#[8]
PM_THRMTRIP#[10]
CLK_DPLL_SSCLKN [9]CLK_DPLL_SSCLKP [9]
SYS_PWROK[7]
MAINON_G[5,41]
PM_DRAM_PWRGD[7]
CLK_PCIE_XDPN [9]CLK_PCIE_XDPP [9]
XDP_DBRST# [7]
CPU_DRAMRST# [4]
CLK_CPU_BCLKN [9]CLK_CPU_BCLKP [9]
PCI_PLTRST#[9,34]
XDP_TCLK_VT [8]XDP_TMS_VT [8]
PCH_XDP_TDO_VT [8]
H_PROCHOT#[34,35,40]
+3V
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+3V_S5
+1.5V_CPU
+1.5V_CPU
+3V_S5
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Ivy Bridge 2/5 (CLK & JTAG) 1A
Monday, January 07, 2013
ZQK
463
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Ivy Bridge 2/5 (CLK & JTAG) 1A
Monday, January 07, 2013
ZQK
463
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Ivy Bridge 2/5 (CLK & JTAG) 1A
Monday, January 07, 2013
ZQK
463
R387 *39/J_4
TP50
R749 *0/J_4
R705 200/F_4
R368*1K/J_4
TP44
R676 0/J_4
Q31*2N7002DW
62
1
5
43
R707 140/F_4
R367*10K/J_4
R385 *0/J_4
R747 *1.5K/F_4
R755 51/J_4
R740 43/J_4
C4460.1u/10V_4
C4530.1u/10V_4
R378 *51/J_4
TP49
TP46
R677 0/J_4
TP77TP74
C770 *43P/50V_412
C774 39P/50V_4
CLOCKSM
ISC
THERMAL
PWR MANAGEMENT
DDR3
MISC
JTAG & BPM
U47B
Ivy Bridge
SM_RCOMP[1]BE43
SM_RCOMP[2]BG43
SM_DRAMRST#AT30
SM_RCOMP[0]BF44
BCLK#H2BCLKJ3
DPLL_REF_CLK#AG1DPLL_REF_CLKAG3
CATERR#C49
PECIA48
PROCHOT#C45
THERMTRIP#D45
SM_DRAMPWROKBE45
RESET#D44
PRDY#N53
PREQ#N55
TCKL56
TMSL55
TRST#J58
TDIM60
TDOL59
DBR#K58
BPM#[0]G58
BPM#[1]E55
BPM#[2]E59
BPM#[3]G55
BPM#[4]G59
BPM#[5]H60
BPM#[6]J59
BPM#[7]J61
PM_SYNCC48
PROC_DETECT#C57
PROC_SELECT#F49
UNCOREPWRGOODB46
BCLK_ITPN59
BCLK_ITP#N58
U50
74LVC1G07GW_NC
VCC5
NC1
GND3
OUT4
IN2
R379 51/J_4
TP78
R754 51/J_4
R395 130/F_4
R717 10K/J_4
R384 0/J_4
R750 *0/J_4
TP76R720 0/J_4
R719 0/J_4
R736
*750/F_4
Q33 *2N7002K
3
2
1
TP73
R744 51/J_4
TP47
C841
39P/50V_4
R715 56/J_4
TP42
R745 0/J_4
TP43
U24
74AHC1G09
2
14
35
R746 51/J_4
TP54
R722 62/J_4
R702 25.5/F_4
TP75
Q66MMBT3904-7-F_200MA
2
1 3
Q67
2N7002K
3
2
1
R396200/F_4
R735 75/F_4
R7341K/J_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A AS3 circuit: DRAM_RST# to memory should be high during S3
20120204 Change to EC for new BIOS 0.6
20120112 for memory down PU CAP.
04Channel A: On board RAM 2Rx16 8pcs Channel B: SO-DIMM
Ivy Bridge Processor (CPU)
S3 leakage circuit (CPU) 20120914 Follow Z09 design to move R682 close to Q62
M_A_DQ0M_A_DQ1M_A_DQ2M_A_DQ3M_A_DQ4M_A_DQ5M_A_DQ6M_A_DQ7
M_A_DQ10M_A_DQ11
M_A_DQ13M_A_DQ12
M_A_DQ14M_A_DQ15
M_A_DQ8M_A_DQ9
M_A_DQ18M_A_DQ19
M_A_DQ21M_A_DQ20
M_A_DQ22M_A_DQ23M_A_DQ24
M_A_DQ31M_A_DQ30
M_A_DQ28M_A_DQ29
M_A_DQ27M_A_DQ26M_A_DQ25
M_A_DQ16M_A_DQ17
M_A_DQ34M_A_DQ35
M_A_DQ37M_A_DQ36
M_A_DQ38M_A_DQ39M_A_DQ40
M_A_DQ47M_A_DQ46
M_A_DQ44M_A_DQ45
M_A_DQ43M_A_DQ42M_A_DQ41
M_A_DQ32
M_A_DQ54
M_A_DQ52M_A_DQ53
M_A_DQ51M_A_DQ50
M_A_DQ58M_A_DQ59
M_A_DQ61M_A_DQ60
M_A_DQ62M_A_DQ63
M_A_DQ56M_A_DQ55
M_A_DQ49M_A_DQ48
M_A_DQ57
M_A_DQ33M_A_DQSN1M_A_DQSN0
M_A_DQSN3M_A_DQSN2
M_A_DQSN5M_A_DQSN6
M_A_DQSN4
M_A_DQSN7
M_A_DQSP1M_A_DQSP2M_A_DQSP3
M_A_DQSP0
M_A_DQSP4
M_A_DQSP6M_A_DQSP5
M_A_DQSP7
M_A_A1
M_A_A9M_A_A10M_A_A11
M_A_A8
M_A_A12
M_A_A15M_A_A14M_A_A13
M_A_A2M_A_A3
M_A_A0
M_A_A5M_A_A6M_A_A7
M_A_A4
M_B_DQ34M_B_DQ35
M_B_DQ37M_B_DQ36
M_B_DQ39M_B_DQ38
M_B_DQ32
M_B_DQ41M_B_DQ40
M_B_DQ46M_B_DQ47
M_B_DQ44M_B_DQ45
M_B_DQ43M_B_DQ42
M_B_DQ33
M_B_DQ53
M_B_DQ51M_B_DQ50
M_B_DQ63M_B_DQ62
M_B_DQ56M_B_DQ57
M_B_DQ48
M_B_DQ54M_B_DQ55
M_B_DQ52
M_B_DQ49
M_B_DQ58M_B_DQ59
M_B_DQ61M_B_DQ60
M_B_DQ6M_B_DQ7
M_B_DQ4M_B_DQ5
M_B_DQ0
M_B_DQ10M_B_DQ11
M_B_DQ13M_B_DQ12
M_B_DQ15M_B_DQ14
M_B_DQ8M_B_DQ9
M_B_DQ1
M_B_DQ18M_B_DQ19
M_B_DQ21M_B_DQ20
M_B_DQ23M_B_DQ22
M_B_DQ16
M_B_DQ25M_B_DQ24
M_B_DQ30M_B_DQ31
M_B_DQ28M_B_DQ29
M_B_DQ27M_B_DQ26
M_B_DQ17
M_B_DQ2M_B_DQ3
M_B_A1
M_B_A9M_B_A10M_B_A11
M_B_A8
M_B_A12
M_B_A15M_B_A14M_B_A13
M_B_A2M_B_A3
M_B_A0
M_B_A5M_B_A6M_B_A7
M_B_A4
M_B_DQSN1M_B_DQSN0
M_B_DQSN3M_B_DQSN2
M_B_DQSN5M_B_DQSN6
M_B_DQSN4
M_B_DQSN7
M_B_DQSP1M_B_DQSP0
M_B_DQSP3M_B_DQSP2
M_B_DQSP5M_B_DQSP6
M_B_DQSP4
M_B_DQSP7
M_A_A5
M_A_A9
M_A_A4
M_A_A15
M_A_A1
M_A_A12M_A_A11
M_A_A0
M_A_A10
M_A_A3
M_A_A14
M_A_A7
M_A_A2
M_A_A13
M_A_A6
M_A_A8
M_A_WE#
M_A_BS#1M_A_BS#2
M_A_CAS#M_A_RAS#
M_A_BS#0
M_A_ODT0
M_A_CS#0
M_A_CKE0M_A_CKE1
M_A_CS#1
M_A_ODT1
M_A_CLK0 [13]M_A_CLK0# [13]M_A_CKE0 [13]
M_A_CS#0 [13]
M_A_ODT0 [13]
M_A_DQSN[7:0] [13,14]
M_A_DQSP[7:0] [13,14]
M_A_A[15:0] [13,14]
M_A_BS#0[13,14]M_A_BS#1[13,14]M_A_BS#2[13,14]
M_A_CAS#[13,14]M_A_RAS#[13,14]M_A_WE#[13,14]
M_A_DQ[63:0][13,14]
M_A_CLK1 [14]M_A_CLK1# [14]M_A_CKE1 [14]
M_A_CS#1 [14]
M_A_ODT1 [14]
DDR3_DRAMRST#[13,14,15] CPU_DRAMRST# [3]
DRAMRST_CNTRL_PCH[9]
EC_DRAMRST_CNTRL[34]
M_B_DQ[63:0][15]
M_B_BS#0[15]M_B_BS#1[15]M_B_BS#2[15]
M_B_CAS#[15]M_B_RAS#[15]M_B_WE#[15]
M_B_CLK0 [15]
M_B_DQSP[7:0] [15]
M_B_CLK0# [15]
M_B_A[15:0] [15]
M_B_CKE0 [15]
M_B_DQSN[7:0] [15]
DEEPS3_EC[13,14,15]
M_B_ODT0 [15]
M_B_CS#0 [15]
M_B_CKE1 [15]
M_B_CLK1 [15]M_B_CLK1# [15]
M_B_CS#1 [15]
M_B_ODT1 [15]
+1.5VSUS +3V_S5
+0.75V_DDR_VTT
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Ivy Bridge 3/5 (DDR3 I/F) 1A
Monday, January 07, 2013
ZQK
464
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Ivy Bridge 3/5 (DDR3 I/F) 1A
Monday, January 07, 2013
ZQK
464
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Ivy Bridge 3/5 (DDR3 I/F) 1A
Monday, January 07, 2013
ZQK
464
R256 36/J_4
R287 36/J_4
R262 36/J_4R603 36/J_4
R6934.99K/F_4
R6801K/F_4
R239 36/J_4
R601 36/J_4
R684 *0/J_4
R293 36/J_4
C27910u/6.3V_6
C6780.047u/10V_4
R236 36/J_4
R640 36/J_4
R6861K/J_4
C2371u/6.3V_4
C2391u/6.3V_4
C2411u/6.3V_4
R238 36/J_4
R636 36/J_4C2381u/6.3V_4
R260 36/J_4
C2401u/6.3V_4
R261 36/J_4
R297 36/J_4
R263 36/J_4
R683 0/J_4
R258 36/J_4
C2361u/6.3V_4
Q62 2N7002K3
2
1
R682 *0/J_4
R237 36/J_4
R600 36/J_4R264 36/J_4
R282 36/J_4
DDR SYSTEM MEMORY B
U47D
Ivy Bridge
SB_CLK[0]BA34
SB_CLK[1]BA36
SB_CLK#[0]AY34
SB_CLK#[1]BB36
SB_CKE[0]AR22
SB_CKE[1]BF27
SB_ODT[0]AT43
SB_ODT[1]BG47
SB_DQS[4]BE51
SB_DQS#[4]BG51
SB_DQS[5]BA61
SB_DQS#[5]BA59
SB_DQS[6]AR59
SB_DQS#[6]AT60
SB_DQS[7]AK61
SB_DQS#[7]AK59
SB_DQS[0]AM2
SB_DQS#[0]AL3
SB_DQS[1]AV1
SB_DQS#[1]AV3
SB_DQS[2]BE11
SB_DQS#[2]BG11
SB_DQS[3]BD18
SB_DQS#[3]BD17
SB_MA[0]BF32
SB_MA[1]BE33
SB_MA[2]BD33
SB_MA[3]AU30
SB_MA[4]BD30
SB_MA[5]AV30
SB_MA[6]BG30
SB_MA[7]BD29
SB_MA[8]BE30
SB_MA[9]BE28
SB_MA[10]BD43
SB_MA[11]AT28
SB_MA[12]AV28
SB_MA[13]BD46
SB_MA[14]AT26
SB_MA[15]AU22
SB_DQ[0]AL4
SB_DQ[1]AL1
SB_DQ[2]AN3
SB_DQ[3]AR4
SB_DQ[4]AK4
SB_DQ[5]AK3
SB_DQ[6]AN4
SB_DQ[7]AR1
SB_DQ[8]AU4
SB_DQ[9]AT2
SB_DQ[10]AV4
SB_DQ[11]BA4
SB_DQ[12]AU3
SB_DQ[13]AR3
SB_DQ[14]AY2
SB_DQ[15]BA3
SB_DQ[16]BE9
SB_DQ[17]BD9
SB_DQ[18]BD13
SB_DQ[19]BF12
SB_DQ[20]BF8
SB_DQ[21]BD10
SB_DQ[22]BD14
SB_DQ[23]BE13
SB_DQ[24]BF16
SB_DQ[25]BE17
SB_DQ[26]BE18
SB_DQ[27]BE21
SB_DQ[28]BE14
SB_DQ[29]BG14
SB_DQ[30]BG18
SB_DQ[31]BF19
SB_DQ[32]BD50
SB_DQ[33]BF48
SB_DQ[34]BD53
SB_DQ[35]BF52
SB_DQ[36]BD49
SB_DQ[37]BE49
SB_DQ[38]BD54
SB_DQ[39]BE53
SB_DQ[40]BF56
SB_DQ[41]BE57
SB_DQ[42]BC59
SB_DQ[43]AY60
SB_DQ[44]BE54
SB_DQ[45]BG54
SB_DQ[46]BA58
SB_DQ[47]AW59
SB_DQ[48]AW58
SB_DQ[49]AU58
SB_DQ[50]AN61
SB_DQ[51]AN59
SB_DQ[52]AU59
SB_DQ[53]AU61
SB_DQ[54]AN58
SB_DQ[55]AR58
SB_DQ[56]AK58
SB_DQ[57]AL58
SB_DQ[58]AG58
SB_DQ[59]AG59
SB_DQ[60]AM60
SB_DQ[61]AL59
SB_DQ[62]AF61
SB_DQ[63]AH60
SB_CS#[0]BE41
SB_CS#[1]BE47
SB_CAS#AV43
SB_RAS#BF40
SB_WE#BD45
SB_BS[0]BG39
SB_BS[1]BD42
SB_BS[2]AT22
R650 36/J_4
R617 36/J_4
R619 36/J_4
R304 36/J_4
R259 36/J_4
DDR SYSTEM MEMORY A
U47C
Ivy Bridge
SA_CLK[0]AU36
SA_CLK[1]AT40
SA_CLK#[0]AV36
SA_CLK#[1]AU40
SA_CKE[0]AY26
SA_CKE[1]BB26
SA_CS#[0]BB40
SA_CS#[1]BC41
SA_ODT[0]AY40
SA_ODT[1]BA41
SA_DQS[0]AJ11
SA_DQS#[0]AL11
SA_DQS[1]AR10
SA_DQS#[1]AR8
SA_DQS[2]AY11
SA_DQS#[2]AV11
SA_DQS[3]AU17
SA_DQS[4]AW45
SA_DQS#[4]AV45
SA_DQS[5]AV51
SA_DQS#[5]AY51
SA_DQS[6]AT56
SA_DQS#[6]AT55
SA_DQS[7]AK54
SA_DQS#[7]AK55
SA_MA[0]BG35
SA_MA[1]BB34
SA_MA[2]BE35
SA_MA[3]BD35
SA_MA[4]AT34
SA_MA[5]AU34
SA_MA[6]BB32
SA_MA[7]AT32
SA_MA[8]AY32
SA_MA[9]AV32
SA_MA[10]BE37
SA_MA[11]BA30
SA_MA[12]BC30
SA_MA[13]AW41
SA_MA[14]AY28
SA_MA[15]AU26
SA_DQ[0]AG6
SA_DQ[1]AJ6
SA_DQ[2]AP11
SA_DQ[3]AL6
SA_DQ[4]AJ10
SA_DQ[5]AJ8
SA_DQ[6]AL8
SA_DQ[7]AL7
SA_DQ[8]AR11
SA_DQ[9]AP6
SA_DQ[10]AU6
SA_DQ[11]AV9
SA_DQ[12]AR6
SA_DQ[13]AP8
SA_DQ[14]AT13
SA_DQ[15]AU13
SA_DQ[16]BC7
SA_DQ[17]BB7
SA_DQ[18]BA13
SA_DQ[19]BB11
SA_DQ[20]BA7
SA_DQ[21]BA9
SA_DQ[22]BB9
SA_DQ[23]AY13
SA_DQ[24]AV14
SA_DQ[25]AR14
SA_DQ[26]AY17
SA_DQ[27]AR19
SA_DQ[28]BA14
SA_DQ[29]AU14
SA_DQ[30]BB14
SA_DQ[31]BB17
SA_DQ[32]BA45
SA_DQ[33]AR43
SA_DQ[34]AW48
SA_DQ[35]BC48
SA_DQ[36]BC45
SA_DQ[37]AR45
SA_DQ[38]AT48
SA_DQ[39]AY48
SA_DQ[40]BA49
SA_DQ[41]AV49
SA_DQ[42]BB51
SA_DQ[43]AY53
SA_DQ[44]BB49
SA_DQ[45]AU49
SA_DQ[46]BA53
SA_DQ[47]BB55
SA_DQ[48]BA55
SA_DQ[49]AV56
SA_DQ[50]AP50
SA_DQ[51]AP53
SA_DQ[52]AV54
SA_DQ[53]AT54
SA_DQ[54]AP56
SA_DQ[55]AP52
SA_DQ[56]AN57
SA_DQ[57]AN53
SA_DQ[58]AG56
SA_DQ[59]AG53
SA_DQ[60]AN55
SA_DQ[61]AN52
SA_DQ[62]AG55
SA_DQ[63]AK56
SA_CAS#BE39
SA_RAS#BD39
SA_WE#AT41
SA_BS[0]BD37
SA_BS[1]BF36
SA_BS[2]BA28
SA_DQS#[3]AT17
R602 36/J_4
R681 1K/F_4 R240 36/J_4
R257 36/J_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SVID DATA SVID ALERT
Place PU resistor close to CPU Place PU resistor close to CPU
SVID CLK
Layout note: need routing together and ALERT need between CLK and DATA
SNB_IVB# N.A at SNB EDS #27637 0.7v1
CAD Note: +VDDR_REF_CPU shouldhave 10 mil trace width
0.725V
0.675V
VID[1]
0.9V
0.8V
VID[0]
0
1
0
1
+VCCSA
0
0
1
1
On CRBH_SNB_IVB#_PWRCTRL = low, 1.0VH_SNB_IVB#_PWRCTRL = high/NC, 1.05V
Voltage selection for VCCIO:this pin must be pulled highon the motherboard
For IV Bridge
IVY SPEC1.9mΩ/LoadlineDesigntotal : 2.2uF x 35total : 22uF x 12 tatal : 470u x3(Power side*1)
IVY 17W:TDC 33ACPU Core Power
Cose down
3.9mΩ/LoadlineDesigntotal : 1uF x 11total : 10uF x 6total : 22uF x 6tatal : 470u x 1(power side*2)
Cose downIVY 17W:TDC 18ACPU VCCAXG
Spec
Real10uF x 1
SpecIVY 17W:1.5A
IVY SPEC330uF x1, 10uF_8 x1, 1uF_4 x2Socket BOT edge.
1uF x 2
CPU VCCPL
330uF/7mohm x 1
1uF x 2
IVY SPEC22uF_8 x7 Socket TOP cavity 22uF_8 x5 Socket BOT cavity 22uF_8 x2 Socket TOP cavity (no stuff)22uF_8 x5 Socket BOT cavity (no stuff) 330uF_7343 x2
SNB : SpecCose down
IVY 17W:8.5ACPU VCCIO
10uF x 10
330uF/6mohm x 2
1uF x 26
IVY SPEC330uF x1, 10uF_8 x1 Socket BOT edge,10uF_8 x2 Socket BOT cavity.
Real10uF x 3
IVY 17W: 6ACPU VCCSA
10uF x 5330uF/7mohm x 1Spec
1uF x 5
1uF x 10
CPU VDDQIVY 45W: 5A
10uF x 8
330uF/6mohm x 1Spec
change to 1K/F_4
S3 circuit: 1.5V input to IVB is gated &IVB Read Vref 0.75V is gated
20111024 from +1.5VSUS change to +1.5V_CPU
20111107 stuff Q5010 and un-stuff R5347/R362.4.5AS3 STUFF NO_STUFF
enable -
disable -
R5347/R6362
R5347/R6362
VCCAXG_SENSE/VSSAXG_SENSE R=100,Trace impedance 15.5~34.5, <25mils.
IVY SPEC1.9mΩ/LoadlineDesigntotal : 2.2uF x 35total : 10uF x 12 tatal : 470u x1(Power side*1)
330uF/6mohm x 1
10uF x 10
1uF x 26
3.9mΩ/LoadlineDesigntotal : 1uF x 11total : 10uF x 12tatal : 470u x 1(power side*2)
201201117 C767 for Intel fw issue, if solve need un-stuff.
20120120 remove C621 for debug IC.
20120120 remove C622 for debug IC.
05
For SN Bridge
VID[1]
0.8V
0.9V0
+VCCSA
1
IVY Bridge Processor (POWER) (CPU) IVY Bridge Processor (GRAPHIC POWER) (CPU)
20121203：：：：Add 39pF for ESD
VR_SVID_ALERT#_RH_CPU_SVIDALRT#H_CPU_SVIDCLK
VCCIO_SEL
H_CPU_SVIDDAT
H_CPU_SVIDALRT#H_CPU_SVIDCLK
H_CPU_SVIDDAT
CPU_VCCPLL
MAIND
MAIND
MAINON_G
VR_SVID_DATA [40]VR_SVID_CLK [40]
VR_SVID_ALERT# [40]
VCC_SENSE [40]VSS_SENSE [40]
VCCP_SENSE [38]VSSP_SENSE [38]
VCCSA_VID0 [39]
VSS_AXG_SENSE[40]VCC_AXG_SENSE[40]
VCCSA_VID1 [39]
VCCSA_SENSE [39]
MAIND[36,37,41]
MAINON_G[3,41]
+1.05V_VTT +1.05V_VTT
+1.05V_VTT
+VCC_CORE
+1.05V_VTT
+1.05V_VTT
+VCC_CORE
+1.05V_VTT
+VCCSA
+1.5V_CPU
+VDDR_REF_CPU
+VCC_GFX
+1.5V_CPU
+1.5V_CPU
+VCC_GFX
+VCCSA
+1.8V
+SMDDR_VREF +VDDR_REF_CPU +1.5V_CPU
+1.5V_CPU+1.5VSUS+VCC_CORE +1.05V_VTT +VCC_GFX +VCCSA +1.5V_CPU +1.8V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Ivy Bridge 4/5 (POWER) 1A
Monday, January 07, 2013
ZQK
465
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Ivy Bridge 4/5 (POWER) 1A
Monday, January 07, 2013
ZQK
465
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Ivy Bridge 4/5 (POWER) 1A
Monday, January 07, 2013
ZQK
465
C399
1u/6.3V_4
C844
39P/50V_4
C66610u/6.3V_6
C699
2.2u/10V_4
+ C656330u/2V_7343
C407
1u/6.3V_4
R751100K/J_4
PO
WE
R
CORE SUPPLY
PEG AND DDR
SENSE LINES
SVID
QUIET RAILS
U47F
Ivy Bridge
VCC_SENSEF43
VSS_SENSEG43
VIDALERT#A44
VIDSCLKB43
VIDSOUTC44
VSS_SENSE_VCCIOAN17
VCC[1]A26
VCC[2]A29
VCC[3]A31
VCC[4]A34
VCC[5]A35
VCC[6]A38
VCC[7]A39
VCC[8]A42
VCC[9]C26
VCC[10]C27
VCC[11]C32
VCC[12]C34
VCC[13]C37
VCC[14]C39
VCC[15]C42
VCC[16]D27
VCC[17]D32
VCC[18]D34
VCC[19]D37
VCC[20]D39
VCC[21]D42
VCC[22]E26
VCC[23]E28
VCC[24]E32
VCC[25]E34
VCC[26]E37
VCC[27]E38
VCC[28]F25
VCC[29]F26
VCC[30]F28
VCC[31]F32
VCC[32]F34
VCC[33]F37
VCC[34]F38
VCC[35]F42
VCC[36]G42
VCC[37]H25
VCC[38]H26
VCC[39]H28
VCC[40]H29
VCC[41]H32
VCC[42]H34
VCC[43]H35
VCC[44]H37
VCC[45]H38
VCC[46]H40
VCC[47]J25
VCC[48]J26
VCC[49]J28
VCC[50]J29
VCC[51]J32
VCC[52]J34
VCC[53]J35
VCC[54]J37
VCC[55]J38
VCC[56]J40
VCC[57]J42
VCC[58]K26
VCC[59]K27
VCC[60]K29
VCC[61]K32
VCC[62]K34
VCC[63]K35
VCC[64]K37
VCC[66]K39
VCC[67]K42
VCC[68]L25
VCC[69]L28
VCC[70]L33
VCC[71]L36
VCC[72]L40
VCC[73]N26
VCC[74]N30
VCC[75]N34
VCC[76]N38
VCCIO[1]AF46
VCCIO[3]AG48
VCCIO[4]AG50
VCCIO[5]AG51
VCCIO[6]AJ17
VCCIO[7]AJ21
VCCIO[8]AJ25
VCCIO[9]AJ43
VCCIO[10]AJ47
VCCIO[11]AK50
VCCIO[12]AK51
VCCIO[13]AL14
VCCIO[14]AL15
VCCIO[15]AL16
VCCIO[16]AL20
VCCIO[17]AL22
VCCIO[18]AL26
VCCIO[19]AL45
VCCIO[20]AL48
VCCIO[21]AM16
VCCIO[22]AM17
VCCIO[23]AM21
VCCIO[24]AM43
VCCIO[25]AM47
VCCIO[26]AN20
VCCIO[27]AN42
VCCIO[28]AN45
VCCIO[29]AN48
VCCIO[30]AA14
VCCIO[31]AA15
VCCIO[32]AB17
VCCIO[33]AB20
VCCIO[34]AC13
VCCIO[35]AD16
VCCIO[36]AD18
VCCIO[37]AD21
VCCIO[38]AE14
VCCIO[39]AE15
VCCIO[40]AF16
VCCIO[41]AF18
VCCIO[42]AF20
VCCIO[43]AG15
VCCIO[44]AG16
VCCIO[45]AG17
VCCIO[46]AG20
VCCIO[47]AG21
VCCIO[48]AJ14
VCCIO[49]AJ15
VCCIO50W16
VCCIO51W17
VCCPQE[1]AM25
VCCPQE[2]AN22
VCCIO_SENSEAN16
VCCIO_SELBC22
C645
10u/6.3V_6
C409
1u/6.3V_4
R386 100/J_4
+C738
470u/2V_7343
C654
10u/6.3V_6
C345
2.2u/10V_4
C701
2.2u/10V_4
R723 *10K/J_4
R372 *51/J_4
C337
2.2u/10V_4
C368
2.2u/10V_4
C439
1u/6.3V_4
C361
1u/6.3V_4
C462
10u/6.3V_6
C323
1u/6.3V_4
C451
1u/6.3V_4
C404
1u/6.3V_4
R71175/F_4
C411*10u/6.3V_6
C706
10u/6.3V_6
C845
39P/50V_4
C322
1u/6.3V_4
C779470P/50V_4
C367
2.2u/10V_4
C758
10u/6.3V_6
C355
2.2u/10V_4
C67210u/6.3V_6
R344 0/J_4
C402
1u/6.3V_4
R713 0/J_4
TP70
C731
2.2u/10V_4
C846
39P/50V_4
R667 0/J_8
C364
2.2u/10V_4
Q652N7002K
3
2
1
C755
10u/6.3V_6
C329
1u/6.3V_4C339
1u/6.3V_4
C660
10u/6.3V_6
C39610u/6.3V_6
C377
2.2u/10V_4
C744
2.2u/10V_4
C458
10u/6.3V_6
TP56
C349
10u/6.3V_6
R365 *0_1206
C457
10u/6.3V_6
C842
39P/50V_4
C405
1u/6.3V_4
C695
2.2u/10V_4
C344
2.2u/10V_4
R373 *51/J_4
C348
1u/6.3V_4
C408
1u/6.3V_4
C395
1u/6.3V_4
C299
1u/6.3V_4
C33310u/6.3V_6
C376
2.2u/10V_4
C759
10u/6.3V_6
C394
1u/6.3V_4
C366
2.2u/10V_4
C6681u/6.3V_4
C698
2.2u/10V_4
R709130/F_4
C730
2.2u/10V_4
C325
1u/6.3V_4C743
2.2u/10V_4
C353
10u/6.3V_6
C297
1u/6.3V_4
C362
1u/6.3V_4C347
1u/6.3V_4
C44010u/6.3V_6
C670
10u/6.3V_6
C438
1u/6.3V_4
C6691u/6.3V_4
C44110u/6.3V_6
C658
10u/6.3V_6
C450
10u/6.3V_6
C435
1u/6.3V_4
C447
1u/6.3V_4
C321
1u/6.3V_4
C324
1u/6.3V_4
C331
1u/6.3V_4
R710 0/J_4
C756
10u/6.3V_6
TP57
+ C662*330u/2.5V_3528
C648
10u/6.3V_6
C449
10u/6.3V_6
C437
1u/6.3V_4
C298
1u/6.3V_4
PO
WE
R
GRAPHICS
DDR3 - 1.5V RAILS
1.8V RAIL
SENSE
LINES
SA RAIL
SENSE LINES
QUIET RAILS
U47G
Ivy Bridge
SM_VREFAY43
VAXG[1]AA46
VAXG[2]AB47
VAXG[3]AB50
VAXG[4]AB51
VAXG[5]AB52
VAXG[6]AB53
VAXG[7]AB55
VAXG[8]AB56
VAXG[9]AB58
VAXG[10]AB59
VAXG[11]AC61
VAXG[12]AD47
VAXG[13]AD48
VAXG[14]AD50
VAXG[15]AD51
VAXG[16]AD52
VAXG[17]AD53
VAXG[18]AD55
VAXG[19]AD56
VAXG[20]AD58
VAXG[21]AD59
VAXG[22]AE46
VAXG[23]N45
VAXG[24]P47
VAXG[25]P48
VAXG[26]P50
VAXG[27]P51
VAXG[28]P52
VAXG[29]P53
VAXG[30]P55
VAXG[31]P56
VAXG[32]P61
VAXG[33]T48
VAXG[34]T58
VAXG[35]T59
VAXG[36]T61
VAXG[37]U46
VAXG[38]V47
VAXG[39]V48
VAXG[40]V50
VAXG[41]V51
VAXG[42]V52
VAXG[43]V53
VAXG[44]V55
VAXG[45]V56
VAXG[46]V58
VAXG[47]V59
VAXG[48]W50
VAXG[49]W51
VAXG[50]W52
VAXG[51]W53
VAXG[52]W55
VAXG[53]W56
VAXG[54]W61
VDDQ[11]AM40
VDDQ[12]AN30
VDDQ[13]AN34
VDDQ[14]AN38
VDDQ[15]AR26
VDDQ[1]AJ28
VDDQ[2]AJ33
VDDQ[3]AJ36
VDDQ[4]AJ40
VDDQ[5]AL30
VDDQ[6]AL34
VDDQ[7]AL38
VDDQ[8]AL42
VDDQ[9]AM33
VDDQ[10]AM36
VCCPLL[1]BB3
VCCPLL[2]BC1
VCCSA_SENSEU10
VCCSA_VID[1]D49
VAXG[55]Y48
VAXG[56]Y61
VCCPLL[3]BC4
VAXG_SENSEF45
VSSAXG_SENSEG45
VCCSA[1]L17
VCCSA[10]R21
VCCSA[12]V16
VCCSA[13]V17
VCCSA[14]V18
VCCSA[4]N20
VCCSA[5]N22
VCCSA[6]P17
VCCSA[9]R18
VDDQ[16]AR28
VDDQ[17]AR30
VDDQ[18]AR32
VDDQ[19]AR34
VDDQ[20]AR36
VDDQ[21]AR40
VDDQ[22]AV41
VDDQ[23]AW26
VDDQ[24]BA40
VDDQ[25]BB28
VDDQ[26]BG33
VCCSA[11]U15
VCCSA[15]V21
VCCSA[16]W20
VCCSA[2]L21
VCCSA[3]N16
VCCDQ[1]AM28
VCCDQ[2]AN26
VCCSA[7]P20
VCCSA[8]R16
VDDQ_SENSEBC43
VSS_SENSE_VDDQBA43
VCCSA_VID[0]D48
C65710u/6.3V_6
C748
2.2u/10V_4
C414*10u/6.3V_6
C443
1u/6.3V_4
R748
*1K/F_4
C342
10u/6.3V_6
C340 1u/6.3V_4
R374 *10K/J_4
R712 0/J_4
C753
10u/6.3V_6
R738
*1K/F_4
C664
1u/6.3V_4
C365
2.2u/10V_4
R728 0/J_4
C468
10u/6.3V_6
R714 43/J_4
C400
1u/6.3V_4
R377220/J_8
R325 10/J_4
C346
2.2u/10V_4
C754
10u/6.3V_6
C296
1u/6.3V_4
C334
1u/6.3V_4
C350
1u/6.3V_4
C406
1u/6.3V_4
C393
2.2u/10V_4
C379
1u/6.3V_4
C697
2.2u/10V_4
R388 100/J_4
C354
2.2u/10V_4
R326 10/J_4
C360
1u/6.3V_4
C445
10u/6.3V_6
R357 100/F_4
C777 *33n/10V_4
C38710u/6.3V_6
C757
10u/6.3V_6
C455
10u/6.3V_6
C696
2.2u/10V_4
C391
2.2u/10V_4
C374
2.2u/10V_4
C655
10u/6.3V_6
C335
1u/6.3V_4
R739 *0/J_8
+C775
330u/2V_7343
C700
2.2u/10V_4
R674 *100/F_4
C397
1u/6.3V_4
C326
1u/6.3V_4C336
2.2u/10V_4
C370
1u/6.3V_4
C652
10u/6.3V_6
Q322N7002K
3
2
1
C454
10u/6.3V_6
Q64 AO4496
365
78
2
4
1
+C737
470u/2V_7343
R354 100/F_4
C332
1u/6.3V_4
C375
2.2u/10V_4
C847
39P/50V_4
C705
10u/6.3V_6
C38010u/6.3V_6
C843
39P/50V_4
C403
1u/6.3V_4
C338
2.2u/10V_4
C295
1u/6.3V_4
C320
1u/6.3V_4
C401
1u/6.3V_4
C363
2.2u/10V_4
C356
2.2u/10V_4
R362 *0_1206
C410
1u/6.3V_4
+ C641330u/2V_7343
+C792
470u/2V_7343
C392
2.2u/10V_4
C378 1u/6.3V_4
C369
2.2u/10V_4
C760
10u/6.3V_6
C463
10u/6.3V_6
C328
1u/6.3V_4
R328 0/J_6
C327
1u/6.3V_4
C372
10u/6.3V_6
C444
10u/6.3V_6
C467
10u/6.3V_6
C389
1u/6.3V_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG[6:5] (PCIE Port Bifurcation Straps)
CFG3(PCI-E Static x4 Lane Reversal)
CFG4(DP Presence Strap) Enable; An ext DP device is connected to eDP
CFG2 (PCI-E Static x16 Lane Reversal)
Processor Strapping
1 0
Normal Operation Lane Reversed
Disable; No physical DP attached to eDP
The CFG signals have a default value of '1' if not terminated on the board.
CFG7(PEG Defer Training)
Normal Operation
PEG train immediately following xxRESETB de assertion
Lane Reversed
PEG wait for BIOS training
11: 1x16 - Device 1 functions 1 and 2 disabled10: (Default)2x8, 2x8 - Device 1 function 1 enabled ; function 2 disabled01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)00: 1x8,2x4,2x4 - Device 1 functions 1 and 2 enabled
BE7 SA_DIMM_VREFDQBG7 SB_DIMM_VREFDQ
for M3 solutionneed R5265/R5266,W/O M3 then NC
processor signal balls BF3 and BG4 for Ivy Bridge 4-core and balls BE7 and BG7 for Ivy Bridge 2-core
G48：no stuff for IVY
06IVY Bridge Processor (GND) (CPU) IVY Bridge Processor (RESERVED, CFG) (CPU)
N14P-GV2
10
0001
CFG2
CFG4
CFG7
CFG3
CFG5
CFG6
CFG5CFG6
CFG3CFG2
CFG4
CFG1
CFG7
SMDDR_VREF_DQ0_M3 [13,14]SMDDR_VREF_DQ1_M3 [15]
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Ivy Bridge 5/5 (GND) 1A
Monday, January 07, 2013
ZQK
466
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Ivy Bridge 5/5 (GND) 1A
Monday, January 07, 2013
ZQK
466
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Ivy Bridge 5/5 (GND) 1A
Monday, January 07, 2013
ZQK
466
VSS
U47H
Ivy Bridge
VSS[1]A13
VSS[2]A17
VSS[3]A21
VSS[4]A25
VSS[5]A28
VSS[6]A33
VSS[7]A37
VSS[8]A40
VSS[9]A45
VSS[10]A49
VSS[11]A53
VSS[12]A9
VSS[13]AA1
VSS[14]AA13
VSS[15]AA50
VSS[16]AA51
VSS[17]AA52
VSS[18]AA53
VSS[19]AA55
VSS[20]AA56
VSS[21]AA8
VSS[22]AB16
VSS[23]AB18
VSS[24]AB21
VSS[25]AB48
VSS[26]AB61
VSS[27]AC10
VSS[28]AC14
VSS[29]AC46
VSS[30]AC6
VSS[31]AD17
VSS[32]AD20
VSS[33]AD4
VSS[34]AD61
VSS[35]AE13
VSS[36]AE8
VSS[37]AF1
VSS[38]AF17
VSS[39]AF21
VSS[40]AF47
VSS[41]AF48
VSS[42]AF50
VSS[43]AF51
VSS[44]AF52
VSS[45]AF53
VSS[46]AF55
VSS[47]AF56
VSS[48]AF58
VSS[49]AF59
VSS[50]AG10
VSS[51]AG14
VSS[52]AG18
VSS[53]AG47
VSS[54]AG52
VSS[55]AG61
VSS[56]AG7
VSS[57]AH4
VSS[58]AH58
VSS[59]AJ13
VSS[60]AJ16
VSS[61]AJ20
VSS[62]AJ22
VSS[63]AJ26
VSS[64]AJ30
VSS[65]AJ34
VSS[66]AJ38
VSS[67]AJ42
VSS[68]AJ45
VSS[69]AJ48
VSS[70]AJ7
VSS[71]AK1
VSS[72]AK52
VSS[73]AL10
VSS[74]AL13
VSS[75]AL17
VSS[76]AL21
VSS[77]AL25
VSS[78]AL28
VSS[79]AL33
VSS[80]AL36
VSS[81]AL40
VSS[82]AL43
VSS[83]AL47
VSS[84]AL61
VSS[85]AM13
VSS[86]AM20
VSS[87]AM22
VSS[88]AM26
VSS[89]AM30
VSS[90]AM34
VSS[91]AM38
VSS[92]AM4
VSS[93]AM42
VSS[94]AM45
VSS[95]AM48
VSS[96]AM58
VSS[97]AN1
VSS[98]AN21
VSS[99]AN25
VSS[100]AN28
VSS[101]AN33
VSS[102]AN36
VSS[103]AN40
VSS[104]AN43
VSS[105]AN47
VSS[106]AN50
VSS[107]AN54
VSS[108]AP10
VSS[109]AP51
VSS[110]AP55
VSS[111]AP7
VSS[112]AR13
VSS[113]AR17
VSS[114]AR21
VSS[115]AR41
VSS[116]AR48
VSS[117]AR61
VSS[118]AR7
VSS[119]AT14
VSS[120]AT19
VSS[121]AT36
VSS[122]AT4
VSS[123]AT45
VSS[124]AT52
VSS[125]AT58
VSS[126]AU1
VSS[127]AU11
VSS[128]AU28
VSS[129]AU32
VSS[130]AU51
VSS[131]AU7
VSS[132]AV17
VSS[133]AV21
VSS[134]AV22
VSS[135]AV34
VSS[136]AV40
VSS[137]AV48
VSS[138]AV55
VSS[139]AW13
VSS[140]AW43
VSS[141]AW61
VSS[142]AW7
VSS[143]AY14
VSS[144]AY19
VSS[145]AY30
VSS[146]AY36
VSS[147]AY4
VSS[148]AY41
VSS[149]AY45
VSS[150]AY49
VSS[151]AY55
VSS[152]AY58
VSS[153]AY9
VSS[154]BA1
VSS[155]BA11
VSS[156]BA17
VSS[157]BA21
VSS[158]BA26
VSS[159]BA32
VSS[160]BA48
VSS[161]BA51
VSS[162]BB53
VSS[163]BC13
VSS[164]BC5
VSS[165]BC57
VSS[166]BD12
VSS[167]BD16
VSS[168]BD19
VSS[169]BD23
VSS[170]BD27
VSS[171]BD32
VSS[172]BD36
VSS[173]BD40
VSS[174]BD44
VSS[175]BD48
VSS[176]BD52
VSS[177]BD56
VSS[178]BD8
VSS[179]BE5
VSS[180]BG13
TP72
R679 *1K/J_4
RESERVED
U47E
Ivy Bridge
CFG[0]B50
CFG[1]C51
CFG[2]B54
CFG[3]D53
CFG[4]A51
CFG[5]C53
CFG[6]C55
CFG[7]H49
CFG[8]A55
CFG[9]H51
CFG[10]K49
CFG[11]K53
CFG[12]F53
CFG[13]G53
CFG[14]L51
CFG[15]F51
CFG[16]D52
CFG[17]L53
DC_TEST_A4A4
DC_TEST_A58A58
DC_TEST_A59A59
DC_TEST_A61A61
DC_TEST_BD1BD1
DC_TEST_BD61BD61
DC_TEST_BE1BE1
DC_TEST_BE3BE3
DC_TEST_BE59BE59DC_TEST_BE61BE61
DC_TEST_BG1BG1
DC_TEST_BG3BG3DC_TEST_BG4BG4DC_TEST_BG58BG58DC_TEST_BG59BG59DC_TEST_BG61BG61
DC_TEST_C4C4
DC_TEST_C59C59
DC_TEST_C61C61
DC_TEST_D1D1DC_TEST_D3D3
DC_TEST_D61D61
VCC_VAL_SENSEH43
VSS_VAL_SENSEK43
VAXG_VAL_SENSEH45
VSSAXG_VAL_SENSEK45
VCC_DIE_SENSEF48
RSVD41AH2
RSVD42AG13
RSVD43AM14
RSVD44AM15
RSVD8BA19
RSVD9AV19
RSVD10AT21
RSVD11BB21
RSVD12BB19
RSVD13AY21
RSVD14BA22
RSVD15AY22
RSVD16AU19
RSVD17AU21
RSVD18BD21
RSVD19BD22
RSVD20BD25
RSVD21BD26
RSVD22BG22
RSVD23BE22
RSVD24BG26
RSVD25BE26
RSVD26BF23
RSVD27BE24
RSVD45N50
RSVD30N42
RSVD31L42
RSVD32L45
RSVD33L47
RSVD34M13
RSVD35M14
RSVD36U14
RSVD37W14
RSVD38P13
RSVD39AT49
RSVD40K24
RSVD6H48
RSVD7K48
RSVD28BE7
RSVD29BG7
VSS
NCTF
U47I
Ivy Bridge
VSS[181]BG17
VSS[182]BG21
VSS[183]BG24
VSS[184]BG28
VSS[185]BG37
VSS[186]BG41
VSS[187]BG45
VSS[188]BG49
VSS[189]BG53
VSS[190]BG9
VSS[191]C29
VSS[192]C35
VSS[193]C40
VSS[194]D10
VSS[195]D14
VSS[196]D18
VSS[197]D22
VSS[198]D26
VSS[199]D29
VSS[200]D35
VSS[201]D4
VSS[202]D40
VSS[203]D43
VSS[204]D46
VSS[205]D50
VSS[206]D54
VSS[207]D58
VSS[208]D6
VSS[209]E25
VSS[210]E29
VSS[211]E3
VSS[212]E35
VSS[213]E40
VSS[214]F13
VSS[215]F15
VSS[216]F19
VSS[217]F29
VSS[218]F35
VSS[219]F40
VSS[220]F55
VSS[221]G48
VSS[222]G51
VSS[223]G6
VSS[224]G61
VSS[225]H10
VSS[226]H14
VSS[227]H17
VSS[228]H21
VSS[229]H4
VSS[230]H53
VSS[231]H58
VSS[232]J1
VSS[233]J49
VSS[234]J55
VSS[235]K11
VSS[236]K21
VSS[237]K51
VSS[238]K8
VSS[239]L16
VSS[240]L20
VSS[241]L22
VSS[242]L26
VSS[243]L30
VSS[244]L34
VSS[245]L38
VSS[246]L43
VSS[247]L48
VSS[269]P14
VSS[270]P16
VSS[271]P18
VSS[272]P21
VSS[273]P58
VSS[274]P59
VSS[275]P9
VSS[276]R17
VSS[277]R20
VSS[278]R4
VSS[279]R46
VSS[280]T1
VSS[281]T47
VSS[282]T50
VSS[283]T51
VSS[284]T52
VSS[285]T53
VSS[286]T55
VSS[287]T56
VSS[288]U13
VSS[289]U8
VSS[290]V20
VSS[291]V61
VSS_NCTF_1A5
VSS_NCTF_2A57
VSS_NCTF_3BC61
VSS_NCTF_4BD3
VSS_NCTF_5BD59
VSS_NCTF_6BE4
VSS_NCTF_7BE58
VSS_NCTF_8BG5
VSS_NCTF_9BG57
VSS_NCTF_10C3
VSS_NCTF_11C58
VSS_NCTF_12D59
VSS_NCTF_13E1
VSS_NCTF_14E61
VSS[251]M4
VSS[252]M58
VSS[253]M6
VSS[254]N1
VSS[255]N17
VSS[256]N21
VSS[257]N25
VSS[258]N28
VSS[259]N33
VSS[260]N36
VSS[261]N40
VSS[262]N43
VSS[263]N47
VSS[264]N48
VSS[265]N51
VSS[266]N52
VSS[267]N56
VSS[268]N61
VSS[248]L61
VSS[249]M11
VSS[292]W13
VSS[293]W15
VSS[294]W18
VSS[295]W21
VSS[296]W46
VSS[297]W8
VSS[298]Y4
VSS[299]Y47
VSS[300]Y58
VSS[301]Y59
VSS[250]M15
TP71
R743 1K/F_4
TP55
R678 *1K/J_4
R376 *1K/F_4
TP52
R375
*0/J_4
R742 1K/F_4
R753 *1K/F_4
TP45
TP53
TP51
R741 1K/F_4
R752 1K/F_4
TP79
TP48
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+3V_S5
DSW
+3V_S5
+3V
+3V_S5
+3V_S5
+3V_S5
+3V_S5
07
INT
. HD
MI
Follow CRB 1.5 to pullup 1K ohm to +3V
IMVP_PWRGD PU +3VPWROK_EC PDso AND gate output dont need PD again
to PCH Pin12, XDP and EE debug
include GFX_PWRGD to SYS_PWROK for PCH check
Disp
layP
ort C
Disp
layP
ort D
20111128 add 0ohm to passed IMVP_PERGDACPRESENT would need a pull-up to DSW well if DSWmode is supported on platform
Close to PCH
20120706:Speed up 250ms to boot upR1,R2,R3 for EC power on 250 ms
The required series-resistors are: ‧‧‧‧Direct Connect - 33 Ω
‧‧‧‧Docking Topology - 20 Ω
CPT/PPT (DMI,FDI,PM) (CLG)
PCH Pull-high/low (CLG) System PWR_OK (CLG)
CPT/PPT (LVDS,DDI)
R1
R2
R3
20120914 Add for TPM LPCPD#
CRB 1.0 use 1K
Follow Z09 NO STUFF
20121004(EC Anda)：：：：Chage trigger pin from +0.75V_ON to APWROK；；；；R2 change to 100K
20121219：SUSACK# connect to Pin79 of EC (GPJ3)
20121219：SUSWARN# connect to Pin78 of EC (GPJ2)
PM_DRAM_PWRGD
SUSWARN#_R
DAC_IREF
DMI_COMP
SYS_PWROK_R
XDP_DBRST#
PM_BATLOW#
PM_RI#
PCIE_WAKE#_LAN
CLKRUN#
SLP_LAN#
DPWROK_R
EC_PWROK_R
PWROK_EC
SYS_PWROK
CLKRUN#
PCH_RSMRST#
XDP_DBRST#
PM_RI#
PM_BATLOW#
PCIE_WAKE#_LAN
ACPRESENT
SUSWARN#_R
SLP_A#
SLP_SUS#
PM_DRAM_PWRGD
INT_HDMITX0N
INT_HDMICLK-
INT_HDMITX2P
INT_HDMITX0P
INT_HDMITX1N
INT_HDMICLK+
INT_HDMITX1P
INT_HDMITX2N
ACPRESENT
SYS_PWROK
PWROK_EC
SYS_PWROK
PCH_SUSCLK
IMVP_PWRGD_R
PCH_RSMRST#
SUSACK#_R
DPWROK_R
APWROK_R
DMI_BIAS
SLP_LAN#
APWROK_R
PM_DRAM_PWRGD[3]
DNBSWON#[34]
PCH_RSMRST#[34]
PM_SYNC [3]
FDI_TXN0 [2]FDI_TXN1 [2]FDI_TXN2 [2]FDI_TXN3 [2]FDI_TXN4 [2]FDI_TXN5 [2]FDI_TXN6 [2]FDI_TXN7 [2]
FDI_TXP4 [2]FDI_TXP5 [2]FDI_TXP6 [2]
FDI_TXP1 [2]FDI_TXP0 [2]
FDI_TXP7 [2]
FDI_TXP2 [2]FDI_TXP3 [2]
FDI_INT [2]
FDI_FSYNC0 [2]
FDI_FSYNC1 [2]
FDI_LSYNC0 [2]
FDI_LSYNC1 [2]
CLKRUN# [27,34]
SUSC# [34]
SUSB# [34]
SYS_PWROK[3]
HDMI_HP [25]
HDMI_DDCDATA_SW [25]HDMI_DDCCLK_SW [25]
DSWVREN [8]
IMVP_PWRGD [3,40]
GFX_PWRGD [34,40]
INT_HDMICLK- [25]INT_HDMICLK+ [25]
INT_HDMITX0N [25]INT_HDMITX0P [25]
INT_HDMITX1N [25]INT_HDMITX1P [25]
INT_HDMITX2N [25]INT_HDMITX2P [25]
SLP_SUS# [11,34]
DMI_RXN0[2]DMI_RXN1[2]DMI_RXN2[2]DMI_RXN3[2]
DMI_RXP0[2]DMI_RXP1[2]DMI_RXP2[2]DMI_RXP3[2]
DMI_TXN0[2]DMI_TXN1[2]DMI_TXN2[2]DMI_TXN3[2]
DMI_TXP0[2]DMI_TXP1[2]DMI_TXP2[2]DMI_TXP3[2]
XDP_DBRST#[3]
DPWROK [34]
ACPRESENT[35]
APWROK[34]
DP_HPD_Q [23]
DP_TXN3 [23]DP_TXP3 [23]
DP_TXN2 [23]DP_TXP2 [23]
DP_TXN1 [23]DP_TXP1 [23]
DP_TXN0 [23]DP_TXP0 [23]
INT_DP_AUXDP [23]INT_DP_AUXDN [23]
LPCPD# [27]
INT_LVDS_BRIGHT[24]
DDPC_CTRLDAT [23]DDPC_CTRLCLK [23]
PWROK_EC [34]
INT_LVDS_BLON[24]INT_LVDS_DIGON[24]
PCIE_LAN_WAKE# [28]
PCH_SUSACK#[34]
PCH_SUSWARN#[34]
+1.05V_VTT
+3V_S5
+3V +3V_S5
+3V_S5
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
PCH 1/6 (DMI/FDI/VIDEO) 1A
Monday, January 07, 2013
ZQK
467
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
PCH 1/6 (DMI/FDI/VIDEO) 1A
Monday, January 07, 2013
ZQK
467
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
PCH 1/6 (DMI/FDI/VIDEO) 1A
Monday, January 07, 2013
ZQK
467
R836 0/J_4
TP34
R591 0/J_4
R607 0/J_4
R608
100K/J_4
TP30
DMI
FDI
System Power Management
U38C
Panther Point_R1P0
DMI0RXNBC24
DMI1RXNBE20
DMI2RXNBG18
DMI3RXNBG20
DMI0RXPBE24
DMI1RXPBC20
DMI2RXPBJ18
DMI3RXPBJ20
DMI0TXNAW24
DMI1TXNAW20
DMI2TXNBB18
DMI3TXNAV18
DMI0TXPAY24
DMI1TXPAY20
DMI2TXPAY18
DMI3TXPAU18
DMI_ZCOMPBJ24
DMI_IRCOMPBG25
FDI_RXN0BJ14
FDI_RXN1AY14
FDI_RXN2BE14
FDI_RXN3BH13
FDI_RXN4BC12
FDI_RXN5BJ12
FDI_RXN6BG10
FDI_RXN7BG9
FDI_RXP0BG14
FDI_RXP1BB14
FDI_RXP2BF14
FDI_RXP3BG13
FDI_RXP4BE12
FDI_RXP5BG12
FDI_RXP6BJ10
FDI_RXP7BH9
FDI_FSYNC0AV12
FDI_FSYNC1BC10
FDI_LSYNC0AV14
FDI_LSYNC1BB10
FDI_INTAW16
PMSYNCHAP14
SLP_SUS#G16
SLP_S3#F4
SLP_S4#H4
SLP_S5# / GPIO63D10
SYS_RESET#K3
SYS_PWROKP12
PWRBTN#E20
RI#A10
WAKE#B9
SUS_STAT# / GPIO61G8
SUSCLK / GPIO62N14
ACPRESENT / GPIO31H20
BATLOW# / GPIO72E10
PWROKL22
CLKRUN# / GPIO32N3
SUSWARN#/SUSPWRDNACK/GPIO30K16
RSMRST#C21
DRAMPWROKB13
SLP_LAN# / GPIO29K14
APWROKL10
DPWROKE22
DMI2RBIASBH21
SLP_A#G10
DSWVRMENA18
SUSACK#C12
R283 1K/F_4
R198 0/J_4
LVDS
Digital Display Interface
CRT
U38D
Panther Point_R1P0
L_BKLTCTLP45
L_BKLTENJ47
L_CTRL_CLKT45
L_CTRL_DATAP39
L_DDC_CLKT40
L_DDC_DATAK47
L_VDD_ENM45
LVDSA_CLK#AK39
LVDSA_CLKAK40
LVDSA_DATA#0AN48
LVDSA_DATA#1AM47
LVDSA_DATA#2AK47
LVDSA_DATA#3AJ48
LVDSA_DATA0AN47
LVDSA_DATA1AM49
LVDSA_DATA2AK49
LVDSA_DATA3AJ47
LVDSB_CLK#AF40
LVDSB_CLKAF39
LVDSB_DATA#0AH45
LVDSB_DATA#1AH47
LVDSB_DATA#2AF49
LVDSB_DATA#3AF45
LVDSB_DATA0AH43
DDPB_0NAV42
DDPB_1NAV45
LVD_VREFHAE48
LVD_VREFLAE47
DDPD_2NBF42
DDPD_3NBJ42
DDPB_2NAU48
DDPB_3NAV47
DDPC_0NAY47
DDPC_1NAY43
DDPC_2NBA47
DDPC_3NBB47
DDPD_0NBB43
DDPD_1NBF44
DDPB_0PAV40
DDPB_1PAV46
DDPD_2PBE42
DDPD_3PBG42
DDPB_2PAU47
DDPB_3PAV49
LVDSB_DATA1AH49
LVDSB_DATA2AF47
LVDSB_DATA3AF43
LVD_IBGAF37
LVD_VBGAF36
DDPC_1PAY45
DDPC_0PAY49
DDPC_2PBA48
DDPC_3PBB49
DDPD_0PBB45
DDPD_1PBE44
CRT_BLUEN48
CRT_DDC_CLKT39
CRT_DDC_DATAM40
CRT_GREENP49
CRT_HSYNCM47
CRT_IRTNT42
CRT_REDT49
CRT_VSYNCM49
DAC_IREFT43
SDVO_CTRLCLKP38
SDVO_CTRLDATAM39
DDPC_CTRLCLKP46
DDPC_CTRLDATAP42
DDPD_CTRLCLKM43
DDPD_CTRLDATAM36
DDPB_AUXNAT49
DDPC_AUXNAP47
DDPD_AUXNAT45
DDPB_AUXPAT47
DDPC_AUXPAP49
DDPD_AUXPAT43
DDPB_HPDAT40
DDPC_HPDAT38
DDPD_HPDBH41
SDVO_TVCLKINPAP45SDVO_TVCLKINNAP43
SDVO_STALLPAM40SDVO_STALLNAM42
SDVO_INTPAP40SDVO_INTNAP39
R618 10K/J_4
R547 10K/J_4
TP29
R554 0/J_4
TP32
R586 200/F_4
R611 0/J_4
R576 *0/J_4
R599100K/J_4
R615 0/J_4
R1391K/F_4
U41
TC7SH08FU
2
14
35
R543 49.9/F_4
R242 8.2K/J_4
C598*0.1U/10V_4
R550 750/F_4
R275 8.2K/J_4
R616 0/J_4
R174 10K/J_4
R169 0/J_4
R271 *1K/J_4
R577 *10K/J_4
R196 10K/J_4
R614 *0/J_4
C6310.1u/10V_4
U40
*TC7SH08
2
14
35
R612 *0/J_4
R604 0/J_4
R609 10K/J_4
R180 *10K/J_4
C206 *1U/10V_4
R208 *10K/J_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DF_TVS
PCH Strap Table
PWROK
No reboot mode setting PWROKSPKR
PWROK
GPIO19
PWROK
Boot BIOS Selection 0 [bit-0]
Boot BIOS Selection 1 [bit-1]
Pin Name Sampled Configuration
DMI/FDI Termination voltage
Default weak pull-up on GNT0/1#[Need external pull-down for LPC BIOS]
GNT1# / GPIO51
PWROK
GNT3# / GPIO55 Top-Block Swap Override
INTVRMEN Integrated 1.05V VRM enable ALWAYS Should be always pull-up
GPIO28
+3V
+3V_S5
+3V
+3V
+3V
On-die PLL Voltage Regulator RSMRST#
20MIL
08
for future CPU, Sandy Bridge NCDF_TVS needs to be pulled up to VccDFTERM power rai l through 2.2 kOhm ±5% - R8361 change to 0 or not??
Strap description
HDA_SDO Flash Descriptor Security RSMRST
HDA_SYNC On-Die PLL VR Voltage Select RSMRST Needs to be pulled High for Chief River platformchklist 2.0
*
GPIO19GNT1#
LPC00
SPI11
Boot Location
1 = Setting to No-Reboot mode
0 = Default (weak pull-down 20K)
1 = Default (weak pull-up 20K)
0 = "top-block swap" mode
1 = overridden
0 = effect (default)(weak pull-down 20K)
0 = Set to Vss (weak pull-down 20K)
1 = Set to Vcc
0 = Disable
1 = Enable (weak pull-up 10K)
0 = Support by 1.8V (weak pull-down)
1 = Support by 1.5V
GPIO150 = Disable (Default)
1 = Enable
Intel ME Crypto Transport Layer Security (TLS) cipher suite internal PD
RSMRST
DSWVREN DSWHigh = Enable (Default)
Low = Disable
DEEP S4/S5 well On Die DSW VR Enable
ME_WR default EC setting folating
SATA0GP/GPIO21SATA4GP/GPIO16SATA5GP/GPIO49If these pins are unused use 8.2kto 10k pull-up to +Vcc3_3 or 8.2kto 10k pull-down to ground
Used as GPIO only. at chklist 1.2
NV_ALE Intel Anti-Theft HDD protectionOnly for Interposer
PWROK 0 = Disable (Internal pull-down 20kohm)
SATA HDD
DG recommended that AC coupling capacitors should b eclose to the connector (<100 mils) for optimal sign al quality.
UM77 SATA port 1,3 disable.
Follow CRB 1.5 to use 10K ohm pull high
(Default for WIN8) 20120919 FOLLOW Z09 NO STUFF
CRB 1.0
Add MOSFET to separate CODEC SYNC signal
ZRH use 2N7002D
20MIL30MIL
PCH2 (CLG) CPT/PPT (HDA,JTAG,SATA) (CLG)
HDA Bus (CLG)
PCH JTAG Debug (CLG)
PCH Dual SPI (CLG)
RTC (RTC)
Layout Notes:Place Series Resistors close to Flash ROM
mSATA
Layout Notes:Place Series Resistors close to Flash ROM
Layout Notes:Place Series Resistors close to Flash ROM
W25Q16BVSSIG / AKE38FP0N01----->2MB
W25Q32BVSSIG / AKE391P0N00----->4MB
20MIL
ML1220 Coin typeAHL03001424 FDK (SAY) 15mAHAHL03017100 Panasonic (MAT) 17mAH
PCH_SPI_CS0#
ACZ_BITCLK_R
SM_INTRUDER#
RTC_RST#
SPKR
PCH_DRQ#0PCH_DRQ#1
SATA_COMP
SATA3_COMP
SATA3_RBIAS
BBS_BIT0
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_SO
PCH_XDP_TDO_VT
PCH_XDP_TDO
SPKR
ACZ_RST#_R
ACZ_SDOUT_R
PCH_INVRMEN
SRTC_RST#
RTC_X1
RTC_X2
PCH_INVRMEN
SRTC_RST#VCCRTC_1
RTC_RST#
XDP_TCLK_VT
XDP_TMS_VT
PCH_XDP_TDO_VTXDP_TMS_VT
ACZ_SDOUT_R
ACZ_SYNC_R
ACZ_SYNC_R
ACZ_RST#_R
ACZ_SDOUT_R
ACZ_SYNC_CODEC
BBS_BIT0
PCH_XDP_TDOXDP_TCLK_VT
PCH_SPI_SO
PCH_SPI_CLKPCH_SPI_SI
PCH_SPI_CS0#
PCH_GPIO33
SYS_COM_REQ
ACZ_SYNC_CODEC
ACZ_BITCLK_R
PCH_SPI_SO_R2PCH_SPI_SI_R2PCH_SPI_CLK_R2
SATA_ACT#
SPI_CS0#_UR_ME
PCH_SPI_SI_R
PCH_SPI_CS1#
PCH_SPI_SO_R
PCH_SPI_SO
PCH_SPI_CLKPCH_SPI_SI
PCH_SPI_CS1#
PCH_SPI_SO_R
PCH_SPI_SI_R
PCH_SPI_CLK_R
PCH_SPI_CLK_R
PCH_SPI_CS1#
VCCRTC_3 VCCRTC_4VCCRTC_2
SPKR[30]
PCH_AZ_CODEC_SDIN0[30]
PCI_GNT3# [9]
DF_TVS [10]H_SNB_IVB# [3]
PLL_ODVR_EN [10]
BBS_BIT1 [9]
LPC_LAD0 [26,27,34]LPC_LAD1 [26,27,34]LPC_LAD2 [26,27,34]LPC_LAD3 [26,27,34]
LPC_LFRAME# [26,27,34]
SERIRQ [27,34]
SATA_TXN0 [27]SATA_TXP0 [27]
SATA_RXN0 [27]SATA_RXP0 [27]
PCH_AZ_CODEC_BITCLK[30]
PCH_AZ_CODEC_RST#[30]
PCH_AZ_CODEC_SDOUT[30]
PCH_AZ_CODEC_SYNC[30]
ME_WR#[34]
PCH_GPIO15 [10]
DSWVREN [7]
NV_ALE [9]
SATA_TXN1 [26]SATA_TXP1 [26]
SATA_RXN1 [26]SATA_RXP1 [26]
PCH_XDP_TDO_VT[3]
XDP_TCLK_VT[3]
XDP_TMS_VT[3]
SPI_CS0#_UR_ME[34]
PCH_SPI_CLK_EC[34]PCH_SPI_SI_EC[34]
PCH_SPI_SO_EC[34]
SYS_COM_REQ[23]
+3V_RTC
+3V
+1.05V_VTT
+3V_RTC
+3VPCU
+3V_RTC
+1.8V
+3V_S5
+3V_S5
+3V_S5
+3V_RTC
+3V
+1.8V
+3V_PCH_ME
+3V_PCH_ME
+3V_PCH_ME
+3V_S5
+3V
+3V
+5V
+3V_PCH_ME
+3V_PCH_ME
+3V_PCH_ME
+5V_S5
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
PCH 2/6 (SATA/RTC/HDA/LPC) 1A
Monday, January 07, 2013
ZQK
468
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
PCH 2/6 (SATA/RTC/HDA/LPC) 1A
Monday, January 07, 2013
ZQK
468
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
PCH 2/6 (SATA/RTC/HDA/LPC) 1A
Monday, January 07, 2013
ZQK
468
R655 33/J_4
R289
210/F_4R219 37.4/F_4
R811 4.7K/J_4
R597 *1K/J_4
R153 33/J_4
R570 3.3K/J_4
C6471u/6.3V_4
R164 1K/J_4
R665 0/J_6
R1431M/J_4
R222 10K/J_4
R552 33/J_4
R564 330K/J_4
U44
ROM-2M_ME
CE#1
SCK6
SI5
SO2
WP#3
VDD8
VSS4
HOLD#7
R654 3.3K/J_4
R62151/J_4
R508 *1K/J_4
C6511u/6.3V_4
R589 3.3K/J_4
TP31
R673 20K/J_4
TP14
R555 33/J_4
TP69
J2
*SHORT_ PAD1
12
R558 33/J_4
R133 0/J_4
R299 *1K/J_4
CN14RTC_SOCKET
12
R291 *1K/J_4
R633 750/F_4
R560 33/J_4
R272100/F_4
R54910M/J_4
R634 10K/J_4
R596 47K/J_4
C141 *22p/50V_4
R656 3.3K/J_4
R672 20K/J_4
J1
*SHORT_ PAD1
12
TP24
Q172N7002K
3
2
1
C6501u/6.3V_4
C601 *22p/50V_4
R210 49.9/F_4
C636*22p/50V_4
R302
210/F_4
TP35
C595 18p/50V_4
R661 0/J_6
C6210.1u/10V_4
R507 *1K/J_4
R643 *10K/J_4
R6631K/J_4
R166 33/J_4
R566 33/J_4
R529 33/J_4
TP12
Y432.768KHZ
12
Q70MMBT3904 2
1 3
R553 *330K/J_4
R292100/F_4
RTC
IHDA
SATA
LPC
SPI
JTAG
SATA 6G
U38A
Panther Point_R1P0
RTCX1A20
RTCX2C20
INTVRMENC17
INTRUDER#K22
HDA_BCLKN34
HDA_SYNCL34
HDA_RST#K34
HDA_SDIN0E34
HDA_SDIN1G34
HDA_SDIN2C34
HDA_SDOA36
SATALED#P3
FWH0 / LAD0C38
FWH1 / LAD1A38
FWH2 / LAD2B37
FWH3 / LAD3C37
LDRQ1# / GPIO23K36
FWH4 / LFRAME#D36
LDRQ0#E36
RTCRST#D20
HDA_SDIN3A34
HDA_DOCK_EN# / GPIO33C36
HDA_DOCK_RST# / GPIO13N32
SRTCRST#G22
SATA0RXNAM3
SATA0RXPAM1
SATA0TXNAP7
SATA0TXPAP5
SATA1RXNAM10
SATA1RXPAM8
SATA1TXNAP11
SATA1TXPAP10
SATA2RXNAD7
SATA2RXPAD5
SATA2TXNAH5
SATA2TXPAH4
SATA3RXNAB8
SATA3RXPAB10
SATA3TXNAF3
SATA3TXPAF1
SATA4RXNY7
SATA4RXPY5
SATA4TXNAD3
SATA4TXPAD1
SATA5RXNY3
SATA5RXPY1
SATA5TXNAB3
SATA5TXPAB1
SATAICOMPIY10
SPI_CLKT3
SPI_CS0#Y14
SPI_CS1#T1
SPI_MOSIV4
SPI_MISOU3
SATA0GP / GPIO21V14
SATA1GP / GPIO19P1
JTAG_TCKJ3
JTAG_TMSH7
JTAG_TDIK5
JTAG_TDOH1
SERIRQV5
SPKRT10
SATAICOMPOY11
SATA3COMPIAB13
SATA3RCOMPOAB12
SATA3RBIASAH1
C6400.1u/10V_4
R653 33/J_4
R294
210/F_4
R808
68.1K/F_4
U39
ROM-4M_EC
CE#1
SCK6
SI5
SO2
WP#3
VDD8
VSS4
HOLD#7
C591 18p/50V_4
R557 330K/J_4
R809 4.7K/J_4
R622 1K/J_4
R652 33/J_4
R173 1M/J_4 TP9
D30
BAT54C
R627 *1K/J_4
R551 33/J_4
R163 33/J_4
R303100/F_4
R810
150K/F_4
R606 2.2K/J_4
R628 10K/J_4
R536 0/J_4
R584 0/J_4
R613 1K/J_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
For LAN
CLOCK TERMINATION for FCIM(Full Clock Integration Mode )
+3V+3V+3V
+3V+3V+3V
+3V+3V+3V+3V
+3V_S5+3V_S5+3V_S5+3V_S5+3V_S5+3V_S5+3V_S5+3V_S5
+3V_S5
+3V
+3V
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V
+3V
+3V
+3V
+3V_S5
+3V_S5
+3V_S5
+3V_S5
+3V_S5
09
EHCI1
EHCI2
USB port6/7 may not be available on all PCH sku(HM55 support 12port only)
UMA Only
dGPU Only
Switchable (Mux)
Optimize (Muxless)
dGPU_PW_CTRL# (GPIO68)CTL : dGPU_VRON
SKU_ID1(GPIO64)
SKU_ID0(GPIO16)
VGA H/W Signal
Setup Menu
1
0 or 1
0
0
0
0
1
1
0
0
1
1
UMA
GPU
UMA+GPU
UMA
Hidden
Hidden
dGPU/SG
UMA/SG
UMA boot
GPU boot
UMA boot
UMA boot
0 = GPU power is control by PCH GPIO (Discrete, SG or Optimize)
MPC Switch Control
MPC_PWR_CTRL#Low = MPC ONHigh = MPC OFF (Default)
USB30_RX1NUSB30_RX2NUSB30_RX3NUSB30_RX4NUSB30_RX1PUSB30_RX2P
USB30_RX4PUSB30_RX3P
USB30_TX1NUSB30_TX2N
USB30_TX4NUSB30_TX3N
USB30_TX1PUSB30_TX2P
USB30_TX4PUSB30_TX3P
Layout Notes:USB3 TX AC cap place at connector side, AC cap to connector < 400mils
MB USB WITH 3.0 PORT
USB3.0
XHCI for USBP0-3
S5 S0
BT+WL
UM77/HM70 will disable 5~8 PCIE ports
UM77 USB port 6,7,12,13 disable.
LAN
20110908 WLAN support S3 wake up function.
Wireless
PCIE port 1 for commeral model S3 can't weak up.
20111122 add for Touch pad interrupt pin from GPIO13 to GPIO11.
20120522：follow CRB to modify power plan to +3Vcheck list 2.0：When connected to the processor the PLTRST# signalshould be level shifted to 1.05V.
20120201 Change CAP from 27P to 10P.
Wireless
20120712：Add 0ohm reserved for two sides ofSMBUS since they are the same power plane(CRB no level shift)
LAN
CPT/PPT (PCI,USB,NVRAM) (CLG)
CPT/PPT (PCI-E,SMBUS,CLK)
PLTRST#(CLG) PCI/USBOC# Pull-up(CLG)
DDRIII Memory down strap (CLG)
CLK_REQ/Strap Pin(CLG) SMBus(EC) (CLG) SMBus(PCH) (CL G)
USB30 Port1: EXT USB3.0 Port
USB Port1 can be used on debug mode
For EC
dGPU_PW_CTRL#
1 = GPU power is control by H/W (pure Discrete SKU)
EV@: For Optimize SKUIV@: For UMA SKU
USB30 Port3: Mini DP port
Mini DP WITH 3.0 PORT
USB2.0
MB USB 2.0 Port
Camera
Touch Panel
DB USB 2.0 Port
USB Port9 can be used on debug mode
1001：(BIOS) Use port1 is enough
AKD5JGST407 EDJ4216EFBG-GNL-F 1600MHz
RAM_IDnVender Freq.
1333MHzElpida
0010
Hynix
Q PN
AKD5JGST400
Mfr. PN
EDJ4216EBBG-DJ-F
0000
0001
PCI_PIRQA#PCI_PIRQB#PCI_PIRQC#PCI_PIRQD#
REQ1#_GPIO50REQ2#_GPIO52
EXTTS_SNI_DRV1_PCH
PCI_PME#
PCI_PLTRST#
SMB_PCH_CLK
SMB_PCH_DAT
MPC_PWR_CTRL#DGPU_PWR_ENDGPU_HOLD_RST#
REQ#3
USB_BIAS
USB_OC0#
PCI_PLTRST#PLTRST#
PCIE_CLKREQ1#
CLK_PCIE_REQ6#
CLK_PCIE_REQ7#
CLK_BUF_PCIE_3GPLLN
CLK_BUF_DREFSSCLKP
CLK_PCH_14M
CLK_BUF_PCIE_3GPLLP
CLK_BUF_BCLKPCLK_BUF_BCLKN
CLK_BUF_DREFCLKNCLK_BUF_DREFCLKP
CLK_BUF_DREFSSCLKN
PCIE_CLKREQ_PEG#_R
CLK_PCI_FB
XCLK_RCOMP
SMB_ME1_DAT
SMB_ME1_CLK
SML1ALERT#_R
SMB_ME0_CLK
SMB_ME0_DAT
DRAMRST_CNTRL_PCH
SMBALERT#
SML1ALERT#_R
SMBALERT#
SMB_ME0_DATSMB_ME0_CLKSMB_PCH_DATSMB_PCH_CLK
SMB_ME1_DAT
SMB_ME1_CLK
CLK_BUF_PCIE_3GPLLN
CLK_PCH_14M
CLK_BUF_PCIE_3GPLLP
CLK_BUF_DREFSSCLKPCLK_BUF_DREFSSCLKNCLK_BUF_DREFCLKPCLK_BUF_DREFCLKN
PCIE_CLKREQ1#
CLK_PCIE_REQ6#CLK_PCIE_REQ7#
CLK_PCIE_LAN_REQ#
PCIE_CLKREQ4#
PCIE_CLKREQ3#PCIE_CLKREQ0#
PCI_PIRQA#PCI_PIRQB#PCI_PIRQC#PCI_PIRQD#
XTAL25_INXTAL25_OUT
CLK_BUF_BCLKNCLK_BUF_BCLKP
DGPU_HOLD_RST#
CL_CLK1
CL_DATA1
CL_RST1#
CLK_PCI_775_RCLK_LPC_DEBUG_R
CLK_PCI_FB CLK_PCI_FB_R
MPC_PWR_CTRL#
BOARD_ID2
SKU_ID1
SKU_ID1
SMB_PCH_DAT
SMB_PCH_CLK
PCIE_CLKREQ_PEG#_R
XTAL25_IN
XTAL25_OUT
PCIE_CLKREQ0#
PCIE_CLKREQ4#
PCIE_CLKREQ2#
PCIE_CLKREQ3#
RAM_ID0RAM_ID1RAM_ID2RAM_ID3
USB_OC1#USB_OC0#
USB_OC2#USB_OC4#
RAM_ID0
RAM_ID1
USB_OC2#USB_OC1#
RAM_ID3RAM_ID2
USB_OC4#
PCIE_CLKREQ2#
CLK_PCIE_WLAN_REQ#
CLK_FLEX1
MPC_PWR_CTRL#REQ1#_GPIO50
EXTTS_SNI_DRV1_PCHREQ2#_GPIO52 REQ#3
PCLK_TPM_R
DGPU_PWR_EN
SMB_PCH_CLK [23,26]
SMB_PCH_DAT [23,26]
BBS_BIT1[8]
PLTRST# [16,26,27,28,34]
CLK_DPLL_SSCLKN [3]CLK_DPLL_SSCLKP [3]
CLK_CPU_BCLKN [3]CLK_CPU_BCLKP [3]
2ND_MBCLK[19,34]
2ND_MBDATA[19,34]
PCI_GNT3#[8]
CLK_PCIE_XDPN[3]CLK_PCIE_XDPP[3]
USBP1- [31]USBP1+ [31]
CLK_PCI_EC[34]CLK_LPC_DEBUG[26]
SKU_ID0 [10]
DRAMRST_CNTRL_PCH [4]
NV_ALE [8]
USB_OC0# [31]
CLK_SDATA [13,15,32]
CLK_SCLK [13,15,32]
USBP0- [31]USBP0+ [31]
CLK_PCIE_VGAN [16]CLK_PCIE_VGAP [16]
DGPU_HOLD_RST#[16]
PEG_A_CLKREQ# [16]
USBP10- [26]USBP10+ [26]
CL_CLK1 [26]
CL_DATA1 [26]
CL_RST1# [26]
BOARD_ID2[10,32]
CLK_PCIE_LANN[28]CLK_PCIE_LANP[28]
CLK_PCIE_LAN_REQ#[28]
PCIE_RXP3_LAN[28]PCIE_RXN3_LAN[28]
PCIE_TXP3_LAN[28]PCIE_TXN3_LAN[28]
CLK_PCIE_WLAN[26]CLK_PCIE_WLAN#[26]
CLK_PCIE_WLAN_REQ#[26]
BOARD_ID4 [10,24]
USBP8- [24]USBP8+ [24]
DGPU_PWR_EN[42]
PCI_PLTRST#[3,34]
SMBALERT# [32]
PCIE_RX8+[26]PCIE_RX8-[26]
PCIE_TX8-[26]PCIE_TX8+[26]
DGPU_PW_CTRL# [10]
PCLK_TPM[27]
USB30_RX1-[31]
USB30_RX1+[31]
USB30_TX1-[31]
USB30_TX1+[31]USBP2- [23]USBP2+ [23]
USB30_RX3-[23]
USB30_TX3-[23]
USB30_TX3+[23]
USB30_RX3+[23]
USBP3- [24]USBP3+ [24]
USBP4+ [31]USBP4- [31]
+3V
+1.05V_VTT
+3V_S5
+3V
+3V_S5
+3V
+3V
+3V
+3V
+3V
+3V_S5
+3V_S5
+3V_S5
+3V
+3V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
PCH 3/6 (PCIE/USB/CLK/SMB) 1A
Monday, January 07, 2013
ZQK
469
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
PCH 3/6 (PCIE/USB/CLK/SMB) 1A
Monday, January 07, 2013
ZQK
469
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
PCH 3/6 (PCIE/USB/CLK/SMB) 1A
Monday, January 07, 2013
ZQK
469
R658 *0/J_4
R159 8.2K/J_4
RP1
10K_10P8R
10987 4
321
56R624100K/J_4
R201 10K/J_4
R141 10K/J_4
R5922.2K/J_4
R5592.2K/J_4
R582 *RAMID@10K/J_4R203 *RAMID@10K/J_4
R632 10K/J_4
R183 10K/J_4
R630 10K/J_4
R91 22/J_4
R206 10K/J_4
R138 22/J_4
R192 10K/J_4
R276 10K/J_4
R145 EV@100K/F_4
TP68
R561 10K/J_4
R626 *IV@10K/J_4
U42TC7SH08FU
2
14
35
TP19
C6340.1u/10V_4
R129 *1K/J_4R301 10K/J_4
R574 RAMID@15K/F_4
Q57
2N7002DW
6
2
1
5
43
R587 10K/J_4
R221 2.2K/J_4
RSVD
PCI
USB
U38E
Panther Point_R1P0
RSVD23AV5
RSVD1AY7
RSVD2AV7
RSVD3AU3
RSVD4BG4
RSVD5AT10
RSVD6BC8
RSVD7AU2
RSVD8AT4
RSVD17BB5
RSVD18BB3
RSVD19BB7
RSVD20BE8
RSVD21BD4
RSVD22BF6
RSVD9AT3
RSVD10AT1
RSVD11AY3
RSVD12AT5
RSVD13AV3
RSVD14AV1
RSVD15BB1
RSVD16BA3
RSVD25AT8
RSVD24AV10
RSVD26AY5
RSVD27BA2
RSVD28AT12
RSVD29BF3
PIRQA#K40
PIRQB#K38
PIRQC#H38
PIRQD#G38
REQ1# / GPIO50C46
REQ2# / GPIO52C44
REQ3# / GPIO54E40
GNT1# / GPIO51D47
GNT2# / GPIO53E42
GNT3# / GPIO55F46
PIRQE# / GPIO2G42
PIRQF# / GPIO3G40
PIRQG# / GPIO4C42
PIRQH# / GPIO5D44
USBP0NC24
USBP0PA24
USBP1NC25
USBP1PB25
USBP2NC26
USBP2PA26
USBP3NK28
USBP3PH28
USBP4NE28
USBP4PD28
USBP5NC28
USBP5PA28
USBP6NC29
USBP6PB29
USBP7NN28
USBP7PM28
USBP8NL30
USBP8PK30
USBP9NG30
USBP9PE30
USBP10NC30
USBP10PA30
USBP11NL32
USBP11PK32
USBP12NG32
USBP12PE32
USBP13NC32
USBP13PA32
PME#K10
CLKOUT_PCI0H49
CLKOUT_PCI1H43
CLKOUT_PCI2J48
USBRBIAS#C33
USBRBIASB33
OC0# / GPIO59A14
OC1# / GPIO40K20
OC2# / GPIO41B17
OC3# / GPIO42C16
OC4# / GPIO43L16
OC5# / GPIO9A16
OC6# / GPIO10D14
OC7# / GPIO14C14
CLKOUT_PCI4H40 CLKOUT_PCI3K42
PLTRST#C6
TP1BG26
TP2BJ26
TP3BH25
TP6AH38
TP7AH37
TP8AK43
TP9AK45
TP16Y13
TP17K24
TP18L24
TP19AB46
TP20AB45
TP21B21
TP22M20
TP23AY16
TP25BE28
TP26BC30
TP27BE32
TP28BJ32
TP29BC28
TP30BE30
TP31BF32
TP32BG32
TP33AV26
TP34BB26
TP35AU28
TP36AY30
TP37AU26
TP38AY26
TP39AV28
TP40AW30
TP4BJ16
TP5BG16
TP15AM5 TP14AM4 TP13
AH12 TP12H3 TP11
N30 TP10C18
TP24BG46
R123 *IV@10K/J_4
TP59
R575 *RAMID@10K/J_4
TP62
R5111M/J_4
R215 *0/J_4
R116 22/J_4
R595 10K/J_4
R137 10K/J_4
R6454.7K/J_4
R152 8.2K/J_4
R648 10K/J_4Q60
2N7002DW
6
2
1
5
43
R155 8.2K/J_4
R625 2.2K/J_4R649 2.2K/J_4
R620 10K/J_4
R132 *100K/J_4
R218 10K/J_4
TP10
R569 RAMID@10K/J_4
R247 10K/J_4
R530 10K/J_4
TP23
TP33
R504 90.9/F_4C565 10p/50V_4
R300 10K/J_4
R231 2.2K/J_4
TP61
R191 10K/J_4
R144 *IV@1K/J_4
TP21
R220 *0/J_4
R216 10K/J_4 R6594.7K/J_4
R228 10K/J_4
TP16
TP18R308 EV@0/J_4
R535 10K/J_4R115 EV@10K/J_4
TP25
R122 22/J_4
R200 RAMID@15K/F_4
TP27
R249 10K/J_4
R149 8.2K/J_4
TP8
R642 EV@10K/J_4
TP28
C564 10p/50V_4
TP60
R539 22.6/F_4
R190 10K/J_4
R567 *RAMID@15K/F_4
Y325MHz_XTAL
24
13
TP17
PCI-E*
CLOCKS
FLEX CLOCKS
SMBUS
Controller
Link
U38B
Panther Point_R1P0
PERN1BG34
PERP1BJ34
PERN2BE34
PERP2BF34
PERN3BG36
PERP3BJ36
PERN4BF36
PERP4BE36
PERN5BG37
PERP5BH37
PERN6BJ38
PERP6BG38
PERN7BG40
PERP7BJ40
PERN8BE38
PERP8BC38
PETN1AV32
PETP1AU32
PETN2BB32
PETP2AY32
PETN3AV34
PETP3AU34
PETN4AY34
PETP4BB34
PETN5AY36
PETP5BB36
PETN6AU36
PETP6AV36
PETN7AY40
PETP7BB40
PETN8AW38
PETP8AY38
CLKOUT_PCIE0NY40
CLKOUT_PCIE0PY39
CLKOUT_PCIE1NAB49
CLKOUT_PCIE1PAB47
CLKOUT_PCIE2NAA48
CLKOUT_PCIE2PAA47
CLKOUT_PCIE3NY37
CLKOUT_PCIE3PY36
CLKOUT_PCIE4NY43
CLKOUT_PCIE4PY45
CLKOUT_PCIE5NV45
CLKOUT_PCIE5PV46
CLKIN_GND1_NBJ30
CLKIN_GND1_PBG30
CLKIN_DMI_NBF18
CLKIN_DMI_PBE18
CLKIN_DOT_96NG24
CLKIN_DOT_96PE24
CLKIN_SATA_NAK7
CLKIN_SATA_PAK5
XTAL25_INV47
XTAL25_OUTV49
REFCLK14INK45
CLKIN_PCILOOPBACKH45
CLKOUT_PEG_A_NAB37
CLKOUT_PEG_A_PAB38
PEG_A_CLKRQ# / GPIO47M10
PCIECLKRQ0# / GPIO73J2
PCIECLKRQ1# / GPIO18M1
PCIECLKRQ2# / GPIO20V10
PCIECLKRQ3# / GPIO25A8
PCIECLKRQ4# / GPIO26L12
PCIECLKRQ5# / GPIO44L14
CLKOUTFLEX0 / GPIO64K43
CLKOUTFLEX1 / GPIO65F47
CLKOUTFLEX2 / GPIO66H47
CLKOUTFLEX3 / GPIO67K49
CLKOUT_DMI_NAV22
CLKOUT_DMI_PAU22
PEG_B_CLKRQ# / GPIO56E6
CLKOUT_PEG_B_PAB40 CLKOUT_PEG_B_NAB42
XCLK_RCOMPY47
CLKOUT_DP_PAM13CLKOUT_DP_NAM12
CLKOUT_PCIE6NV40
CLKOUT_PCIE6PV42
PCIECLKRQ7# / GPIO46K12
CLKOUT_PCIE7NV38
CLKOUT_PCIE7PV37
CLKOUT_ITPXDP_NAK14
CLKOUT_ITPXDP_PAK13
SMBALERT# / GPIO11E12
SMBCLKH14
SMBDATAC9
SML0ALERT# / GPIO60A12
SML0CLKC8
SML0DATAG12
SML1ALERT# / PCHHOT# / GPIO74C13
SML1CLK / GPIO58E14
SML1DATA / GPIO75M16
CL_CLK1M7
CL_DATA1T11
CL_RST1#P10
PCIECLKRQ6# / GPIO45T13
R581 RAMID@15K/F_4
R205 10K/J_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+3V
+3V
+3V
+3V
+3V_S5
+3V_S5
+3V_S5
+3V
+3V
+3V
+3V_S5
DSW
+3V_S5
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V_S5
+3V
+3V
+3V
+3V
FDI TERMINATIONVOLTAGE OVERRIDE
LOW - Tx, Rx terminatedto same voltage G_SENSOR_ID
High = Disable (Default)
Low = Enable
GPIO Pull-up/Pull-down (CLG)
MFG-TEST
10
SV_SET_UP
High = Strong (Default)
SGPIO
SATA2GP/SATA3GP : When Unused as GPIO or SATA*GP - Use8.2K-10K pull-down to ground by chklist 2.0NOTE: The internal pull-down is disabled after PLTR ST#deasserts.NOTE: This signal should not be pulled high when st rap issampled.
GPIO27 : If not used then use 8.2-k Ω to 10-k Ω pull-down to GND.
DMI TERMINATION VOLTAGE OVERRIDE
Low = Tx, Rx terminated to same voltage (DC Coupling Mode)(DEFAULT)
LVDS = Pull HIGHeDP = Pull LOW
2011/09/01 add select resistor
USB3.0 IC CTL
LOW = USB3.0 IC
high VDDR=+1.35V_SUS for DDR3LLow VDDR =+1.5V_SUS(default)
assign to VID for VDDR control
20111017 un-stuff R5126 for DSW
20120607：follow CRB pull down
20120625 ：：：：<PCH_GPIO24>Follow CRB to pull up 10K ohm
BOARD_ID4
CPT/PPT (GPIO,VSS_NCTF,RSVD) (CLG)
High Low
No touch panel Touch panel
BOARD_ID1
GDDR5 DDR3
BOARD_ID2
BOARD_ID3
Disable on board memory Enable on board memory
Pin8 of SYNAPTICS and ELAN are NC pin
BOARD_ID0
Default is pull high
BIOS maybe will use EEPROM detection
S_GPIO
SIO_EXT_SMI#
SIO_EXT_SCI#
BOARD_ID1
SMIB
DGPU_PWROK
SCLOCK_GPIO22
STP_PCI#
SIO_A20GATE
SIO_RCIN#
PCH_THRMTRIP#
FDI_OVRVLTG
MFG_MODE
BOARD_ID0
WK_GPIO27
TEST_SET_UP
CRIT_TEMP_REP#
SV_DET
TACH5_GPIO69
FDI_OVRVLTG SCLOCK_GPIO22
SIO_RCIN#
STP_PCI#
CRIT_TEMP_REP#
SIO_EXT_SMI#SIO_EXT_SCI#
SIO_A20GATE
MFG_MODE
PCH_GPIO24
PCH_GPIO24
SV_DET
PLL_ODVR_EN
TEST_SET_UP
DMI_OVRVLTG
DGPU_VRON
TP_INT_PCH
PLL_ODVR_EN
S_GPIO
DGPU_PWROK
EC_PECI_R
DMI_OVRVLTG
TACH5_GPIO69
SMIB
BOARD_ID3
BOARD_ID1BOARD_ID0
BOARD_ID4
BOARD_ID2BOARD_ID3
WK_GPIO27
SIO_EXT_SMI#[34]
SIO_EXT_SCI#[34]
SIO_A20GATE [34]
SIO_RCIN# [34]
H_PWRGOOD [3]
PM_THRMTRIP# [3]
PLL_ODVR_EN[8]
DF_TVS [8]
SKU_ID0[9]
PCH_GPIO15[8]
DGPU_VRON[20,43]
DGPU_PWROK[20]
EC_PECI [3,34]
BOARD_ID2[9,32]BOARD_ID4[9,24]
DGPU_PW_CTRL# [9]
TP_INT_PCH[24]
+3V
+3V +3V
+3V
+3V_S5
+3V
+3V_S5
+3V
+3V
+3V
+3V_S5
+3V
+3VPCU
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
PCH 4/6 (GPIO/MISC) 1A
Monday, January 07, 2013
ZQK
4610
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
PCH 4/6 (GPIO/MISC) 1A
Monday, January 07, 2013
ZQK
4610
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
PCH 4/6 (GPIO/MISC) 1A
Monday, January 07, 2013
ZQK
4610
R510 1K/J_4
R148 10K/J_4
R278 100/J_4
R280 *10K/J_4
R162 10K/J_4R631 10K/J_4
CPU/MISC
NCTF
GPIO
U38F
Panther Point_R1P0
GPIO27E16
GPIO28P8
GPIO24 / MEM_LEDE8
GPIO57D6
LAN_PHY_PWR_CTRL / GPIO12C4
VSS_NCTF_1A4
VSS_NCTF_2A44
VSS_NCTF_3A45
VSS_NCTF_4A46
VSS_NCTF_5A5
VSS_NCTF_6A6
VSS_NCTF_7B3
VSS_NCTF_8B47
VSS_NCTF_9BD1
VSS_NCTF_10BD49
VSS_NCTF_11BE1
VSS_NCTF_12BE49
TACH2 / GPIO6H36
TACH0 / GPIO17D40
TACH3 / GPIO7E38
SATA3GP / GPIO37M5
SATA5GP / GPIO49V3
SCLOCK / GPIO22T5
SLOAD / GPIO38N2
SDATAOUT0 / GPIO39M3
SDATAOUT1 / GPIO48V13
PROCPWRGDAY11
RCIN#P5
PECIAU16
THRMTRIP#AY10
GPIO8C10
BMBUSY# / GPIO0T7
GPIO15G2
TACH1 / GPIO1A42
SATA2GP / GPIO36V8
INIT3_3V#T14
STP_PCI# / GPIO34K1
GPIO35K4
SATA4GP / GPIO16U2
VSS_NCTF_32F49
A20GATEP4
TACH4 / GPIO68C40
TACH6 / GPIO70C41
TACH7 / GPIO71A40
TACH5 / GPIO69B41
VSS_NCTF_17BH3
VSS_NCTF_18BH47
VSS_NCTF_19BJ4
VSS_NCTF_20BJ44
VSS_NCTF_21BJ45
VSS_NCTF_22BJ46
VSS_NCTF_23BJ5
VSS_NCTF_24BJ6
VSS_NCTF_25C2
VSS_NCTF_26C48
VSS_NCTF_27D1
VSS_NCTF_28D49
VSS_NCTF_29E1
VSS_NCTF_30E49
VSS_NCTF_31F1
TS_VSS4AK10
TS_VSS3AH10
TS_VSS2AK11
TS_VSS1AH8
NC_1P37
VSS_NCTF_13BF1
VSS_NCTF_14BF49
VSS_NCTF_15BG2
VSS_NCTF_16BG48
DF_TVSAY1
R273 10K/J_4
R307 10K/J_4
R646 *10K/J_4
R99 *10K/J_4 R105 10K/J_4
R225 390/J_4
R288 10K/J_4
R644 10K/J_4
R506 *10K/J_4
R270 10K/J_4
R185 10K/J_4
R290 *1K/J_4
TP36
R647 *10K/J_4
R284 *1K/J_4
R131 *10K/J_4
R229 *10K/J_4
R212 *0/J_4
R252 *10K/J_4
R274 100K/J_4
R268 10K/J_4
R520 10K/J_4
R524 1.5K/F_4
R522 *10K/J_4
R629 *1K/J_4
R298 100K/J_4
R279 *200K/F_4
R505 10K/J_4
R248 *1K/J_4
R181 *10K/J_4
R635 10K/J_4
R250 *1K/J_4
R151 *10K/J_4
R623 10K/J_4
R285 1K/J_4
R509 10K/J_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCCME(+1.05V) = ??A(??mils)
??mA(??mils)
11VccCORE =1.3 A(60mils)
VccIO =2.925 A(140mils)
VCCSPI = 20mA(8mils)
VCCPNAND = 190 mA(15mils)
VCCCLKDMI = 20mA(8mils)
VCCDMI = 42mA(10mils)
VccADAC =1mA(8mils)
VCCDSW3_3= 3mA
VccASW =1.01 A(60mils)
65mA(10mils)
8mA(8mils)
VCCDIFFCLKN= 55mA(18mils)
VCCSSC= 95mA(10mils)
1mA(8mils)
VCCRTC<1mA(8mils)
VCCME = 1.01A(60mils)
VCCVRM= 114mA(15mils)
VCCPCORE = 28mA(10mils)
VCCSUS3_3 = 119mA(15mils)
V5REF= 1mA
VCC5REFSUS=1mA
VCCSUS3_3 = 119mA(15mils)
VCCVRM: 1.8V (Destop) 02/20 del for Pre-ES1 1.5V (Mobile) Reserve +3V_S5 to VCCSPI for EC 795 co-layout
When Dis sku and eDP , LVDS power can short to GND
VccDMI needs to be powered by the same 1.05 V voltage source asthe CPU VCCIO, and the trace needs to be at least 20 mils width with full VSS/VCC reference plane.
+1.1V VCC_DMI witdth >= 20mils.
+1.1V VCC_DMI witdth >= 20mils.
20111018 ADD DSW Cricuit20111030 modify cuirucit.
20111018 change for DSW
20111018 change for DSW
20111018 change for DSW
20111117 change mose footprint to dual type.
20120104 change power plant from +3V_S5 to +3VPCU.
20120105 change power plant to +3V for power saving.
20120216 remove R168 for power plant chnge to +1.05V_VTT.
20120216 remove R172 for power plant chnge to +1.05V_VTT.
VCCSUSHDA= 10mA(8mils)
PCH5(CLG)
CPT/PPT (POWER) (CLG)CPT/PPT (POWER) (CLG)
+VCCAFDI_VRM
+1.05V_VCCAPLL_FDI
+1.05V_VCCDPLL_FDI
+VCCAFDI_VRM
+VCCA_USBSUS
+VTT_VCCPCPU
+3V_VCCPSUS
+1.05V_VCCA_B_DPL
+3V_VCCAUBG
+V1.1LAN_VCCAPLL
+VCCRTCEXT
PCH_VCCDSW
+VCCAUPLL
+VCCDIFFCLK
+VCCSST
+VCCAFDI_VRM
+VCCPDSW
+V1.05V_SSCVCC
+VCCACLK
+3V_SUS_CLKF33
+VCCSUS1
+VCCAFDI_VRM
+VCCDPLL_CPY
+1.05V_VCCA_A_DPL
+1.05V_VCCA_B_DPL
+3V_VCCPCORE
+1.05V_VCCA_A_DPL
+V1.05M_VCCSUS
+VCCDIFFCLKN
+3V_SUS_CLKF33
+3V_VCCPUSB
+5V_PCH_VCC5REFSUS
+5V_PCH_VCC5REF
+3V_VCCPSUS
+V3.3A_1.5A_HDA_IO
+1.05V_VCCCORE
+1.05V_VCCASW
+1.05V_VCCIO
+1.05V_VCC_IO
SLP_SUS#[7,34]
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT +1.05V_VCCAPLL_EXP
+1.05V_VTT
+VCCAFDI_VRM
+1.1V_VCC_DMI
+1.5V
+1.05V_VTT
+VCCAFDI_VRM
+VCCA_DAC_1_2
+3V+3V_VCC_GIO
+VCCAFDI_VRM
+3V_VCCME_SPI
+1.05V_VTT
+3V_VCC_EXP+3V
+VCC_DMI_CCI +1.05V_VTT+1.1V_VCC_DMI_CCI
+1.8V+VCCP_NAND
+1.1V_VCC_DMI
+VCCAFDI_VRM
+3VPCU
+3V
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+3V
+1.05V_VTT
+3VCC_S5
+3V
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+1.05V_VTT
+VCCAPLL_CPY_PCH
+1.05V_VTT
+1.05V_VTT
+3V_RTC
+3V
+1.05V_VTT
+3VCC_S5
+5VCC_S5
+3VCC_S5
+5V
+3V
+1.05V_VTT
+3V
+1.05V_VTT
+1.05V_VTT
+3V_VCCME_SPI +3V_S5
+5V_S5 +5VCC_S5 +3VCC_S5
+3V
+3V_S5
+3V_S5
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
PCH 5/6 (POWER) 1A
Monday, January 07, 2013
ZQK
4611
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
PCH 5/6 (POWER) 1A
Monday, January 07, 2013
ZQK
4611
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
PCH 5/6 (POWER) 1A
Monday, January 07, 2013
ZQK
4611
C638*10u/6.3V_6
C17210u/6.3V_6
R89 *0/J_6
R515100K/J_4
R157 0/J_6
R93 0/J_6
D24 RB500V-40
C186*1u/6.3V_4
R269 0/J_4 C1511u/6.3V_4
C5660.01u/25V_4
R545 0/J_6
R197 0/J_4
C56710u/6.3V_6
C6190.1u/10V_4
C5820.1u/10V_4
C16710u/6.3V_6
R135 0/J_8
C6180.1u/10V_4
R172 0/J_6
C5941u/10V_4
C200 0.1u/10V_4
L12 *10uH/100mA_8
C209*1u/6.3V_4
Q552N7002DW
62
1
5
43
C1600.1u/10V_4
R165 0/J_8
R117 10/F_4
POWER
SATA
USB
Clock and Miscellaneous
HDA
CPU
RTC
PCI/GPIO/LPC
MISC
U38J
Panther Point_R1P0
DCPSUSBYPV12
VCCASW[1]AA19
VCCASW[2]AA21
VCCASW[3]AA24
VCCASW[5]AA27
VCCASW[6]AA29
VCCSUSHDAP32
VCCSUS3_3[6]P24
VCCIO[34]T26
VCCIO[4]AD17
VCCASW[7]AA31
VCCASW[8]AC26
VCCASW[9]AC27
VCCASW[10]AC29
VCCASW[11]AC31
VCCASW[12]AD29
V5REFP34
VCC3_3[4]T34
VCCRTCA22
VCCSUS3_3[10]V24
VCCSUS3_3[9]V23
VCCSUS3_3[8]T24
VCCSUS3_3[7]T23
VCCIO[2]AC16
VCCADPLLBBF47
VCCDIFFCLKN[1]AF33
V5REF_SUSM26
VCCIO[3]AC17
DCPSUS[1]T17
VCCSSCAG33
VCCADPLLABD47
VCCVRM[4]Y49
VCCACLKAD49
DCPRTCN16
VCCASW[4]AA26
VCCDIFFCLKN[2]AF34
VCCIO[7]AF17
DCPSSTV16
VCCIO[5]AF13
VCCASW[22]T21
VCCASW[23]V21
VCCASW[21]T19
VCC3_3[1]AA16
VCC3_3[8]W16
VCCSUS3_3[2]N20
VCCSUS3_3[3]N22
VCCSUS3_3[4]P20
VCCSUS3_3[5]P22
VCCIO[29]N26
VCCIO[30]P26
VCCIO[31]P28
VCCIO[32]T27
V_PROC_IOBJ8
VCCIO[33]T29
VCCDIFFCLKN[3]AG34
VCCASW[13]AD31
VCCASW[14]W21
VCCASW[15]W23
VCCASW[16]W24
VCCASW[17]W26
VCCASW[18]W29
VCCASW[19]W31
VCCASW[20]W33
VCCIO[6]AF14
VCCVRM[1]AF11
VCCIO[12]AH13
VCCIO[13]AH14
VCC3_3[2]AJ2
VCCAPLLSATAAK1
DCPSUS[3]AL24
VCCIO[14]AL29
DCPSUS[4]AN23
VCCSUS3_3[1]AN24
VCCAPLLDMI2BH23
DCPSUS[2]V19
VCCDSW3_3T16
VCC3_3[5]T38
C2530.1u/10V_4
C5870.1u/10V_4
R637 0/J_6
R170 0/J_6
L27 10uH/100mA_8
C2021u/6.3V_4
R158 0/J_6
C5711u/6.3V_4
R5140/J_6
C1880.1u/10V_4
C139*1u/6.3V_4
POWER
VCC CORE
DMI
VCCIO
CRT
LVDS
FDI
DFT / SPI
HVCMOS
U38G
Panther Point_R1P0
VCCCORE[1]AA23
VCCCORE[2]AC23
VCCCORE[3]AD21
VCCCORE[4]AD23
VCCCORE[5]AF21
VCCCORE[6]AF23
VCCCORE[7]AG21
VCCCORE[8]AG23
VCCCORE[9]AG24
VCCCORE[10]AG26
VCCCORE[11]AG27
VCCCORE[12]AG29
VCCCORE[13]AJ23
VCCCORE[14]AJ26
VCCCORE[15]AJ27
VCCDFTERM[4]AJ17
VCCDFTERM[3]AJ16
VCCIO[17]AN21
VCCIO[18]AN26
VCCIO[19]AN27
VCCIO[20]AP21
VCCIO[23]AP26
VCCIO[24]AT24
VCCIO[15]AN16
VCCIO[16]AN17
VCCIO[21]AP23
VCCIO[22]AP24
VCCADACU48
VCCTX_LVDS[1]AM37
VCCTX_LVDS[2]AM38
VCCALVDSAK36
VCCVRM[3]AT16
VCCVRM[2]AP16
VCCAPLLEXPBJ22
VccAFDIPLLBG6
VCCIO[28]AN19 VCCTX_LVDS[4]
AP37
VCCTX_LVDS[3]AP36
VSSADACU47
VSSALVDSAK37
VCCIO[27]AP17
VCC3_3[6]V33
VCC3_3[7]V34
VCC3_3[3]BH29
VCCDFTERM[2]AG17
VCCDFTERM[1]AG16
VCCDMI[1]AT20
VCCIO[25]AN33
VCCIO[26]AN34
VCCCORE[16]AJ29
VCCCORE[17]AJ31
VCCSPIV1
VCCCLKDMIAB36
VCCDMI[2]AU20
R202 0/J_6
R556 0/J_8
C1300.1u/10V_4
R108 0/J_6
C176*1u/6.3V_4
R267 0/J_6
C1801u/6.3V_4
R537 0/J_6
C590*10u/6.3V_6
+ C563220u/2.5V_3528
C589*10u/6.3V_6
C1791u/6.3V_4
R81 1/F_4
L26 180ohm/1.5A
C5861u/6.3V_4
L8 10uH/100mA_8
C6370.1u/10V_4
C2030.1u/10V_4
C1051u/6.3V_4
C1841u/6.3V_4
C1561u/6.3V_4
R146 0/J_6
R518100K/J_4
C6164.7u/6.3V_6
R605 *0/J_8
C56110u/6.3V_6
C1611u/6.3V_4
C2011u/6.3V_4
R182 0/J_6
R104 *0/J_8
C5830.1u/10V_4
R204 0/J_6
R179 0/J_4
R638 *0/J_6
R5460/J_6
C1731u/6.3V_4
L30 *1uH/25mA_6
C1871u/6.3V_4 C157
1u/6.3V_4
C120*10u/6.3V_6
L29 *10uH/100mA_8
D6 RB500V-40
C2241u/10V_4
C1311u/6.3V_4
R548 0/J_6
C861u/10V_4
L31 *10uH/100mA_8
R568 0/J_8
C219*0.1u/10V_4
R213 0/J_6
C6351u/6.3V_4
C2041u/6.3V_4
R531 *0/J_4
Q54AO3413
3
2
1
C5620.1u/10V_4
+ C574220u/2.5V_3528
C1661u/6.3V_4
C850.1u/10V_4
R532 10/F_4
R124 *1/F_4
R193 0/J_6
R521 *0/J_4
C15910u/6.3V_6
C570*0.33u/10V_6
R209 *0/J_6
C5850.1u/10V_4
C568*0.33u/10V_6
C774.7u/6.3V_6
R540 0/J_8
C1550.1u/10V_4
C1810.1u/10V_4
C5691u/6.3V_4
R130 *0/J_6
R125 0/J_4
C1421u/6.3V_4
R178 0/J_6
L28 10uH/100mA_8
C1431u/6.3V_4
C1694.7u/6.3V_6
Q51AO3413
3
2
1
R585 0/J_4
C190 0.1u/10V_4
C1821u/6.3V_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
12PCH6(CLG)
IBEX PEAK-M (GND) (CLG)
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
PCH 6/6 (GND) 1A
Monday, January 07, 2013
ZQK
4612
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
PCH 6/6 (GND) 1A
Monday, January 07, 2013
ZQK
4612
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
PCH 6/6 (GND) 1A
Monday, January 07, 2013
ZQK
4612
U38I
Panther Point_R1P0
VSS[159]AY4
VSS[160]AY42
VSS[161]AY46
VSS[162]AY8
VSS[163]B11
VSS[164]B15
VSS[165]B19
VSS[166]B23
VSS[167]B27
VSS[168]B31
VSS[169]B35
VSS[170]B39
VSS[171]B7
VSS[173]BB12
VSS[174]BB16
VSS[175]BB20
VSS[176]BB22
VSS[177]BB24
VSS[178]BB28
VSS[179]BB30
VSS[180]BB38
VSS[181]BB4
VSS[182]BB46
VSS[183]BC14
VSS[184]BC18
VSS[185]BC2
VSS[186]BC22
VSS[187]BC26
VSS[188]BC32
VSS[189]BC34
VSS[190]BC36
VSS[191]BC40
VSS[192]BC42
VSS[193]BC48
VSS[194]BD46
VSS[195]BD5
VSS[196]BE22
VSS[197]BE26
VSS[198]BE40
VSS[199]BF10
VSS[200]BF12
VSS[201]BF16
VSS[202]BF20
VSS[203]BF22
VSS[204]BF24
VSS[205]BF26
VSS[206]BF28
VSS[207]BD3
VSS[208]BF30
VSS[209]BF38
VSS[210]BF40
VSS[211]BF8
VSS[212]BG17
VSS[213]BG21
VSS[214]BG33
VSS[215]BG44
VSS[216]BG8
VSS[217]BH11
VSS[218]BH15
VSS[219]BH17
VSS[220]BH19
VSS[222]BH27
VSS[223]BH31
VSS[224]BH33
VSS[225]BH35
VSS[226]BH39
VSS[227]BH43
VSS[228]BH7
VSS[229]D3
VSS[230]D12
VSS[231]D16
VSS[232]D18
VSS[233]D22
VSS[234]D24
VSS[235]D26
VSS[236]D30
VSS[237]D32
VSS[264]K7
VSS[265]L18
VSS[266]L2
VSS[267]L20
VSS[268]L26
VSS[269]L28
VSS[270]L36
VSS[271]L48
VSS[272]M12
VSS[273]P16
VSS[274]M18
VSS[275]M22
VSS[276]M24
VSS[277]M30
VSS[278]M32
VSS[279]M34
VSS[280]M38
VSS[281]M4
VSS[282]M42
VSS[283]M46
VSS[284]M8
VSS[285]N18
VSS[286]P30
VSS[288]P11
VSS[289]P18
VSS[290]T33
VSS[291]P40
VSS[292]P43
VSS[293]P47
VSS[294]P7
VSS[295]R2
VSS[296]R48
VSS[297]T12
VSS[298]T31
VSS[299]T37
VSS[300]T4
VSS[301]W34
VSS[302]T46
VSS[303]T47
VSS[304]T8
VSS[305]V11
VSS[306]V17
VSS[307]V26
VSS[308]V27
VSS[309]V29
VSS[310]V31
VSS[311]V36
VSS[312]V39
VSS[313]V43
VSS[314]V7
VSS[315]W17
VSS[316]W19
VSS[238]D34
VSS[239]D38
VSS[240]D42
VSS[241]D8
VSS[242]E18
VSS[243]E26
VSS[244]G18
VSS[245]G20
VSS[246]G26
VSS[247]G28
VSS[248]G36
VSS[249]G48
VSS[250]H12
VSS[251]H18
VSS[317]W2
VSS[318]W27
VSS[319]W48
VSS[320]Y12
VSS[321]Y38
VSS[322]Y4
VSS[323]Y42
VSS[324]Y46
VSS[325]Y8
VSS[328]BG29
VSS[329]N24
VSS[330]AJ3
VSS[287]N47
VSS[252]H22
VSS[253]H24
VSS[254]H26
VSS[255]H30
VSS[256]H32
VSS[257]H34
VSS[258]F3
VSS[262]K39
VSS[263]K46
VSS[259]H46
VSS[260]K18
VSS[261]K26
VSS[331]AD47
VSS[333]B43
VSS[334]BE10
VSS[335]BG41
VSS[337]G14
VSS[338]H16
VSS[340]T36
VSS[342]BG22
VSS[343]BG24
VSS[344]C22
VSS[345]AP13
VSS[172]F45
VSS[221]H10
VSS[346]M14
VSS[347]AP3
VSS[348]AP1
VSS[349]BE16
VSS[350]BC16
VSS[351]BG28
VSS[352]BJ28
U38H
Panther Point_R1P0
VSS[1]AA17
VSS[2]AA2
VSS[3]AA3
VSS[5]AA34
VSS[6]AB11
VSS[7]AB14
VSS[8]AB39
VSS[9]AB4
VSS[10]AB43
VSS[11]AB5
VSS[12]AB7
VSS[13]AC19
VSS[14]AC2
VSS[15]AC21
VSS[16]AC24
VSS[17]AC33
VSS[18]AC34
VSS[19]AC48
VSS[20]AD10
VSS[21]AD11
VSS[22]AD12
VSS[23]AD13
VSS[24]AD19
VSS[25]AD24
VSS[26]AD26
VSS[27]AD27
VSS[28]AD33
VSS[29]AD34
VSS[30]AD36
VSS[31]AD37
VSS[33]AD39
VSS[34]AD4
VSS[35]AD40
VSS[36]AD42
VSS[37]AD43
VSS[38]AD45
VSS[39]AD46
VSS[43]AF10
VSS[44]AF12
VSS[46]AD16
VSS[47]AF16
VSS[48]AF19
VSS[49]AF24
VSS[50]AF26
VSS[51]AF27
VSS[52]AF29
VSS[53]AF31
VSS[54]AF38
VSS[55]AF4
VSS[56]AF42
VSS[57]AF46
VSS[59]AF7
VSS[60]AF8
VSS[61]AG19
VSS[62]AG2
VSS[63]AG31
VSS[64]AG48
VSS[65]AH11
VSS[66]AH3
VSS[67]AH36
VSS[68]AH39
VSS[69]AH40
VSS[70]AH42
VSS[71]AH46
VSS[72]AH7
VSS[73]AJ19
VSS[76]AJ33
VSS[77]AJ34
VSS[78]AK12
VSS[79]AK3
VSS[80]AK38
VSS[81]AK4
VSS[82]AK42
VSS[83]AK46
VSS[84]AK8
VSS[85]AL16
VSS[86]AL17
VSS[87]AL19
VSS[88]AL2
VSS[89]AL21
VSS[90]AL23
VSS[91]AL26
VSS[92]AL27
VSS[93]AL31
VSS[96]AL48
VSS[97]AM11
VSS[98]AM14
VSS[99]AM36
VSS[100]AM39
VSS[102]AM45
VSS[103]AM46
VSS[104]AM7
VSS[105]AN2
VSS[106]AN29
VSS[107]AN3
VSS[108]AN31
VSS[109]AP12
VSS[110]AP19
VSS[111]AP28
VSS[112]AP30
VSS[113]AP32
VSS[114]AP38
VSS[116]AP42
VSS[117]AP46
VSS[118]AP8
VSS[119]AR2
VSS[120]AR48
VSS[121]AT11
VSS[122]AT13
VSS[123]AT18
VSS[124]AT22
VSS[125]AT26
VSS[126]AT28
VSS[127]AT30
VSS[128]AT32
VSS[131]AT42
VSS[132]AT46
VSS[133]AT7
VSS[134]AU24
VSS[135]AU30
VSS[136]AV16
VSS[137]AV20
VSS[138]AV24
VSS[139]AV30
VSS[140]AV38
VSS[141]AV4
VSS[142]AV43
VSS[143]AV8
VSS[144]AW14
VSS[145]AW18
VSS[146]AW2
VSS[147]AW22
VSS[148]AW26
VSS[149]AW28
VSS[150]AW32
VSS[151]AW34
VSS[152]AW36
VSS[153]AW40
VSS[154]AW48
VSS[155]AV11
VSS[156]AY12
VSS[157]AY22
VSS[158]AY28
VSS[40]AD8
VSS[42]AE3
VSS[45]AD14
VSS[115]AP4
VSS[0]H5
VSS[58]AF5
VSS[32]AD38
VSS[4]AA33
VSS[74]AJ21
VSS[75]AJ24
VSS[41]AE2
VSS[129]AT34
VSS[130]AT39
VSS[101]AM43
VSS[95]AL34VSS[94]AL33
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
SO-DIMMB SPD Address is 0XA4SO-DIMMB TS Address is 0X34
Place these Caps near Memory Down
13
Should be 240Ohms +-1%
Should be 240Ohms +-1%
Should be 240Ohms +-1%
Should be 240Ohms +-1%
change to 1K/F_4
CRB Add
BYTE0_0-7
BYTE1_8-15BYTE2_16-23
BYTE3_24-31
BYTE4_32-39
BYTE5_40-47
BYTE6_48-55
BYTE7_56-63
DDR ON BOARD RAM (DDR)
SPD address= A0 hex (for MD devices)
WP =1 : WRITE DISABLE
CHA1
CHA0
CHB1
CHB0
SA0SA100
1
10
0
1 1
Checklist 2.0: M3 has to be no stuff on Chief River
M_A_A4
M_A_A2M_A_A3
M_A_A1M_A_A0
M_A_BS#1M_A_BS#0
M_A_BS#2
M_A_CAS#M_A_RAS#
M_A_WE#
M_A_CLK0#M_A_CLK0
M_A_CKE0
M_A_CS#0M_A_ODT0
DDR3_DRAMRST#
M_A_ZQ2M_A_ZQ1
SMDDR_VREF_DQ0+SMDDR_VREF_DIMM +SMDDR_VREF_DIMM
SMDDR_VREF_DQ0
M_A_ZQ3
+SMDDR_VREF_DIMMSMDDR_VREF_DQ0
DDR3_DRAMRST#
+SMDDR_VREF_DIMMSMDDR_VREF_DQ0
DDR3_DRAMRST#
M_A_ZQ4
M_A_DQSP5
M_A_DQSN5
M_A_DQSP7
M_A_DQSN7
M_A_DQSP4
M_A_DQSN4
M_A_DQSP6
M_A_DQSN6M_A_DQSN0M_A_DQSN1
M_A_DQ4M_A_DQ1M_A_DQ2
M_A_DQ0M_A_DQ7
M_A_DQ3
M_A_DQ5
M_A_DQ6
M_A_DQ8M_A_DQ15M_A_DQ14M_A_DQ11M_A_DQ13M_A_DQ10M_A_DQ9M_A_DQ12
M_A_DQSN3
M_A_DQSP3M_A_DQSP2
M_A_DQSN2
M_A_DQ26
M_A_DQ30M_A_DQ27M_A_DQ24
M_A_DQ31M_A_DQ29
M_A_DQ28M_A_DQ25
M_A_DQ20
M_A_DQ16
M_A_DQ22
M_A_DQ23
M_A_DQ21
M_A_DQ19
M_A_DQ17
M_A_DQ18
M_A_DQ38
M_A_DQ37
M_A_DQ39M_A_DQ33M_A_DQ34
M_A_DQ36
M_A_DQ35
M_A_DQ32
M_A_DQ41
M_A_DQ40
M_A_DQ46
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ42
M_A_DQ47
M_A_DQ50
M_A_DQ54
M_A_DQ52
M_A_DQ53M_A_DQ55
M_A_DQ48
M_A_DQ49
M_A_DQ51
M_A_DQ57M_A_DQ62
M_A_DQ58
M_A_DQ63
M_A_DQ60
M_A_DQ59
M_A_DQ56
M_A_DQ61
MD0_SA0CLK_SDATACLK_SCLK
+SMDDR_VREF_DIMM
SMDDR_VREF_DQ0SMDDR_VREF_DQ0_M3
M_A_CLK0
M_A_CLK0#
SMDDR_VREF_DQ0+SMDDR_VREF_DIMM
M_A_A5M_A_A6M_A_A7M_A_A8M_A_A9M_A_A10M_A_A11M_A_A12M_A_A13M_A_A14M_A_A15
M_A_A4
M_A_A2M_A_A3
M_A_A1M_A_A0
M_A_A5M_A_A6M_A_A7M_A_A8M_A_A9M_A_A10M_A_A11M_A_A12M_A_A13M_A_A14M_A_A15
M_A_A4
M_A_A2M_A_A3
M_A_A1M_A_A0
M_A_A5M_A_A6M_A_A7M_A_A8M_A_A9M_A_A10M_A_A11M_A_A12M_A_A13M_A_A14M_A_A15
M_A_A4
M_A_A2M_A_A3
M_A_A1M_A_A0
M_A_A5M_A_A6M_A_A7M_A_A8M_A_A9M_A_A10M_A_A11M_A_A12M_A_A13M_A_A14M_A_A15
M_A_BS#1M_A_BS#0
M_A_BS#2M_A_BS#1M_A_BS#0
M_A_BS#2
M_A_CLK0#M_A_CLK0
M_A_CKE0M_A_CLK0#M_A_CLK0
M_A_CKE0
M_A_CAS#M_A_RAS#
M_A_WE#
M_A_CS#0M_A_ODT0
M_A_CAS#M_A_RAS#
M_A_WE#
M_A_CS#0M_A_ODT0
M_A_DQSP0M_A_DQSP1
MD0_SA1
MD0_SA0MD0_SA1
M_A_A[15:0][4,14]
M_A_BS#0[4,14]M_A_BS#1[4,14]M_A_BS#2[4,14]
M_A_CLK0[4]M_A_CLK0#[4]M_A_CKE0[4]
M_A_ODT0[4]M_A_CS#0[4]
M_A_CAS#[4,14]M_A_RAS#[4,14]
M_A_WE#[4,14]
DDR3_DRAMRST#[4,14,15]
SMDDR_VREF_DQ0_M3[6,14]
CLK_SCLK[9,15,32]CLK_SDATA[9,15,32]
DEEPS3_EC[4,14,15]
M_A_DQ[63:0][4,14]
M_A_DQSP[7:0][4,14]
M_A_DQSN[7:0][4,14]
+1.5VSUS
+1.5VSUS
+1.5VSUS
+1.5VSUS
+1.5VSUS
+1.5VSUS
+1.5VSUS
+1.5VSUS
+1.5VSUS
+SMDDR_VREF+SMDDR_VREF_DIMM
+1.5VSUS
+SMDDR_VREF+1.5VSUS
+1.5VSUS
+1.5VSUS
+1.5VSUS
+1.5VSUS
+1.5VSUS
+SMDDR_VREF_DIMMSMDDR_VREF_DQ0
+1.5VSUS
+1.5VSUS
+1.5VSUS
+1.5VSUS
+1.5VSUS
+1.5VSUS
+3V
+3V
+3V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DDR3 MEMORY DOWN X 16 1A
Monday, January 07, 2013
ZQK
4613
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DDR3 MEMORY DOWN X 16 1A
Monday, January 07, 2013
ZQK
4613
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DDR3 MEMORY DOWN X 16 1A
Monday, January 07, 2013
ZQK
4613
C6741u/6.3V_4
C7461u/6.3V_4
C78610u/6.3V_6
R26530/F_4
C2501u/6.3V_4
R26630/F_4
C4211u/6.3V_4
C4311u/6.3V_4
100-BALLSDRAM DDR3
U21
RAM _DDR3
WEL3
RASJ3
CASK3
CSL2
CKEK9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQ#D1D1
VSS#A9A9
VSS#E1E1VSS#B3B3
NC#J1J1
VDD#B2B2
VDD#D9D9
VDDQ#A1A1
VDDQ#A8A8
VDDQ#C1C1
VDDQ#C9C9
NC#L1L1
NC#J9J9
VDDQ#E9E9
ZQL8
RESETT2
DQSLF3
DMUD3 DMLE7
VSSQ#B1B1
VSSQ#B9B9
VSSQ#D8D8
VSSQ#E2E2
DQSUC7
VSSQ#E8E8
DQSLG3
VDDQ#F1F1
VSSQ#F9F9
VSSQ#G1G1
VDDQ#H2H2
VDDQ#H9H9
VSSQ#G9G9
VREFCAM8
VSS#G8G8
VDD#G7G7
ODTK1
A0N3
A1P7
VDD#K2K2
A12/BCN7
VSS#J2J2
VDD#K8K8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15M7
BA2M3
VREFDQH1
NC#L9L9
VDD#N1N1
VDD#N9N9
VDD#R1R1
VDD#R9R9
VSS#J8J8
VSS#M1M1
VSS#M9M9
VSS#P1P1
VSS#P9P9
VSS#T1T1
VSS#T9T9
VDDQ#D2D2
C28910u/6.3V_6
C78010u/6.3V_6
R227 *0/J_6C4181u/6.3V_4
C6841u/6.3V_4
C72310u/6.3V_6
C7721u/6.3V_4
C66310u/6.3V_6
100-BALLSDRAM DDR3
U26
RAM _DDR3
WEL3
RASJ3
CASK3
CSL2
CKEK9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQ#D1D1
VSS#A9A9
VSS#E1E1VSS#B3B3
NC#J1J1
VDD#B2B2
VDD#D9D9
VDDQ#A1A1
VDDQ#A8A8
VDDQ#C1C1
VDDQ#C9C9
NC#L1L1
NC#J9J9
VDDQ#E9E9
ZQL8
RESETT2
DQSLF3
DMUD3 DMLE7
VSSQ#B1B1
VSSQ#B9B9
VSSQ#D8D8
VSSQ#E2E2
DQSUC7
VSSQ#E8E8
DQSLG3
VDDQ#F1F1
VSSQ#F9F9
VSSQ#G1G1
VDDQ#H2H2
VDDQ#H9H9
VSSQ#G9G9
VREFCAM8
VSS#G8G8
VDD#G7G7
ODTK1
A0N3
A1P7
VDD#K2K2
A12/BCN7
VSS#J2J2
VDD#K8K8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15M7
BA2M3
VREFDQH1
NC#L9L9
VDD#N1N1
VDD#N9N9
VDD#R1R1
VDD#R9R9
VSS#J8J8
VSS#M1M1
VSS#M9M9
VSS#P1P1
VSS#P9P9
VSS#T1T1
VSS#T9T9
VDDQ#D2D2
C28310u/6.3V_6
R2301K/F_4
C73510u/6.3V_6
C7521u/6.3V_4
Q21*AP2302GN
3
2
1
C31410u/6.3V_6
C6821u/6.3V_4
C2741u/6.3V_4
C8021u/6.3V_4
R321 *0/J_4
C2871u/6.3V_4
C2581u/6.3V_4
C7110.1u/10V_4C720
0.1u/10V_4
C7140.1u/10V_4
C6861u/6.3V_4
R697240/F_4
12
C7931u/6.3V_4
C6711u/6.3V_4
C4851.6P/50V_4
C4881u/6.3V_4
C4800.1u/10V_4
C4361u/6.3V_4
C7671u/6.3V_4
C28010u/6.3V_6
C7451u/6.3V_4
R724240/F_4
12
R2321K/F_4
C2931u/6.3V_4
C2511u/6.3V_4
C7250.1u/10V_4
C76410u/6.3V_6
C6331u/6.3V_4
C4171u/6.3V_4
C4591u/6.3V_4
C6891u/6.3V_4
C286*0.1u/10V_4
R214 *0/J_6
C2851u/6.3V_4
R668 1K/F_4
C4321u/6.3V_4
R666 *1K/F_4C7831u/6.3V_4
C73610u/6.3V_6
C3981u/6.3V_4
U45
*M24C02-WMN6TP
A01
A12
A23
VCC8
GND4
SCL6
SDA5
WP7
C7120.1u/10V_4
C6871u/6.3V_4
C6671u/6.3V_4
R2261K/F_4
C2781u/6.3V_4
R662 *1K/F_4C6491u/6.3V_4
R664 1K/F_4
C4201u/6.3V_4
C6751u/6.3V_4
C4701u/6.3V_4
C7170.1u/10V_4
C76310u/6.3V_6
C2440.1u/10V_4
C6881u/6.3V_4
C6851u/6.3V_4
R323240/F_4
12
R322*0/J_4
C7150.1u/10V_4
C69010u/6.3V_6
C4731u/6.3V_4
+ C742
330u/2V_7343
C48310u/6.3V_6
C30410u/6.3V_6
C7281u/6.3V_4
C2901u/6.3V_4
C80110u/6.3V_6
C2941u/6.3V_4
C6020.1u/10V_4
C8091u/6.3V_4
C7100.1u/10V_4
C7130.1u/10V_4
R2241K/F_4
C7391u/6.3V_4
C6611u/6.3V_4
C64310u/6.3V_6
C6441u/6.3V_4
C7891u/6.3V_4
C6731u/6.3V_4
C68110u/6.3V_6
C6531u/6.3V_4
C48910u/6.3V_6
C2230.1u/10V_4
C7681u/6.3V_4
C3151u/6.3V_4
C7030.1u/10V_4
C7411u/6.3V_4
C6651u/6.3V_4
C6421u/6.3V_4
100-BALLSDRAM DDR3
U19
RAM _DDR3
WEL3
RASJ3
CASK3
CSL2
CKEK9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQ#D1D1
VSS#A9A9
VSS#E1E1VSS#B3B3
NC#J1J1
VDD#B2B2
VDD#D9D9
VDDQ#A1A1
VDDQ#A8A8
VDDQ#C1C1
VDDQ#C9C9
NC#L1L1
NC#J9J9
VDDQ#E9E9
ZQL8
RESETT2
DQSLF3
DMUD3 DMLE7
VSSQ#B1B1
VSSQ#B9B9
VSSQ#D8D8
VSSQ#E2E2
DQSUC7
VSSQ#E8E8
DQSLG3
VDDQ#F1F1
VSSQ#F9F9
VSSQ#G1G1
VDDQ#H2H2
VDDQ#H9H9
VSSQ#G9G9
VREFCAM8
VSS#G8G8
VDD#G7G7
ODTK1
A0N3
A1P7
VDD#K2K2
A12/BCN7
VSS#J2J2
VDD#K8K8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15M7
BA2M3
VREFDQH1
NC#L9L9
VDD#N1N1
VDD#N9N9
VDD#R1R1
VDD#R9R9
VSS#J8J8
VSS#M1M1
VSS#M9M9
VSS#P1P1
VSS#P9P9
VSS#T1T1
VSS#T9T9
VDDQ#D2D2
C6461u/6.3V_4
C7711u/6.3V_4
R255240/F_4
12
C2521u/6.3V_4
C2841u/6.3V_4
C69110u/6.3V_6
R694 *M3@0/J_6
100-BALLSDRAM DDR3
U23
RAM _DDR3
WEL3
RASJ3
CASK3
CSL2
CKEK9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQ#D1D1
VSS#A9A9
VSS#E1E1VSS#B3B3
NC#J1J1
VDD#B2B2
VDD#D9D9
VDDQ#A1A1
VDDQ#A8A8
VDDQ#C1C1
VDDQ#C9C9
NC#L1L1
NC#J9J9
VDDQ#E9E9
ZQL8
RESETT2
DQSLF3
DMUD3 DMLE7
VSSQ#B1B1
VSSQ#B9B9
VSSQ#D8D8
VSSQ#E2E2
DQSUC7
VSSQ#E8E8
DQSLG3
VDDQ#F1F1
VSSQ#F9F9
VSSQ#G1G1
VDDQ#H2H2
VDDQ#H9H9
VSSQ#G9G9
VREFCAM8
VSS#G8G8
VDD#G7G7
ODTK1
A0N3
A1P7
VDD#K2K2
A12/BCN7
VSS#J2J2
VDD#K8K8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15M7
BA2M3
VREFDQH1
NC#L9L9
VDD#N1N1
VDD#N9N9
VDD#R1R1
VDD#R9R9
VSS#J8J8
VSS#M1M1
VSS#M9M9
VSS#P1P1
VSS#P9P9
VSS#T1T1
VSS#T9T9
VDDQ#D2D2
+
C781
*150u/6.3V_3528
C2561u/6.3V_4
C6321u/6.3V_4
C7851u/6.3V_4
C2450.1u/10V_4
C6391u/6.3V_4
C4810.1u/10V_4
C4930.1u/10V_4
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
SO-DIMMB SPD Address is 0XA4SO-DIMMB TS Address is 0X34
14
Should be 240Ohms +-1%
Should be 240Ohms +-1%
Should be 240Ohms +-1%
Should be 240Ohms +-1%
change to 1K/F_4
BYTE0_0-7
BYTE1_8-15BYTE2_16-23
BYTE3_24-31
BYTE4_32-39
BYTE5_40-47
BYTE6_48-55
BYTE7_56-63
DDR ON BOARD RAM (DDR)
Checklist 2.0: M3 has to be no stuff on Chief River
CRB Add
M_A_BS#1M_A_BS#0
M_A_BS#2
M_A_CAS#M_A_RAS#
M_A_WE#
M_A_CLK1#M_A_CLK1
M_A_CKE1
M_A_CS#1M_A_ODT1
DDR3_DRAMRST#
M_A_ZQ6M_A_ZQ5
SMDDR_VREF_DQ0+SMDDR_VREF_DIMM +SMDDR_VREF_DIMM
SMDDR_VREF_DQ0
M_A_ZQ7
+SMDDR_VREF_DIMMSMDDR_VREF_DQ0
DDR3_DRAMRST#
+SMDDR_VREF_DIMMSMDDR_VREF_DQ0
DDR3_DRAMRST#
M_A_ZQ8
M_A_DQSP5
M_A_DQSN5
M_A_DQSP7
M_A_DQSN7
M_A_DQSP4
M_A_DQSN4
M_A_DQSP6
M_A_DQSN6M_A_DQSN0
M_A_DQSP0M_A_DQSP1
M_A_DQSN1
M_A_DQ5M_A_DQ2M_A_DQ0
M_A_DQ7M_A_DQ1
M_A_DQ6
M_A_DQ4
M_A_DQ3
M_A_DQ15M_A_DQ8M_A_DQ11M_A_DQ14M_A_DQ12M_A_DQ9M_A_DQ10M_A_DQ13
M_A_DQSN3
M_A_DQSP3M_A_DQSP2
M_A_DQSN2
M_A_DQ29
M_A_DQ27M_A_DQ30M_A_DQ31
M_A_DQ24M_A_DQ26
M_A_DQ25M_A_DQ28
M_A_DQ23
M_A_DQ18
M_A_DQ19
M_A_DQ16
M_A_DQ20
M_A_DQ22
M_A_DQ21
M_A_DQ17
M_A_DQ36
M_A_DQ35
M_A_DQ33M_A_DQ34M_A_DQ32
M_A_DQ38
M_A_DQ37
M_A_DQ39
M_A_DQ42
M_A_DQ45
M_A_DQ41
M_A_DQ40
M_A_DQ46
M_A_DQ47
M_A_DQ44
M_A_DQ43
M_A_DQ52
M_A_DQ48
M_A_DQ50
M_A_DQ55M_A_DQ53
M_A_DQ51
M_A_DQ54
M_A_DQ49
M_A_DQ60M_A_DQ59
M_A_DQ56
M_A_DQ57
M_A_DQ61
M_A_DQ62
M_A_DQ58
M_A_DQ63
+SMDDR_VREF_DIMM
SMDDR_VREF_DQ0SMDDR_VREF_DQ0_M3
M_A_CLK1
M_A_CLK1#
SMDDR_VREF_DQ0+SMDDR_VREF_DIMM
M_A_A4
M_A_A2M_A_A3
M_A_A1M_A_A0
M_A_A5M_A_A6M_A_A7M_A_A8M_A_A9M_A_A10M_A_A11M_A_A12M_A_A13M_A_A14M_A_A15
M_A_A4
M_A_A2M_A_A3
M_A_A1M_A_A0
M_A_A5M_A_A6M_A_A7M_A_A8M_A_A9M_A_A10M_A_A11M_A_A12M_A_A13M_A_A14M_A_A15
M_A_A4
M_A_A2M_A_A3
M_A_A1M_A_A0
M_A_A5M_A_A6M_A_A7M_A_A8M_A_A9M_A_A10M_A_A11M_A_A12M_A_A13M_A_A14M_A_A15
M_A_A4
M_A_A2M_A_A3
M_A_A1M_A_A0
M_A_A5M_A_A6M_A_A7M_A_A8M_A_A9M_A_A10M_A_A11M_A_A12M_A_A13M_A_A14M_A_A15
M_A_BS#1M_A_BS#0
M_A_BS#2
M_A_CAS#M_A_RAS#
M_A_WE#
M_A_CLK1#M_A_CLK1
M_A_CKE1
M_A_CS#1M_A_ODT1
M_A_BS#1M_A_BS#0
M_A_BS#2
M_A_CAS#M_A_RAS#
M_A_WE#
M_A_CLK1#M_A_CLK1
M_A_CKE1
M_A_CS#1M_A_ODT1
M_A_A[15:0][4,13]
M_A_BS#0[4,13]M_A_BS#1[4,13]M_A_BS#2[4,13]
M_A_CLK1[4]M_A_CLK1#[4]M_A_CKE1[4]
M_A_ODT1[4]M_A_CS#1[4]
M_A_CAS#[4,13]M_A_RAS#[4,13]
M_A_WE#[4,13]
DDR3_DRAMRST#[4,13,15]
SMDDR_VREF_DQ0_M3[6,13]
DEEPS3_EC[4,13,15]
M_A_DQ[63:0][4,13]
M_A_DQSP[7:0][4,13]
M_A_DQSN[7:0][4,13]
+1.5VSUS
+1.5VSUS
+1.5VSUS
+1.5VSUS
+1.5VSUS
+1.5VSUS
+1.5VSUS
+1.5VSUS
+1.5VSUS
+SMDDR_VREF
+SMDDR_VREF_DIMM
+1.5VSUS
+SMDDR_VREF
+SMDDR_VREF_DIMMSMDDR_VREF_DQ0
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DDR3 MEMORY DOWN X 16 1A
Monday, January 07, 2013
ZQK
4614
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DDR3 MEMORY DOWN X 16 1A
Monday, January 07, 2013
ZQK
4614
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DDR3 MEMORY DOWN X 16 1A
Monday, January 07, 2013
ZQK
4614
C7210.1u/10V_4
C7260.1u/10V_4
C6000.1u/10V_4
C5060.1u/10V_4
R671240/F_4
12
C4920.1u/10V_4
R688240/F_4
12
C7330.1u/10V_4
C2430.1u/10V_4
100-BALLSDRAM DDR3
U48
RAM _DDR3
WEL3
RASJ3
CASK3
CSL2
CKEK9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQ#D1D1
VSS#A9A9
VSS#E1E1VSS#B3B3
NC#J1J1
VDD#B2B2
VDD#D9D9
VDDQ#A1A1
VDDQ#A8A8
VDDQ#C1C1
VDDQ#C9C9
NC#L1L1
NC#J9J9
VDDQ#E9E9
ZQL8
RESETT2
DQSLF3
DMUD3 DMLE7
VSSQ#B1B1
VSSQ#B9B9
VSSQ#D8D8
VSSQ#E2E2
DQSUC7
VSSQ#E8E8
DQSLG3
VDDQ#F1F1
VSSQ#F9F9
VSSQ#G1G1
VDDQ#H2H2
VDDQ#H9H9
VSSQ#G9G9
VREFCAM8
VSS#G8G8
VDD#G7G7
ODTK1
A0N3
A1P7
VDD#K2K2
A12/BCN7
VSS#J2J2
VDD#K8K8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15M7
BA2M3
VREFDQH1
NC#L9L9
VDD#N1N1
VDD#N9N9
VDD#R1R1
VDD#R9R9
VSS#J8J8
VSS#M1M1
VSS#M9M9
VSS#P1P1
VSS#P9P9
VSS#T1T1
VSS#T9T9
VDDQ#D2D2
C6030.1u/10V_4
R5631K/F_4
C6930.1u/10V_4
100-BALLSDRAM DDR3
U49
RAM _DDR3
WEL3
RASJ3
CASK3
CSL2
CKEK9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQ#D1D1
VSS#A9A9
VSS#E1E1VSS#B3B3
NC#J1J1
VDD#B2B2
VDD#D9D9
VDDQ#A1A1
VDDQ#A8A8
VDDQ#C1C1
VDDQ#C9C9
NC#L1L1
NC#J9J9
VDDQ#E9E9
ZQL8
RESETT2
DQSLF3
DMUD3 DMLE7
VSSQ#B1B1
VSSQ#B9B9
VSSQ#D8D8
VSSQ#E2E2
DQSUC7
VSSQ#E8E8
DQSLG3
VDDQ#F1F1
VSSQ#F9F9
VSSQ#G1G1
VDDQ#H2H2
VDDQ#H9H9
VSSQ#G9G9
VREFCAM8
VSS#G8G8
VDD#G7G7
ODTK1
A0N3
A1P7
VDD#K2K2
A12/BCN7
VSS#J2J2
VDD#K8K8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15M7
BA2M3
VREFDQH1
NC#L9L9
VDD#N1N1
VDD#N9N9
VDD#R1R1
VDD#R9R9
VSS#J8J8
VSS#M1M1
VSS#M9M9
VSS#P1P1
VSS#P9P9
VSS#T1T1
VSS#T9T9
VDDQ#D2D2
R5731K/F_4
100-BALLSDRAM DDR3
U46
RAM _DDR3
WEL3
RASJ3
CASK3
CSL2
CKEK9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQ#D1D1
VSS#A9A9
VSS#E1E1VSS#B3B3
NC#J1J1
VDD#B2B2
VDD#D9D9
VDDQ#A1A1
VDDQ#A8A8
VDDQ#C1C1
VDDQ#C9C9
NC#L1L1
NC#J9J9
VDDQ#E9E9
ZQL8
RESETT2
DQSLF3
DMUD3 DMLE7
VSSQ#B1B1
VSSQ#B9B9
VSSQ#D8D8
VSSQ#E2E2
DQSUC7
VSSQ#E8E8
DQSLG3
VDDQ#F1F1
VSSQ#F9F9
VSSQ#G1G1
VDDQ#H2H2
VDDQ#H9H9
VSSQ#G9G9
VREFCAM8
VSS#G8G8
VDD#G7G7
ODTK1
A0N3
A1P7
VDD#K2K2
A12/BCN7
VSS#J2J2
VDD#K8K8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15M7
BA2M3
VREFDQH1
NC#L9L9
VDD#N1N1
VDD#N9N9
VDD#R1R1
VDD#R9R9
VSS#J8J8
VSS#M1M1
VSS#M9M9
VSS#P1P1
VSS#P9P9
VSS#T1T1
VSS#T9T9
VDDQ#D2D2
R246 *M3@0/J_6
C7240.1u/10V_4
R765240/F_4
12
C7160.1u/10V_4
R565 *0/J_6
R718240/F_4
12
C6800.1u/10V_4
R5721K/F_4
Q56*AP2302GN
3
2
1
C7190.1u/10V_4
C2540.1u/10V_4
C4841.6P/50V_4
R5621K/F_4
C5070.1u/10V_4
C7020.1u/10V_4
R25430/F_4
R25330/F_4
100-BALLSDRAM DDR3
U43
RAM _DDR3
WEL3
RASJ3
CASK3
CSL2
CKEK9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQ#D1D1
VSS#A9A9
VSS#E1E1VSS#B3B3
NC#J1J1
VDD#B2B2
VDD#D9D9
VDDQ#A1A1
VDDQ#A8A8
VDDQ#C1C1
VDDQ#C9C9
NC#L1L1
NC#J9J9
VDDQ#E9E9
ZQL8
RESETT2
DQSLF3
DMUD3 DMLE7
VSSQ#B1B1
VSSQ#B9B9
VSSQ#D8D8
VSSQ#E2E2
DQSUC7
VSSQ#E8E8
DQSLG3
VDDQ#F1F1
VSSQ#F9F9
VSSQ#G1G1
VDDQ#H2H2
VDDQ#H9H9
VSSQ#G9G9
VREFCAM8
VSS#G8G8
VDD#G7G7
ODTK1
A0N3
A1P7
VDD#K2K2
A12/BCN7
VSS#J2J2
VDD#K8K8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15M7
BA2M3
VREFDQH1
NC#L9L9
VDD#N1N1
VDD#N9N9
VDD#R1R1
VDD#R9R9
VSS#J8J8
VSS#M1M1
VSS#M9M9
VSS#P1P1
VSS#P9P9
VSS#T1T1
VSS#T9T9
VDDQ#D2D2
C2490.1u/10V_4
R571 *0/J_6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
2.48A
15
CHA1
CHA0
CHB1
CHB0
SA0SA100
1
10
0
1 1
20110817 change to 1K/F_420110817 change to 1K/F_4
Intel M1 solution
Place these Caps near SO_DIMM-A
DDR3 DIMM-A (DDR)
CRB Add
20121203：：：：Add 39pF for ESD
M_B_A0
CLK_SCLKCLK_SDATA
DIMM1_SA0DIMM1_SA1
M_B_DQSP0
M_B_DQSN0
+SMDDR_VREF_DQ1
+SMDDR_VREF_DQ1
M_B_DQ0
SMDDR_VREF_DQ1_M3
M_B_A1M_B_A2M_B_A3M_B_A4M_B_A5M_B_A6M_B_A7M_B_A8M_B_A9M_B_A10M_B_A11M_B_A12M_B_A13M_B_A14M_B_A15
M_B_DQSP1M_B_DQSP2M_B_DQSP3M_B_DQSP4M_B_DQSP5M_B_DQSP6M_B_DQSP7
M_B_DQSN1M_B_DQSN2M_B_DQSN3M_B_DQSN4M_B_DQSN5M_B_DQSN6M_B_DQSN7
M_B_DQ1M_B_DQ2M_B_DQ3M_B_DQ4M_B_DQ5M_B_DQ6M_B_DQ7M_B_DQ8M_B_DQ9M_B_DQ10M_B_DQ11M_B_DQ12M_B_DQ13M_B_DQ14M_B_DQ15M_B_DQ16M_B_DQ17M_B_DQ18M_B_DQ19M_B_DQ20M_B_DQ21M_B_DQ22M_B_DQ23M_B_DQ24M_B_DQ25M_B_DQ26M_B_DQ27M_B_DQ28M_B_DQ29M_B_DQ30M_B_DQ31M_B_DQ32M_B_DQ33M_B_DQ34M_B_DQ35M_B_DQ36M_B_DQ37M_B_DQ38M_B_DQ39M_B_DQ40M_B_DQ41M_B_DQ42M_B_DQ43M_B_DQ44M_B_DQ45M_B_DQ46M_B_DQ47M_B_DQ52M_B_DQ53M_B_DQ54M_B_DQ51M_B_DQ48M_B_DQ49M_B_DQ55M_B_DQ50M_B_DQ56M_B_DQ60M_B_DQ62M_B_DQ58M_B_DQ61M_B_DQ57M_B_DQ59M_B_DQ63
DIMM1_SA0 DIMM1_SA1
+SMDDR_VREF_DIMM_A
M_B_A[15:0][4]
M_B_BS#0[4]M_B_BS#1[4]M_B_BS#2[4]
M_B_CAS#[4]M_B_RAS#[4]M_B_WE#[4]
CLK_SCLK[9,13,32]CLK_SDATA[9,13,32]
DDR3_DRAMRST#[4,13,14]M_B_CS#0[4]M_B_CS#1[4]M_B_CLK0[4]M_B_CLK0#[4]M_B_CLK1[4]M_B_CLK1#[4]M_B_CKE0[4]M_B_CKE1[4]
M_B_ODT0[4]M_B_ODT1[4]
M_B_DQSP[7:0][4]
M_B_DQSN[7:0][4]
M_B_DQ[63:0] [4]
SMDDR_VREF_DQ1_M3[6]
DEEPS3_EC[4,13,14]
+1.5VSUS
+3V
+0.75V_DDR_VTT
+SMDDR_VREF_DIMM_A
+1.5VSUS +1.5VSUS
+SMDDR_VREF
+3V
+1.5VSUS
+0.75V_DDR_VTT
+3V
+1.5VSUS +0.75V_DDR_VTT
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DDR3 DIMMA-RSV H=5.2 1A
Monday, January 07, 2013
ZQK
4615
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DDR3 DIMMA-RSV H=5.2 1A
Monday, January 07, 2013
ZQK
4615
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DDR3 DIMMA-RSV H=5.2 1A
Monday, January 07, 2013
ZQK
4615
C513
1u/6.3V_4
C740
10u/6.3V_6
R400*10K/J_4
C476
0.1u/16V_4
C849
39P/50V_4
Q22*AP2302GN
3
2
1
PC
2100
DD
R3
SD
RA
M S
O-D
IMM
(204
P)
JDIM1A
DDR3-DIMM1_H=5.2_RVS
A098
A197
A296
A395
A492
A591
A690
A786
A889
A985
A10/AP107
A1184
A12/BC#83
A13119
A1480
A1578
BA0109
BA1108
BA279
S0#114
S1#121
CK0101
CK0#103
CK1102
CK1#104
CKE073
CKE174
CAS#115
RAS#110
WE#113
SA0197
SA1201
SCL202
SDA200
ODT0116
ODT1120
DM011
DM128
DM246
DM363
DM4136
DM5153
DM6170
DM7187
DQS012
DQS129
DQS247
DQS364
DQS4137
DQS5154
DQS6171
DQS7188
DQS#010
DQS#127
DQS#245
DQS#362
DQS#4135
DQS#5152
DQS#6169
DQS#7186
DQ05
DQ17
DQ215
DQ317
DQ44
DQ56
DQ616
DQ718
DQ821
DQ923
DQ1033
DQ1135
DQ1222
DQ1324
DQ1434
DQ1536
DQ1639
DQ1741
DQ1851
DQ1953
DQ2040
DQ2142
DQ2250
DQ2352
DQ2457
DQ2559
DQ2667
DQ2769
DQ2856
DQ2958
DQ3068
DQ3170
DQ32129
DQ33131
DQ34141
DQ35143
DQ36130
DQ37132
DQ38140
DQ39142
DQ40147
DQ41149
DQ42157
DQ43159
DQ44146
DQ45148
DQ46158
DQ47160
DQ48163
DQ49165
DQ50175
DQ51177
DQ52164
DQ53166
DQ54174
DQ55176
DQ56181
DQ57183
DQ58191
DQ59193
DQ60180
DQ61182
DQ62192
DQ63194
C270
2.2u/6.3V_6
R40610K/J_4
C511
1u/6.3V_4
C257
0.1u/16V_4
+
C761
*150u/6.3V_3528
R281 *M3@0/J_6
C494
*10u/6.3V_6
R355 *0/J_6
C679
0.1u/16V_4
R2961K/F_4
C750470P/50V_4
C495
1u/6.3V_4
R277 *0/J_6
C709
10u/6.3V_6
C512
1u/6.3V_4
C692
0.1u/16V_4
R3501K/F_4
C718
0.1u/16V_4
R409*10K/J_4
R3531K/F_4
C729
0.1u/16V_4
R40110K/J_4
R2861K/F_4
TP80
C255470P/50V_4
C704
0.1u/16V_4
C478
2.2u/6.3V_6
C747
10u/6.3V_6
C749
0.1u/16V_4
PC
2100
DD
R3
SD
RA
M S
O-D
IMM
(204
P)
JDIM1B
DDR3-DIMM1_H=5.2_RVS
VDD175
VDD276
VDD381
VDD482
VDD587
VDD688
VDD793
VDD894
VDD999
VDD10100
VDD11105
VDD12106
VDD13111
VDD14112
VDD15117
VDD16118
VDD17123
VDD18124
VDDSPD199
NC177
NC2122
NCTEST125
EVENT#198
RESET#30
VREF_DQ1
VREF_CA126
VSS12
VSS23
VSS38
VSS49
VSS513
VSS614
VSS719
VSS820
VSS925
VSS1026
VSS1131
VSS1232
VSS1337
VSS1438
VSS1543
VSS1644
VSS1748
VSS1849
VSS1954
VSS2055
VSS2160
VSS2261
VSS2365
VSS2466
VSS2571
VSS2672
VSS27127
VSS28128
VSS29133
VSS30134
VSS31138
VSS32139
VSS33144
VSS34145
VSS35150
VSS36151
VSS37155
VSS38156
VSS39161
VSS40162
VSS41167
VSS42168
VSS43172
VSS44173
VSS45178
VSS46179
VSS47184
VSS48185
VSS49189
VSS50190
VSS51195
VSS52196
VTT1203
VTT2204
GND205
GND206
C848
39P/50V_4
C373
2.2u/6.3V_6
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
PEX_RST
I/O 3.3V
PEX_RST timing
Trise >= 1uS Tfail <=500nS
2500mA
To be placed no further from the GPU than bewteen BGA and Power supply
place near balls
place under BGA
1000mA
To be placed no further from the GPU than bewteen BGA and Power supply
place near balls
place under BGA
8mils width(0.2MM)
Place near BGA
PLACE UNDAER BALLS
PLACE NEAR TO GPU L8/M8
20120813: EC control PEGX_RST#
0815 change R53 to 1% tolerance
0817 RSVD R46 and C49 for GV2 co-layout sDDR3
PEX_PLLVDD : 0.3MM = 12mils (150mA)
0816 follow Z09 to isolate CLK_REQ#
PU at page 9
L8/M8/K8/J8 0.4MM = 16mils
PLACE NEAR TO GPU BALLS
AH12/AG12 need 210mA of +3V_GFX
1001：Remove 3V3MISC by FAE Nelson suggesLon FAE：Please use +3V_GFX to instead 3V3MISC power rail
Layout Notes:Place decoupling CAPs close to GPU
16Layout Notes:+1.05_GFX trace width = 250mils
PLACE UNDER GPU BALLS
PLACE UNDAER GPU BALLS L8/M8PLACE NEAR BALLS
LAYOUT NOTES:UNDAER: WITHIN 150MILSNEAR: WITHIN 1378MILS
1001：Remove 3V3MISC's Cap by FAE Nelson suggesLon
1001：Remove 3V3MISC by FAE Nelson suggesLon FAE：Please use +3V_GFX to instead 3V3MISC power rail
PEX_CLKREQ#
PEX_TSTCLK#PEX_TSTCLK
PEGX_RST#
PEX_TERMP
PEX_PLLVDD
TESTMODE
PEGX_WAKE
PEGX_RST#
PEX_CLKREQ#
PEG_TX14_CPEG_TX#14_C
PEG_TX11_CPEG_TX#11_C
PEG_TX8_CPEG_TX#8_C
PEG_TX15_CPEG_TX#15_C
PEG_TX12_CPEG_TX#12_C
PEG_TX9_CPEG_TX#9_C
PEG_TX13_CPEG_TX#13_C
PEG_TX10_CPEG_TX#10_C
PEG_RX13_CPEG_RX#13_C
PEG_RX10_CPEG_RX#10_C
PEG_RX#14_CPEG_RX14_C
PEG_RX11_CPEG_RX#11_C
PEG_RX8_CPEG_RX#8_C
PEG_RX#15_CPEG_RX15_C
PEG_RX12_CPEG_RX#12_C
PEG_RX9_CPEG_RX#9_C
GPU_VSSP_SENSE [43]GPU_VCCP_SENSE [43]
CLK_PCIE_VGAP [9]CLK_PCIE_VGAN [9]
PLTRST#[9,26,27,28,34]
DGPU_HOLD_RST#[9]
PEG_A_CLKREQ# [9]
PEGX_RST# [19]
PEG_TX14 [2]PEG_TX#14 [2]
PEG_TX11 [2]PEG_TX#11 [2]
PEG_TX8 [2]PEG_TX#8 [2]
PEG_TX15 [2]PEG_TX#15 [2]
PEG_TX12 [2]PEG_TX#12 [2]
PEG_TX9 [2]PEG_TX#9 [2]
PEG_TX13 [2]PEG_TX#13 [2]
PEG_TX10 [2]PEG_TX#10 [2]
PEG_RX13 [2]PEG_RX#13 [2]
PEG_RX10 [2]PEG_RX#10 [2]
PEG_RX14 [2]PEG_RX#14 [2]
PEG_RX11 [2]PEG_RX#11 [2]
PEG_RX8 [2]PEG_RX#8 [2]
PEG_RX15 [2]PEG_RX#15 [2]
PEG_RX12 [2]PEG_RX#12 [2]
PEG_RX9 [2]PEG_RX#9 [2]
+1.05V_GFX
+1.05V_GFX
+3V_GFX
+1.05V_GFX
+3V_GFX
+3V
+3V_GFX+3V_GFX
+3V_GFX
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DGPU 1/5 (PEG) 1A
16 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DGPU 1/5 (PEG) 1A
16 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DGPU 1/5 (PEG) 1A
16 46Monday, January 07, 2013
ZQK
C153 [email protected]/10V_4
C194 [email protected]/10V_4
[email protected]/10V_4
C612 [email protected]/10V_4
C213 [email protected]/10V_4C196 [email protected]/10V_4
U16
EV@MC74VHC1G08DFT2G
2
14
35
C148 EV@1u/6.3V_4
C59 [email protected]/10V_4
R590 [email protected]/F_4
C212 [email protected]/10V_4
C195 [email protected]/10V_4
C622 [email protected]/10V_4
C247 EV@10u/6.3V_6
C606 [email protected]/10V_4
C607 [email protected]/10V_4
R195 EV@10K/F_4
C193 [email protected]/10V_4
R186 *EV@200/F_4
C608 [email protected]/10V_4
C145 EV@1u/6.3V_4
C99 [email protected]/6.3V_6
C605 [email protected]/10V_4
C65 *[email protected]/10V_4
C623 [email protected]/10V_4
C215 [email protected]/10V_4
C197 [email protected]/10V_4
Q58EV@2N7002K
3
2
1
C216 [email protected]/10V_4
C207 EV@22u/6.3V_8
C183 EV@10u/6.3V_6
R199
EV@100K/F_4
C185 [email protected]/6.3V_6
C626 [email protected]/10V_4
C214 [email protected]/10V_4
C226 EV@22u/6.3V_8
C246 EV@10u/6.3V_6
C149 EV@1u/6.3V_4
C217 [email protected]/10V_4
C609 [email protected]/10V_4C624 [email protected]/10V_4
C152 *EV@1u/6.3V_4
C208 EV@22u/6.3V_8
C198 [email protected]/10V_4
C154 EV@1u/6.3V_4
C225 EV@22u/6.3V_8
C89 [email protected]/6.3V_6
C610 [email protected]/10V_4
C625 [email protected]/10V_4
C144 [email protected]/6.3V_6
R580EV@10K/F_4
C627 [email protected]/10V_4C147 EV@1u/6.3V_4
C191 [email protected]/10V_4
TP26
C210 [email protected]/10V_4
C171 EV@10u/6.3V_6
C158 [email protected]/6.3V_6
C629 [email protected]/10V_4
C178 [email protected]/6.3V_6
C163 [email protected]/10V_4
C611 [email protected]/10V_4
C211 [email protected]/10V_4
R207 EV@0_6
C192 [email protected]/10V_4
C628 [email protected]/10V_4
C199*EV@1u/6.3V_4
C72 [email protected]/10V_4
[PEG Interface]
U35A
EV@N14P_GV2
PEX_RX0AN12
PEX_RX0_NAM12
PEX_RX1AN14
PEX_RX1_NAM14
PEX_RX2AP14
PEX_RX2_NAP15
PEX_RX3AN15
PEX_RX3_NAM15
PEX_RX4AN17
PEX_RX4_NAM17
PEX_RX5AP17
PEX_RX5_NAP18
PEX_RX6AN18
PEX_RX6_NAM18
PEX_RX7AN20
PEX_RX7_NAM20
PEX_RX8AP20
PEX_RX8_NAP21
PEX_RX9AN21
PEX_RX9_NAM21
PEX_RX10AN23
PEX_RX10_NAM23
PEX_RX11AP23
PEX_RX11_NAP24
PEX_RX12AN24
PEX_RX12_NAM24
PEX_RX13AN26
PEX_RX13_NAM26
PEX_RX14AP26
PEX_RX14_NAP27
PEX_RX15AN27
PEX_RX15_NAM27
PEX_TX0AK14
PEX_TX0_NAJ14
PEX_TX1AH14
PEX_TX1_NAG14
PEX_TX2AK15
PEX_TX2_NAJ15
PEX_TX3AL16
PEX_TX3_NAK16
PEX_TX4AK17
PEX_TX4_NAJ17
PEX_TX5AH17
PEX_TX5_NAG17
PEX_TX6AK18
PEX_TX6_NAJ18
PEX_TX7AL19
PEX_TX7_NAK19
PEX_TX8AK20
PEX_TX8_NAJ20
PEX_TX9AH20
PEX_TX9_NAG20
PEX_TX10AK21
PEX_TX10_NAJ21
PEX_TX11AL22
PEX_TX11_NAK22
PEX_TX12AK23
PEX_TX12_NAJ23
PEX_TX13AH23
PEX_TX13_NAG23
PEX_TX14AK24
PEX_TX14_NAJ24
PEX_TX15AL25
PEX_TX15_NAK25
PEX_REFCLKAL13
PEX_REFCLK_NAK13
PEX_TSTCLK_OUTAJ26
PEX_TSTCLK_OUT_NAK26
PEX_RST_NAJ12
PEX_CLKREQ_NAK12
PEX_TERMPAP29
TESTMODEAK11
PEX_PLLVDDAG26
PEX_PLL_HVDDAH12
VDD_SENSEL4
GND_SENSEL5
PEX_IOVDD_1AG19
PEX_IOVDD_2AG21
PEX_IOVDD_3AG22
PEX_IOVDD_4AG24
PEX_IOVDD_5AH21
PEX_IOVDDQ_1AG13
PEX_IOVDDQ_2AG15
PEX_IOVDDQ_3AG16
PEX_IOVDDQ_4AG18
PEX_IOVDDQ_5AG25
PEX_IOVDDQ_6AH15
PEX_IOVDDQ_7AH18
PEX_IOVDDQ_8AH26
PEX_IOVDDQ_9AH27
PEX_IOVDDQ_10AJ27
PEX_IOVDDQ_11AK27
PEX_IOVDDQ_12AL27
PEX_IOVDDQ_13AM28
PEX_IOVDDQ_14AN28
NC_1AC6
NC_2AJ28
NC_3AJ4
NC_4AJ5
NC_5AL11
NC_6C15
NC_7D19
NC_8D20
NC_9D23
NC_10D26
NC_11H31
NC_12T8
NC_13V32
PEX_IOVDD_6AH25
PEX_WAKEAJ11
PEX_SVDD_3V3AG12
3.3V_AUX_NCP8
VDD33_1J8
VDD33_2K8
VDD33_3L8
VDD33_4M8
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
15mils width
PLACE UNDER GPU BALLS
C6218 close ball K27 35mA
Layout Notes: PLACE CLOSE TO GPU BALLS
DBI
EDC
0813sDDR3R1=42.2/FR2=51.1/F
GC6 connect to EC
0815 no stuff follow CRB
RSVD 330u, ZQS have one
0816 follow DG to place caps
0.1u x 6 stuff x4
1u x 6stuff x4
4.7u x 6stuff x4
10u x 4stuff x2
22u x 4stuff x2
17
+FB_PLLAVDD = 0.3mm 12milsU27+H17 62mAR1
R2
PLACE NEAR TO GPU BALLS
LAYOUT NOTES:UNDAER: WITHIN 150MILSNEAR: WITHIN 1378MILS
PLACE NEAR TO GPU BALLS
PLACE UNDER GPU BALLS
C107 close to ball H17
1012(FAE)：Reserve +FB_PLLAVDD evan without CH-B
0815 no stuff follow CRB
0815 confirm with ZQS (sDDR3)
VMA_DQ[63:0]
VMA_CLK1#
VMA_CLK0VMA_CLK0#VMA_CLK1
VMA_DQ31VMA_DQ30VMA_DQ29
VMA_DQ27
VMA_DQ24
VMA_DQ28
VMA_DQ26VMA_DQ25
VMA_DQ7VMA_DQ6
VMA_DQ3VMA_DQ4
VMA_DQ2
VMA_DQ5
VMA_DQ1
VMA_DQ23
VMA_DQ21VMA_DQ20
VMA_DQ0
VMA_DQ18VMA_DQ19
VMA_DQ17VMA_DQ16
VMA_DQ22
VMA_DQ11VMA_DQ12
VMA_DQ9VMA_DQ8
VMA_DQ10
VMA_DQ15VMA_DQ14VMA_DQ13
VMA_DQ34VMA_DQ35
VMA_DQ32VMA_DQ33
VMA_DQ39
VMA_DQ36VMA_DQ37VMA_DQ38
VMA_DQ56VMA_DQ57
VMA_DQ59VMA_DQ58
VMA_DQ62
VMA_DQ60
VMA_DQ63
VMA_DQ61
VMA_DQ43
VMA_DQ45
VMA_DQ40
VMA_DQ42
VMA_DQ47
VMA_DQ44
VMA_DQ46
VMA_DQ41
VMA_DQ48
VMA_DQ51
VMA_DQ55
VMA_DQ49VMA_DQ50
VMA_DQ54
VMA_DQ52VMA_DQ53
FBA_CMD11FBA_CMD10FBA_CMD9
FBA_CMD15FBA_CMD14FBA_CMD13FBA_CMD12
FBA_CMD8
FBA_CMD3FBA_CMD2FBA_CMD1
FBA_CMD27FBA_CMD26FBA_CMD25
FBA_CMD30FBA_CMD29FBA_CMD28
FBA_CMD24
FBA_CMD19FBA_CMD18FBA_CMD17
FBA_CMD23FBA_CMD22FBA_CMD21FBA_CMD20
FBA_CMD16
FBA_CMD7FBA_CMD6FBA_CMD5FBA_CMD4
FBA_CMD0
FBA_DEBUG1FBA_DEBUG
+FB_PLLAVDD
+FB_PLLAVDD
FB_CAL_PU_GND
FB_CAL_PD_VDDQ
FB_CAL_TERM_GND
FBVDDQ_SENSE_NC
FB_GND_SENSE_NC
VMA_DM3VMA_DM2
VMA_DM0VMA_DM1
VMA_DM4VMA_DM5VMA_DM6VMA_DM7
VMA_WDQS3
VMA_WDQS0VMA_WDQS1
VMA_WDQS4
VMA_WDQS7
VMA_WDQS5
VMA_WDQS2
VMA_WDQS6
FB_CLAMP
VMA_RDQS0VMA_RDQS1
VMA_RDQS4
VMA_RDQS7
VMA_RDQS5
VMA_RDQS2
VMA_RDQS6
VMA_RDQS3
FBA_CMD5
FBA_CMD19
FBA_CMD18
FBA_CMD2
FBA_CMD3
+FB_PLLAVDD
VMC_DM3
VMC_DM0
VMC_DM2
VMC_DM4
VMC_DM1
VMC_DM5VMC_DM6VMC_DM7
VMC_WDQS0
VMC_WDQS4
VMC_WDQS7
VMC_WDQS1
VMC_WDQS5
VMC_WDQS2
VMC_WDQS6
VMC_WDQS3
VMC_RDQS0
VMC_RDQS4
VMC_RDQS7
VMC_RDQS1
VMC_RDQS5
VMC_RDQS2
VMC_RDQS6
VMC_RDQS3
FBC_CMD5
FBC_CMD7FBC_CMD6
FBC_CMD4
FBC_CMD8
FBC_CMD1
FBC_CMD3FBC_CMD2
FBC_CMD9
FBC_CMD11FBC_CMD10
FBC_CMD13
FBC_CMD15FBC_CMD14
FBC_CMD12
FBC_CMD25
FBC_CMD17
FBC_CMD19FBC_CMD18
FBC_CMD21FBC_CMD22
FBC_CMD20
FBC_CMD16
FBC_CMD26FBC_CMD27
FBC_CMD23FBC_CMD24
FBC_CMD0
FBC_CMD28FBC_CMD29FBC_CMD30
VMC_DQ38
VMC_DQ18
VMC_DQ22VMC_DQ23
VMC_DQ21
VMC_DQ17
VMC_DQ19
VMC_DQ16
VMC_DQ20
VMC_DQ9VMC_DQ8
VMC_DQ11
VMC_DQ14VMC_DQ15
VMC_DQ13
VMC_DQ10
VMC_DQ12
VMC_DQ24VMC_DQ25
VMC_DQ31
VMC_DQ28
VMC_DQ30VMC_DQ29
VMC_DQ27VMC_DQ26
VMC_DQ1VMC_DQ2
VMC_DQ0
VMC_DQ3VMC_DQ4
VMC_DQ6VMC_DQ5
VMC_DQ7
VMC_DQ36
VMC_DQ39
VMC_DQ37
VMC_DQ33
VMC_DQ35VMC_DQ34
VMC_DQ32
VMC_DQ63VMC_DQ62VMC_DQ61VMC_DQ60VMC_DQ59
VMC_DQ57VMC_DQ58
VMC_DQ56
VMC_DQ47
VMC_DQ45VMC_DQ46
VMC_DQ43VMC_DQ44
VMC_DQ42VMC_DQ41VMC_DQ40
VMC_DQ48
VMC_DQ50VMC_DQ51
VMC_DQ49
VMC_DQ53VMC_DQ52
VMC_DQ55VMC_DQ54
VMC_CLK1#
VMC_CLK0VMC_CLK0#VMC_CLK1
FBC_DEBUGFBC_DEBUG1
FBC_CMD2
FBC_CMD3
FBC_CMD18
FBC_CMD5
FBC_CMD19
VMC_DQ[63:0]
VMA_DQ[63:0] [21]
VMA_CLK1 [21]VMA_CLK1# [21]
VMA_CLK0# [21]VMA_CLK0 [21]
FBA_CMD[30:0][21]
VMA_WDQS[7..0][21]
VMA_DM[7..0][21]
EC_FB_CLAMP [19,20,34]
VMA_RDQS[7..0][21]
FBC_CMD[30:0][22]
VMC_DM[7..0][22]
VMC_WDQS[7..0][22]
VMC_RDQS[7..0][22]
VMC_CLK1 [22]VMC_CLK0# [22]VMC_CLK0 [22]
VMC_CLK1# [22]
VMC_DQ[63:0] [22]
+1.05V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DGPU 2/5 (Memory) 1A
17 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DGPU 2/5 (Memory) 1A
17 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DGPU 2/5 (Memory) 1A
17 46Monday, January 07, 2013
ZQK
R370 EV@10K/F_4
C58 *[email protected]/10V_4
R84 [email protected]/F_4
C61 [email protected]/10V_4
R407 EV@10K/F_4
R472 EV@0/J_4
R538 EV@10K/F_4
C54 [email protected]/10V_4
C81 EV@10u/6.3V_6
R25 EV@10K/F_4
C60 [email protected]/6.3V_6
TP4
R114 EV@10K/F_4
C67 [email protected]/10V_4
R26 EV@10K/F_4
+C6 EV@330u/2V_7343
C32 [email protected]/10V_4
R78 EV@10K/F_4
C51 EV@1u/6.3V_4
R76 *[email protected]/F_4
C119 [email protected]/6.3V_6
R63 EV@10K/F_4
MEMORY I/F C
U35C
EV@N14P_GV2
FBC_D00G9
FBC_D01E9
FBC_D02G8
FBC_D03F9
FBC_D04F11
FBC_D05G11
FBC_D06F12
FBC_D07G12
FBC_D08G6
FBC_D09F5
FBC_D10E6
FBC_D11F6
FBC_D12F4
FBC_D13G4
FBC_D14E2
FBC_D15F3
FBC_D16C2
FBC_D17D4
FBC_D18D3
FBC_D19C1
FBC_D20B3
FBC_D21C4
FBC_D22B5
FBC_D23C5
FBC_D24A11
FBC_D25C11
FBC_D26D11
FBC_D27B11
FBC_D28D8
FBC_D29A8
FBC_D30C8
FBC_D31B8
FBC_D32F24
FBC_D33G23
FBC_D34E24
FBC_D35G24
FBC_D36D21
FBC_D37E21
FBC_D38G21
FBC_D39F21
FBC_D40G27
FBC_D41D27
FBC_D42G26
FBC_D43E27
FBC_D44E29
FBC_D45F29
FBC_D46E30
FBC_D47D30
FBC_D48A32
FBC_D49C31
FBC_D50C32
FBC_D51B32
FBC_D52D29
FBC_D53A29
FBC_D54C29
FBC_D55B29
FBC_D56B21
FBC_D57C23
FBC_D58A21
FBC_D59C21
FBC_D60B24
FBC_D61C24
FBC_D62B26
FBC_D63C26
FBC_CLK0D12
FBC_CLK0_NE12
FBC_CLK1E20
FBC_CLK1_NF20
(FBC_DEBUG) FBB_DEBUG0G14
(NC) FBB_DEBUG1G20
FBB_CMD0 (FBC_CMD25)D13
FBB_CMD1 (FBC_CMD23)E14
FBC_CMD2F14
FBB_CMD3 (FBC_CMD0)A12
FBB_CMD4 (FBC_CMD10)B12
FBB_CMD5 (FBC_CMD26)C14
FBB_CMD6 (FBC_CMD14)B14
FBC_CMD7G15
FBB_CMD8 (FBC_CMD1)F15
FBB_CMD9 (FBC_CMD22)E15
FBB_CMD10 (FBC_CMD20)D15
FBB_CMD11 (FBC_CMD24)A14
FBB_CMD12 (FBC_CMD18)D14
FBB_CMD13 (FBC_CMD9)A15
FBB_CMD14 (FBC_CMD29)B15
FBB_CMD15 (FBC_CMD8)C17
FBB_CMD16 (FBC_CMD27)D18
FBB_CMD17 (FBC_CMD15)E18
FBB_CMD18 (FBC_CMD11)F18
FBB_CMD19 (FBC_CMD16)A20
FBB_CMD20 (FBC_CMD28)B20
FBB_CMD21 (FBC_CMD3)C18
FBB_CMD22 (FBC_CMD17)B18
FBB_CMD23 (FBC_CMD5)G18
FBB_CMD24(FBC_CMD4)G17
FBB_CMD25 (FBC_CMD21)F17
FBB_CMD26 (FBC_CMD6)D16
FBB_CMD27 (FBC_CMD13)A18
FBB_CMD28 (FBC_CMD19)D17
FBB_CMD29 (FBC_CMD12)A17
FBC_CMD30B17
FBC_CMD31 (NC)E17
FBC_DQM0E11
FBC_DQM1E3
FBC_DQM2A3
FBC_DQM3C9
FBC_DQM4F23
FBC_DQM5F27
FBC_DQM6C30
FBC_DQM7A24
FBC_DQS_WP0D10
FBC_DQS_WP1D5
FBC_DQS_WP2C3
FBC_DQS_WP3B9
FBC_DQS_WP4E23
FBC_DQS_WP5E28
FBC_DQS_WP6B30
FBC_DQS_WP7A23
FBC_DQS_RN0D9
FBC_DQS_RN1E4
FBC_DQS_RN2B2
FBC_DQS_RN3A9
FBC_DQS_RN4D22
FBC_DQS_RN5D28
FBC_DQS_RN6A30
FBC_DQS_RN7B23
FBB_CMD_RFU0C12
FBB_CMD_RFU1C20
FBB_PLL_AVDDH17
FBB_WCK01F8
FBB_WCK01_NE8
FBB_WCK23A5
FBB_WCK23_NA6
FBB_WCK45D24
FBB_WCK45_ND25
FBB_WCK67B27
FBB_WCK67_NC27
FBB_WCKB01D6
FBB_WCKB01_ND7
FBB_WCKB23C6
FBB_WCKB23_NB6
FBB_WCKB45F26
FBB_WCKB45_NE26
FBB_WCKB67A26
FBB_WCKB67_NA27
C63 *[email protected]/10V_4
+C1 *EV@330u/2.5V_3528
R74 EV@10K/F_4
TP58
C57 *[email protected]/6.3V_6
C125 EV@22u/6.3V_8
TP5
C53 [email protected]/10V_4
R77 [email protected]/F_4
C68 EV@10u/6.3V_6
R70 [email protected]/F_4
R184 *[email protected]/F_4
C52 EV@1u/6.3V_4
C584 *EV@10u/6.3V_6
TP13
C30 EV@1u/6.3V_4
R188 *[email protected]/F_4
TP82
C537 *EV@22U/6.3V_8
C536 *EV@22U/6.3V_8
C134 [email protected]/6.3V_6
L9 EV@PBY160808T-30Y-N_6
C581 [email protected]/6.3V_6
C31 EV@1u/6.3V_4
C64 EV@22u/6.3V_8
C55 [email protected]/10V_4
R154 *[email protected]/F_4
C110 *EV@10u/6.3V_6
R544 EV@10K/F_4
R473 EV@10K/J_4
C538 EV@22u/6.3V_8
C96 *[email protected]/6.3V_6
C43 *EV@1u/6.3V_4
[MEMORY I/F A]
U35B
EV@N14P_GV2
FBA_D00L28
FBA_D01M29
FBA_D02L29
FBA_D03M28
FBA_D04N31
FBA_D05P29
FBA_D07P28
FBA_D08J28
FBA_D09H29
FBA_D10J29
FBA_D11H28
FBA_D12G29
FBA_D13E31
FBA_D14E32
FBA_D15F30
FBA_D16C34
FBA_D17D32
FBA_D18B33
FBA_D19C33
FBA_D20F33
FBA_D21F32
FBA_D22H33
FBA_D23H32
FBA_D24P34
FBA_D25P32
FBA_D26P31
FBA_D27P33
FBA_D28L31
FBA_D29L34
FBA_D30L32
FBA_D31L33
FBA_D32AG28
FBA_D33AF29
FBA_D34AG29
FBA_D35AF28
FBA_D36AD30
FBA_D37AD29
FBA_D38AC29
FBA_D39AD28
FBA_D40AJ29
FBA_D41AK29
FBA_D42AJ30
FBA_D43AK28
FBA_D44AM29
FBA_D45AM31
FBA_D46AN29
FBA_D47AM30
FBA_D48AN31
FBA_D49AN32
FBA_D50AP30
FBA_D51AP32
FBA_D52AM33
FBA_D53AL31
FBA_D54AK33
FBA_D55AK32
FBA_D56AD34
FBA_D57AD32
FBA_D58AC30
FBA_D59AD33
FBA_D60AF31
FBA_D61AG34
FBA_D62AG32
FBA_D63AG33
FBA_D06R29
FBA_CLK0R30
FBA_CLK0_NR31
FBA_CLK1AB31
FBA_CLK1_NAC31
(FBA_DEBUG) FBA_DEBUG0R28
(NC) FBA_DEBUG1AC28
FB_VREF_NCH26
FBA_PLL_AVDDU27
FBA_CMD0 (FBA_CMD25)U30
FBA_CMD1 (FBA_CMD23)T31
FBA_CMD2U29
FBA_CMD3 (FBA_CMD0)R34
FBA_CMD4 (FBA_CMD10)R33
FBA_CMD5 (FBA_CMD26)U32
FBA_CMD6 (FBA_CMD14)U33
FBA_CMD7U28
FBA_CMD8 (FBA_CMD1)V28
FBA_CMD9 (FBA_CMD22)V29
FBA_CMD10 (FBA_CMD20)V30
FBA_CMD11 (FBA_CMD24)U34
FBA_CMD12 (FBA_CMD18)U31
FBA_CMD13 (FBA_CMD9)V34
FBA_CMD14 (FBA_CMD29)V33
FBA_CMD15 (FBA_CMD8)Y32
FBA_CMD16 (FBA_CMD27)AA31
FBA_CMD17 (FBA_CMD15)AA29
FBA_CMD18 (FBA_CMD11)AA28
FBA_CMD19 (FBA_CMD16)AC34
FBA_CMD20 (FBA_CMD28)AC33
FBA_CMD21 (FBA_CMD3)AA32
FBA_CMD22 (FBA_CMD17)AA33
FBA_CMD23 (FBA_CMD5)Y28
FBA_CMD24 (FBA_CMD4)Y29
FBA_CMD25 (FBA_CMD21)W31
FBA_CMD26 (FBA_CMD6)Y30
FBA_CMD27 (FBA_CMD13)AA34
FBA_CMD28 (FBA_CMD19)Y31
FBA_CMD29 (FBA_CMD12)Y34
FBA_CMD30Y33
FBA_CMD31 (NC)V31
FBA_DQM0P30
FBA_DQM1F31
FBA_DQM2F34
FBA_DQM3M32
FBA_DQM4AD31
FBA_DQM5AL29
FBA_DQM6AM32
FBA_DQM7AF34
FBA_DQS_WP0M31
FBA_DQS_WP1G31
FBA_DQS_WP2E33
FBA_DQS_WP3M33
FBA_DQS_WP4AE31
FBA_DQS_WP5AK30
FBA_DQS_WP6AN33
FBA_DQS_WP7AF33
FBA_DQS_RN0M30
FBA_DQS_RN1H30
FBA_DQS_RN2E34
FBA_DQS_RN3M34
FBA_DQS_RN4AF30
FBA_DQS_RN5AK31
FBA_DQS_RN6AM34
FBA_DQS_RN7AF32
FBVDDQ_1AA27
FBVDDQ_2AA30
FBVDDQ_3AB27
FBVDDQ_4AB33
FBVDDQ_5AC27
FBVDDQ_6AD27
FBVDDQ_7AE27
FBVDDQ_8AF27
FBVDDQ_9AG27
FBVDDQ_10B13
FBVDDQ_11B16
FBVDDQ_12B19
FBVDDQ_13E13
FBVDDQ_14E16
FBVDDQ_15E19
FBVDDQ_16H10
FBVDDQ_17H11
FBVDDQ_18H12
FBVDDQ_19H13
FBVDDQ_20H14
FBVDDQ_21H15
FBVDDQ_22H16
FBA_CMD_RFU0R32
FBA_CMD_RFU1AC32
FBA_WCK01K31
FBA_WCK01_NL30
FBA_WCK23H34
FBA_WCK23_NJ34
FBA_WCK45AG30
FBA_WCK45_NAG31
FBA_WCK67AJ34
FBA_WCK67_NAK34
FBA_WCKB01J30
FBA_WCKB01_NJ31
FBA_WCKB23J32
FBA_WCKB23_NJ33
FBA_WCKB45AH31
FBA_WCKB45_NAJ31
FBA_WCKB67AJ32
FBA_WCKB67_NAJ33
FB_DLL_AVDDK27
RSVDE1
FBVDDQ_23H18
FBVDDQ_24H19
FBVDDQ_25H20
FBVDDQ_26H21
FBVDDQ_27H22
FBVDDQ_28H23
FBVDDQ_29H24
FBVDDQ_30H8
FBVDDQ_31H9
FBVDDQ_32L27
FBVDDQ_33M27
FBVDDQ_34N27
FBVDDQ_35P27
FBVDDQ_36R27
FBVDDQ_37T27
FBVDDQ_38T30
FBVDDQ_39T33
FBVDDQ_40V27
FBVDDQ_41W27
FBVDDQ_42W30
FBVDDQ_43W33
FBVDDQ_44Y27
FBVDDQ_PROBEF1
GND_PROBEF2
FB_CAL_PD_VDDQJ27
FB_CAL_PU_GNDH27
FB_CALTERM_GNDH25
C94 [email protected]/10V_4
C136 *[email protected]/10V_4
C44 *EV@1u/6.3V_4
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
NV_PLLVDD 0.3MM=12mils 78mA
GPU_SP_PLLVDD 0.3MM=12mils
AE8 : 71mA
AD7 : 41mA
18
LAYOUT NOTES:UNDAER: WITHIN 150MILSNEAR: WITHIN 1318MILS
PLACE UNDER GPU BALLSPLACE NEAR TO GPU BALLS
PLACE UNDER GPU BALLSPLACE NEAR TO GPU BALLS
CLK_27M_VGA_2
NV_PLLVDD
SP_VID_PLLVDD
EV_CRTDCLKEV_CRTDDAT
CLK_27M_VGA_2
XTALOUT
XTALOUT+1.05V_GFX
+1.05V_GFX
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DGPU 3/5 (Display) 1A
18 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DGPU 3/5 (Display) 1A
18 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DGPU 3/5 (Display) 1A
18 46Monday, January 07, 2013
ZQK
R107 [email protected]_4
C138
[email protected]/10V_4
Y2EV@27MHZ
24
13
[email protected]/10V_4
C548 EV@10p/50V_4
C165
[email protected]/6.3V_6
C168
EV@22u/6.3V_8
L14 EV@160808-30Y
R79 EV@10K/F_4
R106 [email protected]_4
C140EV@22u/6.3V_8
L15 EV@160808-0180P
R492 EV@10K/F_4
[IFPC/D_TMDS]
[IFPE/F_DP]
[XTAL IN]
[DACA/B_CRT]
[IFPA/B_LVDS]
U35D
EV@N14P_GV2
IFPA_TXCAN6
IFPA_TXC_NAM6
IFPA_TXD0AN3
IFPA_TXD0_NAP3
IFPA_TXD1AM5
IFPA_TXD1_NAN5
IFPA_TXD2AK6
IFPA_TXD2_NAL6
IFPA_TXD3AH6
IFPA_TXD3_NAJ6
IFPB_TXCAH9
IFPB_TXC_NAJ9
IFPB_TXD4AP5
IFPB_TXD4_NAP6
IFPB_TXD5AL7
IFPB_TXD5_NAM7
IFPB_TXD6AM8
IFPB_TXD6_NAN8
IFPB_TXD7AL8
IFPB_TXD7_NAK8
IFPC_AUX_I2CW_SCLAG3
IFPC_AUX_I2CW_SDA_NAG2
IFPC_L0AK1
IFPC_L0_NAJ1
IFPC_L1AJ3
IFPC_L1_NAJ2
IFPC_L2AH3
IFPC_L2_NAH4
IFPC_L3AG5
IFPC_L3_NAG4
IFPD_AUX_I2CX_SCLAK3
IFPD_AUX_I2CX_SDA_NAK2
IFPD_L0AM1
IFPD_L0_NAM2
IFPD_L1AM3
IFPD_L1_NAM4
IFPD_L2AL3
IFPD_L2_NAL4
IFPD_L3AK4
IFPD_L3_NAK5
IFPE_AUX_I2CY_SCLAB3
IFPE_AUX_I2CY_SDA_NAB4
IFPE_L0AD2
IFPE_L0_NAD3
IFPE_L1AD1
IFPE_L1_NAC1
IFPE_L2AC2
IFPE_L2_NAC3
IFPE_L3AC4
IFPE_L3_NAC5
IFPF_AUX_I2CZ_SCLAF3
IFPF_AUX_I2CZ_SDA_NAF2
IFPF_L0AE3
IFPF_L0_NAE4
IFPF_L1AF4
IFPF_L1_NAF5
IFPF_L2AD4
IFPF_L2_NAD5
IFPF_L3AG1
IFPF_L3_NAF1
DACA_REDAK9
DACA_GREENAL10
DACA_BLUEAL9
DACA_HSYNCAM9
DACA_VSYNCAN9
I2CA_SCLR4
I2CA_SDAR5
XTAL_INH3
XTAL_OUTH2
XTAL_OUTBUFFJ4
XTAL_SSINH1
IFPAB_PLLVDDAH8
IFPA_IOVDDAG8
IFPB_IOVDDAG9
IFPAB_RSETAJ8
IFPC_PLLVDDAF7
IFPC_IOVDDAF6
IFPC_RSETAF8
IFPEF_PLLVDDAB8
IFPE_IOVDDAC7
IFPF_IOVDDAC8
IFPEF_RSETAD6
DACA_VDDAG10
DACA_VREFAP9
DACA_RSETAP8
PLLVDDAD8
SP_PLLVDDAE8
VID_PLLVDDAD7
IFPD_IOVDDAG6
IFPD_PLLVDDAG7
IFPD_RSETAN2
C554 EV@10p/50V_4
C164
[email protected]/10V_4
R481*EV@1M/J_4
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
1110 0110
4.99K
10K
15K
20K
24.9K
30.1K
1111
1100
0111
Logical Strap Bit Mapping
1011 0011
00101010
1000 0000
34.8K
45.3K
1101
0100
0101
1001 0001
PU-VDD PD
3GIO_PADCFG[2]
RAMCFG[1]
3GIO_PADCFG[1] 3GIO_PADCFG[0]
PCI_DEVID[3] PCI_DEVID[1]
PEX_PLL_EN_TERM
Strapping Bit0LogicalLogical
STRAP0
STRAP1
STRAP2
FB_1
XXXX
Logical
1292
FB_0
Strapping Bit2Logical
ROM_SI
VGA_DEVICE
PCI_DEVID[0]
PCI_DEVID[5]
RAMCFG[3]
SUB_VENDOR
RAMCFG[2]
PCI_DEVIDE[4]
USER[0]USER[3] USER[2]
SMB_ALT_ADDR
Strapping Bit3
ROM_SCLK
1000
0110
0010PCI_DEVID[2]
RAMCFG[0]
Strapping Bit1
USER[1]
3GIO_PADCFG[3]
ROM_SO
1111
STRAP3
STRAP4
SOR3_EXPOSED
RESERVED PCIE_MAX SPEED DP_PLL_VDD33
SOR2_EXPOSED SOR1_EXPOSED SOR0_EXPOSED 0000
0111PCIE SPEED CHANGE GEN3
R3
N14x others
N14M-GE/GL
40.2K
NC
LCD_BL_PWMLCD_VCCLCD_BLEN
3DVision
HPD_AHPD_CFRM_LCKHPD_DHPD_EHPD_F or HDP_B
RSVDRSVD GPIO20/21 available on N14P-GV2
PSI stuff 10k at GPU side ready, remove power page of pu 10k
GPIO8 VGA thrmtrip# => inform ECover temperature protect
GPIO9 for ADPS circuit to infrom ECNV dGPU VPS Alert
GPIO12 HW throttleover power protect
0815 RSVD VGPU TALERT#to throttle GPU power
GPIO12 AC detectAC highDC low
RSVD
0816 EC programing GPI
0816 dGPU_OTP# = EC control
0816 dGPU_ALT# = EC control
0816 dGPU_OPP# = EC control
0817：FB_CLAMP have PD, EC programing to avoid leakage0928 FAE Nelson：Add a MOS to avoid power leakage issue pin 2 connect to +3V_GFX power rail
0817 CEC is NC for GK107
SMBus (VGA)
19
R3
A.ROM_SI - Memeory strapB.ROM_SO - 5K pull highD.STRAP 0 - 45k pull highE.STRAP 1 ：GV2- 45K pull down GT - 5K pull downF.STRAP 3 - 5k pull down
EC/S5 VGA/+3V_GFX
C2.For N14P-GV2+SDDR3 sku N14P-GV2 QS device ID=0x1292 'This is QS device ID 1.ROM_SCLK =5K pull high 2.STRAP2= 15k pull down 3.STRAP4=45 pull down 'For N14P-GV2 QS
N14P-GT device ID=0x0FE4 1.ROM_SCLK =15K pull down 2.STRAP2= 25k pull down 3.STRAP4=45K pull down
0928 FAE Nelson：Please add 10k pull up to +3Von FB_CLAMP_REQ# signal also
1001：Remove 3V3MISC by FAE Nelson suggesLon FAE：Please use +3V_GFX to instead 3V3MISC power rail
1001：Remove 3V3MISC by FAE Nelson suggesLon FAE：Please use +3V_GFX to instead 3V3MISC power rail
STRAP3Optimus ---> 4.99k PDDiscrete only ---> 15K PD
StrapVender Freq.
900MHzMicron
Q PN
AKD5PGSTL05
Mfr. PN
MT41K256M16HA-107G:E0001
GPU
N14P-GT1 & GV2
Hynix 0110 AKD5MGWTW17 H5TQ2G63DFR-11C 900MHz N14P-GT
Resistor P/N4.99K---> CS24992FB2610K ---> CS31002FB2615K ---> CS31502FB2420K ---> CS32002FB2924.9K---> CS32492FB1630.1K---> CS33012FB1834.8K---> CS33482FB2245.3K---> CS34532FB18
N14M-GE device ID is 0x1140 N14M-GE is use binary strap setting
A.ROM_SI - 10K pull downB.ROM_SO - 10K pull downF.STRAP 3 - 10k pull down
Micron：MT41K256M16HA-107G:E (QPN = AKD5PGSTL05)strap= 0xD =(0x1101)STRAP 3&2&0 =10K Pull highSTRAP 1= 10K Pull down
ROM_SCLK
STRAP0
ROM_SI
JTAG_TCKJTAG_TMS
ROM_SIROM_SO
GPU_ALERT#
VGA_OVT#
JTAG_TDOJTAG_TDIJTAG_TDI
GFx_SDA
JTAG_TRST#
GFx_SCL
DGPU_EDIDCLKDGPU_EDIDDATA
N13P_SCLN13P_SDA
STRAP4STRAP3
STRAP1STRAP0
STRAP2
JTAG_TCK
JTAG_TRST#
JTAG_TMS
JTAG_TDI
GPIO12_ACIN
GPU_ALERT#
GFx_SDA
GFx_SCL
ROM_SCLKROM_SO
GPU_ALERT#
VGA_OVT#
VGA_OVT#
GPIO12_ACIN
VGPU_PSI
VGPU_PSI
GPIO12_ACIN
FB_CLAMP_REQ#_R
PEGX_RST#
STRAP1STRAP2STRAP3STRAP4
FB_CLAMP_MON
dGPU_ALT# [34]dGPU_OTP# [34]
VGPU_PSI [43]
VGPU_PWMVID [43]
dGPU_OPP# [34]
FB_CLAMP_TGL_REQ# [34]
PEGX_RST# [16]
2ND_MBCLK[9,34]
2ND_MBDATA[9,34]
GPU_THAL# [43]
EC_FB_CLAMP [17,20,34]
+3V_GFX+3V_GFX
+3V_GFX
+3V_GFX
+3V_GFX
+3V_GFX
+3V_GFX
+3V_GFX
+3V
+3V_GFX
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DGPU 4/5 (MIO/GPIO) 1A
19 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DGPU 4/5 (MIO/GPIO) 1A
19 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DGPU 4/5 (MIO/GPIO) 1A
19 46Monday, January 07, 2013
ZQK
R142 EV@10K/F_4
Q47 EV@2N7002K
3
2
1
R189 EV@0/J_4
R111
EV@10K/F_4
R512 EV@10K/F_4
Q50EV@2N7002K
3
2
1
R50*[email protected]/F_4
R497*EV-D@10K/F_4
R128EV@10K/F_4
R136EV@10K/F_4
R516 *EV@0_4
TP67
R100 EV@10K/F_4
Q16EV@2N7002K
3
2
1
R90 EV@0/J_4
R120 [email protected]_4
R578 *EV@10K/F_4
R593 *EV@10K/F_4
R502*EV-D@10K/F_4
R579 EV@10K/F_4
R53*[email protected]/F_4
R786 *EV@0_4
TP64
Q13*EV@2N7002K
3
2
1
R513 EV@10K/F_4
R101
*EV@10K/F_4
R194 EV@0/J_4
R594 *EV@10K/F_4
R86EV-D@15K/F_4
R121 [email protected]_4
R118 [email protected]_4
Q14EV@2N7002K
3
2
1
R501 [email protected]/F_4
R64*EV-D@15K/F_4
TP66
TP65
R61*[email protected]/F_4
R80*[email protected]/F_4
TP63
R72EV-D@10K/F_4
[MISC2_ROM]
[MISC_GPIO/I2C/JTAG/THER]
[MIOB]
[MIOA]
U35E
EV@N14P_GV2
GPIO0P6
GPIO1M3
GPIO2L6
GPIO3P5
GPIO4P7
GPIO5L7
GPIO6M7
GPIO7N8
GPIO8M1
GPIO9M2
GPIO10L1
GPIO11M5
GPIO12N3
GPIO13M4
GPIO14N4
GPIO15P2
GPIO16R8
GPIO17M6
GPIO18R1
GPIO19P3
GPIO20P4
GPIO21P1
ROM_SCLKH4
ROM_CS_NH6
ROM_SIH5
ROM_SOH7
BUFRST_NL2
CECL3
STRAP0J2
STRAP1J7
STRAP2J6
JTAG_TCKAM10
JTAG_TMSAP11
JTAG_TDIAM11
JTAG_TDOAP12
JTAG_TRST_NAN11
I2CB_SCLR7
I2CB_SDAR6
I2CS_SCLT4
I2CS_SDAT3
THERMDPK4
THERMDNK3
I2CC_SCLR2
I2CC_SDAR3
STRAP3J5
STRAP4J3
MULTISTRAP_REF_GNDJ1
Q18
EV@2N7002DW
6
2
1
5
43
R119 [email protected]_4
U14
*EV@MC74VHC1G08DFT2G
2
14
35
R127 EV@0/J_4
R69*EV-D@10K/F_4
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
0814 POWER GD connect to EC
for meet Power down sequencefor +3V_GFX
4.7uF x 15 population x10
Power request ESR
0.1uF x 8 population x 4
0816 GC6 need system 3V to control FBVDDQ
PU at page 43
47u x1 22u x7stuff x 1
4.7u x6stuff x 5
330u x1RSVD by DG
0817 RSVD more NVVDD caps by NV DG
20LAYOUT NOTES:UNDAER: WITHIN 150MILSNEAR: WITHIN 1378MILS
PLACE UNDER GPU BALLS
PLACE NEAR TO GPU BALLS
PLACE UNDER GPU BALLS
20120911: D6002 no stuff when GC6 support.
20120914: H/W Add for HWPG_1.5VGFX20121018: Circuit combination
DGPU_POK2
DGPU_PGOK-1
VGPU_PWRGD_R
VGPU_PWRGD
DGPU_POK_Q
HWPG_1.5VGFX
DGPU_POK4
DGPU_POK_Q
HWPG_1.5VGFX
1.05V_GFX_EN [42]
EC_FB_CLAMP [17,19,34]
VGPU_PWRGD [43]FBVDDQ_EN[42]
DGPU_VRON [10,43]
DGPU_PWROK [10]
+VGPU_CORE
+VGPU_CORE
+VGPU_CORE
+VGPU_CORE
+VGPU_CORE
+1.05V_GFX
+1.5V_GFX
+VGPU_CORE
+3V_GFX
+3V
+VGPU_CORE
+3V
+3V
+3V_GFX
+VGPU_CORE
+3V_GFX+3V
+1.5V_GFX
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DGPU 5/5 (Power/Ground) 1A
20 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DGPU 5/5 (Power/Ground) 1A
20 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DGPU 5/5 (Power/Ground) 1A
20 46Monday, January 07, 2013
ZQK
C88
[email protected]/6.3V_6
[GPU VDD]
U35F
EV@N14P_GV2
VDD_057V17
VDD_058V18
VDD_059V20
VDD_060V22
VDD_061W12
VDD_062W14
VDD_063W16
VDD_064W19
VDD_065W21
VDD_066W23
VDD_067Y13
VDD_068Y15
VDD_069Y18
VDD_071Y20
VDD_072Y22
VDD_001AA12
VDD_002AA14
VDD_003AA16
VDD_004AA19
VDD_005AA21
VDD_006AA23
VDD_007AB13
VDD_008AB15
VDD_009AB17
VDD_010AB18
VDD_011AB20
VDD_012AB22
VDD_013AC12
VDD_014AC14
VDD_015AC16
VDD_016AC19
VDD_017AC21
VDD_018AC23
VDD_019M12
VDD_020M14
VDD_021M16
VDD_022M19
VDD_023M21
VDD_024M23
VDD_025N13
VDD_026N15
VDD_027N17
VDD_028N18
VDD_029N20
VDD_030N22
VDD_031P12
VDD_032P14
VDD_033P16
VDD_034P19
VDD_035P21
VDD_036P23
VDD_037R13
VDD_038R15
VDD_039R17
VDD_040R18
VDD_041R20
VDD_042R22
VDD_043T12
VDD_044T14
VDD_045T16
VDD_046T19
VDD_047T21
VDD_048T23
VDD_049U13
VDD_050U15
VDD_051U17
VDD_052U18
VDD_053U20
VDD_054U22
VDD_055V13
VDD_056V15
XVDD_001U1
XVDD_002U2
XVDD_003U3
XVDD_004U4
XVDD_005U5
XVDD_006U6
XVDD_007U7
XVDD_008U8
XVDD_009V1
XVDD_010V2
XVDD_011V3
XVDD_012V4
XVDD_013V5
XVDD_014V6
XVDD_015V7
XVDD_016V8
XVDD_017W2
XVDD_018W3
XVDD_019W4
XVDD_020W5
XVDD_021W7
XVDD_022W8
XVDD_023Y1
XVDD_024Y2
XVDD_025Y3
XVDD_026Y4
XVDD_027Y5
XVDD_028Y6
XVDD_029Y7
XVDD_030Y8
XVDD_031AA1
XVDD_032AA2
XVDD_033AA3
XVDD_034AA4
XVDD_035AA5
XVDD_036AA6
XVDD_037AA7
XVDD_038AA8
VDD_070Y17
C69
[email protected]/6.3V_6
C128
EV@47u/6.3V_8
C592
*EV@22u/6.3V_8
R147EV@100K/F_4
C97 *[email protected]/10V_4
C82
[email protected]/6.3V_6
C123EV@1000P/50V_4
C124
*EV@22u/6.3V_8
U11 EV@74AHC1G32GW
2
1
5
4
3
R87 *EV@0_4
Q5EV@DTC144EUA1
3
2
C71
[email protected]/10V_4
C73
*EV@22u/6.3V_8
C91 [email protected]/10V_4
C175*EV@1000P/50V_4
R49EV@100K/F_4
C599
EV@22u/6.3V_8
C108 [email protected]/10V_4
C122
*[email protected]/6.3V_6
C92
*EV@22u/6.3V_8
C103
[email protected]/6.3V_6
R82 EV@0/J_4
C102
[email protected]/6.3V_6
C121
*[email protected]/6.3V_6
C83
[email protected]/6.3V_6
U12 EV@MC74VHC1G08DFT2G
2
14
35
C133
*[email protected]/6.3V_6
C100
[email protected]/6.3V_6
+
C596EV@330u/2V_7343
C101
*[email protected]/6.3V_6
C111
[email protected]/25V_8
C117
[email protected]/6.3V_6
C588
[email protected]/25V_8
Q19EV@MMBT3904-7-F
2
13
C112
[email protected]/25V_8
C597
[email protected]/25V_8
C107 *[email protected]/10V_4C115 *[email protected]/10V_4
R176*EV@0_4 Q15
EV@DTC144EUA
13
2
Q20EV@MMBT3904-7-F
2
13
C116 *[email protected]/10V_4
C132
[email protected]/25V_8
[GPU GND]
U35G
EV@N14P_GV2
GND_97C22
GND_98C25
GND_99C28
GND_100C7
GND_101D2
GND_102D31
GND_103D33
GND_104E10
GND_105E22
GND_106E25
GND_107E5
GND_108E7
GND_109F28
GND_110F7
GND_111G10
GND_112G13
GND_113G16
GND_114G19
GND_115G2
GND_116G22
GND_117G25
GND_118G28
GND_119G3
GND_120G30
GND_121G32
GND_122G33
GND_123G5
GND_124G7
GND_125K2
GND_126K28
GND_127K30
GND_128K32
GND_129K33
GND_130K5
GND_131K7
GND_132M13
GND_133M15
GND_134M17
GND_135M18
GND_136M20
GND_137M22
GND_138N12
GND_139N14
GND_140N16
GND_141N19
GND_142N2
GND_143N21
GND_144N23
GND_145N28
GND_146N30
GND_147N32
GND_148N33
GND_149N5
GND_150N7
GND_151P13
GND_152P15
GND_153P17
GND_154P18
GND_155P20
GND_156P22
GND_157R12
GND_158R14
GND_159R16
GND_160R19
GND_161R21
GND_162R23
GND_163T13
GND_164T15
GND_165T17
GND_166T18
GND_167T2
GND_168T20
GND_169T22
GND_170AG11
GND_171T28
GND_172T32
GND_173T5
GND_174T7
GND_175U12
GND_176U14
GND_177U16
GND_178U19
GND_179U21
GND_180U23
GND_181V12
GND_182V14
GND_183V16
GND_184V19
GND_185V21
GND_186V23
GND_187W13
GND_188W15
GND_189W17
GND_190W18
GND_191W20
GND_192W22
GND_1A2
GND_2AA17
GND_3AA18
GND_4AA20
GND_5AA22
GND_6AB12
GND_7AB14
GND_8AB16
GND_9AB19
GND_10AB2
GND_11AB21
GND_12A33
GND_13AB23
GND_14AB28
GND_15AB30
GND_16AB32
GND_17AB5
GND_18AB7
GND_19AC13
GND_20AC15
GND_21AC17
GND_22AC18
GND_23AA13
GND_24AC20
GND_25AC22
GND_26AE2
GND_27AE28
GND_28AE30
GND_29AE32
GND_30AE33
GND_31AE5
GND_32AE7
GND_33AH10
GND_34AA15
GND_35AH13
GND_36AH16
GND_37AH19
GND_38AH2
GND_39AH22
GND_40AH24
GND_41AH28
GND_42AH29
GND_43AH30
GND_44AH32
GND_45AH33
GND_46AH5
GND_47AH7
GND_48AJ7
GND_49AK10
GND_50AK7
GND_51AL12
GND_52AL14
GND_53AL15
GND_54AL17
GND_55AL18
GND_56AL2
GND_57AL20
GND_58AL21
GND_59AL23
GND_60AL24
GND_61AL26
GND_62AL28
GND_63AL30
GND_64AL32
GND_65AL33
GND_66AL5
GND_67AM13
GND_68AM16
GND_69AM19
GND_70AM22
GND_71AM25
GND_72AN1
GND_73AN10
GND_74AN13
GND_75AN16
GND_76AN19
GND_77AN22
GND_78AN25
GND_79AN30
GND_80AN34
GND_81AN4
GND_82AN7
GND_83AP2
GND_84AP33
GND_85B1
GND_86B10
GND_87B22
GND_88B25
GND_89B28
GND_90B31
GND_91B34
GND_92B4
GND_93B7
GND_94C10
GND_95C13
GND_96C19
GND_194Y12
GND_195Y14
GND_196Y16
GND_197Y19
GND_198Y21
GND_199Y23
GND_200AH11
GND_193W28
GND_OPT_1C16
GND_OPT_2W32
C127
*[email protected]/25V_8
R83EV@100K/F_4
C129
[email protected]/6.3V_6
D3 EV@RB500V-40
C74
*EV@22u/6.3V_8
C98 [email protected]/10V_4
C104
[email protected]/6.3V_6
C70 *[email protected]/10V_4
D2 *EV@RB500V-40
C146*EV@1000P/50V_4
+C617
EV@330u/2.5V_3528
R103 *EV@0_4
C49EV@1000p/50V_4
C90 [email protected]/10V_4
C87*[email protected]/10V_4
C113
*[email protected]/6.3V_6
C93
*EV@22u/6.3V_8
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Fermi : Change to 160 ohm1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402) Fermi : Change to 160 ohm
1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)
Should be 240Ohms +-1%
CHANNEL A: 1024MB DDR3
Should be 240Ohms +-1%
Should be 240Ohms +-1%
Should be 240Ohms +-1%
10/14 modify
Micron 900MHz 2G AKD5LZWTW02 21
VMA_ZQ2 VMA_ZQ3
FBA_CMD3
VMA_ZQ4
FBA_CMD10
VMA_RDQS1
FBA_CMD13
FBA_CMD30
VMA_CLK0VMA_CLK0#
FBA_CMD29
FBA_CMD8
FBA_CMD12
FBA_CMD0
FBA_CMD6
FBA_CMD22
FBA_CMD25
VMA_WDQS1
FBA_CMD9
VMA_CLK1#
VREFC_VMA1 VREFD_VMA1 VREFC_VMA3 VREFD_VMA3
FBA_CMD14
VMA_CLK0#
FBA_CMD17
FBA_CMD4
FBA_CMD1
VMA_CLK0
VMA_CLK1
VMA_RDQS4VMA_WDQS4
FBA_CMD11
VMA_RDQS5VMA_WDQS5
FBA_CMD21FBA_CMD7
FBA_CMD20
FBA_CMD5 FBA_CMD5
FBA_CMD27FBA_CMD26
FBA_CMD24
FBA_CMD5
VREFC_VMA1VREFD_VMA1
VREFC_VMA3VREFD_VMA3
VREFC_VMA3VREFD_VMA3
VMA_DM1VMA_DM4VMA_DM5
VMA_ZQ1
VREFC_VMA1VREFD_VMA1
FBA_CMD23
FBA_CMD2
FBA_CMD15
FBA_CMD28
VMA_WDQS2
FBA_CMD3
FBA_CMD10
FBA_CMD13
FBA_CMD30
VMA_CLK0VMA_CLK0#
FBA_CMD29
FBA_CMD8
FBA_CMD12
FBA_CMD0
FBA_CMD6
VMA_RDQS2
FBA_CMD22
FBA_CMD25
FBA_CMD9
FBA_CMD14FBA_CMD4
FBA_CMD11
FBA_CMD21FBA_CMD7
FBA_CMD20
FBA_CMD27FBA_CMD26
FBA_CMD24
FBA_CMD5
VMA_DM2
FBA_CMD23
FBA_CMD2
FBA_CMD15
FBA_CMD28
FBA_CMD19
FBA_CMD10
FBA_CMD13
FBA_CMD30
VMA_CLK1VMA_CLK1#
FBA_CMD29
FBA_CMD8
FBA_CMD12
FBA_CMD16
FBA_CMD6
FBA_CMD22
FBA_CMD25
FBA_CMD9
FBA_CMD14FBA_CMD4
FBA_CMD11
FBA_CMD21FBA_CMD7
FBA_CMD20
FBA_CMD27FBA_CMD26
FBA_CMD24
FBA_CMD23
FBA_CMD18
FBA_CMD15
FBA_CMD28
FBA_CMD19
FBA_CMD10
FBA_CMD13
FBA_CMD30
VMA_CLK1VMA_CLK1#
FBA_CMD29
FBA_CMD8
FBA_CMD12
FBA_CMD16
FBA_CMD6
FBA_CMD22
FBA_CMD25
FBA_CMD9
FBA_CMD14FBA_CMD4
FBA_CMD21FBA_CMD7
FBA_CMD20
FBA_CMD11
FBA_CMD27FBA_CMD26
FBA_CMD24
FBA_CMD23
FBA_CMD18
FBA_CMD15
FBA_CMD28
VMA_DM3VMA_DM0
VMA_WDQS3VMA_RDQS3
VMA_RDQS0VMA_WDQS0
VMA_DQ10
VMA_DQ0VMA_DQ6
VMA_DQ1
VMA_DQ15
VMA_DQ8
VMA_DQ9
VMA_DQ4
VMA_DQ5
VMA_DQ14
VMA_DQ12
VMA_DQ7
VMA_DQ3
VMA_DQ11
VMA_DQ2
VMA_DQ13
VMA_DQ22VMA_DQ17
VMA_DQ16
VMA_DQ24
VMA_DQ31VMA_DQ27
VMA_DQ26
VMA_DQ29
VMA_DQ28
VMA_DQ30
VMA_DQ25
VMA_DQ18
VMA_DQ20
VMA_DQ19
VMA_DQ23
VMA_DQ21
VMA_DQ40
VMA_DQ32
VMA_DQ38VMA_DQ35
VMA_DQ42
VMA_DQ43
VMA_DQ47
VMA_DQ36
VMA_DQ39
VMA_DQ44
VMA_DQ37
VMA_DQ45
VMA_DQ34
VMA_DQ46
VMA_DQ41
VMA_DQ33
VMA_DQ60VMA_DQ57
VMA_DQ63
VMA_DQ62
VMA_DQ61
VMA_DQ58
VMA_DQ59
VMA_DQ48
VMA_DQ53
VMA_DQ55VMA_DQ49
VMA_DQ52
VMA_DQ54
VMA_DQ50
VMA_DQ56
VMA_DQ51
VMA_RDQS7VMA_WDQS7
VMA_RDQS6VMA_WDQS6
VMA_DM7VMA_DM6
VMA_DM[7..0][17]VMA_WDQS[7..0][17]
VMA_DQ[63..0][17]
VMA_RDQS[7..0][17]
FBA_CMD17[17]
FBA_CMD1[17]
VMA_CLK1[17]VMA_CLK1#[17]
VMA_CLK0[17]VMA_CLK0#[17]
FBA_CMD0[17]FBA_CMD2[17]
FBA_CMD3[17]
FBA_CMD4[17]
FBA_CMD5[17]
FBA_CMD6[17]
FBA_CMD7[17]
FBA_CMD8[17]
FBA_CMD9[17]
FBA_CMD10[17]
FBA_CMD11[17]
FBA_CMD12[17]
FBA_CMD13[17]
FBA_CMD14[17]
FBA_CMD15[17]
FBA_CMD16[17]FBA_CMD18[17]
FBA_CMD19[17]
FBA_CMD20[17]
FBA_CMD21[17]
FBA_CMD22[17]
FBA_CMD23[17]
FBA_CMD24[17]
FBA_CMD25[17]
FBA_CMD26[17]FBA_CMD27[17]
FBA_CMD28[17]
FBA_CMD29[17]
FBA_CMD30[17]
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX+1.5V_GFX
+1.5V_GFX
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
NN13P-LP DDR3 VRAM 1/2 1A
Monday, January 07, 2013
ZQK
4621
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
NN13P-LP DDR3 VRAM 1/2 1A
Monday, January 07, 2013
ZQK
4621
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
NN13P-LP DDR3 VRAM 1/2 1A
Monday, January 07, 2013
ZQK
4621
96-BALLSDRAM DDR3
VRAM2
EV@VRAM _DDR3
WEL3
RASJ3
CASK3
CSL2
CKEK9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQ#D1D1
VSS#A9A9
VSS#E1E1VSS#B3B3
NC#J1J1
VDD#B2B2
VDD#D9D9
VDDQ#A1A1
VDDQ#A8A8
VDDQ#C1C1
VDDQ#C9C9
NC#L1L1
NC#J9J9
VDDQ#E9E9
ZQL8
RESETT2
DQSLF3
DMUD3 DMLE7
VSSQ#B1B1
VSSQ#B9B9
VSSQ#D8D8
VSSQ#E2E2
DQSUC7
VSSQ#E8E8
DQSLG3
VDDQ#F1F1
VSSQ#F9F9
VSSQ#G1G1
VDDQ#H2H2
VDDQ#H9H9
VSSQ#G9G9
VREFCAM8
VSS#G8G8
VDD#G7G7
ODTK1
A0N3
A1P7
VDD#K2K2
A12/BCN7
VSS#J2J2
VDD#K8K8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15M7
BA2M3
VREFDQH1
NC#L9L9
VDD#N1N1
VDD#N9N9
VDD#R1R1
VDD#R9R9
VSS#J8J8
VSS#M1M1
VSS#M9M9
VSS#P1P1
VSS#P9P9
VSS#T1T1
VSS#T9T9
VDDQ#D2D2
C232 EV@1u/10V_4
C540 EV@10u/6.3V_6
[email protected]/10V_4
C593 [email protected]/10V_4
C580 EV@1u/10V_4C550 EV@1u/10V_4
C177 EV@10u/6.3V_6
R498EV@243/F_4
96-BALLSDRAM DDR3
VRAM1
EV@VRAM _DDR3
WEL3
RASJ3
CASK3
CSL2
CKEK9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQ#D1D1
VSS#A9A9
VSS#E1E1VSS#B3B3
NC#J1J1
VDD#B2B2
VDD#D9D9
VDDQ#A1A1
VDDQ#A8A8
VDDQ#C1C1
VDDQ#C9C9
NC#L1L1
NC#J9J9
VDDQ#E9E9
ZQL8
RESETT2
DQSLF3
DMUD3 DMLE7
VSSQ#B1B1
VSSQ#B9B9
VSSQ#D8D8
VSSQ#E2E2
DQSUC7
VSSQ#E8E8
DQSLG3
VDDQ#F1F1
VSSQ#F9F9
VSSQ#G1G1
VDDQ#H2H2
VDDQ#H9H9
VSSQ#G9G9
VREFCAM8
VSS#G8G8
VDD#G7G7
ODTK1
A0N3
A1P7
VDD#K2K2
A12/BCN7
VSS#J2J2
VDD#K8K8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15M7
BA2M3
VREFDQH1
NC#L9L9
VDD#N1N1
VDD#N9N9
VDD#R1R1
VDD#R9R9
VSS#J8J8
VSS#M1M1
VSS#M9M9
VSS#P1P1
VSS#P9P9
VSS#T1T1
VSS#T9T9
VDDQ#D2D2
R48
C26 [email protected]/10V_4
C234 [email protected]/10V_4
R73EV@243/F_4
R534EV@243/F_4
R88
C25 EV@1u/10V_4
[email protected]/10V_4
C84 EV@10u/6.3V_6
C75
[email protected]/10V_4
C615 EV@1u/10V_4
C27 EV@1u/10V_4
[email protected]/10V_4
R542EV@162/F_4
C573 EV@1u/10V_4
R533EV@243/F_4
C552 [email protected]/10V_4
96-BALLSDRAM DDR3
VRAM3
EV@VRAM _DDR3
WEL3
RASJ3
CASK3
CSL2
CKEK9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQ#D1D1
VSS#A9A9
VSS#E1E1VSS#B3B3
NC#J1J1
VDD#B2B2
VDD#D9D9
VDDQ#A1A1
VDDQ#A8A8
VDDQ#C1C1
VDDQ#C9C9
NC#L1L1
NC#J9J9
VDDQ#E9E9
ZQL8
RESETT2
DQSLF3
DMUD3 DMLE7
VSSQ#B1B1
VSSQ#B9B9
VSSQ#D8D8
VSSQ#E2E2
DQSUC7
VSSQ#E8E8
DQSLG3
VDDQ#F1F1
VSSQ#F9F9
VSSQ#G1G1
VDDQ#H2H2
VDDQ#H9H9
VSSQ#G9G9
VREFCAM8
VSS#G8G8
VDD#G7G7
ODTK1
A0N3
A1P7
VDD#K2K2
A12/BCN7
VSS#J2J2
VDD#K8K8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15M7
BA2M3
VREFDQH1
NC#L9L9
VDD#N1N1
VDD#N9N9
VDD#R1R1
VDD#R9R9
VSS#J8J8
VSS#M1M1
VSS#M9M9
VSS#P1P1
VSS#P9P9
VSS#T1T1
VSS#T9T9
VDDQ#D2D2
C547 [email protected]/10V_4
R160
C233 EV@1u/10V_4
C533 EV@10u/6.3V_6
C541 EV@1u/10V_4
C542 EV@1u/10V_4
TP11
C21 [email protected]/10V_4
TP6
R175
C614 EV@1u/10V_4
R489EV@162/F_4
C170 EV@1u/10V_4
C572 EV@10u/6.3V_6C231 EV@10u/6.3V_6
C575 [email protected]/10V_4C29 EV@1u/10V_4 C577 [email protected]/10V_4
C613 EV@1u/10V_4
96-BALLSDRAM DDR3
VRAM4
EV@VRAM _DDR3
WEL3
RASJ3
CASK3
CSL2
CKEK9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQ#D1D1
VSS#A9A9
VSS#E1E1VSS#B3B3
NC#J1J1
VDD#B2B2
VDD#D9D9
VDDQ#A1A1
VDDQ#A8A8
VDDQ#C1C1
VDDQ#C9C9
NC#L1L1
NC#J9J9
VDDQ#E9E9
ZQL8
RESETT2
DQSLF3
DMUD3 DMLE7
VSSQ#B1B1
VSSQ#B9B9
VSSQ#D8D8
VSSQ#E2E2
DQSUC7
VSSQ#E8E8
DQSLG3
VDDQ#F1F1
VSSQ#F9F9
VSSQ#G1G1
VDDQ#H2H2
VDDQ#H9H9
VSSQ#G9G9
VREFCAM8
VSS#G8G8
VDD#G7G7
ODTK1
A0N3
A1P7
VDD#K2K2
A12/BCN7
VSS#J2J2
VDD#K8K8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15M7
BA2M3
VREFDQH1
NC#L9L9
VDD#N1N1
VDD#N9N9
VDD#R1R1
VDD#R9R9
VSS#J8J8
VSS#M1M1
VSS#M9M9
VSS#P1P1
VSS#P9P9
VSS#T1T1
VSS#T9T9
VDDQ#D2D2
C556 EV@1u/10V_4C24 EV@1u/10V_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Should be 240Ohms +-1%
Fermi : Change to 160 ohm1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)
Should be 240Ohms +-1%
CHANNEL B: 1024MB DDR3
Should be 240Ohms +-1%
Should be 240Ohms +-1%
Fermi : Change to 160 ohm1 : CS11602JB00 ,RES CHIP 160 1/16W +-5%(0402)2 : CS11622FB07 ,RES CHIP 162 1/16W +-1%(0402)
HYNIX 900MHz 1G AKD5LZWTW02HYNIX 900MHz 2G AKD5MGWTW16 22
1107：：：：Reserve 330uF for 8VRAM power routing
FBC_CMD5
VMC_DM4VMC_DM5
VMC_ZQ3 VMC_ZQ4
VMC_RDQS5
VMC_RDQS4
VMC_WDQS5
VMC_WDQS4
VREFC_VMC3VREFD_VMC3
VREFC_VMC3VREFD_VMC3
FBC_CMD5
VMC_CLK0#VREFC_VMC3 VREFD_VMC3
FBC_CMD17
VMC_CLK1#
FBC_CMD5
VMC_ZQ1 VMC_ZQ2
VMC_RDQS0VMC_WDQS0
VMC_DM0
VMC_RDQS1VMC_WDQS1
FBC_CMD1
VREFC_VMC1VREFD_VMC1
VMC_DM1
VREFC_VMC1VREFD_VMC1
VMC_CLK1VMC_CLK0
VREFC_VMC1 VREFD_VMC1
FBC_CMD3
FBC_CMD10
FBC_CMD13
FBC_CMD30
VMC_CLK0VMC_CLK0#
FBC_CMD29
FBC_CMD8
FBC_CMD12
FBC_CMD0
FBC_CMD6
FBC_CMD22
FBC_CMD25
FBC_CMD9
FBC_CMD14FBC_CMD4
FBC_CMD11
FBC_CMD21FBC_CMD7
FBC_CMD20
FBC_CMD27FBC_CMD26
FBC_CMD24
FBC_CMD23
FBC_CMD2
FBC_CMD15
FBC_CMD28
FBC_CMD19
FBC_CMD13
FBC_CMD30
VMC_CLK1VMC_CLK1#
FBC_CMD16FBC_CMD18
FBC_CMD15
FBC_CMD5
FBC_CMD3
FBC_CMD10
FBC_CMD13
FBC_CMD30
VMC_CLK0VMC_CLK0#
FBC_CMD29
FBC_CMD8
FBC_CMD12
FBC_CMD0
FBC_CMD6
FBC_CMD22
FBC_CMD25
FBC_CMD9
FBC_CMD14FBC_CMD4
FBC_CMD11
FBC_CMD21FBC_CMD7
FBC_CMD20
FBC_CMD27FBC_CMD26
FBC_CMD24
FBC_CMD23
FBC_CMD2
FBC_CMD15
FBC_CMD28
FBC_CMD10
FBC_CMD29
FBC_CMD8
FBC_CMD12
FBC_CMD6
FBC_CMD22
FBC_CMD25
FBC_CMD9
FBC_CMD14FBC_CMD4
FBC_CMD11
FBC_CMD21FBC_CMD7
FBC_CMD20
FBC_CMD27FBC_CMD26
FBC_CMD24
FBC_CMD23FBC_CMD28
FBC_CMD10
FBC_CMD29
FBC_CMD8
FBC_CMD12
FBC_CMD6
FBC_CMD22
FBC_CMD25
FBC_CMD9
FBC_CMD14FBC_CMD4
FBC_CMD11
FBC_CMD21FBC_CMD7
FBC_CMD20
FBC_CMD27FBC_CMD26
FBC_CMD24
FBC_CMD23FBC_CMD28
FBC_CMD19
FBC_CMD13
FBC_CMD30
VMC_CLK1VMC_CLK1#
FBC_CMD16FBC_CMD18
FBC_CMD15
VMC_DQ2
VMC_DQ10
VMC_DQ7
VMC_DQ9
VMC_DQ4
VMC_DQ15
VMC_DQ12VMC_DQ8
VMC_DQ0
VMC_DQ1
VMC_DQ13
VMC_DQ14
VMC_DQ6
VMC_DQ3
VMC_DQ5
VMC_DQ11
VMC_DQ30
VMC_DQ17
VMC_DQ29
VMC_DQ19VMC_DQ21
VMC_DQ24
VMC_DQ22
VMC_DQ27
VMC_DQ18
VMC_DQ31
VMC_DQ28
VMC_DQ16VMC_DQ20
VMC_DQ25
VMC_DQ26
VMC_DQ23
VMC_DQ32
VMC_DQ42
VMC_DQ44
VMC_DQ38
VMC_DQ47VMC_DQ43
VMC_DQ40
VMC_DQ36
VMC_DQ33
VMC_DQ35
VMC_DQ45
VMC_DQ34VMC_DQ37
VMC_DQ46
VMC_DQ41
VMC_DQ39
VMC_DQ56
VMC_DQ63
VMC_DQ52
VMC_DQ53
VMC_DQ58
VMC_DQ51VMC_DQ54VMC_DQ50
VMC_DQ49
VMC_DQ57
VMC_DQ55
VMC_DQ48
VMC_DQ60
VMC_DQ61VMC_DQ59VMC_DQ62
VMC_WDQS2VMC_RDQS2
VMC_RDQS3VMC_WDQS3
VMC_DM3VMC_DM2
VMC_RDQS6VMC_WDQS6
VMC_WDQS7VMC_RDQS7
VMC_DM7VMC_DM6
FBC_CMD17[17]
FBC_CMD1[17]
VMC_DQ[63..0][17]VMC_DM[7..0][17]
VMC_WDQS[7..0][17]VMC_RDQS[7..0][17]
FBC_CMD28[17]
FBC_CMD4[17]
FBC_CMD12[17]
FBC_CMD21[17]
FBC_CMD29[17]
FBC_CMD13[17]
FBC_CMD22[17]
FBC_CMD30[17]
FBC_CMD6[17]
FBC_CMD14[17]
FBC_CMD23[17]
FBC_CMD7[17]
FBC_CMD15[17]
FBC_CMD24[17]
FBC_CMD8[17]
VMC_CLK0[17]VMC_CLK0#[17]
FBC_CMD25[17]
FBC_CMD0[17]
FBC_CMD9[17]
FBC_CMD26[17]
FBC_CMD2[17]
FBC_CMD10[17]
FBC_CMD27[17]
FBC_CMD3[17]
FBC_CMD11[17]
FBC_CMD20[17]
VMC_CLK1[17]VMC_CLK1#[17]
FBC_CMD16[17]FBC_CMD18[17]
FBC_CMD19[17]
FBC_CMD5[17]
+1.5V_GFX+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5VSUS
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
N13P-LP DDR3 VRAM 2/2 1A
Monday, January 07, 2013
ZQK
4522
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
N13P-LP DDR3 VRAM 2/2 1A
Monday, January 07, 2013
ZQK
4522
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
N13P-LP DDR3 VRAM 2/2 1A
Monday, January 07, 2013
ZQK
4522
[email protected]/10V_4
R18EV@162/F_4
+
C840 *EV@330u/2.5V_3528
R588
96-BALLSDRAM DDR3
VRAM8
EV@VRAM _DDR3
WEL3
RASJ3
CASK3
CSL2
CKEK9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQ#D1D1
VSS#A9A9
VSS#E1E1VSS#B3B3
NC#J1J1
VDD#B2B2
VDD#D9D9
VDDQ#A1A1
VDDQ#A8A8
VDDQ#C1C1
VDDQ#C9C9
NC#L1L1
NC#J9J9
VDDQ#E9E9
ZQL8
RESETT2
DQSLF3
DMUD3 DMLE7
VSSQ#B1B1
VSSQ#B9B9
VSSQ#D8D8
VSSQ#E2E2
DQSUC7
VSSQ#E8E8
DQSLG3
VDDQ#F1F1
VSSQ#F9F9
VSSQ#G1G1
VDDQ#H2H2
VDDQ#H9H9
VSSQ#G9G9
VREFCAM8
VSS#G8G8
VDD#G7G7
ODTK1
A0N3
A1P7
VDD#K2K2
A12/BCN7
VSS#J2J2
VDD#K8K8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15M7
BA2M3
VREFDQH1
NC#L9L9
VDD#N1N1
VDD#N9N9
VDD#R1R1
VDD#R9R9
VSS#J8J8
VSS#M1M1
VSS#M9M9
VSS#P1P1
VSS#P9P9
VSS#T1T1
VSS#T9T9
VDDQ#D2D2
R451
C229 [email protected]/10V_4
C839 EV@1u/10V_4
C831 [email protected]/10V_4C795 EV@1u/10V_4
C486 [email protected]/10V_4
C836 [email protected]/10V_4
C472 EV@1u/10V_4C832 [email protected]/10V_4
[email protected]/10V_4
C56 EV@1u/10V_4
C835 EV@1u/10V_4
R31
96-BALLSDRAM DDR3
VRAM6
EV@VRAM _DDR3
WEL3
RASJ3
CASK3
CSL2
CKEK9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQ#D1D1
VSS#A9A9
VSS#E1E1VSS#B3B3
NC#J1J1
VDD#B2B2
VDD#D9D9
VDDQ#A1A1
VDDQ#A8A8
VDDQ#C1C1
VDDQ#C9C9
NC#L1L1
NC#J9J9
VDDQ#E9E9
ZQL8
RESETT2
DQSLF3
DMUD3 DMLE7
VSSQ#B1B1
VSSQ#B9B9
VSSQ#D8D8
VSSQ#E2E2
DQSUC7
VSSQ#E8E8
DQSLG3
VDDQ#F1F1
VSSQ#F9F9
VSSQ#G1G1
VDDQ#H2H2
VDDQ#H9H9
VSSQ#G9G9
VREFCAM8
VSS#G8G8
VDD#G7G7
ODTK1
A0N3
A1P7
VDD#K2K2
A12/BCN7
VSS#J2J2
VDD#K8K8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15M7
BA2M3
VREFDQH1
NC#L9L9
VDD#N1N1
VDD#N9N9
VDD#R1R1
VDD#R9R9
VSS#J8J8
VSS#M1M1
VSS#M9M9
VSS#P1P1
VSS#P9P9
VSS#T1T1
VSS#T9T9
VDDQ#D2D2
R332
R94EV@243/F_4
C19 EV@10u/6.3V_6
[email protected]/10V_4
[email protected]/10V_4
C62 EV@1u/10V_4
R598EV@243/F_4
C817 EV@1u/10V_4
R446EV@243/F_4
C827 EV@1u/10V_4
C22 EV@1u/10V_4
C471 EV@1u/10V_4
C826 EV@1u/10V_4
C319 EV@1u/10V_4
TP113
C838 EV@1u/10V_4
C837 [email protected]/10V_4C833 EV@1u/10V_4
R245EV@162/F_4
96-BALLSDRAM DDR3
VRAM5
EV@VRAM _DDR3
WEL3
RASJ3
CASK3
CSL2
CKEK9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQ#D1D1
VSS#A9A9
VSS#E1E1VSS#B3B3
NC#J1J1
VDD#B2B2
VDD#D9D9
VDDQ#A1A1
VDDQ#A8A8
VDDQ#C1C1
VDDQ#C9C9
NC#L1L1
NC#J9J9
VDDQ#E9E9
ZQL8
RESETT2
DQSLF3
DMUD3 DMLE7
VSSQ#B1B1
VSSQ#B9B9
VSSQ#D8D8
VSSQ#E2E2
DQSUC7
VSSQ#E8E8
DQSLG3
VDDQ#F1F1
VSSQ#F9F9
VSSQ#G1G1
VDDQ#H2H2
VDDQ#H9H9
VSSQ#G9G9
VREFCAM8
VSS#G8G8
VDD#G7G7
ODTK1
A0N3
A1P7
VDD#K2K2
A12/BCN7
VSS#J2J2
VDD#K8K8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15M7
BA2M3
VREFDQH1
NC#L9L9
VDD#N1N1
VDD#N9N9
VDD#R1R1
VDD#R9R9
VSS#J8J8
VSS#M1M1
VSS#M9M9
VSS#P1P1
VSS#P9P9
VSS#T1T1
VSS#T9T9
VDDQ#D2D2
R641EV@243/F_4
C830 EV@1u/10V_4
C825 EV@10u/6.3V_6
C819 [email protected]/10V_4
C487 EV@1u/10V_4
C230 [email protected]/10V_4
96-BALLSDRAM DDR3
VRAM7
EV@VRAM _DDR3
WEL3
RASJ3
CASK3
CSL2
CKEK9
CKJ7
CKK7
DQSUB7
BA0M2
BA1N8
A2P3
A3N2
A4P8
A5P2
A6R8
A7R2
A8T8
A9R3
A10/APL7
A11R7
DQL0E3
DQL1F7
DQL2F2
DQL3F8
DQL4H3
DQL5H8
DQL6G2
DQL7H7
VSSQ#D1D1
VSS#A9A9
VSS#E1E1VSS#B3B3
NC#J1J1
VDD#B2B2
VDD#D9D9
VDDQ#A1A1
VDDQ#A8A8
VDDQ#C1C1
VDDQ#C9C9
NC#L1L1
NC#J9J9
VDDQ#E9E9
ZQL8
RESETT2
DQSLF3
DMUD3 DMLE7
VSSQ#B1B1
VSSQ#B9B9
VSSQ#D8D8
VSSQ#E2E2
DQSUC7
VSSQ#E8E8
DQSLG3
VDDQ#F1F1
VSSQ#F9F9
VSSQ#G1G1
VDDQ#H2H2
VDDQ#H9H9
VSSQ#G9G9
VREFCAM8
VSS#G8G8
VDD#G7G7
ODTK1
A0N3
A1P7
VDD#K2K2
A12/BCN7
VSS#J2J2
VDD#K8K8
DQU1C3
DQU2C8
DQU3C2
DQU4A7
DQU5A2
DQU6B8
DQU7A3
DQU0D7
A13T3
A14T7
A15M7
BA2M3
VREFDQH1
NC#L9L9
VDD#N1N1
VDD#N9N9
VDD#R1R1
VDD#R9R9
VSS#J8J8
VSS#M1M1
VSS#M9M9
VSS#P1P1
VSS#P9P9
VSS#T1T1
VSS#T9T9
VDDQ#D2D2
TP110
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Close to DP connector
DP_CAD
Low
High
DP signal (AC couple)
TMDS signal (DC couple)
Behavior
Layout Notes:Place decoupling CAPs close to Connector
23mini DP ML (DPP)
ESD Protect (EMC)
MINI DP connector (DPP)
mDP AUX (DPP)
500mA (Max.)30mil
Layout Notes:Place near Pin13 and Pin14
Connect to SS_SEL_IN(pin7)Connect to HS_SEL_IN(pin12)
SEL/OE# polarity Control
20121018：：：：Follow Intel DG to exchange pin1/6 of Q41
DP HPD (DPP)
net name change to DP_HPD_C
INT_DPTX1PINT_DPTX1NINT_DPTX1N
INT_DPTX1P
CONFIG_1CNNINT_DPTX0P_R
INT_DPTX0N_R
DP_AUXP
DP_AUXN
INT_DPTX1N_R
INT_DPTX1P_R
INT_DPTX3N
INT_DPTX3P
INT_DPTX2N
INT_DPTX2P
DP_HPD
CONFIG_2CNN
DP_AUXN
INT_DP_AUXDN_C
DP_AUX_EN
FCH_USB2_P0_RFCH_USB2_N0_R
DP_TXN3_CDP_TXP3_C
DP_TXN2_CDP_TXP2_C
INT_DPTX2NINT_DPTX2P
INT_DPTX3PINT_DPTX3N
CONFIG_1CNNCONFIG_2CNN
DP_AUXNDP_AUXN_R
USB2_SEL
USB2_SEL
USB30_TX3-_CUSB30_TX3+_C
CONFIG_1P
USB3_MUX_DISUSB2_MUX_DIS
Dongle_POWEREN#CONFIG_PU
CONFIG_1PCONFIG_2P
LB_PWR_RTN
LB_CHARGE_OFFLB_CHG_DELAY1#
USB3_SEL
USB3_SEL
CONFIG_PU
CONFIG_PU
USB2_MUX_DIS
USB3_MUX_DIS
INT_DPTX0N_RINT_DPTX0P_R
INT_DPTX1P_RINT_DPTX1N_R
INT_DPTX0NINT_DPTX0P
INT_DPTX1P
INT_DPTX0NINT_DPTX0P INT_DPTX0P
INT_DPTX0N
DP_HPD_OUT
CONFIG_2P
INT_DP_AUXDP_C
DP_AUX_EN
CONFIG_1P
Dongle_POWEREN#
LB_PWR_RTN
DP_AUXP
DP_DDI_EN
Dongle_POWEREN#
LB_CHARGE_OFF
LB_PWR_RTN_M
LB_PWR_CNN_M
LB_CHARGE_OFF
INT_DPTX1N
DP_HPD_C
SYS_COM_REQ
CONFIG_2P
CONFIG_1P
DP_AUXPDP_AUXN
DP_AUXPDP_AUXN
CONFIG_1CNNCONFIG_2CNN CONFIG_2CNN
CONFIG_1CNN
INT_DPTX2PINT_DPTX2NINT_DPTX2N
INT_DPTX2P
INT_DPTX3NINT_DPTX3P
INT_DPTX3NINT_DPTX3P
USB2_SEL
USB3_SEL
CONFIG_2CNN_C
CONFIG_1CNN_C
DP_TXP2_CDP_TXN2_C
DP_TXN3_CDP_TXP3_C
INT_DPTX2NINT_DPTX2P
INT_DPTX3N
DP_TXP2_CRDP_TXN2_CR
FCH_USB2_N0_R CONFIG_2CNN
CONFIG_1CNNFCH_USB2_P0_R
CONFIG_1CNNCONFIG_1P
DP_HPD_CDP_HPD_Q
CONFIG_2CNN
LB_PWR_RTN
INT_DPTX3PDP_TXP3_CRDP_TXN3_CR
DP_HPD
LB_PWR_CNN
DP_TXN1[7]DP_TXP1[7]
DDPC_CTRLDAT[7]
INT_DP_AUXDN[7]
INT_DP_AUXDP[7]
USBP2-[9]USBP2+[9]
DP_TXN3[7]DP_TXP3[7]
DP_TXN2[7]DP_TXP2[7]
USB30_RX3+[9]USB30_RX3-[9]
USB30_TX3-[9]USB30_TX3+[9]
DP_TXN0[7]DP_TXP0[7]
SYS_COM_REQ [8]DP_HPD_Q[7]
DDPC_CTRLCLK [7]
SMB_PCH_DAT[9,26]
SMB_PCH_CLK[9,26]
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V
+3V+3V
+5V
+3V
+5VLB_PWR_RTN
+3V
+3V
+3VLB_PWR_CNN
+5V
+5V
+3V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Mini DP 1A
23 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Mini DP 1A
23 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Mini DP 1A
23 46Monday, January 07, 2013
ZQK
R621M/F_4
R34SW@100K/J_4
12
R801 SW@2K/F_4
Q45
SW@2N7002DW
6
2
1
5
43
C816 SW@2200p/50V_4
R781 SW@10K/J_4
R773 0/J_4
C10 0.1u/10V_4
R56 SW@0/J_4
R466 NSW@0_4
[email protected]/10V_4
R479 *100K/F_4
R791SW@100K/F_4
R784 NSW@1M/J_4
U29
*RClamp0524P
11
22
GND_3/83
44
55
6677
991010
CN4
mDP
GND1
LANE0_P3
LANE0_N5
GND7
LANE1_P9
LANE1_N11
GND13
LANE2_P15
LANE2_N17
GND19
HPD2
CONFIG14
CONFIG26
GND8
LANE3_P10
LANE3_N12
GND14
AUX_CH_P16
AUX_CH_N18
DP_PWR20
SHELL121
SHELL222
SHELL323
SHELL424
R467 NSW@0_4
R66 SW@47K/J_4
[email protected]/10V_4
R55 *10K/J_4
R541SW@100K/F_4
C38SW@2200p/50V_4
C8230.1u/10V_4
Q43
2N7002DW
6
2
1
5
43
R780 SW@0/J_4
R458 NSW@0_4
Q41
2N7002DW
6
2
1
5
4 3
R785 [email protected]/J_4
Q46
SW@2N7002DW
6
2
1
5
43
R68 *10K/J_4R57 SW@0/J_4
Q39
2N7002K
3
2
1
C82410u/6.3V_6
C545 0.1u/10V_4
R782 NSW@0_4
R778 SW@0_4
Q7SW@FDMC4435BZ3
52
4
1
R49310K/F_4
[email protected]/10V_4
C815 SW@2200p/50V_4
[email protected]/10V_4
C814 SW@2200p/50V_4
R468 NSW@0_4
R4942.2K/J_4
R41SW@1M/J_4
R447 *10K/J_4
R465 NSW@0_4
R459 NSW@0_4
Q44
SW@2N7002DW
6
2
1
5
43
Q6SW@FDMC4435BZ
35
2
4
1
Q69
NSW@AP2331SA-7
OUT1
GND2IN
3C813 SW@2200p/50V_4
Q42
2N7002DW
6
2
1
5
4 3
R54 *10K/J_4
[email protected]/10V_4
R787 SW@10K/J_4
R799SW@100K/F_4
R450 *0/J_412
SS_SEL
HS_SEL
SW@(X)HD3SS2521_NB
U7
A0P2
A0N3
ADM10
ADP11
MODE_LED15
HPD_IN16
HPD_OUT17
AUX_N18
HS_SEL_OUT19
SS_SEL_OUT20
CHRG_OFF21
CHRG_DELAY22
SLEEP23
NC
024
SYS_COM_REQ25
CONFIG_1_PU26
CONFIG_2_PU27
CONFIG_228
CONFIG_129
RST30
TEST31
A1P5
A1N6
SS_SEL_IN7
HS_OE#_IN9
HS_SEL_IN12
SS_OE#_OUT34
BDP35
BDM36
CDP37
CDM38
C1N41 C1P42
C0N43 C0P44
VC
C/N
C4
VC
C13
VC
C14
VC
C40
VC
C52
VC
C/N
C1
SS_OE#_IN/NC8
HS_OE#_OUT32
GN
D33
GN
D39
B1N45 B1P46
B0N47 B0P48
NC
149
NC
250
NC
351
GN
D53
NC
454
NC
555
NC
656
PAD57
C546 0.1u/10V_4
D35SMAJ20A2
1
R793SW@100K/F_4
R790 SW@10K/J_4
R777 SW@0/J_4
C40 [email protected]/10V_4
R835 [email protected]/J_4
C544 0.1u/10V_4
R528SW@20K/J_4
R67 *10K/J_4
U2
*RClamp0524P
11
22
GND_3/83
44
55
6677
991010
R779 SW@0_4
R775 0/J_4
R490 *100K/F_4
C551 0.1u/10V_4
R774 0/J_4
R75SW@1M/J_4
R783 NSW@0_4
U1
*RClamp0524P
11
22
GND_3/83
44
55
6677
991010
C39 [email protected]/10V_4
C543 0.1u/10V_4
R800SW@2K/F_4
L34
*DLW21HN900SQ2L_C
11 44
33
22
R23 *10K/J_4
R71SW@20K/F_4
C8 0.1u/10V_4
D36SMAJ20A2
1
Q9SW@AO34093
2
1
R457 NSW@0_4
C8211u/6.3V_4
C82210u/6.3V_6
R475 100K/F_4
Q10SW@AO34093
2
1
Q12SW@ME2N7002E
3
2
1
R460 NSW@0_4
[email protected]/10V_4
R789SW@100K/F_4
R788 SW@0/J_4
C579 [email protected]/10V_4
C534SW@10u/6.3V_6
TP2
R24 *10K/J_4
L35
*DLW21HN900SQ2L_C
11 44
33
22C9 0.1u/10V_4
R805 SW@0/J_6
R49110K/F_4
R488SW@10K/F_4
TP3
R211M/J_4
R499 *SW@100K/F_4
[email protected]/10V_4
Q68SW@2N7002DW
62
1
5
43
Q49SW@FDMC4435BZ3
52
4
1
C5220.1u/10V_4
R495 2.2K/J_4
R32 [email protected]/J_4
R20 100/J_4
R42 [email protected]/J_4
R22 *10K/J_4
U37
SW@NL17SZ04DFT2G
12
4 3
5
[email protected]/10V_4
Q48SW@FDMC4435BZ3
52
4
1
R792SW@10K/J_4
Q53SW@ME2N7002E
3
2
1
R456 SW@100K/J_4
C7 0.1u/10V_4
R776 0/J_4
R476NSW@100K/F_4
U36SW@TC7SH08FU
2
14
35
C555 0.1u/10V_4
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
eDP Power (LDS) eDP (LDS)
eDP Backlight Control (LDS)
LID#,EC intrnal PU
eDP
CCD
Touch Panel
MAX 4 lane signals
eDP Brightness Control (LDS)From PCH
Layout Notes:Place decoupling CAPs close to Connector
24
Reserve for GND noise
Touch Panel interrupt signal：1016：Exchange Q59 pin 1 & 3 direction to prevent leakage
+3V+3V_S5
Inform BIOS that it is touch panel or not
1001：：：：Un-stuff 0.1uF to prevent backlightflicker issue when reduce brightness
1st: AL002821000 (BCD)2nd: AL003512000 (ANC)
EDP_HPD
LVDS_BRIGHTBL_ON
BL_ON
TP_INT
USBP8+_RUSBP8-_R
EDP_TXN0_CEDP_TXP0_C
USBP3+_RUSBP3-_R
EDP_TXN1_CEDP_TXP1_C
EDP_TXN2_CEDP_TXP2_C
EDP_TXN3_C
LCDVCC1
EDP_TXP3_C
BL#
LVDS_BRIGHT
TP_INT_PCH TP_INT
eDP_AUXP_CeDP_AUXN_C
TP_GND
LCD_VIN
LCDVCC
TP_PWR
CCD_PWRINT_LVDS_DIGON[7]
INT_LVDS_BLON[7]
EC_FPBACK# [34]
LID# [31,34]
USBP3+[9]USBP3-[9]
USBP8+[9]USBP8-[9]
EDP_TXN0[2]EDP_TXP0[2]
EDP_AUXP[2]EDP_AUXN[2]
EDP_TXP1[2]EDP_TXN1[2]
EDP_TXP2[2]EDP_TXN2[2]
EDP_TXN3[2]EDP_TXP3[2]
EDP_HPD[2]
INT_LVDS_BRIGHT[7]
BOARD_ID4[9,10]
TP_INT_PCH[10]
COLOR_ENG[34]
+3V
+3V
+3VPCU
CCD_PWR VIN
LCDVCC
TP_PWR
+3V
+3V +3V+3V_S5
VIN
LCDVCC
+5V
+3V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
eDP/CAMERA/LID 1A
24 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
eDP/CAMERA/LID 1A
24 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
eDP/CAMERA/LID 1A
24 46Monday, January 07, 2013
ZQK
CN8
CVS5402M1RA-NH
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
G_0
G_1
G_4
G_5
31323334353637383940 G
_6
R318 0/J_4
R243
100K/J_4
C248
*2.2u/6.3V_6
C275
1000p/50V_4
R583 0/J_8
R312100K/J_4
R32010K/J_4
R233 0/J_4
L19
*TPL@DLW21HN900SQ2L_C
11 44
33
22
R317*100K/J_4
R241 0/J_4
C242
*0.1u/10V_4
R311 TPL@0_6
C620
0.1u/10V_4
R316 0_6
R235 TPL@0/J_4
R295 0_6
L18
*DLW21HN900SQ2L_C
11 44
33
22
R244 0/J_4
R315 0_6
D10RB500V-40 R306 100K/J_4
R319 0/J_4
R234 TPL@0/J_4
U18
AP2821KTR-G1
OUT1
GND2
ON/OFF3
IN4
GND5
IN6
C265 0.1u/10V_4
C630
0.01u/25V_4
C276
*10p/50V_4
C262 0.1u/10V_4
C269 0.1u/10V_4
R610*TPL@10K/J_4
R309TPL@0_6
R305 100K/J_4
Q59TPL@2N7002K
3
2
1
C268 0.1u/10V_4
C260 0.1u/10V_4
R639*TPL@10K/J_4
C266 0.1u/10V_4
R794 *0/J_4
C277
TPL@1000p/50V_4
Q252N7002DW
62
1
5
43
1u/6.3V_4
C227
4.7u/25V_8
C271
C264 0.1u/10V_4
C272
1000p/50V_4
C267 0.1u/10V_4
C604
22u/6.3V_8
C263 0.1u/10V_4
R31410K/J_4
C281*0.1u/10V_4
C273
*TPL@10p/50V_4
Q24DTC144EUA1
32
C261 0.1u/10V_4
R313*100K_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HDMI DDC (HDM)
Layout Notes:Place decoupling CAPs close to Connector
HDMI Cost Reduced level shift (HDM) HDMI connector (HDM)
EMI (EMC) HDMI-detect (HDM)
25
Follow CRB 1.0 change to 2.2K
Follow CRB 1.0 change to 2.2K
INT_HDMICLK-_CINT_HDMICLK+_C
INT_HDMITX0P_CINT_HDMITX0N_C
INT_HDMITX1P_CINT_HDMITX1N_C
INT_HDMITX2N_CINT_HDMITX2P_C
INT_HDMITX0P_C
INT_HDMITX1P_C
HDMI_DDCDATA_MB
INT_HDMITX2P_C
HDMI_DDCCLK_MB
INT_HDMICLK-_C
INT_HDMICLK+_C
INT_HDMITX1N_C
INT_HDMITX0N_C
INT_HDMITX2N_C
HP_DET_CN
HDMI_DDCDATA_MBHDMI_DDCDATA_COM
HDMI_DDCCLK_COM HDMI_DDCCLK_MB
INT_HDMICLK-_C
INT_HDMITX0N_C
INT_HDMITX2N_C
INT_HDMICLK+_C
INT_HDMITX1P_C
INT_HDMITX2P_C
INT_HDMITX0P_C
INT_HDMITX1N_C
HDMI_5V
HDMI_MB_HP
HDMI_MB_HP
INT_HDMICLK+[7]INT_HDMICLK-[7]
INT_HDMITX1N[7]INT_HDMITX1P[7]
INT_HDMITX0P[7]INT_HDMITX0N[7]
INT_HDMITX2N[7]INT_HDMITX2P[7]
HDMI_DDCDATA_SW[7]
HDMI_DDCCLK_SW[7]
HDMI_HP[7]
+3V
+5V
+3V
+5V
+3V
+5V
+3V
+3V
+3V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
HDMI 1A
25 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
HDMI 1A
25 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
HDMI 1A
25 46Monday, January 07, 2013
ZQK
R4622.2K/J_4
R4392.2K/J_4
RV1*5V/30V/0.2p_4
12
R443
680/J_4
12
R15
680/J_4
12
R11 0/J_4
R441
680/J_4
12
Q1
2N7002K
3
2
1
C524 0.1u/10V_4
Q38BSN20
32
1
Q4
2N7002K
3
2
1
C2*220p/50V_4
R442
680/J_4
12
R4382.2K/J_4
R444
680/J_4
12
C13 0.1u/10V_4
R10 *100/F_4
R12
680/J_4
12
D19RB500V-40
C3
*1000p/50V_4R19
*100K/F_4
CN2
ABA-HDM-022-P05
D2+1
D2-3
D1 Shield5
D0+7
D0-9
CK Shield11
CE Remote13
DDC CLK15
GND17
HP DET19
D2 Shield2
D1+4
D1-6
D0 Shield8
CK+10
CK-12
NC14
DDC DATA16
+5V18
SHELL120
SHELL221
SHELL322
SHELL423
R436 *100/F_4
R469 0/J_4
C12 0.1u/10V_4
C525 0.1u/10V_4
R4632.2K/J_4
Q3
AP2331SA-7
OUT1
GND2IN
3
R14
680/J_4
12
R9 *100/F_4
R13
680/J_4
12
R435 *100/F_4
C14 0.1u/10V_4
C4
*1000p/50V_4
C11 0.1u/10V_4
R161M/J_4
Q37
BSN20
3
2
1
C526 0.1u/10V_4
D1*5V/30V/0.2p_4
R470 0/J_4
R1720K/J_4
D20RB500V-40
C523 0.1u/10V_4
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
+3.3V: 1000mA+3.3Vaux:330mA+1.5V:500mA H=5.2mm
Check LED signal. (active high or low)
MINI-CARD WLAN(MPC)
Debug
500mA for +1.5V
mSATA (HDD)
LAYOUT NOTE:CLOSE TO CONNECTOR
Debug
Low
S5 IOAC
S5 IOAC
rating = 1000mA @ 128G
20111122 change to PMOS
20120105 Change power plant for leakage issue.
20120105 Change power plant for leakage issue.
20120216 add R2/R3 un-stuff for iRST reserve.
20120217 reserve R648 PU 100k.
20120221 add R1 for PLTRST#.
26
Layout Notes:Place decoupling CAPs close to Connector
LAYOUT NOTE:CLOSE TO CONNECTOR
Leakage circuit (MPC)
High
Mini card +3V power enable
Mini card +3V power disable
R1
R2
R3
H=4.95mm
mSATA Redriver (HDD)
Note:REXT can be left open or connected to VDD with defaultswing setting
Pre-emphasis level setting for Channel A, 3.3V tolerant. Internally pulled down at~150K次[A_PRE1, A_PRE0] == 00: no pre-emphasis 01: 2dB pre-emphasis is selected 10: 3.5dB pre-emphasis is selected 11: 5dB pre-emphasis is selected
Pre-emphasis level setting for Channel B, 3.3V tolerant. Internally pulled down at~150K次[B_PRE1, B_PRE0] == 00: no pre-emphasis 01: 2dB pre-emphasis is selected 10: 3.5dB pre-emphasis is selected 11: 5dB pre-emphasis is selected
Chip test mode enable, internally pulled down at ~150K次 L: Normal operation H: Test mode enableFor SATA/SAS PHY test, this pin should be pulled to High
Close to connector
Closed to ASM1466 Power Pin
+WL_VDD
PCIE_TX8+_CPCIE_TX8-_C
CLK_PCIE_WLAN_REQ#_R
WLAN_CLK_SDATAWLAN_CLK_SCLK
CL_RST1#_WLANCL_DATA1_WLANCL_CLK1_WLAN
PCIE_WAKE#_R
WLAN_CLK_SDATA
WLAN_CLK_SCLK
CLK_PCIE_WLAN_REQ#_R
PCIE_WAKE#_R
IOAC_PCIERST#
PLTRST#
+3V_SATA
A_LAD2_RA_LAD3_RA_LFRAME#_R
A_LAD0_RA_LAD1_R
+3V_WLAN
TE
ST
A_P
RE
1
I2C
_EN
A_P
RE
0B
_PR
E0
B_P
RE
1
TEST
A_PRE0
B_PRE0B_PRE1
A_PRE1
SATA_RXN1_CSATA_RXP1_C
SATA_TXP1_CSATA_TXN1_C
SATA_TXP1_PSSATA_TXN1_PS
SATA_RXN1_PS
SATA_RXP1_PS
SATA_TXP1_PS_CSATA_TXN1_PS_C
SATA_RXN1_PS_CSATA_RXP1_PS_C
SATA_TXP1
SATA_RXP1
SATA_TXN1
SATA_RXN1
SATA_TXP1_RSATA_TXN1_R
SATA_RXN1_RSATA_RXP1_R
SATA_TXP1_PS_RSATA_TXN1_PS_R
SATA_RXN1_PS_RSATA_RXP1_PS_R
SATA_TXP1_PS_RSATA_TXN1_PS_R
SATA_RXN1_PS_RSATA_RXP1_PS_R
SATA_TXP1_PS_RSATA_TXN1_PS_R
SATA_RXN1_PS_R
SATA_RXP1_PS_R
RE
XT
RF_EN [34]
PCIE_RX8+[9]PCIE_RX8-[9]
USBP10- [9]USBP10+ [9]
CL_DATA1[9]CL_CLK1[9]
CL_RST1#[9]
CLK_PCIE_WLAN#[9]CLK_PCIE_WLAN[9]
IOAC_LANPWR#[34]
SMB_PCH_DAT[9,23]
SMB_PCH_CLK[9,23]
CLK_PCIE_WLAN_REQ#[9]
CLK_LPC_DEBUG[9]PLTRST#[9,16,27,28,34]
LPC_LFRAME# [8,27,34]LPC_LAD3 [8,27,34]LPC_LAD2 [8,27,34]LPC_LAD1 [8,27,34]LPC_LAD0 [8,27,34]
WAKE_SRC_1[34]
BT_POWERON[34]
WLAN_OFF [34]
IOAC_PCIERST# [28,34]
PCIERST# [28,34]
PCIE_TX8+[9]PCIE_TX8-[9]
SATA_TXN1[8]SATA_TXP1[8]
SATA_RXP1[8]SATA_RXN1[8]
+WL_VDD
+WL_VDD
+1.5V_Mini1_VDD
+1.5V_Mini1_VDD
+1.5V_Mini1_VDD
+WL_VDD
+WL_VDD
+1.5V
+WL_VDD
+3V
+3V_SATA
+1.5V_Mini1_VDD
+3VPCU
+3V_S5 +WL_VDD
+3V_S5 +WL_VDD
RD_POWER
RD_POWER
RD_POWER
RD_POWER
+1.5V RD_POWER
+3V
RD_POWERRD_POWER
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Mini Card/mSATA 1A
Monday, January 07, 2013
ZQK
4626
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Mini Card/mSATA 1A
Monday, January 07, 2013
ZQK
4626
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Mini Card/mSATA 1A
Monday, January 07, 2013
ZQK
4626
R432 0/J_4
R704 *0/J_4
R843 *ASM@0/J_4
R819 NRD@0/J_4
C862 [email protected]/25V_4
C769 0.1u/10V_4
R708*100K/J_4
R771 0/J_8
R433 0/J_4
C863 [email protected]/25V_4
R841ASM@2K/F_4
TP41
R701 0/J_4
R3414.7K/J_4
C765 0.1u/10V_4
C864 [email protected]/25V_4
R820 NRD@0/J_4
R828 RD@0/J_4
R812
*[email protected]/F_4
R814 *[email protected]/J_4
C722*10u/6.3V_6
R813 [email protected]/J_4
C865 [email protected]/25V_4
C855
*PS8@1u/6.3V_4
C521
0.1u/10V_4
Q30
2N7002DW
6
2
1
5
4 3
R428 0/J_4
R838 ASM@0/J_4
R721 0/J_8
C707*0.1u/10V_4
R829 RD@0/J_4
R821 NRD@0/J_4
Q28
2N7002DW
6
2
1
5
4 3
R815 *[email protected]/J_4
R706 *0/J_4
C868 [email protected]/10V_4
R3484.7K/J_4
C867ASM@10u/6.3V_6
R839 ASM@0/J_4
R830 RD@0/J_4
C762*0.1u/10V_4
C77310u/6.3V_6
R823 NRD@0/J_4
C520
0.1u/10V_4
R431 0/J_4
R822 NRD@0/J_4
R816 *[email protected]/J_4
C766*0.1u/10V_4
C869 [email protected]/10V_4
R824 NRD@0/J_4
R737 0/J_4
R817 *[email protected]/J_4
R831 RD@0/J_4
R732 *0/J_4
R434 0/J_4
C784*1000p/50V_4
C870 [email protected]/10V_4
R827 PS8@0/J_4
R825 NRD@0/J_4
R692 *0/J_8
R727 *0/J_4
Q63 AO3413
3
2
1
R342 *0/J_4
C851 0.01u/25V_4
R818 *[email protected]/J_4
R826 NRD@0/J_4
C7870.1u/10V_4
R347 *0/J_4
[email protected]/25V_4
C871 [email protected]/10V_4
C811
10u/6.3V_6
C852 0.01u/25V_4
R3584.7K/J_4
U51
RD@PS8521A/ASM1466
A_INp1
A_INn2
GND3
B_OUTn4
B_OUTp5
VD
D6
EN
7
B_P
RE
08
A_P
RE
09
I2C
_EN
#10
RE
XT
20
A_P
RE
119
TE
ST
18 17B
_PR
E1
VD
D16
A_OUTp15
A_OUTn14
GND13
B_INn12
B_INp11
R429 0/J_4R430 0/J_4
CN22
LTS_AAA-PCI-092-P05
Reserved51
Reserved49
Reserved47
Reserved45
GND43
+3.3Vaux41
+3.3Vaux39
GND37
GND35
SATA_Tp033
SATA_Tn031
GND29
GND27
SATA_Rn025
SATA_Rp023
GND21
UIM_C419
UIM_C817
GND15
REFCLK+13
REFCLK-11
GND9
CLKREQ#7
Reserved5
+3.3V52
GND50
+1.5V48
LED_WPAN#46
LED_WLAN#44
LED_WWAN#42
GND40
USB_D+38
USB_D-36
GND34
SMB_DATA32
SMB_CLK30
+1.5V28
GND26
+3.3Vaux24
PERST#22
W_DISABLE#20
GND18
UIM_VPP16
+1.5V6
Reserved3
WAKE#1
UIM_RESET14
UIM_CLK12
UIM_DATA10
UIM_PWR8
GND4
+3.3V2
GN
D54
GN
D53
CN13
LTS_AAA-PCI-092-P05
Reserved51
Reserved49
Reserved47
Reserved45
GND43
+3.3Vaux41
+3.3Vaux39
GND37
GND35
PETp033
PETn031
GND29
GND27
PERp025
PERn023
GND21
UIM_C419
UIM_C817
GND15
REFCLK+13
REFCLK-11
GND9
CLKREQ#7
Reserved5
+3.3V52
GND50
+1.5V48
LED_WPAN#46
LED_WLAN#44
LED_WWAN#42
GND40
USB_D+38
USB_D-36
GND34
SMB_DATA32
SMB_CLK30
+1.5V28
GND26
+3.3Vaux24
PERST#22
W_DISABLE#20
GND18
UIM_VPP16
+1.5V6
Reserved3
WAKE#1
UIM_RESET14
UIM_CLK12
UIM_DATA10
UIM_PWR8
GND4
+3.3V2
GN
D54
GN
D53
C854 0.01u/25V_4
[email protected]/10V_4
R730 *0/J_4
R3614.7K/J_4
R840 [email protected]/J_4 C853 0.01u/25V_4
R842 *ASM@0/J_4
1
1
2
2
3
3
4
4
A A
B B
C C
D D
Layout Notes:Place decoupling CAPs close to Connector
3/5VPCU reset switch (CLG)
MAIN SATA HDD (HDD) TPM (TPM) 27
PCLK_TPM_C
SERIRQ_RLPCPD#_R
SATA_TXP0_CSATA_TXN0_C
SATA_RXP0_CSATA_RXN0_C
+5V_HDD
+5V_HDD
LPC_LAD0[8,26,34]LPC_LAD1[8,26,34]
LPC_LAD2[8,26,34]
LPC_LFRAME#[8,26,34]
LPC_LAD3[8,26,34]
LPCPD#[7]SERIRQ[8,34]
CLKRUN#[7,34]PLTRST#[9,16,26,28,34]
PCLK_TPM[9]
SATA_TXN0 [8]SATA_TXP0 [8]
SATA_RXP0 [8]SATA_RXN0 [8]
SYS_SHDN# [3,36,41]
+3V+3V_S5
+5V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
SATA-HDD/ TPM 1A
27 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
SATA-HDD/ TPM 1A
27 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
SATA-HDD/ TPM 1A
27 46Monday, January 07, 2013
ZQK
R411 TPM@0/J_4
SW33/5V_SW
2143
5 6*0.1u/25V_4
C359
C683 0.01u/25V_4
R352 0_8
C694 0.01u/25V_4
C508 TPM@10p/50V_4
+C732
*100u/6.3V_1206
C677 0.01u/25V_4
R408 TPM@0/J_4
CN17
TPM@TPM_CONN
11
22
33
44
55
66
77
88
99
1010
1111
1212
1313
1414
1515
1616
C676 0.01u/25V_4
0.01u/25V_4
C386
0.1u/16V_4C812
*0.1u/25V_4
C358
D33*14V/38V/100P_4
12
C388
10u/6.3V_6
R412 TPM@0/J_4
R410 TPM@0/J_4
19
1
CN11
SATA_HDD
19181716151413121110987654321
0.01u/25V_4
C357
C794 [email protected]/10V_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
X'tal 25MHz
Reserver for EMI
Place connect to Pin46/47Place Close to LAN chip, for VDD33 pins-- 11, 12, 3 9, 58, 63, 64
Close to Chip
Power source mode:Pin45 :Pull-up VDD33 for SWR mode Pull-down for LDO mde
Power-on Strapping
Place Close to LAN chip, for VDD33 pins-- 3, 8, 41, 52, 61
Place Close pins-- 48
Close to Pin29
40 mils
50 mils
(1.5A) 60 mils
(1.5A) 60 mils
(1.5A) 60 mils40 milsMax current is 1400mA
keep routing trace at least 50 mil
(1.5A) 70 mils
30 mils
Place close to pin 33
10 mils
1012：：：：LAN request pin power domain need to sync with ISOL ATEB pin
10/31 modify
Layout Notes:Place decoupling CAPs close to LAN Chip
28Transformer (LAN)LAN/Card reader (LAN)
RJ45 CONNECTOR (LAN)
SURGE (LAN)
If use RTL8411BAR, unstuff C303/C302
Place close to pin 53
1012：：：：Change choke from 2.2uH to 4.7uH by FAE
1016：：：：Exchange Q29 pin 3 & 4 to prevent leakage issue
For Support DC IOAC .
If use RTL8411BAR, unstuff R330
S5S0
PCU
S5
Leakage circuit (LAN)
VDD33/18
ENSWREG
CLK_PCIE_LAN_REQ#_Q
LED3/SPIDO/EEDO_NCSCL/LED_CR_NC
SDA/SPIDI
REGOUT
SP12
PCIE_RXN3_C
MDI0-
ISOLATEB
PCIE_RXP3_C
SP5SP6SP7SP8SP9SP10
MDI0+
MDI1+MDI1-MDI2+MDI2-
MDI3+MDI3-
GPO_NC
SP13LAN_XTALILAN_XTAL2
LAN_RESET
MDI3+MDI3-MDI2+MDI2-
MDI0+MDI0-
MDI1+MDI1-
SDA/SPIDIREGOUT
RJ45-TX0-
MDI1-
MDI0+MDI0-
RJ45-TX1-
RJ45-TX0+
RJ45-TX2-
MDI3-
MDI2+MDI2-
RJ45-TX3-
RJ45-TX2+
SP13SP12
SP5
SP9
SP6
SP10
SP7SP8
VDD33/18
RJ45-TX1+MDI1+
MDI3+ RJ45-TX3+
PCIE_TXN3_CPCIE_TXP3_C
LAN_XTALI
LAN_XTAL2
LED1/SPICLK/EESK
RJ45-TX2+RJ45-TX2-
RJ45-TX1+RJ45-TX0-
RJ45-TX3-RJ45-TX3+
RJ45-TX0+
RJ45-TX1-
LED0/SPICSB
TX0P_RTX0N_R
X-TX0PX-TX0N
MDI0+MDI0-
TX1P_RTX1N_R
MDI1+MDI1-
TERM9
TERM0
RJ45-TX0+RJ45-TX0-
X-TX1NX-TX1P RJ45-TX1+
RJ45-TX1-
MDI2+MDI2-
MDI3+MDI3-
TX3P_RTX3N_R
TX2N_RTX2P_R
X-TX3NX-TX3P
X-TX2NX-TX2P
RJ45-TX3-RJ45-TX3+
RJ45-TX2-RJ45-TX2+
VDD33/18VDD33-18
PCIE_LAN_WAKE#_Q
CLK_PCIE_LAN_REQ#_Q
PCIE_LAN_WAKE#_Q
CARD_3V3
PCIE_TXP3_LAN [9]PCIE_TXN3_LAN [9]
CLK_PCIE_LANN [9]CLK_PCIE_LANP [9]
PCIE_RXN3_LAN [9]PCIE_RXP3_LAN [9]
CARD_3V3[29]
SP5[29]SP6[29]SP7[29]SP8[29]SP9[29]SP10[29]
SP12[29]SP13[29]
PLTRST#[9,16,26,27,34]
LANPWR#[34]
IOAC_PCIERST#[26,34]
PCIERST#[26,34]
CLK_PCIE_LAN_REQ# [9]
PCIE_LAN_WAKE#[7]
LAN_WAKE#[34]
VDD10
VDD33
VDD10
VDD10
VDD33
VDD10
VDD33
VDD10
VDD33
VDD33
VDD33VDDREG
+3V_S5
VDDREG+3V
VDD33
VDD33
VDDREG
VDD10
EVDD10
VDD10
EVDD10
+3VPCU
VDD33
+3V+3V_S5 VDD33+3V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
LAN-RTL8411/CARD READER 1A
28 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
LAN-RTL8411/CARD READER 1A
28 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
LAN-RTL8411/CARD READER 1A
28 46Monday, January 07, 2013
ZQK
R796 *0/J_4
C3130.1u/10V_4
Y125MHz_XTAL
24
13
R485 0/J_4
R334 0/J_6
R330 *0/J_4
R47 0/J_4
U3
11
22
33
44
55667788
R802 *0/J_4
C559 *6.8P/50V_4
U22
RTL8411BA-CG
AV
DD
3358
MS
_D0/
xD_D
156
MS
_D4/
xD_D
055
LED
0/S
PIC
SB
51
GP
O50
XD
_CD
#57
SD
_CD
#/M
S_D
5/xD
_ALE
54
LED
1/S
PIS
CK
49
DV
DD
1052
SD
_CM
D/M
S_D
6/xD
_D3
21
SD
_D3/
MS
_D2/
xD_D
222
SD
_D2/
xD_D
723
GN
D24
HS
IP25
HS
IN26
RE
FC
LK_P
27
RE
FC
LK_N
28
EV
DD
1029
HS
OP
30
HS
ON
31
REGOUT48
VDDREG47
VDDREG46
ENSWREG_H45
SDA/SPIDI44
LED3/SPIDO43
SCL/LED_CR42
DVDD1041
LANWAKEB40
ISOLATEB38
PERSTB37
CLKREQB36
SD_WP/MS_D1/xD_WP#35
MS_BS/xD_CLE34
AV
DD
3363
RS
ET
62
AV
DD
1061
CK
XT
AL2
60
CK
XT
AL1
59
VDD33/1833
GND65
AV
DD
3364
MDIP01
MDIN02
AVDD103
MDIP14
MDIN15
MIDP26
MDIN27
AVDD108
MDIP39
MDIN310
AVDD3311
DVDD3312
Card_3V313
SD_D7/xD_RDY14
SD_D6/MS_INS#/xD_RE#15
SD_D5/xD_CE#16
SD
_D4/
xD_W
E#
17
SD
_D1/
MS
_CLK
/xD
_D6
18
SD
_D0/
MS
_D7/
xD_D
519
SD
_CLK
/MS
_D3/
xD_D
420
GN
D32
DVDD3339
VD
D33
/18
53
R453 *0/J_4
R351 *0/J_4
R349
10K/J_4
C382 0.1u/10V_4
U30
TRANSFORMER
TD+1
TD-2
TCT8
MX+6
MX-5
MCT3
MCT4
TCT7
L1
HCMC0805-371MFS
11 44
33
22
L25
*HCMC0805-371MFS
11 44
33
22
R343
15K/F_4
C560 *6.8P/50V_4C557 *6.8P/50V_4C558 *6.8P/50V_4
C48 *6.8P/50V_4C384 0.1u/10V_4
C727
0.1u/10V_4
R27 *0/J_4
R346 *0/J_4
R29 *0/J_4
C3100.1u/10V_4 C390
1u/6.3V_4
R329 2.49K/F_4
R336 *0/J_8
C866
0.1u/10V_4
R797 0/J_6
L22
HCMC0805-371MFS
11 44
33
22
R28 *0/J_4
R455 *0/J_4
R486 0/J_4
L23
HCMC0805-371MFS
11 44
33
22
C3180.1u/10V_4
C3810.1u/10V_4
R795 0/J_4
C3430.1u/10V_4
U34
11
22
33
44
55667788
R47175/F_8
R324*100K_4
R803 *0/J_4
R798 0/J_6
C312
0.1u/10V_4
R487 0/J_4
L204.7uH/680mA
C47 *6.8P/50V_4
U10
11
22
33
44
55667788
L7
*HCMC0805-371MFS
11 44
33
22
U28
11
22
33
44
55667788
TP37
C302
*0.1u/10V_4
R45 0/J_4
C3110.1u/10V_4
C385 0.1u/10V_4
C3000.1u/10V_4
C3300.1u/10V_4
TP40
R804 0/J_4
Q26 AO3413
3
2
1
R338 1.5K/F_4C303
*4.7u/6.3V_6
C352
0.1u/10V_4
R44 0/J_4
C45 *6.8P/50V_4
R448
*SUG@1M_8
C309
0.1u/10V_4
C306 10p/50V_4
D22
*SUG@BS201N
12
C535
220p/3KV_1808C46 *6.8P/50V_4
R335*1M/J_4
C341
0.1u/10V_4
C3160.1u/10V_4
R454 *0/J_4
U9
TRANSFORMER
TD+1
TD-2
TCT8
MX+6
MX-5
MCT3
MCT4
TCT7
TP38
R3451K/J_4
R30 *0/J_4
TP39
R333 0/J_6
R337 0/J_4
Q29
2N7002DW
6
2
1
5
4 3
TP81 U8
TRANSFORMER
MCT1
MCT2
MX+8
TCT6
TCT5
TD+3
TD-4
MX-7
C351
0.1u/10V_4
U31
TRANSFORMER
MCT1
MCT2
MX+8
TCT6
TCT5
TD+3
TD-4
MX-7
C383 0.1u/10V_4
C371
*4.7u/6.3V_6
C3174.7u/6.3V_6
CN1
RJ45
1111
1212
3-8 3+7 1-6
2+4
2-5
1+3 0-2 0+1
99
1010
L6
*HCMC0805-371MFS
11 44
33
22
R3560/J_6
C307 10p/50V_4
R331 10K/J_4
R484 0/J_4
L24
*HCMC0805-371MFS
11 44
33
22
L2
HCMC0805-371MFS
11 44
33
22
C3014.7u/6.3V_6
R452 *0/J_4
C20 0.01u/25V_4
R46 0/J_4
R340
10K/J_4
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
SD_D7 xD_RDYSP2SP3SP4SP5SP6SP7SP8SP9
SP11SP10
SP13SP12
SP14SP15SP16
SD_D6SD_D5SD_D4SD_D1SD_D0
SD_D3SD_D2
SD_CLKSD_CMD
SD_WPSD_CD#
MS_INS# xD_RE#xD_CE#xD_WE#xD_D6xD_D5xD_D4xD_D3xD_D2xD_D7xD_CLExD_WP#xD_ALExD_D0xD_D1xD_CD#
MS_CLKMS_D7MS_D3MS_D6MS_D2
MS_BS
MS_D5MS_D4MS_D0
MS_D1
Share Pin
10 mils
Place close to connector
29SD/MMC CARD READER (MMC)CARD READER CONNECTOR (MMC)
SP1
EMI
CARD_3V3
SP13=SD_CD#=MS_D5=XD_ALE
SP6=SD_D0=MS_D7=XD_D5SP7=SD_CLK=MS_D3=xD_D4SP8=SD_CMD=MS_D6=xD_D3
SP5=SD_D1=MS_CLK=XD_D6
SP10=SD_D2=XD_D7
SP12=SD_WP=MS_D1=XD_WP#
SP9=SD_D3=MS_D2=XD_D2
SP5=SD_D1=MS_CLK=XD_D6
SP7=SD_CLK=MS_D3=xD_D4
CARD_3V3
SP8=SD_CMD=MS_D6=xD_D3
SP5=SD_D1=MS_CLK=XD_D6
CARD_3V3SP7=SD_CLK=MS_D3=xD_D4
SP10=SD_D2=XD_D7
SP6=SD_D0=MS_D7=XD_D5
SP9=SD_D3=MS_D2=XD_D2
SP12=SD_WP=MS_D1=XD_WP#SP13=SD_CD#=MS_D5=XD_ALE
SP12[28]
SP13[28]
SP8[28]SP7[28]SP6[28]SP5[28]
SP10[28]SP9[28]
CARD_3V3[28]
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
CARD READER CONNECTOR 1A
29 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
CARD READER CONNECTOR 1A
29 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
CARD READER CONNECTOR 1A
29 46Monday, January 07, 2013
ZQK
R689 0/J_4
R685 0/J_4
R698 0/J_4
R703 0/J_4
C7084.7u/6.3V_6
R690 0/J_4
C734
*6P/50V_4
C751
*6P/50V_4
CN12 SD-CARD
GN
D1
3
CARD/DET11
GN
D1
2
VDD4
CD/DATA31
DATA18
DATA07
DATA29 W/P
10
VSS26
CLK5
VSS13
CMD2
R700 0/J_4
R687 0/J_4
R699 0/J_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Tied at one point only underthe codec or near the codec
1.6Vrms
Spilt by DGND
DIGITAL
ANALOG
Place next to pin 1
Place next to pin 46
PCBEEP dont coupling any signals if possible8/17 separate PCBEEP to Digital from Realtek suggestion
ANALOG
HP
combo MIC
Place next to pin 9
Internal Speaker (AMP)
SPK-2
SPK-1
Place next to pin 26
Place next to pin 28
Place next to pin 40
ANALOG
DIGITAL
DIGITAL
Place next to pin 41
Output Gain TableR1
NC
Gain (Differential)
14dB0
NC
0
R2
NC
NC
0
0
R3
0
NC
0
NC
R4
0
0
NC
NC
11dB
19dB
25dB
40mil for each signal
3.3V : Power up Class D SPK amplifer0V : Power down Class D SPK amplifer
close to pin 27
close to pin 15
close to pin 13
close to pin 7
close to U5001
R1 R2
R3 R4
Pin1 - Pin6: DGNDPin7 - Pin12: AGNDThermal Pad: DGND
Combo Jack
HEADPHONE/Mic combo (AMP)Codec (ADO) 30
INT DMIC (AMP)
Power(ADO) Mute(ADO)
20120910: ALC3225 has a internal MOSFET
Layout Note:Place close to Codec
Layout Note:Place very close to U5001
Layout Note:Place very close to U5001
20120928：：：：Follow ME & PDC pin define
DGND plane AGND plane
20121009: FAE Vic request to change 0 ohm to 1K ohm
<20121018>Add D34 for ESD
Need check AMPPD PIN level
DMIC
20121205: FAE Vic request to change 47 ohm to 56 ohm
HP-R
PCBEEP BEEP_1
R_SPK-
+3VDVDD
R_SPK+
ACZ_SDIN0_R
+5VPVDD2
HP-L
HPOUT_JDSENSEA
BEEP_2
+3VDVDDIO
G1G2
L_SPK2-L_SPK2+
R_SPK2+R_SPK2-
L_SPK2
R_SPK2
L_SPK2
R_SPK2
MIC2-VREFO
MIC2-L
MIC2-R
+5VPVDD1
+1.5VAVDD2
COMBO_MICJD
PD#
EAPD#
L_SPK+
L_SPK-
G2
DMIC_CLKDMIC_CLK_RPD# AMP_MUTE#
PCH_AZ_CODEC_RST#
L_SPK+_2L_SPK-_2R_SPK-_2R_SPK+_2
L_SPK2-L_SPK2+
R_SPK2+R_SPK2-
L_SPK-_1R_SPK-_1
L_SPK+_1
R_SPK+_1
L_SPK-L_SPK+
R_SPK+R_SPK-
G1
HPR_SYS
HP-L
MIC2-L
MIC2-R MIC2_MIC
MIC2-VREFO
HPOUT_JD
HPL_SYSHP-L-1
HP-R HP-R-1
COMBO_MICJD
COMBO_MIC
+5V_AMP
+3VCPVDD
L_SPK+_2L_SPK-_2L_SPK+_1L_SPK-_1
R_SPK+_2R_SPK-_2
R_SPK-_1R_SPK+_1
EAPD#
DMIC_DATA
DMIC_CLK
DMIC_DATADMIC_DATA_R
SPKR [8]
PCBEEP_EC [34]
PCH_AZ_CODEC_SYNC [8]
PCH_AZ_CODEC_RST# [8]
PCH_AZ_CODEC_SDOUT [8]
PCH_AZ_CODEC_SDIN0 [8]
PCH_AZ_CODEC_BITCLK [8]
AMP_MUTE# [34]
+5VA+5V
ADOGND
+5V
+3V
+3V
ADOGND
ADOGND
ADOGND
ADOGND
+5VA
ADOGND
ADOGND
ADOGND
+5V
ADOGNDADOGND
ADOGND
+1.5V
+5V
+5VA
ADOGND
+3V
+5VA
ADOGND
ADOGNDADOGND ADOGND
ADOGND
ADOGND
+3V
ADOGND
+5VA
+3V
ADOGND
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
REALTEK ALC3225 1A
30 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
REALTEK ALC3225 1A
30 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
REALTEK ALC3225 1A
30 46Monday, January 07, 2013
ZQK
D18
TVS/6pF_4
12
C466
100p/50V_4
C412
0.1u/10V_4
D15
TVS/6pF_4
12
R73122K/F_4
C490 1u/16V_6R404 0_6
R422 0_6
C498
*68p/50V_4
R4050/J_4
R398 39.2K/F_4
R402 0/J_6
R768 0_6
C77610u/6.3V_6
C461 1u/35V_6 R393 47K/J_4
R371*10K_4
U25
ALC3225
DV
DD
1
GP
IO0/
DM
IC-D
AT
A2
GP
IO1/
DM
IC-C
LK3
DV
SS
4
SD
AT
A-O
UT
5
BIT
-CLK
6
LDO
3-C
AP
7
SD
AT
A-I
N8
DV
DD
-IO
9
SY
NC
10
RE
SE
T#
11
PC
BE
EP
12
Sense A13
Sense B14
JDREF15
MONO-OUT16
MIC2-L17
MIC2-R18
MIC1-L19
MIC1-R20
LINE1-R21
LINE1-L22
LINE2-R23
LINE2-L24
AV
SS
125
AV
DD
126
LDO
1-C
AP
27
VR
EF
28
MIC
2-V
RE
FO
29
MIC
1-V
RE
FO
-R30
MIC
1-V
RE
FO
-L31
HP
-OU
T-L
32
HP
-OU
T-R
33
CP
VE
E34
CB
N35
CP
VD
D36
CBP37
AVSS238
LDO2-CAP39
AVDD240
PVDD141
SPK-L+42
SPK-L-43
SPK-R-44
SPK-R+45
PVDD246
PDB47
SPDIFO/GPIO248
GND49
C452
0.1u/10V_4
C419
10u/6.3V_6
R3944.7K/J_4
R416 0/J_4
R767*0/J_4
C80810u/6.3V_6
C77810u/6.3V_6
R424 0_6
R766*0/J_4
C79110u/6.3V_6
R363 0_6
+
C434
2.2u/6.3V_6
R382 0/J_6
R399 20K/F_4
R769
*10K_4
R733 0_6
C460 *100p/50V_4
U27
ALC1001-CGT
OUT-LP1OUT-LN2
PV
DD
13
PV
DD
24
PD#7
OUT-RP6
BYP8
OUT-RN5
GN
D13
INPUT-L10
G111
INPUT-R9
G212
C4560.1u/10V_4
CN19
DMIC
1234
56
R7640/J_4
R426 0_6
C4292.2u/6.3V_6
C422
0.1u/10V_4
R360 0/J_4
L21 UPB201209T-310Y-N/6A/31ohm_8
C442 *22p/50V_4
C42510u/6.3V_6
R425 0_6
C8102.2u/6.3V_6
R7292.2K/J_4
C7972.2u/6.3V_6
C4300.1u/10V_4
D32 RB500V-40
R380 0_6
D34
5.5V/25V/410P_4
1 2
C7820.1u/10V_4
C505
*22p/50V_4
C502
*68p/50V_4
R421 0_6
C503
*68p/50V_4
CN21
SPK CN
12345678
910
C496
*68p/50V_4
R381 33/J_4
C8040.1u/10V_4
D31 RB500V-40
R806
0/J_4
R414*0/J_6
C4280.1u/10V_4
C510 1u/16V_6
R366 0_6
C509 1u/16V_6
C448
10u/6.3V_6
D14 RB500V-40
R3640_6
R72622K/F_4
R415 0_6
C4242.2u/6.3V_6
C796
*10u/6.3V_6
C499
*68p/50V_4
R420 0_6
C423
10u/6.3V_6
D13 RB500V-40
C788 *1000p/50V_4
D12*14V/38V/100P_4
12
R807
*0/J_4
R383 56/F_4
C477
10u/6.3V_6
C501
*68p/50V_4
R770 *22K/F_4
R427 0_6
R369 1K/J_4
D11*14V/38V/100P_4
12
C497
*68p/50V_4
C803 *1000p/50V_4
D16*14V/38V/100P_4
12
R403*0/J_6
C415
10u/6.3V_6
+
C433
2.2u/6.3V_6
R419 *0/J_4
R418 *20K/F_4
R772 *0/J_4
C416
10u/6.3V_6
C482
*22p/50V_4
R392 56/F_4
C427
0.1u/10V_4
C42610u/6.3V_6
C464 10u/6.3V_6
C413
0.1u/10V_4
R763 0/J_4
R423 0_6
C479 1u/16V_6
C500
*68p/50V_4
R725*10K/J_4
C469
0.1u/10V_4
D17*14V/38V/100P_4
12
R417 0/J_4
R359 0_6
CN15
SIT_2SJ3052-005111F
4
13
256 7
R716 0/J_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
I/O board (USB)
USB 3.0 Connector
USB3.0 (USB) USB Charger to 3.0 (USB)
USB2.0 (USB)
31
CEN:SLG55584A----pull up SLG55584----pull low
System status(CB)> Hi: S0 Charging with CDP/SDP.> Lo: S3,DCP autodetect.
Pull high CDP/SDP autodetect.Pull Low SDP only.
Battery Status, EC GPO control it.> Hi: S0 and S3~S5 Battery over 30% > Lo: S3~S5/ Battery under 30%
SDP
Name
1800mA
CDP
USB data Apple DeviceMax Current
YES
State
DCP,Auto S4~S5
S0~S3
NO
500mAS0~S3
YES
1800mA
1500mA
500mA
500mA
CB
0
1
1
X
0
1
SELCDP FuncionFuncion
DCP autodetect with mouse/keyboard wakeup
S0 charging with SDP only
S0 charging with CDP or SDP only (depending on exte rnal device)
CH@: Default stuff
Layout Notes:Place decoupling CAPs close to Connector
Layout Notes:Place close to L6008
Layout Notes:Place close to L6009
2012-06-15Active High:1st: AL002820003 (BCD)2nd: AL007534001 (Promate)3rd: AL002511002 (DDS)
+5V_S5 -> +5VPCU for batterymode can charger when enter S4/S5
Active Low:1st: AL007534000 (Promate)2nd: AL002820001 (BCD)3rd: AL002501000 (DDS)
USBPWR0
USB_BC_EN
USB3_TXN1_RUSB3_TXP1_R
USBP0-_RUSBP0+_R
USB3_RXN1_RUSB3_RXP1_R
USB_BC_ENBC_CEN
USB_CHG_EN
USBP0+_C
BC_CENUSBP0-_C
USBP1-_CNUSBP1+_CN
USBON#
USB_OC0#
USBP1
USBP0-_R
USBP0+_R
USB3_RXN1_R
USB3_RXP1_R
USB3_TXN1_R
USB3_TXP1_R
USBP4+_RUSBP4-_R
USBP0-_CUSBP0+_C
USB3_TXN1_CUSB3_TXP1_C
USBP0-_RUSBP0+_R
USB3_RXN1_RUSB3_RXP1_R
USB3_TXN1_R
USB3_RXN1_RUSB3_RXP1_R
USB3_TXN1_RUSB3_TXP1_R
USBP0-_RUSBP0+_R
USBPWR0
USB3_TXP1_R
USBP4
USB_OC0#
USBP4+_RUSBP4-_R
USBP1-_CNUSBP1+_CN
USB_OC0#[9]
USB_CHG_EN[34]
USBP0+ [9]USBP0- [9]
USBON#[34]
NBSWON#[34]
USB_CHG_MODE [34]
MAINON [34,37,38,41]
USB30_TX1+[9]USB30_TX1-[9]
USB30_RX1+[9]USB30_RX1-[9]
USBP4+[9]USBP4-[9]
USBP1-[9]USBP1+[9]
LID#[24,34]
+5VPCU
+3VPCU
+5V_S5
+5V_S5
+5VPCU+5VPCU
+3VPCU
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
INT&EXT USB 1A
31 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
INT&EXT USB 1A
31 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
INT&EXT USB 1A
31 46Monday, January 07, 2013
ZQK
C36 0.1u/10V_4
RV7 *5V/30V/0.2p_41 2
C18470P/50V_4
U20
AP2820CMMTR-G1
IN12
OC#5
EN#4 OUT1
6
GND1
IN23
OUT27OUT38
CN6
USB2.0
GND14 D+3 D-2 VDD1
GND55GND66
GND77
GND88
R113 0/J_4
RV2 *5V/30V/0.2p_41 2
L5
*DLW21HN900SQ2L_C
11 44
33
22
C28 [email protected]/10V_4
R112 0/J_4
RV4 *5V/30V/0.2p_41 2
C41 *CH@10u/6.3V_6
U6
AP2820AMMTR-G1
IN12
OC#5
EN4 OUT1
6
GND1
IN23
OUT27OUT38
L4
*DLW21HN900SQ2L_C
11
44
3322
R35 0/J_4
C5300.1u/10V_4
CN7
USB/B CONN
654321
78910
1314
1211
L11
*DLW21HN900SQ2L_C
11
44
3322
+
C539100u/6.3V_1206
C291 1u/6.3V_4
U33CH@TC7SH08FU
2
14
35
R36 0/J_4
RV5 *5V/30V/0.2p_41 2
R483 *NCH@0_4
C189 1u/6.3V_4
R478*[email protected]_4
R211 0/J_4
C34*1.6P/50V_4
R464 *CH@0_4
R37 0/J_4
C532*1.6P/50V_4
C553 *[email protected]/10V_4
L17
*DLW21HN900SQ2L_C
11 44
33
22
D4*5V/30V/0.2p_4
12
R217 0/J_4
C33*1.6P/50V_4
U17
AP2820CMMTR-G1
IN12
OC#5
EN#4 OUT1
6
GND1
IN23
OUT27OUT38
R40 0/J_4
C35 0.1u/10V_4
C531*1.6P/50V_4
VBUSD-D+GNDSSRX-SSRX+GNDSSTX-SSTX+
CN3
AUSB0006-P001A
11
33 22
44
55
66
77
88
99
1111
1010
1313
1212
U4
*RClamp0582N
22
33
GND1
445566
R482 *NCH@0_4
R480 CH@47K_4
R38 0/J_4
C37 1u/6.3V_4
R474 *NCH@0_4
U32
CH@SLG55584A
CEN1
DP3
SELCDP4
TDM7
TDP6
CB18
DM2
VDD5
Thermal Pad9
RV3 *5V/30V/0.2p_41 2
U5
*RClamp0524P
11
22
GND_3/83
44
55
6677
991010
R39 0/J_4
D5*5V/30V/0.2p_4
12
R461 CH@0_4
RV6 *5V/30V/0.2p_41 2
L3
*DLW21HN900SQ2L_C
11
44
3322
C501000p/50V_4
C2220.1u/10V_4
+
C292100u/6.3V_1206
D9
*5V/30V/0.2p_4
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
K/B (KBC) TOUCHPAD BOARD CONN (TPD)
FAN2 For GPU (THM)
50mil
Pin8 of SYNAPTICS and ELAN are NC pin
KB_BL LED (KBC)
30mil
30mil
FAN1 For CPU (THM)
3220121005 SWAP keyboard pin-define
MX5MX4
MX1
MX3
MX0
MX2MX7MX6
MY7
MY13
MY8
MY1
MX6
MY14
MY9
MX7
MY15
MY10MY11
MY0
MX0
MX3
MY3MY4MY5
MY2
MX5
MY6
MX2
MX1
MX4
MY16
MY12
MY17
CLK_SCLK_R
TPDATA_R
TP_INT#_D
TPCLK_R
+5V_KB_R+5V_KB
FAN_PWM_CN1
FAN_PWM_CN2
+5V_FAN1
+5V_FAN2
MY15
MY6
MY11
MY3
MY16
MY7
MY12MY13
MY4
MY17
MY8
MY1
MY14
MY5
MY9
MY0
MY10
MY2
MX0MX1MX2MX3MX4MX5MX6MX7
CLK_SDATA_R
+TPVDD
TPDATA[34]TPCLK[34]
BOARD_ID2[9,10]
CLK_SDATA[9,13,15]CLK_SCLK[9,13,15]
SMBALERT#[9]
KEY_BL_EN[34]
CPUFAN1[34]
FANSIG1[34]
CPUFAN2[34]
FANSIG2[34]
MY2[34]
MY12[34]
MY3[34]
MY0[34]
MY9[34]
MY5[34]MY4[34]
MY6[34]
MY1[34]
MY11[34]MY10[34]
MY7[34]MY8[34]
MY14[34]MY13[34]
MY15[34]MY16[34]MY17[34]
MX0[34]MX1[34]MX2[34]MX3[34]MX4[34]MX5[34]MX6[34]MX7[34]
+3VPCU
+5V+5V
+3V+3V
+3V
+5V +5V
+3V +5V +3V +5V
+3V +5V +3V +5V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
KB/TP/FAN 1A
32 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
KB/TP/FAN 1A
32 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
KB/TP/FAN 1A
32 46Monday, January 07, 2013
ZQK
CP3 *100p/50Vx41357 8
642
R696
10K/J_4
Q2MMBT3904-7-F_200MA
2
1 3
R38910K/J_4
R440
10K/J_4
L32 0_6
C504 *[email protected]/10V_6
CN16
TP CN
12345678
910
R756 0/J_4
R4490/J_8
CP4 *100p/50Vx41357 8
642
Q35KBL@DTC144EUA 1
3
2
CP5 *100p/50Vx41357 8
642
CP2 *100p/50Vx41357 8
642
R39010K/J_4
*0.01u/16V_4C474
Q34KBL@AO3413
3
2
1
R437
10K/J_4
C475*0.01u/16V_4
C799
[email protected]/25V_4
CN10
FAN1
1234
56
C514 *100p/50V_4
CP6 *100p/50Vx41357 8
642
R413KBL@10K/J_4
CN5
FAN2
1234
56
R695
10K/J_4
R6910/J_8
0.1u/10V_4C798
RP2 10K_10P8R10
987 4
321
56
CN18
KB_CONN
123456789
1011121314151617181920212223242526
2728
R837 *0/J_4
R391 0/J_4
R758 0/J_4
R3391K/J_4
R4451K/J_4
Q36*2N7002K
3
2
1
CN20
KBL@KB_backlight
1234
65
Q27MMBT3904-7-F_200MA
2
1 3
C465
[email protected]/6.3V_6
L33 *0/J_6
R757 0/J_4
CP1 *100p/50Vx41357 8
642
R759 0/J_4
R760 KBL@0/J_4
R397 *0/J_4
C515 *100p/50V_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
33LED(UIF) HOLE(OTH)
BATT Enable short pad
Amber
Blue
Amber
Blue
Power LED
Battery
Stitching cap (EMC)
BATLED0#[34]
BATLED1#[34]
SUSLED#[34]
PWRLED#[34]
BATT_EN# [35]
+3VPCU
+3VPCU
+3V_S5
+3V_S5
VIN VIN VIN VIN VIN
+VCC_GFX
+VCC_GFX+1.05V_VTT
+VGPU_CORE
+1.05V_VTT
+VGPU_CORE
+1.05V_VTT +1.05V_VTT +1.05V_VTT +1.05V_VTT
+5VPCU +5VPCU +5VPCU
+5V_S5
+5V_S5
VIN
+5VPCU
VIN
+1.05V_VTT
+1.05V_VTT
+3VPCU
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
LED/ Hole 1A
33 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
LED/ Hole 1A
33 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
LED/ Hole 1A
33 46Monday, January 07, 2013
ZQK
HOLE11*hg-c236d118p2
1 2 3
4567
89
*0.1u/25V_4C228
HOLE8*HG-C236D118P2
1 2 3
4567
89
*0.1u/25V_4C308
*0.1u/25V_4C790
*0.1u/25V_4C491
HOLE7FBAJ2003010
1
HOLE19*h-te236x236bc236d158p2
1
23
*0.1u/25V_4C806
HOLE15*H-TC150BC217D150P2
1
SW2
Lid Switch
3142
*0.1u/25V_4C305
HOLE1*hg-c236d118p2
1 2 3
4567
89
C820
*1000p/50V_4
HOLE13*h-te236x236bc236d165p2
1
23
R6 *1M_4
HOLE9*hg-c236d118p2
1 2 3
4567
89
*0.1u/25V_4C549
HOLE3*hg-c276d118p2
1 2 3
4567
89
HOLE16*H-TC150BC217D150P2
1
HOLE12*hg-c276d118p2
1 2 3
4567
89
C818
*1000p/50V_4
HOLE5*hg-c236d118p2
1 2 3
4567
89
*0.1u/25V_4C807
HOLE10FBAJ2003010
1
LED1 BATTERY LED
1
3
4
2
*0.1u/25V_4C288
R1 150/J_4
HOLE6*HG-TE382X675BC236D118NPTPB
1 2 3
4567
89
*0.1u/25V_4C800
R8 *1M_4
*0.1u/25V_4C205
LED2 BATTERY LED
1
3
4
2
HOLE4FBAJ2005010
1
HOLE21*hg-c236d118p2
1 2 3
4567
89
*0.1u/25V_4C5
HOLE18FBAJ2005010
1
HOLE14*H-TC150BC217D150P2
1
HOLE22*hg-e394x325d165p2
1 2
3
45
6
*0.1u/25V_4C235
PAD1*spad-e858x1268
1 2 3 4 5 6
R3 100/J_4
R4 150/J_4
R5 *1M_4
HOLE23*HG-C236D118P2
1 2 3
4567
89
R7 *1M_4
*0.1u/25V_4C259
R2 100/J_4
*0.1u/25V_4C576
HOLE20*h-c91d91n
1
*0.1u/25V_4C659
*0.1u/25V_4C805
HOLE17*hg-te394x315be394x313d244p2
1 2
3
45
6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SM BUS PU(KBC)
For test only
EC(KBC)
Please do not place anypull-up resistoron GPG0, GPG2, and GPG6(Reservedhardware strapping).
+3VPCU_EC and +3V_RTCminimum trace width 12mils.
SM Bus 1
SM Bus 2
Battery
PCH/VGA
SM BUS ARRANGEMENT TABLE
12 mils
12 mils
Input only
(For PLL Power)
HWPG(KBC)
20120217 reserve iRST function.
iRST
1008：：：：Change Power rail from +3VPCU to +3VPCU_EC
Layout Notes:Place Series Resistors close to ITE8587
PROCHOT_EC
NBSWON#
MBDATAMBCLK
2ND_MBCLK2ND_MBDATA
dGPU_OPP#
S5_ON
CLK_PCI_EC
+3V_EC
+3VPCU_EC
WRST#
MBDATA2ND_MBCLK
MBCLK
2ND_MBDATAEC_PECR_R
EC
AG
ND
+A3VPCU+3VPCU_ECPLL
ECAGND
ECAGND
HWPG
dGPU_OPP#
HWPG
IOAC_PCIERST#
PROCHOT_EC
PCH_SPI_SI_ECPCH_SPI_SO_EC
+3VPCU_EC
H_PROCHOT# [3,35,40]
LPC_LFRAME#[8,26,27]
LPC_LAD1[8,26,27]LPC_LAD0[8,26,27]
LPC_LAD3[8,26,27]LPC_LAD2[8,26,27]
CLKRUN# [7,27]
MX7[32]MX6[32]MX5[32]MX4[32]MX3[32]MX2[32]MX1[32]MX0[32]
MY16[32]MY17[32]
MY0[32]MY1[32]MY2[32]MY3[32]MY4[32]MY5[32]MY6[32]MY7[32]MY8[32]MY9[32]
MY10[32]MY11[32]MY12[32]
MY14[32]MY15[32]
MY13[32]
MBCLK [35]MBDATA [35]
2ND_MBDATA [9,19]2ND_MBCLK [9,19]
TPDATA [32]TPCLK [32]
EC_PECI [3,10]
SUSB# [7]NBSWON# [31]
USB_CHG_EN [31]USB_CHG_MODE [31]
VRON [40]
PCH_SPI_SO_EC[8]PCH_SPI_SI_EC[8]
PCH_SPI_CLK_EC[8]SPI_CS0#_UR_ME[8]
PWRLED# [33]
SIO_RCIN#[10]
SIO_EXT_SMI#[10]SIO_EXT_SCI#[10]
SERIRQ[8,27]
PLTRST#[9,16,26,27,28]CLK_PCI_EC[9]
FANSIG1 [32]FANSIG2 [32]
ICMNT [35]
LID#[24,31]
BT_POWERON[26]
TEMP_MBAT [35]
+0.75V_ON[37]
dGPU_OTP# [19]
MAINON[31,37,38,41]
AMP_MUTE#[30]
WLAN_OFF [26]USBON# [31]
DPWROK[7]
BATLED1#[33]
ACIN [35]
SUSC# [7]
PWROK_EC[7]
S5_ON [36,41]
dGPU_OPP# [19]SB_ACDC [35]DNBSWON# [7]
FB_CLAMP_TGL_REQ#[19]
PCH_RSMRST# [7]
SUSLED# [33]ME_WR# [8]
CPUFAN1 [32]CPUFAN2 [32]
BATLED0# [33]
PCBEEP_EC[30]
HWPG_1.8V[41]
HWPG_1.5V[37]
HWPG_VTT[38,39]
SYS_HWPG[36]
GFX_PWRGD[7,40]
HWPG_VCCSA[39]
PCIERST# [26,28]PCI_PLTRST#[3,9]
RF_EN [26]
SIO_A20GATE[10]
APWROK [7]
dGPU_ALT# [19]
WAKE_SRC_1 [26]
KEY_BL_EN[32]
EC_FPBACK# [24]
EC_FB_CLAMP [17,19,20]
SUSON[37]
IOAC_LANPWR# [26]
D/C#[35]
IOAC_PCIERST# [26,28]
EC_DRAMRST_CNTRL[4]
LANPWR# [28]
COLOR_ENG[24]
SLP_SUS#[7,11]LAN_WAKE#[28]
PCH_SUSACK# [7]PCH_SUSWARN# [7]
+3VPCU
+3V_S5
+3V_GFX
+3VPCU
+3VPCU
+3V
+3VPCU
+3V_RTC
+3VPCU_EC
+3V
+3V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
KBC IT8587 1A
34 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
KBC IT8587 1A
34 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
KBC IT8587 1A
34 46Monday, January 07, 2013
ZQK
D25 *BAS316
0.1u/10V_4
C220
R110*100K/J_4
TP7
D26 *RB500V-40
C118*10p/50V_4
R98 4.7K_4
0.1u/10V_4
C109
R523
10K/J_4
L16BLM11A05S/0.2A/120ohm_6
R102 4.7K_4
C76 10u/6.3V_6
0.1u/10V_4C78
D27 *RB500V-40
R517 AC@0_40.1u/10V_4
C221
R832
100K/J_4
R525
100K_4
L13BLM11A05S/0.2A/120ohm_6
Q52
2N7002K
3
2
1
R177 10K_4
D29 *RB500V-40
TP114
R150
*22_4
KBMX
LPCGPIO
SM
BU
SP
S/2
PWM
WAKE UP
UART port
A/D D/A
CLOCK
IT8587CIR
SPI ENABLE
EXTERNAL SERIAL FLASH
U15
IT8587E/EX
WRST#14
LPCCLK/GPM4(X)13
LAD0/GPM0(X)10
LAD1/GPM1(X)9
LAD2/GPM2(X)8
LAD3/GPM3(X)7
LFRAME#/GPM5(X)6
LPCPD#/WUI6/GPE6(Dn)17
SERIRQ/GPM6(X)5
ECSMI#/GPD4(Up)15
ECSCI#/GPD3(Up)23
GA20/GPB5(X)126
KBRST#/GPB6(X)4
SSCE1#/GPG0(X)106
FSCK/GPG7105
DSR0#/GPG6(X)104
FSCE#/GPG3101
SSCE0#/GPG2(X)100
KS
I0/S
TB
#58
KS
I1/A
FD
#59
KS
I2/IN
IT#
60
KS
I3/S
LIN
#61
KS
I462
KS
I563
KS
I664
KS
I765
KSO0/PD036
KSO1/PD137
KSO2/PD238
KSO3/PD339
KSO4/PD440
KSO5/PD541
KSO6/PD642
KSO7/PD743
KSO8/ACK#44
KSO9/BUSY45
KSO10/PE46
KSO11/ERR#51
KSO12/SLCT52
KSO1353
KSO1454
KSO1555
VC
C11
VS
TB
Y26
VS
TB
Y50
VS
TB
Y92
VS
TB
Y11
4
VS
TB
Y12
7
VS
TB
Y12
1
VB
AT
3
AV
CC
74
SMCLK0/GPB3(X)110
SMCLK1/GPC1(X)115SMDAT0/GPB4(X)111
SMDAT1/GPC2(X)116
PS2CLK0/TMB0/CEC/GPF0(Up)85
PS2DAT0/TMB1/GPF1(Up)86
PS2CLK1/DTR0#/GPF2(Up)87 TMRI0/WUI2/GPC4(Dn)
120
TMRI1/WUI3/GPC6(Dn)124
LPCRST#/WUI4/GPD2(Up)22
RTS1#/WUI5/GPE5(Dn)35
PWRSW/GPE4(Up)125
RI1#/WUI0/GPD0(Up)18
RI2#/WUI1/GPD1(Up)21
RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7(Dn)112
TXD/SOUT0/GPB1(Up)109
RXD/SIN0/GPB0(Up)108
CTX0/TMA0/GPB2(Dn)123
PS2DAT1/RTS0#/GPF3(Up)88
PS2CLK2/WUI20/GPF4(Up)89
PS2DAT2/WUI21/GPF5(Up)90
PECI/SMCLK2/WUI22/GPF6(Up)117
SMDAT2/WUI23/GPF7(Up)118
TACH0A/GPD6(Dn)47
TACH1A/TMA1/GPD7(Dn)48
PWM0/GPA0(Up)24
PWM1/GPA1(Up)25
PWM2/GPA2(Up)28
PWM3/GPA3(Up)29
PWM4/GPA4(Up)30
PWM5/GPA5(Up)31
PWM7/RIG1#/GPA7(Up)34
ADC0/GPI0(X)66
ADC1/GPI1(X)67
ADC2/GPI2(X)68
ADC3/GPI3(X)69
ADC4/WUI28/GPI4(X)70
ADC5/DCD1#/WUI29/GPI5(X)71
ADC6/DSR1#/WUI30/GPI6(X)72
ADC7/CTS1#/WUI31/GPI7(X)73
VS
S1
VC
OR
E12
VS
S27
VS
S49
VS
S12
2V
SS
113
AV
SS
75
CK32KE/GPJ72
CK32K/GPJ6128
DAC3/TACH1B/GPJ3(X)79DAC2/TACH0B/GPJ2(X)78GPJ1(X)77TACH2/GPJ0(X)76
EG
CS
#/W
UI2
6/G
PE
2(D
n)83
EG
CLK
/WU
I27/
GP
E3(
Dn)
84
EG
AD
/WU
I25/
GP
E1(
Dn)
82
GINT/CTS0#/GPD5(Up)33
L80L
LAT
/WU
I7/G
PE
7(U
p)20
L80H
LAT
/BA
O/W
UI2
4/G
PE
0(D
n)19
WU
I41/
GP
H5/
ID5(
Dn)
98W
UI4
2/G
PH
6/ID
6(D
n)99
WU
I19/
GP
H3/
ID3(
Dn)
96W
UI4
0/G
PH
4/ID
4(D
n)97
CRX1/WUI17/SIN1/SMCLK3/GPH1/ID1(Dn)94 CTX1/WUI18/SOUT1/GPH2/SMDAT3/ID2(Dn)95
CLK
RU
N#/
WU
I16/
GP
H0/
ID0(
Dn)
93
VS
S91
DAC5/RIG0#/GPJ5(X)81
DAC4/DCD0#/GPJ4(X)80
PWUREQ#/BBO/SMCLK2ALT/GPC7(Up)/SMCLK2ALT16
CRX0/GPC0(Dn)119
DTR1#/SBUSY/GPG1/ID7(Dn)107
KSO16/SMOSI/GPC3(Dn)56
FMOSI/GPG4102
FMISO/GPG5103
KSO17/SMISO/GPC5(Dn)57
PWM6/SSCK/GPA6(Up)32
D28 RB500V-40
R134 10K_4
0.1u/10V_4
C114
D23 *RB500V-40
R526*10K_4
R833
100K/J_4
R834 100K/J_4
R168100K_4
12
R223 2.2_61 2
C850
39P/50V_4
R97 4.7K_4
0.1u/10V_4C150
R109*100K/J_4
0.1u/10V_4
C95
0.1u/10V_4
C106
R527*10K_4
L10BLM11A05S/0.2A/120ohm_6
U13*TC7SH08FU
2
14
35
0.1u/10V_4
C80
R126 0_6
D7SDMK0340L-7-F
21
C66*0.1u/10V_4
0.1u/10V_4
C79
0.1u/10V_4
C174
C1261U/6.3V_4
R92 4.7K_4
R96 43_4
R95 *10K_4
SW1
Power Switch
3142
56
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Add ESD diode base on EC FAE suggestion
recommend 200mA at least.
REGN MAX voltage 6.5VV_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr=0.793V for 3.965A current limit
Pin10 ILIM=0.793VRsr = 0.01ohm
For battery reverse
Limit set on 60W/3.16A
35
24737_SRN
24737_SRP
TEMP_MBATBATT_EN#
BAT-V
MBDATA
MBCLKTEMP_MBAT
24737_REGN
24737_BST
24737_DH
24737_LX
BAT-V24737_DL
24737_ACN
24737_ACP
24737_ACP
24737_ACN
24737_ACDET
24737_VCC
24737_BM#
24737_ILIM
24737_CMPOUT24737_SRP
24737_SRN
MBDATA
MBCLK
24737_CMPOUT
24737_CMPIN
24737_BM#
BATT_EN#
D/C# [34]
MBCLK [34]
MBDATA [34]
TEMP_MBAT [34]
ICMNT[34]
SB_ACDC[34]
ACIN[34]
ACPRESENT[7]
H_PROCHOT# [3,34,40]
BATT_EN#[33]
VIN
VIN
+3VPCU
+3VPCU
+3VPCU
VA2
+3VPCU
+3V
VA1
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Charger(BQ24737RGRR) 1A
35 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Charger(BQ24737RGRR) 1A
35 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Charger(BQ24737RGRR) 1A
35 46Monday, January 07, 2013
ZQK
PR33*10K_4
PR1160_6
PU6
*IP4223-CZ6
VP5
CH23
CH34
CH11
VN2
CH46
PR140*0_4
PR41220K_4
PR134*0_4
PC980.1u/50V_6
PR32100K_4
PC9247p/50V_4
PQ42N7002DW
6 2
1
5
43
PC1160.1u/25V_4
PC66*680p/50V_6
PC712200p/50V_6
PC1140.01u/25V_4
PC250.1u/25V_4
PD21N4148WS
PL106.8uH_7X7X3
PC300.1u/50V_6
PQ46MDV1528
35
2
4
1
PR1540_4
PC1742200p/50V_6
PC990.1u/50V_6
PC670.1u/50V_6
PR720_4
PR10533K/F_4
PC724.7u/25V_8
PC960.1u/50V_6
PR260_4
PR157*100K_4
PR1100_6
PR139*10K_4
PJ1
5045
8-00
801-
V01
123456789
10
PD7SMAJ20A2
1
PR156100K/F_4
PR1357.5_6
PR1550_4
PR224*100K_4
PR143*100K_4
PQ52*2N7002K
3
2
1
PC86*47p/50V_4
PQ47MDV1595S
35
2
4
1
PQ8IMD2AT108
3
2
1 6
5
4
PR43220K_4
PR14110K_4
PD1SBR1045SP5-13
2
13
PC851u/16V_6
PR13110_6
PC122*100p/50V_4
PR440_4
PR127100_4
PR31100K_4
PC5510u/25V_1206
PC5210u/25V_1206
PC1150.1u/25V_4
PR130100_4
PC280.1u/50V_6
CN9
Power conn
1234
PC312200p/50V_6
PR760.01/F_0612
1 2
PR420_4
PR115100_4
PU9BQ24737RGRR
CMPIN4
IOU
T7
SCL9
GN
D21
SDA8
BTST17
HIDRV18
CMPOUT3
ACOK#5
ACDET6
VCC20
SRP13
ILIM10
BM#11
SRN12
PHASE19
AC
P2
GN
D22
GN
D24
GN
D23
GN
D25
PGND14
LCDRV15
REGN16A
CN
1
PR10410K_4
PC1110.1u/25V_4
PC8447n/50V_6
PC290.1u/50V_6
PC113100p/50V_4
PR1291M_4
PR158316K/F_4
PR15263.4K/F_4
PD3RB500V-40
PR460_4
PR450.01/F_0612
1 2
PR85*4.7_6
PR1481.62K/F_4
PC890.47u/25V_6
PC482200p/50V_6
PQ512N7002K
3
2
1
PR25*0_4
PR750_4
PQ12AOL1413
352
4
1
PQ9AOL1413
352
4
1
PC1920.1u/50V_6
PC11268n/10V_4
PQ132N7002K
3
2
1
PR11420_1206
PR15310K/F_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
TDC : 1.5APEAK : 2AWidth : 80mil
TDC : 2.5APEAK : 3.4AWidth : 100mil
TDC : 1.7APEAK : 2.3AWidth : 80mil
TDC : 1.2APEAK : 1.6AWidth : 50mil
+5VPCU5 Volt +/- 5%TDC : 7APEAK : 9AOCP : 10AWidth : 280mil
+3VPCU3.3 Volt +/- 5%TDC : 5.5APEAK : 7.5AOCP : 9AWidth : 220mil
Iocp=10-(3.367/2)=8.32AVth=(8.32A*14mOhm)+1mV=117.43mVR(Ilim)=(117.43mV*8)/10uA=93.944K
OCP:10AL(ripple current)=(9-5)*5/(2.2u*0.3M*9)=3.367A
L(ripple current)=(9-3.3)*3.3/(2.2u*0.355M*9)~2.676AIocp=9-(2.676/2)=7.66AVth=(7.66A*14mOhm)+1mV=108.27mVR(Ilim)=(108.27mV*8)/10uA=86.614K
OCP:9A
RDSon=14mohm RDSon=14mohm
36
9/10 change9/10 change
10/11 change
10/15 change
+15V_ALWP
MAIND
5122
5_C
S1
5122
5_C
S2
SYS_SHDN#
S5D MAIND MAIND S5D
51225_VBST1
51225_DH1
51225_SW1
51225_DL1
5122
5_V
CLK
5122
5_V
IN
51225_FB1
51225_EN1
SYS_SHDN#
51225_DH2
51225_DL2
51225_SW2
51225_VBST2
51225_FB2
SYS_SHDN#
MAIND [5,37,41]
SYS_HWPG[34]
SYS_SHDN# [3,27,41]
S5_ON[34,41]
VIN VIN
+15V
+3VPCU
+3VPCU
+5VPCU
+15VVIN +5V_S5+3V_S5 VIN
VL
+5VPCU
+5V
+3VPCU
+3V +3V_S5
+3VPCU+5VPCU
+5V_S5
3V_LDO
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
SYSTEM 5V/3V (TPS51225) 1A
36 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
SYSTEM 5V/3V (TPS51225) 1A
36 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
SYSTEM 5V/3V (TPS51225) 1A
36 46Monday, January 07, 2013
ZQK
PQ50MDV1595S
35
2
4
1
PR931M_6
PC184*680p/50V_6
PC1214.7u/25V_8
PC1100.1u/50V_6
PC88*680p/50V_6
PR1180_6
PR13810K/F_4
PQ18AO3404
3
2
1
PR12210K/F_4
PL162.2uH_7X7X3
PC82
0.1u/50V_6
PQ172N7002K
3
2
1
+
PC181220u/6.3V_6X4.2
PQ162N7002K
3
2
1
PR1470_6
PC108
0.1u/50V_6
PC68*2.2n/50V_4
PC
9710
u/6.
3V_6
PR16222_8
PR1440_4
PQ19MDV1528Q
35
2
41
PR
232
97.6
K/F
_4
PQ142N7002K
3
2
1
PQ56MDV1528Q
35
2
4
1
PR23010K/F_4
PQ55MDV1528
35
2
4
1
PC1250.1u/50V_6
PR97*1M_6
PC1872200p/50V_6
PQ39MDV1528Q
35
2
4
1
PC1772200p/50V_6
PC814.7u/25V_8
PC1240.1u/50V_6
PR236*4.7_6
PR221*100K/F_4
PR1201M_6
PR
227
86.6
K/F
_4
PR1256.49K/F_4
PR13315K/F_4
PQ54MDV1595S
35
2
4
1
PR146
1/F_6
PR1130_4
PC1760.1u/50V_6
+
PC191220u/6.3V_6X4.2
PD41PS302
1
2
3
PL142.2uH_7X7X3
PR10322_8
PR12622_8
PD51PS302
1
2
3
PC
930.
1u/2
5V_4
PC1090.1u/50V_6
PR1081M_6
PQ48MDV1528
35
2
4
1
PC
954.
7u/6
.3V
_6
PQ152N7002K
3
2
1
+ PC18347u/25V_6X4.5
12
PU8TPS51225RUKR
DRVH210
VBST29
SW28
DRVL211
VFB24
DRVH116
VBST117
SW118
DRVL115
VFB12
CS
11
CS
25
VC
LK19
VIN
12
VR
EG
33
VR
EG
513
PGOOD7
EN26
EN120
VO114
GND21
GND22
GN
D23
GN
D24
GN
D25
GN
D26
PR112
1/F_6
PR1230_6
PC1930.1u/50V_6
PR117*4.7_6
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Close to output cap
ON ON
ON ON
VTTREF+1.5VSUS
OFF
ON
OFF OFF0 0
OFF
1
1
S3 S5
S0
S3 (mainon off)
S4/S5
1
0
RDSon=4.3mohm
TDC : 0.75APEAK : 1AWidth : 40mil
TDC : 0.38APEAK : 0.5AWidth : 20mil
+1.5VSUS1.5 Volt +/- 5%TDC : 14APEAK : 18AOCP : 20AWidth : 560mil
VREF=1.8V
OCP=20AL ripple current =(19-1.5)*1.5/(0.36u*400k*19)=9.594AVtrip=20-(9.594/2)*4.3mohm=0.065372VRlimit=0.065372/10uA*8=52.297Kohm
Greater than or equal 40mil
Close to IC
Mode Frequency Discharge mode
200K 400K Tracking Discharge
100K 300K Tracking Discharge
37
TDC : 0.38APEAK : 0.5AWidth : 20mil
10/11 change
51216_DRVH
51216_SW
51216_VBST
51216_S551216_S3
51216_S3
51216_S551
216_
RE
FIN
51216_REF
51216_MODE
51216_TRIP 51216_DRVL
MAINON[31,34,38,41]
SUSON[34]
HWPG_1.5V[34]
+0.75V_ON[34]
MAIND[5,36,41]
+1.5VSUS
VIN
+5VPCU
+3V
+0.75V_DDR_VTT
+SMDDR_VREF
+1.5V
+1.5VSUS
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DDR 1.5V(TPS51216) 1A
37 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DDR 1.5V(TPS51216) 1A
37 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
DDR 1.5V(TPS51216) 1A
37 46Monday, January 07, 2013
ZQK
PC604.7u/25V_8
PR910_6
PQ41AO3404
3
2
1
PC154*680p/50V_6
PC1682200p/50V_4
PC6310u/6.3V_6
+
PC173330u/2.5V_6X4.2
PR89*0_4
PR205200K/F_4
PR862_6
PC571u/10V_4
PR96*0_4
PC6510u/6.3V_6
PU5TPS51216RUKR
PGND10
DRVL11
SW13
VBST15
DRVH14
VLD
OIN
2
VT
T3
VT
TS
NS
1
VT
TG
ND
4
VT
TR
EF
5
PGOOD20
MODE19
TRIP18
S317
S516
GN
D7
VD
DQ
SN
S9
RE
FIN
8
RE
F6
PA
D21
PA
D22
PA
D23
PA
D24
PA
D25
PAD26
V5IN12
PR950_4
PR92100K/F_4
PC6410u/6.3V_6
PC560.22u/10V_4
PC540.1u/10V_4
PL130.36uH_10X10X4PR204
52.3K/F_4
PQ45RJK03J6DPA
4
21 35
PC530.01u/25V_4
PC614.7u/25V_8
PC590.1u/50V_6
+
PC165330u/2.5V_6X4.2
PR20310K/F_4
PC1560.1u/50V_6
PQ44RJK03K5DPA
4
21 35
PR940_4
PR198*4.7_6
PR8169.8K/F_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
OCP=20AL ripple current =(19-1.05)*1.5/(0.68u*500k*19)=2.918AVtrip=20-(2.918/2)*4.3mohm=0.07972VRlimit = 0.07972/10uA*8=63.781Kohm
RC filter is for improveJitter performance.
+1.05V1.05 Volt +/- 2%TDC : 14APEAK : 17AOCP : 20AWidth : 560mil
Close to output cap
RDSon 4.3mOhmVREF=2V
38
51219_EN
51219_V5
51219_TRIP
51219_MODE
5121
9_G
SN
S
5121
9_V
SN
S
51219_DH
51219_SW
51219_DL
5121
9_R
EF
IN51219_REF
51219_SW
HWPG_VTT[34,39]
MAINON[31,34,37,41]
VCCP_SENSE [5]
VSSP_SENSE [5]
+5V_S5+3V
+1.05V_VTT
VIN
+3V_S5
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
+1.05V (TPS51219) 1A
38 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
+1.05V (TPS51219) 1A
38 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
+1.05V (TPS51219) 1A
38 46Monday, January 07, 2013
ZQK
PR173*11K/F_4
PR140_4
PR170*10K/F_4
+PC134
330u/2V_7343
PC
191n
/50V
_4
PR11100K_4
PR1690_4
PR4*4.7_6
PR1810_4
PR1711K/F_4
PC8*0.1u/10V_4
PC
131n
/50V
_4
PR17610_6
PC141u/6.3V_4
PC1314.7u/25V_8
PC170.01u/16V_4
PR120_4
PR17564.9K/F_4
PC5*680p/50V_6
PC1292200p/50V_4
PR13*100_4
PC1334.7u/25V_8
PR1720_4
PR1510_4
PR102_6
PC100.1u/10V_4
PR90_6
PR17*100_4
PL60.68uH_7X7X3
D1
D1
D1
G1
G2
S2
S2
S2
S1/D2
PQ25
FDMS3660S
1
2
8
567
9
PC110.1u/25V_6
PC1320.1u/50V_6
PU2TPS51219RTER
DH11
SW12
DL10
BST13
PGOOD16
EN14
MODE15
PGND8
GN
D7
TRIP6
V59
VS
NS
4
GS
NS
3
CO
MP
5
PA
D17
PA
D18
PA
D19
PA
D20
PA
D21
PA
D22
VR
EF
1
RE
FIN
2P
C12
0.01
u/25
V_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCSA0.9 Volt +/- 2%TDC : 3APEAK : 4AWidth : 120mil
10
VID0 +VCCSA
0.85V
0.9V
VID1
1
1 1
0 0
0 0.775V
0.75V
default 0.9V
39
51461_SW
5146
1_S
LEW
51461_FILT
51461_EN
5146
1_M
OD
E51461_VOUT
51461_BST
5146
1_V
RE
F
VCCSA_SENSE [5]
HWPG_VCCSA[34]
HWPG_VTT[34,38]
VCCSA_VID1[5]
VCCSA_VID0[5]
+VCCSA
+3V
+5V_S5
+3V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
VCCSA(TPS51463) 1A
39 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
VCCSA(TPS51463) 1A
39 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
VCCSA(TPS51463) 1A
39 46Monday, January 07, 2013
ZQK
PC1721u/6.3V_4
PC1620.22u/10V_4
PR87 0_6
PC
158
10u/
6.3V
_6
PC1660.1u/10V_4
PR90*100K_4
PC1690.1u/50V_6
PC
161
0.1u
/50V
_6
PC1633.3n/50V_4
PR2100_4
PR2110_6
PL110.47uH_7X7X3
PR82*33K/F_4
PR200*10K/F_4
PC16710u/10V_8
PR2081K_4
PC
5010
u/6.
3V_6
PC
5110
u/6.
3V_6
PC1640.01u/16V_4
PR202100/F_4
PC
160
10u/
6.3V
_6
PC
4910
u/6.
3V_6
PR2010_4
PC1712.2u/6.3V_6
PU12TPS51463
GN
D1
VR
EF
2
CO
MP
3
SLE
W4
VO
UT
5
MO
DE
6
SW7
SW8
SW9
SW10
PG
ND
21
VIN
22
PG
ND
20
SW11
BST12
VIN
23
VIN
24
EN13
VID014
VID115
PGOOD16
V5FILT17
V5DRV18 P
GN
D19
AGND25
PC170*0.1u/10V_4
PC5810u/10V_8
PR2091K_4
PR84 0_6
PC
159
10u/
6.3V
_6
PR
199
4.99
K/F
_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DCR=1mOhm
AXG
Close with AXG inductor
DCR=1mOhm
+VCC_GFXTDC : 21.5APEAK : 33AOCP : 38AWidth : 1320mil
+VCC_CORETDC : 16APEAK : 33AOCP : 40AWidth : 1320mil
GFX_CORE Load Line : -3.9mV/A for GT2
VCORE Load Line : 2.9mV/A
Close to VR
Close to the VR side.
Close to the VR side.
Close to the CPU side.
Parallel
Parallel
Close to the CPU side.
Close with phase1 inductor
Place NTC close to the VCORE Hot-Spot.
Place NTC close to the GFX_CORE Hot-Spot.
VR_ON PU to 5V for test mode
for faster response
1.7VThermal shutdown setting 104C
40
51650_CDH1
51650_CSW1
51650_CDL1
51650_CBST1
51650_CDL3
51650_CSW1
VR_SVID_DATA
VR_SVID_CLK
VR_SVID_ALERT#
51650_GSKIP#51650_GPWM1
51650_VBAT
51650_V5
51650_V5DRV
51650_CDH1
51650_CBST1
51650_CSW1
51650_CDL1
5165
0_C
TH
ER
M
5165
0_G
VF
B
5165
0_G
GF
B
5165
0_G
CS
N1
5165
0_G
CS
P1
5165
0_G
TH
ER
M
5165
0_G
PW
M1
51650_CCSP1
51650_CCSN1
51650_GCSP1
51650_GCSN1
VR_SVID_CLK
VR_SVID_ALERT#
VR_SVID_DATA
51650_GSKIP#
51650_GF-IMAX
51650_SLEW
51650_GOCP-R
51650_VRON
51650_CF-IMAX
51650_COCP-R
51650_VREF
5165
0_C
CS
P1
5165
0_C
CS
N1
5165
0_C
VF
B
5165
0_C
GF
B
51650_VREF
5165
0_C
CO
MP
51650_VREF
51650_CBST3
51650_CDH351650_CSW3
51650_VRON 51650_CTHERM51650_GTHERM
51650_CSW3
VR_SVID_DATA[5]
VR_SVID_ALERT#[5]
VR_SVID_CLK[5]
H_PROCHOT#[3,34,35]
VRON[34]
GFX_PWRGD[7,34]
IMVP_PWRGD[3,7]
VSS_SENSE[5]
VCC_SENSE[5]
VSS_AXG_SENSE[5]
VCC_AXG_SENSE[5]
+VCC_GFX
VIN
+VCC_CORE
VIN
+1.05V_VTT
+5V_S5
+5V_S551650_VREF
+3V_S5+3V+1.05V_VTT
51650_VREF
+VCC_CORE
+VCC_GFX
51650_VREF
+3V
+3V
+3V_S5
+5V_S5
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
+VCC_CORE/+VGFX (TPS51650) 1A
Monday, January 07, 2013
ZQK
40 46
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
+VCC_CORE/+VGFX (TPS51650) 1A
Monday, January 07, 2013
ZQK
40 46
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
+VCC_CORE/+VGFX (TPS51650) 1A
Monday, January 07, 2013
ZQK
40 46
PC1880.22u/25V_6
D1
D1
D1
G1
G2
S2
S2
S2
S1/D2
PQ49FDMS3660S
1
2
8
567
9
PU10
TPS51601DRBR
BST1
SKIP2
PWM3
GND4
DRVL5VDD6SW7DRVH8
PAD9
PAD10
PAD11
PAD12
PAD13
PAD14
PR
101
2.2_
6
PC
179
0.1u
/50V
_6
PC107*0.1u/25V_4
PR
136
*0_4
PC1030.1u/10V_4
PC1201u/10V_4
PR
119
54.9
/F_4
PR
217
30K
/F_4
PR
830_
4
PR78 0_4
PR79 0_4
PR
242
100K
/F_4
_425
0NT
C
PR77*10_4
PC
100
22n/
16V
_4
PR
235
1.91
K/F
_4
PC70*0.1u/25V_4
PR231 *0_4
+ PC10115u/25V_7343
12
PC
7547
p/50
V_4
D1
D1
D1
G1
G2
S2
S2
S2
S1/D2
PQ53FDMS3660S
1
2
8
567
9
PL150.24uH_7X7X4
1 2
3 4
PR
229
100K
/F_4
PC
185
0.1u
/50V
_6
PR10015.8K/F_4
PC
182
4.7u
/25V
_812
PC
189
0.1u
/10V
_4
PR244*10_4
PR
218
75K
/F_4 P
R20
610
0K/F
_4_4
250N
TC
PR
124
130/
F_4
PR1092.2/F_6
PR
215
187K
/F_4
PR
145
5.49
K/F
_4
PR
234
*191
K/F
_4P
C11
84.
7u/2
5V_81
2
PR
984.
7K/F
_4
PR
132
200K
/F_4
PC69*0.1u/25V_4
PR
8816
.9K
/F_4
+
PC
6233
0u/2
V_7
343
PC
117
4.7u
/25V
_812
PC104*0.01u/50V_4
PR2400_4
PR80*10_4 + PC91
15u/25V_7343
12
PR
225
*22.
6K/F
_4
PC105*330p/50V_4
PR
241
26.1
K/F
_4
PR
102
10/F
_6
PR
996.
65K
/F_4
PC73*0.01u/50V_4
PR238*0_4
+
PC
123
330u
/2V
_734
3
PC
178
2200
p/50
V_4
PR
220
75K
/F_4
PL120.24uH_7X7X41 2
3 4P
R15
10_
4
PC
155
0.1u
/10V
_4
PC106*0.1u/25V_4
PR
207
28.7
K/F
_4
PC
904.
7u/6
.3V
_6
PC1751u/6.3V_4
PR
223
*499
/F_4
PR2220_6
PR107 0_4
PR233100K/F_4_4250NTC
PC
119
2200
p/50
V_6
PR
111
1.91
K/F
_4
PR2392.2/F_6
PC
102
100p
/50V
_4
PR
213
200K
/F_4
PR237*0_4
PC
792.
2u/6
.3V
_4
PC
7722
00p/
50V
_6
PR
228
30.1
K/F
_4
PC74*330p/50V_4
PR
137
10K
/F_4
PR106*0_4
PC
870.
1u/1
0V_4
PR
214
52.3
K/F
_4
PR
150
14.3
K/F
_4
PC
7822
n/16
V_4
PC
804.
7u/2
5V_81
2
PU7TPS51650RSLR
CT
HE
RM
1
COCP-R2
CF-IMAX3 C
CS
P1
4
CC
SN
15
CC
SN
26
CC
SP
27
CC
SP
38
CC
SN
39
CC
OM
P10
CV
FB
11
CG
FB
12
GOCP-R13
VR
EF
14
V3R315
VR_ON16
CPGOOD17
VCLK18
ALERT19
VDIO20
VR_HOT21
SLEW22
GPGOOD23
GF-IMAX24
GG
FB
25
GV
FB
26
GC
OM
P27
GC
SN
128
GC
SP
129
GC
SP
230
GC
SN
231
GT
HE
RM
32
GSKIP33
GP
WM
134
GP
WM
235
CP
WM
336
VBAT37
CDH238
CBST239
CSW240
CDL241
PGND42
V5DRV43
CDL144
CSW145
CBST146
CDH147
V548
PA
D49
TP
AD
150
TP
AD
251
TP
AD
352
TP
AD
453
TP
AD
554
TP
AD
655
TP
AD
756
TP
AD
857
TP
AD
958
TP
AD
1059
TP
AD
1160
TP
AD
1261
TP
AD
1362
TP
AD
1463
TP
AD
1564
TP
AD
1665
PC9443p/50V_4
PC830.22u/25V_6
PC
190
10u/
6.3V
_6
PR
121
*75/
F_4
PC
157
10u/
6.3V
_6
PR212100K/F_4_4250NTC
PR
226
20K
/F_4
PC
760.
1u/1
0V_4
PC1801u/6.3V_4
PR
149
2.2_
6
PR
216
*100
K/F
_4
PR245*10_4
PR
128
0_6
PR219100K/F_4
PC
186
2200
p/50
V_4
PR2430_4
PR14215.8K/F_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
V0=0.8*(R1+R2)/R2
R1
R2
+1.8V1.8 Volt +/- 5%TDC : 0.9APEAK : 1.22AWidth : 40mil
Thermal protection
For EC control thermal protection (output 3.3V)
4110/11 change
10/11 change
54318_VSNS
MAIND
S5_ON
2.469V
S5_ON
LM393_PIN2
MAINON
MAINON_G
HWPG_1.8V[34]
MAIND [5,36,37]MAINON_G[3,5]
SYS_SHDN# [3,27,36]
S5_ON[34,36]
MAINON[31,34,37,38]
+3V
+1.8V+3VPCU
VIN +15V+5V+3V
VLVL
VIN
+1.5V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
+1.8V/Discharge/Thermal 1A
Monday, January 07, 2013
ZQK
4641
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
+1.8V/Discharge/Thermal 1A
Monday, January 07, 2013
ZQK
4641
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
+1.8V/Discharge/Thermal 1A
Monday, January 07, 2013
ZQK
4641
PC2410u/6.3V_6
PR210_4
PR1881.74K/F_4
PR18910K_6_NTC
PR19*100K/F_4
PR22100K/F_4
PC201000p/50V_4
PC1410.1u/50V_6
PQ242N7002K
3
2
1
PR186200K/F_4
PC160.01u/25V_4
PQ212N7002K
3
2
1
PR1601M_4
PL11uH_7X7X3
PR1611M_4
PC220.1u/25V_4
PR1830_6
PQ31AO3409
3
2
1
PR2010K/F_4
PQ332N7002K
3
2
1
PR1841M_6
PQ32DTC144EUA
13
2
PR16
0_6
PC1420.1u/50V_6
PQ232N7002K
3
2
1
PC126*2200p/50V_4
PC150.1u/50V_6
PR16522_8
PR163*100K/F_6
PC910u/6.3V_6
PQ342N7002K
3
2
1
PR185200K_6
PR1661M_4
PQ202N7002K
3
2
1
PR16422_8
PR178121K/F_4
PD6DA2J10100L
PR181100K/F_4
PR2378.7K/F_4
PU3 TPS54318RTER
VSNS6
VIN16
VIN2
BOOT13
PWRGD14
PH11
VIN1
PH12
PH10
EN15
GND3
COMP7
RT/CLK8
SS9
GND4
AGND5
PA
D17
PA
D18
PA
D19
PA
D20
PA
D21
PA
D22
PR187200K/F_4
PC18*100p/50V_4
PR15922_8
PC710u/6.3V_6
PC60.1u/25V_4
+
-
PU11BBA10393F
5
67
PQ222N7002K
3
2
1
PC211200p/50V_4
+
-
PU11ABA10393F
3
21
84
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05V_GFXTDC : 2.3APEAK : 3AWidth : 100mil
+3V_GFXTDC : 0.76APEAK : 1AWidth : 40mil
42
+1.5V_GFXTDC : 4.43APEAK : 5.9AWidth : 180mil
10/1 Change
10/1 Change
OCP=7.5AL ripple current =(19-1.5)*1.5/(2.2u*290k*19)=2.165AVtrip=7.5-(2.165/2)*14mohm=0.0898VRlimit=0.0898/10uA*8=71.873Kohm
10/5 Reserve switching power for +1.5V_GFX
dGPU_D1
dGPU_D
dGPU_D2
DGPU_PWR_EN[9]
1.05V_GFX_EN[20]
FBVDDQ_EN[20]
VIN +15V+1.05V_GFX
VIN +15V+3V_GFX+3VPCU
+3V_GFX
+1.05V_VTT
+1.05V_GFX
+1.5VSUS
+1.5V_GFX
VIN +15V+1.5V_GFX
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
+VGPU_CORE(UP1642PQAG) 1A
Monday, January 07, 2013
ZQK
42 46
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
+VGPU_CORE(UP1642PQAG) 1A
Monday, January 07, 2013
ZQK
42 46
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
+VGPU_CORE(UP1642PQAG) 1A
Monday, January 07, 2013
ZQK
42 46
PR1771M_4
PQ11PDTC143TT
13
2
PR18222_8
PQ36RJK03K5DPA
4
21 35
PR3922_8
PC27*2.2n/50V_4
PR174100K_4
12
PQ12N7002K
3
2
1
PR35100K_4
12
PR371M_4
PC26*1u/10V_4
PR59100K_4
12
PR19022_8
PR340_4
PR381M_4
PR601M_4
PQ5PDTC143TT
13
2
PC23*2.2n/50V_4
PR1801M_4
PQ3MDV1528Q
35
24
1
PQ72N7002K
3
2
1
PQ302N7002K
3
2
1
PC143*2.2n/50V_4
PR241M_4
PQ292N7002K
3
2
1
PR361M_4
PQ2AO3404
3
2
1
PQ102N7002K
3
2
1
PC135*1u/10V_4
PC35*1u/10V_4
PR401M_4
PR1790_4
PQ352N7002K
3
2
1
PR571M_4
PR640_4
PQ62N7002K
3
2
1
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Add 3 GND VIAs for thermal pad
RDSon 2.2mohm
+VGPU_CORE1 Volt +/- 5%TDC : 45APEAK : 58AOCP : 70AWidth : 1800mil
RDSon 2.2mohm
DRC=0.78mohm
DRC=0.78mohm
R1
R2
R3
R4
R5
R6
C1
Place NTC close to the VGPU Hot-Spot.
43
1642_UGATE1
1642_BOOT1
1642_PHASE1
1642_ISEN1
1642_LGATE1
1642_BOOT2
1642_PHASE2
GPU_THAL#
1642_LGATE2
1642_TSNS
1642_TON
1642_PVCC
1642_EN
1642_VID
1642_PSI
1642_PGOOD
1642_REFIN
1642_COMP
1642_FBRTN
1642_FB
1642_VREF
1642_UGATE2
1642_PVCC 1642_ISEN1
GPU_THAL#
1642_VREF 1642_TSNS
1642_REFADJ
1642_FBRTN
GPU_VCCP_SENSE_R
1642_PHASE1
1642_PHASE2
DGPU_VRON[10,20]
VGPU_PWRGD[20]
VGPU_PSI[19]
VGPU_PWMVID[19]
GPU_VCCP_SENSE[16]
GPU_VSSP_SENSE[16]
GPU_THAL# [19]
+VGPU_CORE
VIN
+VGPU_CORE
VIN
+3V_S5
+VGPU_CORE+3V
+5V_S5+3V
+3V
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
+VGPU_CORE(UP1642PQAG) 1A
Monday, January 07, 2013
ZQK
43 46
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
+VGPU_CORE(UP1642PQAG) 1A
Monday, January 07, 2013
ZQK
43 46
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
+VGPU_CORE(UP1642PQAG) 1A
Monday, January 07, 2013
ZQK
43 46
PC
4710
00p/
50V
_6
PR1925.1K/F_4
PR19510K_4
PC
150
4.7u
/25V
_8
PR
193
*10K
_4
PC
40*0
.1u/
25V
_4
PC
145
2700
p/50
V_4
PC
370.
1u/2
5V_4
PR
194
100K
_4
PR
5618
K/F
_4
+ PC4615u/25V_3528
12
+
PC
4133
0u/2
V_7
343
PR52 0_4
D1
D1
D1
G1
G2
S2
S2
S2
S1/D2
PQ37
FDMS3660S
1
2
8
567
9
PR47 0_4
PR532.2/F_6
PC330.22u/25V_6
PR65*1.33K/F_4
PR
622.
2_6
PC
44*0
.1u/
25V
_4
PC
144
10u/
6.3V
_6
PR
6316
.2K
/F_4
PR7115.8K/F_4
PC
152
0.1u
/10V
_4
PR
196
66.5
K/F
_4
+
PC
149
330u
/2V
_734
3
PR5410K/F_4
PC
147
0.1u
/50V
_6
PR
492K
/F_4
PR611K/F_4
PR70 0_4
PC
148
4.7u
/25V
_8
PC450.22u/25V_6
PL9 0.36uH_10X10X4
PR7410K/F_4
PR28*100_4
PR6810K/F_4
PC
361u
/6.3
V_4
PR290_4
PR662.2/F_6
PC
3410
00p/
50V
_6
PR
191
*1K
/F_4
PR
5020
K/F
_4
PR6910K/F_4
PC
151
0.1u
/50V
_6
PR
6710
K_4
PC4333p/50V_4
PU4UP1642RQAG
PVCC21
TON9
EN3
PSI4
PGOOD16
VID5
REFADJ6
REFIN7
VREF8
COMP12
FB11
FBRTN10
UGATE12
BOOT11
PHASE124
DSBL/ISEN115
LGATE123
UGATE217
BOOT218
PHASE219
TALERT#/ISEN214
LGATE220
GND/PWM322
TSNS/ISEN313
PA
D25
PR5120K/F_4
D1
D1
D1
G1
G2
S2
S2
S2
S1/D2
PQ42
FDMS3660S
1
2
8
567
9
PL8 0.36uH_10X10X4
PR270_4
PR48 0_4
PC
424.
7u/2
5V_8
PC
3947
00p/
25V
_4
PR197100K/F_4_4250NTC
PR
552.
2_6
PR
732.
2_6
PC
146
0.1u
/10V
_4
PQ402N7002K
3
2
1 PR
58 0_4
PC
384.
7u/2
5V_8
PC
153
10u/
6.3V
_6
PR30*100_4
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GPIO17
+3VPCU
MOSFET
+1.5V_VRAM
PWMuP1642PQAG
VIN
DGPU_PWR_EN
DGPU_VRON
+VGPU_CORE
VGPU_PWRGD
EC_FB_CLAMPFBVDDQ_EN
MOSFET+1.5VSUS
+1.5V_GFX
HWPG_1.5VGFX
1.05V_GFX_EN
MOSFET
+1.05V_VTT +1.05V_GFX
GPIO3
GPIO35
PCH
DGPU_PWROK
All rails must be powered off within 10 ms from the first rail powering off.
IFPx_IOVDD (+1.05V_GFX)
+1.5V_GFX
+VGPU_CORE
+3V_GFX
PEX_VDD (+1.05V_GFX)
Power Sequence
44
+3V_GFX
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Power Sequence 1A
44 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Power Sequence 1A
44 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Power Sequence 1A
44 46Monday, January 07, 2013
ZQK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BATT ChargerAC Adapter
Battery
VINAlways System power
+3VPCU
+5VPCU
EC
1
4
PCH
PCH_RSMRST#
7
DNBSWON#8
NBSWON#
SUSB#
SUSC# 9
SUSON(SUSD)
SLP_S3#(SUSB#):S3 Sleep Power plane control Assertion of SLP_S3# shuts off power to non-critical components when system transitions to S3, S4, or S5 states.
SLP_S4#(SUSC#):S4 Sleep Power plane control - Assertion of SLP_S4# shuts power off to non-critical components when system transitions to S4 or S5 state.
MAINON(MAIND)
10
HWPG
SYS_HWPG
RSMRST#
PWRBTN#
SLP_S4#
SLP_S3#
2
13
IMVP_PWRGD
HWPG_1.5V
11
+SMDDR_VREF
12
Regulator
+0.75V_DDR_VTT
3
PWROK_EC
SYS_PWROK
21
PROCPWRGD
VIN
Regulator
PQ39
+5VPCUMOS
S5_ON(S5D)
5
6
+VCC_COREVIN
22
PLTRST#
39
PU9PU8
PU5
PQ18
+3VPCUMOS
+5V_S5
+3V_S5
RESET#
CPU
+1.5VSUS
+1.5V
AO3404-PQ41
+1.5VSUS
+1.05V_VTTVR-PU2
VIN
18
RegulatorPU2
17VIN
HWPG_VCCSA
15
HWPG_VTT
+3VMDV1528Q-PQ19
16+3VPCU
+VCC_GFX
20
MAIND
MAINON
MAIND
MAINON
SUSON
21
SYS_PWROK
23
UNCOREPWRGOOD
H_PWRGOOD PCI_PLTRST#
24 25
100ms
(From EC)
19
+5VMDV1528Q-PQ56
+5VPCUMAIND
+VCCSA
VRON
19
VR-PU7
VRON
+1.8VVR-PU3
+3VPCUMAINON14
HWPG_VTT
HWPG_1.8V15
IMVP_PWRGD
30ms
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
power sequence block diagram 1A
45 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
power sequence block diagram 1A
45 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
power sequence block diagram 1A
45 46Monday, January 07, 2013
ZQK
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Date CHANGE LISTModel
ZQK
DOC NO. DATE:
PART NUMBER: DRAWING BY: REVISON:
PROJECT MODEL : ZQK APPROVED BY:
1203
1.Change C774 from 0.1uF to 39pF for ESD
2.Add C841~C850 39pF for ESD
3.Change U19,U21,U23,U26,U43,U46,U48,U49 PN from AKD5JGST404 to AKD5JGST407
12051.Change LED1/LED2 PN：BEB00028ZA0；FP：led19-123-y2st1d-c30-2t-4p
2.Change R383/R392 from 47 ohm to 56 ohm
1206 1.Change SW2 PN： DHPATE2CK03；FP：sw-ate-2ck-v-tr-4p
1210
1.Delete PL2/PL3/PL4/PL5
2.Add RTC charge circiut and modify CN14 PN and FP (DFHS02FS032/ml1220-smt)
3.Update CN4 FP to "dp-adis0022-p001a-20p-smt"
12111.Add mSATA re-driver circuit
2.Change CN22 PN & FP as same as CN13
1212 1.Modify Hole4 FP to H-TC197BC142D142P2
2.Change mSATA redriver power rail to +1.5V
1213 1.Add R828~R831 for co-layout
2.Add N14M-GE binary strap setting information
1214 1.Change USB DB power to 4 pins
2.Change CN4 PN to DFTD20FR001
1217
1.Update Hole6/Hole17/Hole22 FP
2.Add C866 by FAE suggestion
3.Change C706 from 10uF to 4.7uF
4.Add pull down 100K by EC-Anda command (R832/R833/R834)
5.Change TEMP_MBAT fromPJ1 pin 5 to pin 6 (BATT_EN#) , then pin 6 is NC pin
6.Un stuff PR96
7.Add R835 and change R785 to 5.1M ohm
8.Mark R746 to NSW@ due to pin18 of U7 has internal +3V
1219 1.SUSLED# power from +3V_S5 to +3V_PCU (for Deep S3)
2.Change eDP connector CN8 PN and FP (DFHS40FS095 / gs12401-1011-40p-r-nh-smt)
1220 1.Add net PCH_SUSWARN# connect to Pin78 of EC (GPJ2)
2.Add net PCH_SUSACK# connect to Pin79 of EC (GPJ3)
1221 1.Change PR191 PU voltage from +3V to +3V_S5
1.Unstuff PR28/PR3012242.Reserve R837
1225 1.Change PU4 PN from AL001642000 to AL001642001
1226 1.Change U15 PN from AJ085870F03 to AJ085870F04
1228 1.Co-layout mSATA re-driver IC-U51 (PS8521A & ASM1466)
01021.Unstuff PR191 (Already PU on HW side)
2.Reserve R842/R843
0103 1.SWAP EC pin：BATLED1# change to pin32 ; ME_WR# change to pin25
0104 1.Change U38 PN from AJ0QPRG0T03 to AJSLJ8C0T05
0107 1.Update Hole6/Hole17 FP
2.Update Pad1 PN to FBZRK011010
3.Update Hole4 PN to FBAJ2005010
Size Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Change list 1A
46 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Change list 1A
46 46Monday, January 07, 2013
ZQKSize Document Number Rev
Date: Sheet of
Quanta Computer Inc.PROJECT :
Change list 1A
46 46Monday, January 07, 2013
ZQK