(-133)*33+44*14.5. 133*33+44*14 input device memory calculator output device controller control bus...

36
(-133)*33+44*14.5

Upload: antony-reed

Post on 18-Jan-2016

223 views

Category:

Documents


3 download

TRANSCRIPT

Page 1: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

• (-133)*33+44*14.5

Page 2: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

133*33+44*14

Input device

memory

calculator

Outputdevice

controller

Control bus

data bus

memory

zuohang
data formats:binary hexadecimal BCH BCD ASCii(8-bit) Unicode(16-bit) byte, word, doubleword, real number
Page 3: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

Chapter 3

Page 4: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

Chapter 3

• (-133)*33+44*14.5• Where do we store our data and

code?

• How can we get them?

Page 5: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

• Store program and data in memory

• Find them by their addresses

• Addressing mode is based on the architecture of CPU.

Page 6: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

Chapter 3:Microprocessor and its

Architecture

• 3.1 Internal Microprocessor Architecture

• 3.2 Real Mode Memory Addressing• 3.3 Protected Mode Memory

Addressing

Page 7: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.1 Internal Microprocessor Architecture

Page 8: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

• 8+6

• MOV AL,8• MOV BL,6• ADD AL,BL

Page 9: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.1 Internal Microprocessor Architecture

Page 10: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.1 Internal Microprocessor Architecture

AH AL

BH BL

CH CL

DH DL

SP

BP

DI

SI

AX

BX

CX

DX

SP

BP

DI

SI

Accumulator

Base index

Count

Data

Stack pointer

Base pointer

Destination index

Source index

Multipurpose Registers

DR

PR

IR

16 bits

zuohang
zuohang2003-9-1If the name contains two capitals that means the register is 2 bytes.three capitals means 4 bytes. E** is used in 80386 and aboveHere we always discuss the 8086 and 8088.
Page 11: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.1 Internal Microprocessor Architecture

IP

FLAGS

IP

FLAGS

Instruction pointer

Flags

CS

DS

ES

SS

Code 16bit

Data

Extra

Stack

Special purpose registers

Segment registers

Page 12: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.1 Internal Microprocessor Architecture

AH AL

BH BL

CH CL

DH DL

SP

BP

DI

SI

EAX

EBX

ECX

EDX

ESP

EBP

EDI

ESI

Accumulator

Base index

Count

Data

Stack pointer

Base pointer

Destination index

Source index

Multipurpose Registers

DR

PR

IR

32 bit

zuohang
zuohang2003-9-1If the name contains two capitals that means the register is 2 bytes.three capitals means 4 bytes. E** is used in 80386 and aboveHere we always discuss the 8086 and 8088.
Page 13: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.1 Internal Microprocessor Architecture

IP

FLAGS

EIP

EFLAGS

Instruction pointer

Flags

CS

DS

ES

SS

FS

GS

Code

Data

Extra

Stack

Special purpose registers

Segment registers

Page 14: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.1 Internal Microprocessor Architecture

Registers Operations

EAX ADD,SUB,I/O

EBX TRANSFER

ECX CYCLE

EDX MUL,DIV,I/O

EIP Instructor pointer

EBP Base pointer

ESP Stack pointer

Page 15: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.1 Internal Microprocessor Architecture

EFLAGS C,P,A,Z,I,O……

CS code segment

DS data segment

ES Additional data Segment

SS stack segment

Page 16: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.1 Internal Microprocessor Architecture

OF

DF

IF

TF

SF

ZF

U AF

U PF

U CF

FLAG of 8086

Undefined CarryParity

Auxiliary

carry

zero

sign

trap

interrupt

direction

overflow

Page 17: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.2 Real Mode Memory Addressing

Page 18: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.2 Real Mode Memory Addressing

• We can get those data by their addresses. But how?

• Real mode memory addressing can do that. It can be used in 8086 and above.

Page 19: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.2 Real Mode Memory Addressing

• Real mode memory addressing

• Physical address = (segment

address)*10H + offset address

Offset address Ranges from 0000H to

FFFFH

8 bit

8 bit

00000H

0FFFFFH

10001H

10002H

Page 20: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

• CS =0000H • Offset 0000H, 0FFFFH• CS + offset = 00000H,-----0FFFFH

• CS = 0001H• Offset 0000H, 0FFFFH• CS + offset = 00010H,-----1000FH

• More examples on table 2.1

Page 21: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.2 Real Mode Memory Addressing

8 bit

8 bit

00000H

0FFFFFH

10001H10002H8 bit

8 bitDATA SEGMENT

CODE SEGMENT

DS = 1000H

CS

Page 22: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.2 Real Mode Memory Addressing

1FFFF

1F000

10000Segment register 1000

64ka

memory

segment offset F000

00000

+

Physical address 1F000

FFFFF Max PhysicalAddress

is 1M

zuohang
because the segemnt register CS/DS/SS/ES is 16-bit,but the physical address is 1M(20-bit), so the physical address = CS/DS/SS/ES*10H + offset
Page 23: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.2 Real Mode Memory Addressing

• In real mode the length of memory segment is 64k(FFFFH).

• segment end address = segment start address + FFFFH

Page 24: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.2 Real Mode Memory Addressing

• The rules of memory addressing define a default combination of segment register and offset register.( 存储段地址和偏移量地址的寄存器有规定的组合方式 ).

Page 25: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.2 Real Mode Memory Addressing

• Combination is:– CS+IP/EIP locating the next instruction in

code segment

– SS+SP/ESP or SS+BP/EBP locating data in stack segment

– DS+ memory offset locating data in data segment

• The max offset is 64k

Page 26: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.2 Real Mode Memory Addressing

• Combination is:– When EIP/ESP/EBP is used in an

instruction, only the left 16 bits are available as the offset address whose value is from 0 to 0FFFFH.

– See 2.2.2 paragraph 2.

• The max offset is 64k

Page 27: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.2 Real Mode Memory Addressing

• Segment and offset addressing scheme allows relocation.

• Move the program to a new area of memory without changing the offset, but only change the contents of the segment registers. Segment start address is allocated by DOS.

Page 28: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.2 Real Mode Memory Addressing

• Now we have learned about multipurpose registers , special-purpose registers and real mode memory addressing.

Page 29: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

00000H

0FFFFFH

1FFFFH

2FFFFH

49000H

58FFFH

MEMMORY 1M

ES

20000H

DS

0FFFFHFigure 2.4

REAL MODE MEMORY ADDRESS

CS

SS

34000H

34FFFH

64K

zuohang
Review:Because some time the students can't understand the addressimg mode clearly.1.real mode memory addressing
Page 30: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

Figure 2.5

STACK

DATA C

ODE

00000H

0FFFFFH

0A0EFH

0A27FH

0A0F0H

CS

090F0H

DS

0A280H

0A47FH

SS

64K

zuohang
Review:Because some time the students can't understand the addressimg mode clearly.1.real mode memory addressing
Page 31: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.2 Real Mode Memory Addressing

• The max physical address is FFFFFH in real mode memory addressing. So we can only find 1M memory.

• Question : If we have a memory of 128M, how can we get their address in the mode? Are the left 127M disabled?

Page 32: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.3 Protected Mode Memory Addressing

Page 33: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.3 Protected Mode Memory Addressing

• Protected mode memory addressing is used in 80286 and above.

• For 80386 and above the max physical address is 4G in this mode.

Page 34: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.3 Protected Mode Memory Addressing

Page 35: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

3.3 Protected Mode Memory Addressing

Page 36: (-133)*33+44*14.5. 133*33+44*14 Input device memory calculator Output device controller Control bus data bus memory

• See p59 2.6