-alan nelson -andy kruger -dongpu jin. cpu is one of the most important and complicated parts of a...
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CSE 230 processor design project
May, 3rd, 2010
-Alan Nelson-Andy Kruger-Dongpu Jin
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Introduction
CPU is one of the most important and complicated parts of a computer.
We are going to design, implement and test a pipelined processor.
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Control Unit:
VHDL:
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IF stage:
Program Counter:
16 bits D-FF Gives the address of current
instruction.
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IF stage:
Next instruction?
pc_src decides next instruction address.
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IF stage:
Control single and corresponding funcitons:
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IF stage:
Instruction memory:
Contain program “mif” file. Output instruction base on the input
address.
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ID stage:
Register file:
Extra output pins for debugging.
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ID stage:
Write to register:
Write back value. Ground. imm (load imm). jal, bal.
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ID stage:
Sign-Extension:
Extend imm part of D-type instruction from 7 bits to 16 bits.
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EX stage:
ALU:
ALU_src determine operand of ALU. ALUControl determine which
operation it does(add, sub, AND, OR, XOR, SLL, SRL).
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MEM stage:
Data Memory:
ALU result determine address. Register second output goes to
MEM(sw).
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WB stage:
Write back to register:
Select either data from memory or ALU result been written back.
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Pipeline:
We used D-FF to store:
Two outputs from register. imm part of instruction. All the control signal from control
except pc_src.
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Hazard Detection:
Hazard Detect Unit:
When register write enable is high and write select is same as read select, want to forward WB data direct to ALU instead from register
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Hazard Detection:
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Summary:
Better understanding how CPU works.
Better understanding how software and hardware interact.
Learned working as a team to carry out a complex design task.
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Questions?
Demonstration next.