01 introduction to 8086

7/31/2019 01 Introduction to 8086

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University of Pune

2008 Course [S.E. I.T.]

214447

PROCESSOR ARCHITECTURE

AND INTERFACING

Introduction to 8086

- Mr. Tushar B Kute,Lecturer in IT,

SITRC, Nashik


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8086/8088 Architecture8086/8088 Architecture


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8086/8088 Architecture8086/8088 Architecture

16 bit microprocessor16 bit microprocessor

16bit data bus & 20 bit Address bus(1,048,576locations)16bit data bus & 20 bit Address bus(1,048,576locations)

Two functional unitsTwo functional units-- BIU & EUBIU & EU

Increases speed of processingIncreases speed of processing

Bus interface UnitBus interface Unit-- transfer addresses and datatransfer addresses and datasends out addresses, fetches instructions from memory,sends out addresses, fetches instructions from memory,reads/writes data from ports and memoryreads/writes data from ports and memory

Execution UnitExecution Unit-- tells the BIU where the instructions/datatells the BIU where the instructions/datafrom, decodes and executes instructionsfrom, decodes and executes instructions


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Execution UnitExecution Unit

Control Circuitry, Instruction decoder, ALUControl Circuitry, Instruction decoder, ALU

Control CircuitryControl Circuitry-- directs internal operationsdirects internal operations

DecoderDecoder--translates instructions fetched fromtranslates instructions fetched from

memory onto a series of actions which the EUmemory onto a series of actions which the EUcarries outcarries out

ALUALU-- 16bits,which perform Arithmetic16bits,which perform Arithmetic

operations(add,subtract,AND,OR,XORoperations(add,subtract,AND,OR,XOR,,

Increment,decrement,shiftIncrement,decrement,shift))


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Flag RegisterFlag Register--flipflip--flopflop indicating someindicating some conditioncondition9 Active flags9 Active flags-- 6 conditional (CF,PF,AF,SF,ZF,OF) + 36 conditional (CF,PF,AF,SF,ZF,OF) + 3

control flags (DF,IF,TF)control flags (DF,IF,TF)


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Flags

Flags

Carry flag

Parity flag

Auxiliary flag

Zero

OverflowDirection

Interrupt enable

Trap

Sign6 are status flags

3 are control flag


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CF (carry) Contains carry from leftmost bit following

arithmetic, also contains last bit from a shift or rotateoperation.

Flag RegisterFlag Register

FlagFlag OO DD II TT SS ZZ AA PP CC

Bit no.Bit no. 1515 1414 1313 1212 1111 1100

99 88 77 66 55 44 33 22 11 00

Conditional flags:

They are set according to some results of arithmetic operation. You donot need to alter the value yourself.

Control flags:

Used to control some operations of the MPU. These flags are to be set

by you in order to achieve some specific purposes.


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Flag RegisterFlag Register

OF (overflow) Indicates overflow of theleftmost bit during arithmetic.

DF (direction) Indicates left or right formoving or comparing string data.

IF (interrupt) Indicates whether externalinterrupts are being processed or ignored.

TF (trap) Permits operation of the processorin single step mode.


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SF (sign) Contains the resulting sign of anarithmetic operation (1=negative)

ZF (zero) Indicates when the result ofarithmetic or a comparison is zero. (1=yes)

AF (auxiliary carry) Contains carry out ofbit 3 into bit 4 for specialized arithmetic.

PF (parity) Indicates the number of 1 bitsthat result from an operation.


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General Purpose registersGeneral Purpose registers

EU has 8 general purpose registersEU has 8 general purpose registers

AH,AL,BH,BL,CH,CL,DH,DLAH,AL,BH,BL,CH,CL,DH,DLstore 8 bitstore 8 bit

datadata

AL is termed as accumulatorAL is termed as accumulator

AX,BX,CX,DXAX,BX,CX,DX-- STORE 16 Bit dataSTORE 16 Bit data


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BUS INTERFACE UNITBUS INTERFACE UNIT

QueueQueue

Fetches instructions that does not requireFetches instructions that does not require

the use of busesthe use of buses

Fetching the next instruction while currentFetching the next instruction while currentinstruction is executinginstruction is executing

Termed as PipeliningTermed as Pipelining


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Segment RegistersSegment Registers

4 segment registers4 segment registers--CS,DS,SS,ESCS,DS,SS,ES

Each of having 64Kbytes(65536bytes)Each of having 64Kbytes(65536bytes)

Code segment holds the upper 16bit ofCode segment holds the upper 16bit of

starting addressstarting address

Starting address is stored in segment baseStarting address is stored in segment base

Stack segment for subprogram executionStack segment for subprogram execution

Data and extra segments used for storingData and extra segments used for storingdatadata


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Segment Registers - CS, DS, SS and ES

Are Address registers

Store the memory addresses of instructions and data

Memory Organization

Each byte in memory has a 20 bit address starting with 0 to 220-1 or 1

meg of addressable memory

Addresses are expressed as 5 hex digits from 00000 - FFFFF

Problem: But 20 bit addresses are TOO BIG to fit in 16 bit registers!

Solution: Memory Segment

Block of 64K (65,536) consecutive memory bytes

A segment number is a 16 bit number

Segment numbers range from 0000 to FFFF

Within a segment, a particular memory location is specified with an offset

An offset also ranges from 0000 to FFFF


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Segmented MemorySegmented Memory

Segmented memory addressing: absolute (linear) address is aSegmented memory addressing: absolute (linear) address is acombination of a 16combination of a 16--bit segment value added to a 16bit segment value added to a 16--bit offsetbit offset

linearaddresses

one segment


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Memory Address Generation

The BIU has a dedicated adder for

determining physical memory addresses

Intel

Physical Address (20 Bits)

Adder

Segment Register (16 bits) 0 0 0 0

Offset Value (16 bits)


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Example Address Calculation

If the data segment starts at location 1000hand a data reference contains the address29h where is the actual data?

Intel

Offset: 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1

2 9

0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0Segment:

0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1Address:


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Segment:Offset Address

Logical Address is specified as segment:offset

Physical address is obtained by shifting the segment address 4

bits to the left and adding the offset address

Thus the physical address of the logical address A4FB:4872 is

A4FB0

+ 4872

A9822


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The Code Segment

Memory

Segment Register

Offset

Physical orAbsolute Address

0

+

CS:

IP

0400H

0056H

4000H

4056H

0400

0056

04056H

The offset is the distance in bytes from the start of the segment.

The offset is given by the IP for the Code Segment.Instructions are always fetched with using the CS register.

CS:IP = 400:56Logical Address

0H

0FFFFFH

The physical address is also called the absolute address.


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Instruction pointerInstruction pointer

Stores the 16 bit address orStores the 16 bit address or offsetoffsetof theof the

next code byte with in this code segmentnext code byte with in this code segment

Offset must be added to base to obtain theOffset must be added to base to obtain the

physical addressphysical addressSegment base: offset formSegment base: offset form


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Stack segment register& Stack pointerStack segment register& Stack pointer

StackStack --section of memory set aside to storesection of memory set aside to storeaddress & data while a subprogram is runningaddress & data while a subprogram is running

SP holds 16 bit offset from the start of segmentSP holds 16 bit offset from the start of segment

to the location where a data is stored mostto the location where a data is stored most

recentlyrecently

Most recently stored data is inMost recently stored data is in top of stacktop of stack

16 bit16 bit --Pointer and index registersPointer and index registers

StackStack pointer(SP),Basepointer(SP),Base pointer(BP),Sourcepointer(BP),Source

Index(SI),DestinationIndex(SI),Destination Index(DIIndex(DI))for temporary storage of datafor temporary storage of data


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Pointer and Index Registers

Contain the offset addresses of memory locations

Can also be used in arithmetic and other operations

SP: Stack pointer

Used with SS to access the stack segment

BP: Base Pointer

Primarily used to access data on the stack Can be used to access data in other segments

SI: Source Index register

is required for some string operations

When string operations are performed, the SI register points to

memory locations in the data segment which is addressed by theDS register. Thus, SI is associated with the DS in string

operations.


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DI: Destination Index register

is also required for some string operations.

When string operations are performed, the DI register points to

memory locations in the data segment which is addressed by the

ES register. Thus, DI is associated with the ES in string

operations.

The SI and the DI registers may also be used to access datastored in arrays


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Addressing modesAddressing modes

It indicates the way of locating dataIt indicates the way of locating data

or operandsor operandsData-Addressing Modes

Program Memory-Addressing Modes

Stack Memory-Addressing Modes1)Immediate Addressing Mode1)Immediate Addressing Mode


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Data is coded directly into machine code instructionData is coded directly into machine code instruction

Operand for source is a constant and is part ofOperand for source is a constant and is part ofinstructioninstruction

In this mode a 8 or 16 bit data can be specified as part of theIn this mode a 8 or 16 bit data can be specified as part of the

instructioninstruction

Example:

Load value 2550H to AX

Destination operand

Source operand

eg:- MOV CL,03HMOV DX,0502H


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CanCant be used with data segment (DS) and flag registert be used with data segment (DS) and flag register

(DF)(DF)

This problem can be overcome by loading 0123H to oneThis problem can be overcome by loading 0123H to onegeneral purpose register and then the register value isgeneral purpose register and then the register value is

copied to segment register as the following:copied to segment register as the following:

Invalid Example:

Load value directly to DS

Destination operand

Source operand


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2)Direct Addressing Mode2)Direct Addressing ModeOperand is stored in memory location, commonly dataOperand is stored in memory location, commonly datasegment (DS)segment (DS)

Source operand is the address not immediate dataSource operand is the address not immediate data(written in [ ])(written in [ ])

This address is effective address which is the addressThis address is effective address which is the addressof 16of 16--bit offset for operand storage location (frombit offset for operand storage location (fromcurrent DS value)current DS value)

Effective address need to be coupled with DS contentEffective address need to be coupled with DS contentto get the true operand address (physical address)to get the true operand address (physical address)


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Direct Addressing ModeDirect Addressing Mode


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ExampleExample

Effective Address given is = 2400. If DS content is 2000 therefoEffective Address given is = 2400. If DS content is 2000 therefo re physicalre physical

address isaddress is

Physical Address = Segment Address + Effective AddressPhysical Address = Segment Address + Effective Address


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3)Register Addressing Mode3)Register Addressing Mode

Simplest mode and often usedSimplest mode and often used

Involved register usageInvolved register usage

Data obtained from operation is stored in otherData obtained from operation is stored in otherregisterregister

eg:- MOV DX,CXMOV CL,DL


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4)4) Register Indirect Addressing ModeRegister Indirect Addressing Mode

This mode use register as substitute to constant (in directThis mode use register as substitute to constant (in directaddressing mode) to determine 16addressing mode) to determine 16--bit offset address for anbit offset address for anoperandoperand

Offset address where data is placed might be in base pointerOffset address where data is placed might be in base pointerregister (BP), base register (BX), index register (DI,SI)register (BP), base register (BX), index register (DI,SI)

EgEg: MOV AX,[BX]: MOV AX,[BX]

R= content for address

field in instructionwhich referred to

register


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Register Indirect Addressing ModeRegister Indirect Addressing ModeIt is often used to access data table from memoryIt is often used to access data table from memory

Example:

Effective Address given is = 1122. If DS content is 1010 therefore physical

address isPhysical Address = Segment Address + Effective Address


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Base Relative Addressing ModeBase Relative Addressing ModeBase plus index Addressing mode or registerBase plus index Addressing mode or register

relativerelativeOperand located in address obtained from addition of 8 or 16Operand located in address obtained from addition of 8 or 16bit displacement into one of BX or BP and the result is thenbit displacement into one of BX or BP and the result is thencombined with segment data (DS/SS)combined with segment data (DS/SS)

This 8 or 16This 8 or 16-- bit displacement must be specified in operandbit displacement must be specified in operandfield and translated as signed twofield and translated as signed twos compliments compliment

For 8For 8--bit, displacement must in the range ofbit, displacement must in the range of --128 to +127128 to +127

For 16For 16--bit, displacement must in the range ofbit, displacement must in the range of --32768 to32768 to+32767+32767

Effective Address = [Base register] + displacementEffective Address = [Base register] + displacement

Physical Address = DS/SS = [Base register] + displacementPhysical Address = DS/SS = [Base register] + displacement


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5)Base Relative Addressing Mode5)Base Relative Addressing Mode

Effective Address = Register [BX] + displacementEffective Address = Register [BX] + displacement

Example:

If DS content is 4000 therefore physical address is:

Physical Address = Segment Address + Effective Address


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6)Indexed Relative Addressing Mode6)Indexed Relative Addressing Mode

Also termed asAlso termed as based indexed or base plus indexbased indexed or base plus index

The same as base addressing except that index registerThe same as base addressing except that index register(SI/DI) is used(SI/DI) is used

Operand is at given address by signed 8 or 16Operand is at given address by signed 8 or 16--bitbit

displacement addition to one of SI or DI and the result is thendisplacement addition to one of SI or DI and the result is then

added with segment register (DS=Default)added with segment register (DS=Default)

ExampleExampleMOV DX, ARRAY [SI]MOV DX, ARRAY [SI]

Effective address = register [SI] + ARRAYEffective address = register [SI] + ARRAY

= 5000 + 1234H= 5000 + 1234H

= 6234H= 6234H

If DS content is 2000, therefore the physical address isIf DS content is 2000, therefore the physical address is

Physical addressPhysical address = Segment address + Effective address= Segment address + Effective address

= 20000H + 6234H= 20000H + 6234H

=26234H=26234H


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7)Base Indexed Relative Addressing Mode7)Base Indexed Relative Addressing Mode

Relative based indexedRelative based indexedCombine base addressing mode and indexed addressingCombine base addressing mode and indexed addressing

modemode

Base register (BX/BP) is added to index register (DI/SI) asBase register (BX/BP) is added to index register (DI/SI) aspositive integer (each register is in the range of 0 to 65535)positive integer (each register is in the range of 0 to 65535)

As default, segment address is obtained from DS except forAs default, segment address is obtained from DS except for

BP register which is obtained form SSBP register which is obtained form SS

Effective Address = [base address] + [index register] +Effective Address = [base address] + [index register] +

displacementdisplacement


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Let say BX = 1000H, SI = 2000H, ARRAY = 1234H, DS =1200H

Effective Address = register [BX] + register [SI] + ARRAY

Physical Address = Segment address + Effective address

ExampleExample


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Program Memory-Addressing Modes

Direct Program Memory Addressing

Relative Program Memory Addressing

Indirect Program Memory Addressing

01 introduction to 8086

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