04.8279-key board display
TRANSCRIPT
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8279 KEYBOARD/DISPLAYINTERFACE
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nter ac ng ey oar sp ay to t e croprocessor
Using Intel 8279
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Keypad De-Bouncing
wait
until any
key
pressed
key bounce, tBOUNCE
typically, tBOUNCE < 10 ms
wait
debouncing
period
key bounce, tBOUNCE
decode_key;
action dependent
on the key
wait
debouncing
period
wait until all
keys released
wait
until any
key
pressed
NONE NONENONE NONE
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Description
Hardware approach to interfacing a matrix keyboard and amultiplexed display.
Disadvantage of the software approach is that the microprocessor isoccupied for a considerable amount of time in checking the keyboardand refreshing the display.
40 pin device.
has two major segments : Keyboard & Display.Keyboard is connected to a 64-contact key matrix.
Keyboard entries are debounced and stored in the internal FIFOmemory; an interrupt signal is generated with each entry.
Display segment can provide a 16-character scanned displayinterface and has 168 RAM, which can be used to read/write
information for display purposes.
Display can be set up in either right-entry (Calculator) (or) left-entry(Typewriter) mode.
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Data Buffers
168
Display
RAM
Display
Registers
Display
Address
Registers
Control
& Timing
Registers
Scan
Counter
Keyboard
debounce and
Control
88
FIFO/Sensor
RAM
I/O ControlFIFO/Sensor
RAM Status
Block Diagram of 8279
CLK RESET
IRQ
Return
CNTL/STBSHIFT
RL0-RL7SL0-SL3
OUT A0-A3 OUT B0-B3
A0CSWRRD
BD
Timing &
Control
Registers
Internal Data Bus (8)
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Major Sections of 8279
1) CPU Interface Section
2) Keyboard Section
3) Scan Section
4) Display Section
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CPU Interface Section
has eight (8) bi-directional data lines (DB0
-DB7
),
one interrupt request line (IRQ) and six more lines
(CLK, RESET, RD,WR,CS and A0).
If A0=1(high), signals are interpreted as control
(or) status words.
If A0=0(low), signals are interpreted as data
The IRQ line goes high whenever data entries are
stored in the FIFO RAM and this line is used to
interrupt the MPU to indicate the availability of
data.
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Continued.
A0 RDbar WRbar Operation
0 1 0 MPU writes the data in8279
0 0 1MPU reads the data from
8279
1 1 0MPU writes the control
word to 8279
1 0 1MPU reads the status
word from 8279
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Keyboard Section
Includes 88 FIFO (First In First Out) RAM
consisting of eight (8) registers that can store
eight (8) keyboard entries.
Each is then read in the order of entries.
The status logic (FIFO/Sensor RAM Status)
keeps track of the number of entries and
provides an IRQ (Interrupt Request) signal
when the FIFO is not empty.
Has eight return lines (RL7-RL0), connected to
the eight columns of a keyboard.
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Continued
has two additional lines : SHIFT & CNTL/STB.
status of the SHIFT & CNTL (control) key canbe stored along with the key closure.
The keys are automatically debounced , and the
keyboard can be operated in either of the twomodes,
(i) Two-key lockout : if two keys are pressed
simultaneously, only the first key is recognized.(ii)N-key roll over: simultaneously pressed keys
are stored in the internal buffer and no key is
recognized until only one key remains pressed.
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Scan Section
has a scan counter & four scan lines(SL3-SL0).
Scan lines (4) can be decoded by using
a 4-to-16 decoder to generate 16 lines
for scanning.
These lines can be connected to therows of a matrix keyboard.
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Display Section
has eight (8) output lines divided into
two groups A0-A3 & B0-B3.
can be used either as a group of 8 lines
(or) as two groups of four. display can be blanked by using
Includes 168 display RAM.
MPU can read (or) write into any of
these registers.
BD
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Operating Modes of 8279
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(1) Keyboard/Display Mode set
Code 0 0 0 D D K K K
D D Operation
0 0 Eight 8-bit character display-Left entry
0 1 Sixteen 8-bit character display-Left entry
1 0 Eight 8-bit character display-Right entry
1 1 Sixteen 8-bit character display-Right entry
K K K Operation
0 0 0 Encoded Scan Keyboard-2 key lockout
0 0 1 Decoded Scan Keyboard-2 key lockout
0 1 0 Encoded Scan Keyboard-N- key rollover
0 1 1 Decoded Scan Keyboard-N- key rollover
1 0 0 Encoded Scan Sensor Matrix
1 0 1 Decoded Scan Sensor Matrix
1 1 0 Strobed Input, Encoded Display Scan
1 1 1 Strobed Input, Decoded Display Scan
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(2) Program Clock
Code0 0 1 P P P P P
All timing & multiplexing signals for
8279 are generated by an internal pre-scalar.
Pre-scalar divides the external clock by
a programmable integer.Bits PPPPP determine the value ofthis integer which ranges from 2 to 31.
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(3) Read FIFO/Sensor RAM
Code 0 1 0 AI X A A A
CPU sets up the 8279 for a read of the FIFO/SensorRAM by first writing this command.
In the scan keyboard mode, the Auto Increment flag
(AI) and the RAM address bits (AAA) are irrelevant.(i.e) 8279 will automatically drive the data bus foreach subsequent read in the same sequence in whichthe data first entered the FIFO RAM.
In the sensor matrix mode, the RAM address bitsAAA select one of the 8 rows of the Sensor RAM andif AI=1, each successive read will be from thesubsequent row of the sensor RAM.
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(4) Read Display RAM
Code 0 1 1 AI A A A A
CPU sets up the 8279 for a read of the
Display RAM by first writing this command.
The address bits AAAA select one of the16-rows of the Display RAM.
If AI=1, this (current) row address is
incremented after each write command to the
display RAM.
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(5) Write Display RAM
Code 1 0 0 AI A A A A
CPU sets up the 8279 for a write to the
Display RAM by first writing this command.
The address bits AAAA select one of the16-rows of the Display RAM.
If AI=1, this (current) row address is
incremented after each read command to the
display RAM.
(6) Di l i I hibi /Bl ki
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(6) Display write Inhibit/Blanking
Code 1 0 1 X IW IW BL BL
IW bits can be used to mask nibble A &
nibble B in application requiring separate 4-bit display ports.
By setting IW flag (IW=1), for one of the
ports, the port becomes masked.
The BL flags are available for each nibble.
BAA B
(7) Cl
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(7) Clear
Code 1 1 0 CD2 CD1 CD0 CF CA
CD2-CD0 bits available in this command are used to clear all rows
of the display RAM to a selectable blanking code as follows:
If CF=1, FIFO status is cleared & the interrupt output line isreset.
CA =1, clear all bits. (has the combined effect of CD bits and
CF).
CD2 CD1 CD0 Function
1 0 X All zeros (for common cathode displays)
1 1 0 AB=(20)H=(0010 0000)B (for alphanumeric displays)
1 1 1 All ones (for common anode displays)
CD2 must be 1 to enable clear display mode
(8) E d I /E d
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(8) End Interrupt/Error mode set
Code 1 1 1 E X X X X
In sensor matrix mode, this command
lowers the IRQ (Interrupt Request) lineand enables further writing into RAM.
In N-key roll over mode, if E=1, the
chip will operate in the special error
mode.
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1.Write a command word to read third location with auto-
increment of the sensor RAM in sensor matrix mode
Code0 1 0 AI X A A A
1 100 1
Command Word = 53H
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2.Write a command word to write fifth location without
auto-increment of the display RAM
Code1 0 0 AI A A A A
0 110 0
Command Word = 85H
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3.Write a command word to read fourth location with auto-
increment of the display RAM
Code0 1 1 AI A A A A
1 010 0
Command Word = 74H
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4.Write a command word to inhibit nibble A & to blank
nibble B of the display
Code1 0 1 X
IW
(A)
IW
(B)
BL
(A)
BL
(B)
0 101 0
Command Word = A9H
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5.Write a command word to clear IRQ line in sensor matrix
mode
Code1 1 1 E X X X X
0 000 0
Command Word = E0H
Status of E-bit can be 0 or 1.
Command Word = F0H
1
6 Give the command word to set keyboard/display for the
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6.Give the command word to set keyboard/display for the
following configuration:
(i) Encoded scan keyboard N Key rollover
(ii) Sixteen 8-bit character display Left entry
Code0 0 0 D D K K K
0 001 1
Command Word = 0AH
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7.Write a command word to set blanking code for common
anode display & to clear the FIFO RAM Status
Code1 1 0 CD2 CD1 CD0 CF CA
1 011 1
Command Word = DEH
Blanking code for common anode display is all
ones (CD1 & CD0).
8 Find the program clock word if external clock frequency is
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8.Find theprogram clock word if external clock frequency is
2 MHz.
Code 0 0 1 P P P P P1 010 0
Command Word =(0011 0100)2=34H
To give proper scan & key debounce times, theinternal frequency should be 100 KHz
Pre-scalar value = External Clock / Internal Frequency
Pre-scalar value = (2x106) / (100x103)= (20)D = (10100)H = (PPPPP)
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