1-vlci itrodution

8/3/2019 1-VLCI Itrodution

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Very Large Scale Integrated (VLSI)Circuits Technology

Prof. Dr. Taha Elsayed Taha

2011-2012


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References1- N. Weste and D Harris, CMOS VLSI Design: A Circuits and

Systems Perspective, 4th Edition , Addison Wesley, 2011.2-W. Wolf, Modern VLSI Design: Systems on Silicon, 3rd Edition,

Prentice-Hall, 2002.

3- Muller R. andKamins T., Device Electronics for IntegratedCircuits, 3rd Edition, Wiley,2002.

http://www3.hmc.edu/~harris/cmosvlsi/4e/index.html


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Copyright 2011 Pearson Education, Inc. Publishing as Pearson Addison - Wesley

Reference [1]:http://www3.hmc.edu/~harris/cmosvlsi/4e/index.html

N. E. Weste and D. Harris,CMOS VLSI Design: A Circuits andSystem Perspective.Addison Wesley, 4th Edition, 2011.

(ISBN 0-321-54774-8).

References


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Integrated Circuits(ICS)Overview


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Moores Law

years

Moores Law. The number of transistors in an integrated circuit doubles every 2 years.

The number of transistors in an integratedcircuit doubles every 2 years.


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Gigantic scale integration (GSI) :


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Some Applications of VLSI Technology


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Comparison between CMOS and Bipolar technologies


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-The majority of bipolar transistors used in ICs are of the npntype because thehigher mobility of minority carriers (electrons) in the base region results in higher

speed performance than can be obtained with pnptypes.- Lateral isolation is provided by oxide walls and vertical isolation is provided bythe n pjunction.-The lateral oxide isolation reduces the device size and the parasitic capacitancebecause of the smaller dielectric constant of silicon dioxide compared with silicon.- The first step is to form a buried layer. The main purpose of this layer is tominimize the series resistance of the collector.

BJT Technology


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There are three major MOS technology families: PMOS, NMOS and CMOS.They refer to the channel type of the MOS transistors made with the technology.

-PMOS technology implement P-channel transistors by diffusing P-type dopants

(usually Boron) into an N-type silicon substrate to form the source and the drain.P-channel is so named because the channel is composed of positively charged carriers.-NMOS technology are similar, but use N-type dopants (usually Phosphorus orArsenic) to make N-channels transistors in P-type silicon substrate. N-channel is so named because the channel is composed of negatively chargedcarriers.

-CMOS (Complementary MOS) technology combine both P-channel and N-channeldevices on the same silicon. Either P or N-type silicon substrates can be used.However, deep areas of the opposite doping type (called wells) must be defined to allowfabrication of the complementary transistor type.Gate is made of polysilicon which is madeup of multiple crystal structures, not a single crystal like the substrate. The poly is veryheavily doped to be n+ so that it is a good conductor.

MOS Technology


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BiCMOS Technology

BiCMOS Advantages:Improved speed over CMOS

Lower power dissipation than Bipolar

Higher performance analog ICs

Latch up immunity

Flexible input/outputs

BiCMOS Disadvantages:Higher costs

Longer fabrication cycle time

BiCMOS device structure

What is BiCMOS technology?

BiCMOS technology combines Bipolar and CMOS transistors onto a singleintegrated circuit where the advantages of both can be utilized.


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CMOS Fabrication SequenceThe MOS process forms the foundation for CMOS technology. Figure a shows aCMOS inverter. The gate of the upper PMOS device is connected to the gate ofthe lower NMOS device. For the CMOS inverter, in either logic state, one devicein the series path from VDDto ground is nonconductive. The current that flows in

either steady state is a small leakage current, and only when both devices are onduring switching does a significant current flow through the inverter. Thus, theaverage power dissipation is on the order of nanowatts. Low power consumptionis the most attractive feature of the CMOS circuit.

CMOS inverter: (a) circuit diagram; (b) layout; and (c) cross section

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