1590 ieee transactions on microwave theory and … · prasad et al.: symmetrical large-signal...

1590 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 8, AUGUST 2014

Symmetrical Large-Signal Modelingof Microwave Switch FETs

Ankur Prasad, Student Member, IEEE, Christian Fager, Member, IEEE, Mattias Thorsell, Member, IEEE,Christer M. Andersson, Member, IEEE, and Klas Yhland, Member, IEEE

Abstract—This paper presents a new symmetrical field-effecttransistor (FET) model suitable for microwave switches. Themodel takes advantage of the inherent symmetry of typical switchdevices, justifying a new small-signal model where all intrinsicmodel parameters can be mirrored between the positive andnegative drain–source bias regions. This small-signal model isutilized in a new and simplified approach to large-signal modelingof these type of devices. It is shown that the proposed large-signalmodel only needs a single charge expression to model all intrinsiccapacitances. For validation of the proposed model, small-signalmeasurements from 100 MHz to 50 GHz and large-signal mea-surements at 600 MHz and 16 GHz, are carried out on a GaAspHEMT. Good agreement between the model and the measure-ments is observed under both small- and large-signal conditionswith particularly accurate prediction of higher harmonic content.The reduced measurement requirements and complexity of thesymmetrical model demonstrates its advantages. Further, sup-porting operation in the negative drain–source voltage region,the model is robust and applicable to a variety of circuits, e.g.,switches, resistive mixers, oscillators, etc.

Index Terms—Field-effect transistors (FETs), GaAs, HEMTs,large-signal model, microwave switch, modeling, semiconductordevice modeling, small-signal model, symmetrical model.

I. INTRODUCTION

M ICROWAVE switches are a key component in manyadvanced circuits, such as transceivers. Field-effect

transistors (FETs) are advantageous as switches due to lowON-resistance, negligible power consumption, and easy inte-gration with other active components in monolithic microwaveintegrated circuits (MMICs) [1]. The majority of switch designwork has been done on high electron-mobility transistors

Manuscript received November 29, 2013; revised February 07, 2014 andMay14, 2014; accepted June 12, 2014. Date of publication July 15, 2014; date of cur-rent version August 04, 2014. This work was supported by the Swedish Govern-mental Agency of Innovation Systems (VINNOVA), the Chalmers Universityof Technology, the SP Technical Research Institute of Sweden, ComHeat Mi-crowave AB, Ericsson AB, Infineon Technologies AG, the Mitsubishi ElectricCorporation, NXP Semiconductors BV, Saab AB, and United Monolithic Semi-conductors.A. Prasad, C. Fager, and M. Thorsell are with the GigaHertz Centre,

Microwave Electronics Laboratory, Department of Microtechnology andNanoscience, Chalmers University of Technology, SE-412 96 Göteborg,Sweden (e-mail: [email protected]).C. M. Andersson is with the Information Technology Research and Develop-

ment Center, Mitsubishi Electric Corporation, 247-8501 Kamakura, Japan.K. Yhland is with SP Technical Research Institute of Sweden, SE-501 15

Borås, Sweden, and also with the GigaHertz Centre, Microwave ElectronicsLaboratory, Chalmers University of Technology, SE-412 96 Göteborg, Sweden.Color versions of one or more of the figures in this paper are available online

at http://ieeexplore.ieee.org.Digital Object Identifier 10.1109/TMTT.2014.2332303

Fig. 1. Switch FET operation in shunt configuration.

(HEMTs) due to the advantage of low insertion loss [2]. Due tostrict requirements on harmonic and intermodulation distortionin many communication and sensing systems, nonlinearities inswitches are important to be modeled accurately.As opposed to amplifiers, switches operate at both positive

and negative drain–source voltages . This disqualifiescommon FET models in [3] and [4] for switch design sincethey are only valid for positive . Some switch and resistivemixer models have been published, which considers operationin the negative region [2], [5], [6]. However, the model in[2] has two charge equations with a large number of parametersto model, the capacitance model in [5] is dependent onlyon one control voltage, while the model in [6] has constantcapacitances reducing its usage at a wider frequency range.This paper presents a symmetrical model for switch FETs.

The traditional small-signal FET model in [7] is simplifiedby introducing symmetry around the gate in Section II. Withthis symmetry, it is shown that only one charge expressionis required to model all intrinsic capacitances of the devicein Section III. This significantly simplifies the switch devicemeasurement, extraction, and modeling. For demonstrationpurposes, a symmetrical model is developed for a GaAspseudomorphic high electron-mobility transistor (pHEMT)common source device using previously published models.Nonsymmetrical charge models from [2], [8], and [9] are re-formulated and used in the proposed symmetrical form to givegood agreement for both positive and negative regions.The proposed switch model is then validated with large-signalRF waveform measurements in Section IV.

II. MODEL DESCRIPTION

The modeling requirements for a switch FET can be under-stood by looking at its operation. For a shunt switch (see Fig. 1),the voltage waves at the drain are functions of the gate bias. Ifthe drain–source bias is kept at zero volts, which is commonin switch and mixer circuits, the RF swing at the drain terminalwill cause to be both positive and negative over an RF cycle.Clearly, the negative region needs to be carefully consid-ered in the modeling of a switch FET. For switch devices, which

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PRASAD et al.: SYMMETRICAL LARGE-SIGNAL MODELING OF MICROWAVE SWITCH FETs 1591

Fig. 2. General FET cross section showing the typical line of symmetry be-tween the drain and source.

Fig. 3. Photograph of the GaAs pHEMT DUT.

are typically symmetrical (see Fig. 2), negative operation isequivalent to positive operation with the drain and sourcebeing interchanged. One would therefore expect to be able tomodel the negative region by mirroring the properties ofthe positive region. However, traditional small-signal models,e.g., [7] do not reflect this symmetry between drain and source.A new symmetrical model is therefore proposed and comparedto the traditional model in this section.To demonstrate the symmetrical modeling, -parameters of

a 2 25 m on-wafer GaAs pHEMT1 are measured in both apositive and negative region (see Fig. 3).

A. Traditional Small-Signal Model

The traditional model in [7] and similar models are exten-sively used in previously published small-signal FET modelingwork [3], [4], [8], [10]–[12]. In order to simplify the deriva-tion of the new model, the intrinsic model shown in Fig. 4is used. In this model, intrinsic resistances in series with thegate–source and gate–drain capacitances (e.g., in [7, Fig. 1]are neglected since their effects will appear mainly at high fre-quencies [13]. This model topology is further modified by re-placing with a transcapacitance [14, p. 142]. The resultingintrinsic common source -parameters are then given by

(1)

A cold-FET extraction technique [7] is used to obtain theeight parasitics in the -configuration for the GaAs pHEMT de-vice-under-test (DUT), see Table I. These parasitics are de-em-bedded from the measured data to obtain the bias-dependentsmall-signal intrinsic admittance matrix [7], [10]. The in-trinsic parameters are then found from (1). The extraction resultof the intrinsic parameters from the GaAs pHEMT measure-ments is shown in Fig. 5. The small-signal equivalent circuit

1WIN Semiconductor PP10 GaAs pHEMT MMIC process.

Fig. 4. Simplified traditional small-signal model with six intrinsic parameters.

TABLE IEXTRINSIC PARAMETERS FROM COLD-FET EXTRACTION

and the expected symmetry between drain and source impliesthat at bias point A ( V, V) should beequal to at bias point B ( V, V). Thisbehavior is clearly reflected in Fig. 5(a) and (b). However, noother useful symmetries are observed for the other intrinsic pa-rameters such as and . This demonstrates how the tra-ditional model falls short when extracting symmetrical devices.In Section II-B, the traditional model is modified to make thesmall-signal model symmetrical. Later, it is shown that the pro-posed model will only require one-half of the bias region to pre-dict the second half.

B. Symmetrical Small-Signal Model

To take advantage of the symmetry between drain and sourceterminals of a switch device, a better choice of independent con-trol voltages are and rather than the traditional and

[6]. This symmetry also implies that since the model has a-controlled current source , it should also have

a -controlled current source. Hence, it is proposed to replacein the traditional model by two current sources

and (see Fig. 6). Please note that of the tra-ditional model and of the symmetrical model are different.While is a derivative in the constant direction, isa derivative in the constant direction. Since an FET is athree-terminal device, the two current sources and aresufficient to model the small-signal current parameters, making

redundant. Similarly, is split into and , makingredundant. Together, these changes make the small-signal

model symmetrical, as shown in Fig. 6. The common-source-parameters for the proposed model are then given by

(2)


Fig. 5. Bias dependence of traditional small-signal model intrinsic parameters of DUT obtained using direct extraction in an intrinsic bias grid coveringboth positive and negative region: (a) (fF), (b) (fF), (c) (S), (d) (fF), (e) (fF), and (f) (S).

Fig. 6. Proposed symmetrical small-signal intrinsic model with two antipar-allel current sources and two transcapacitances.

with

(3a)

(3b)

(3c)

(3d)

The symmetrical small-signal parameters in (3) can now be re-lated to the traditional parameters in (1) by

(4a)

(4b)

(4c)

(4d)

The extracted , , , and results are shown in Fig. 7.It is now evident that model parameters are interchangeable withrespect to and and that the proposed model results in

useful symmetries for all intrinsic parameters. This is an essen-tial step towards simplifying the large-signal modeling of switchdevices.

C. Small-Signal Model Validation

The proposed model is validated by the following procedure.1) Intrinsic model parameters are extracted from measured

-parameters at a bias point A (e.g., V andV).

2) The intrinsic parameters from bias point A are mirroredby swapping and , and , and (seeTable II).

3) -parameters are simulated from the mirrored set and com-pared to measurement at the corresponding bias point B( V, V).

This validation procedure is applied to the GaAs pHEMTDUT. For comparison, the pair of bias points (A, B) is chosensuch that the error between the simulated and the measured-parameters is maximum at B, with the error being defined as

(5)

Resulting modeled and measured -parameters(100 MHz–50 GHz) are shown in Fig. 8. Good agree-ment is observed between model and measurement even at thebias point with maximum error. This not only confirms thatthe model fits measured -parameters over a large-frequencyrange at bias points A and B, but also that the measured deviceindeed is intrinsically symmetrical. Therefore, a physicallysymmetrical intrinsic device will have an electricallysymmetrical intrinsic model. Hence, for this and similar FETs,


Fig. 7. Plot of proposed intrinsic parameters for the proposed symmetrical small-signal model in an intrinsic bias grid covering both positive andnegative region: (a) (S), (b) (fF), (c) (S), and (d) (fF).

TABLE IIINTRINSIC PARAMETERS AT SYMMETRICAL BIAS POINTS

measurements and extraction at either the positive or negativeregion is sufficient to predict and model the other region.

III. LARGE-SIGNAL MODEL

In this section, a new nonlinear model is developed from theextraction results of the proposed small-signal model with afocus on the nonlinear charge modeling. It is shown that a singlecharge expression is sufficient to model the reactive part of asymmetrical device.

A. Nonlinear Current Modeling

Several nonlinear current models are found in the literature,which consider FET operation only in the positive region,

e.g., [3], [4] and [15]–[17]. However, for a shunt switch shownin Fig. 1, the drain–source current must be defined in both thepositive and negative regions, e.g., [6], [18], [19]. For thiswork, the nonlinear drain–source current for the measured DUTis modeled using the symmetrical model in [6].The model in [6] contains six parameters, where accounts

for change of maximum with and affect the max-imum , and and account for pinch-off voltage and its shiftwith . The parameter accounts for change in saturation cur-rent with as described in the original paper. These modelparameters were extracted by manual fitting to the measured dcI–V data with the resulting parameter values listed in Table III.In Fig. 9, the comparison between measured and modeled cur-rent characteristics shows good agreement at both positive andnegative .

B. Nonlinear Charge Modeling

Similar to the nonlinear current modeling, this section showsthat a single charge expression is sufficient to model the reactivecontributions to the intrinsic drain–source current. The use ofcharge as opposed to capacitance expressions ensures chargeconservation and good convergence properties in simulations[20].For typical FET charge modeling, a pair of gate and drain

charge expressions is widely used to model the reactive currents


Fig. 8. Comparison of -parameters from 100 MHz to 50 GHz between mea-sured ( : Bias A, : Bias B) and model(-) at bias points A ( V,

V) and B ( V, V) where model at B isobtained from measurement at bias point A: (a) and , (b) magnitude of

and , (c) phase of and .

TABLE IIIYHLAND MODEL [6] PARAMETERS FOR CURRENT

[2], [4], [8], [9]. However, since the drain and source terminalsof a switch device are identical (see Fig. 6), it is advantageousto instead model the drain and source charge, and ,respectively. This enables the immediate use of the small-signal

Fig. 9. Comparison of measured (marker) versus modeled (—) I–V character-istics.

results from Section II-B to develop a common charge expres-sion. The charge expressions and are related to theintrinsic capacitances in (2) by

(6a)

(6b)

(6c)

(6d)

From Section II-B, the extracted intrinsic capacitances are re-lated to each other by

(7a)

(7b)

Therefore, from (6) and (7), the partial derivatives of the twocharge expressions must be symmetrical with respect to eachother. As a result, the charge expressions and mustalso be symmetrical according to

(8)

It is therefore sufficient to model either or . Todemonstrate this, the focus is hereafter on the modeling of

for the GaAs pHEMT DUT.Due to charge conservation, is related to the traditional

gate and drain charge, and , respectively, by

(9)

Several models for and are found in literature [2], [4],[8], [9]. For the GaAs pHEMT DUT, none of the published ex-pressions are capable of modeling the extracted intrinsic capac-itances in both the positive and negative regions. Hence, toobtain a good agreement, a combination of gate and drain chargefunctions is taken from [8] and [2], respectively. Further, a re-duction function from [21, eq. (7)] is introduced in [8, eq.


TABLE IVFITTING PARAMETERS OF THE CHARGE MODEL FROM [2], [8], AND (12)

Fig. 10. Comparison of: (a) versus and (b) versus betweenextracted small-signal capacitance and capacitance obtained using chargeexpressions (13) (—).

Fig. 11. Proposed large-signalmodel for a symmetrical common source device.

(15)] to correct the behavior at higher and . The modi-fied expression [8, eq. (15)], including the reduction function

, are given by

(10)

Fig. 12. Measured ( -ON, -OFF) and modeled (—) -parameters from100 MHz to 50 GHz at ON and OFF-state of a switch. (a) and . (b) .

Fig. 13. Large-signal measurement setup with LSNA, signal source, andon-wafer DUT with 50- RF termination at gate. The reference plane ofmeasurement is at the probe tips.

(11)

(12)

The complete source charge expression is given as

(13)


Fig. 14. Comparison between magnitude of measured (fundamental frequency: , second harmonic: , and third harmonic: ) and simulated (—) reflected versusincident power at the drain of the DUT at: (a) magnitude 600 MHz, V, V, (b) 600 MHz, V, V, (c) 16 GHz, V,

V, (d) 16 GHz, V, and V, measured using setup shown in Fig. 13. Below 50 dBm, the noise floor of the measurement setup makes itdifficult to obtain good measurements.

Afterwards, the drain charge function is obtained using(8).The parameters of the nonlinear charge model for the GaAs

pHEMTDUT (see Table IV) were extracted by manual fitting tothe extracted small-signal intrinsic capacitances. Fig. 10 showsthe comparison between extracted and modeled capacitances.The agreement for is good, but some mismatch is observedin at high . The common charge function is not ableto model the change in peak of with . Therefore, thecommon charge function in (13) opens a new researchwindow for significant improvement over a wider bias range.The new charge function can be modeled using the pair of di-rectional derivatives given by (6) and it is left for further in-vestigations. However, in this section, it is clearly shown that asingle charge expression is sufficient to model the reactive partsin symmetrical large-signal models.

IV. GaAs pHEMT MODEL VALIDATION

The complete large-signal model for the GaAs pHEMTdevice obtained from small-signal measurements is shown inFig. 11. The model contains the parasitics obtained by cold-FETextraction (see Table I), the nonlinear current source [6, eq.(1)], and the nonlinear charge expression given by (13). The

proposed model is validated for a shunt switch (see Fig. 1),where the device either operates in open-channel (ON-state)or in pinch-off (OFF-state) conditions. Small- and large-signalmeasurements of the DUT at these bias conditions are thereforeused to experimentally verify the agreement with the model inFig. 11.

A. Small-Signal Verification

The small-signal behavior of the model is verified with -pa-rameter comparisons in the ON state ( V andV) and OFF state ( V and V) of the

switch. Fig. 12 shows comparisons between measured and mod-eled -parameters. Some phase mismatch in and gain mis-match in is observed at the ON state of the device due to themismatch observed in . Since extrinsic and current parame-ters are correctly modeled (see Figs. 8 and 9), further improve-ments in the charge model is required to correctly predict theextracted small-signal intrinsic capacitances. However, the pro-posed model derived from the symmetrical modeling techniqueshows an overall good agreement with the measured reflectioncoefficient at the drain port [see Fig. 12(a)]. Due to the absenceof RF signal at the gate as in shunt switches, large-signal mea-surements can still verify the proposed model.


Fig. 15. Comparison between the model (—) and the measured ( : 600 MHz,OFF-state; : 600 MHz, ON-state; : 16 GHz, OFF-state; : 16 GHz, ON-state)phase of reflected wave at the drain port at the fundamental frequencies of mea-surement performed with the setup in Fig. 13.

B. Large-Signal Verification

For large-signal verification of the model, waveform mea-surements are performed with the on-wafer DUT in a common-source configuration. The large-signal measurement setup, asshown in Fig. 13, is used to excite the DUT with RF at the drainterminal with the gate terminated to 50 , forcing it into switch-like operation in both positive and negative regions, sim-ilar to shunt switch in Fig. 1. A large-signal network analyzer(LSNA) (Maury MT4463) is used to measure calibrated wave-forms at the device gate and drain terminal reference planes. Inthe ON state, the drain and gate are biased at 0 V, while for theOFF state, the gate bias is set to 2.5 V. These bias settings allowmodel validation with a large RF voltage swing at the drain ter-minal.The harmonic response of the proposed model is simulated in

a similar environment as of the measurement setup. Measuredincident waves at the fundamental and the higher harmonic fre-quencies are injected into the model at the respective ports.While the use of incident power at the gate compensates forany mismatch due to 50- RF termination, the use of incidentpower at the harmonics ensures identical harmonic terminationsin simulations, as seen in the measurements. Fig. 14 shows thecomparison between the measured and the modeled reflectedpower at different harmonics. At 600 MHz, the harmonics aremainly generated by the nonlinear current source. However, at16 GHz, the harmonics are increasingly dependent on reactivecurrents generated by the nonlinear charge model. At powerlevels below the noise floor of the measurement setup, measurednoise will be injected into the model simulations. This explainswhy noisy behavior is observed at lower power levels even inthe simulation. The measured noise will also influence the phaseof harmonics both in measurement and the simulation, making itdifficult to compare. Therefore, the phase of the reflected waveat fundamental frequencies is compared (see Fig. 15). The goodagreement between simulated and measured power and phaseof the reflected wave at both low and high frequencies confirmsthe accuracy of the model and the symmetrical modeling proce-dure.For further validation, the measured and simulated time-do-

main drain–source current versus voltage waveforms are shownin Fig. 16. The proposed model accurately reproduces measured

Fig. 16. Comparison of modeled [600 MHz—black, 16 GHz—orange(in online version)] and measured [600 MHz—red (in online version),16 GHz—brown (in online version)] current versus voltage waveform at thedrain of the DUT in the ON and OFF state of the shunt FET with 50- RFtermination at the gate.

behavior both at 600 MHz and 16 GHz, thus confirming its va-lidity.

V. DISCUSSION AND CONCLUSION

In this paper, a new modeling technique for microwaveswitch FETs has been proposed based on the inherent geomet-rical and electrical symmetry of the intrinsic device with threeimportant conclusions. First, the small-signal model allowsmirroring of the intrinsic model parameters from the positiveto the negative region. This allows a reduction in measure-ment and extraction effort for a symmetrical device. Second,large-signal modeling considers the symmetry and uses a singlecharge expression, clearly demonstrating the advantages of theproposed model. Third, a model is developed for a commercialGaAs pHEMT device using the proposed method, which isvalidated with large-signal measurements.Calling for future work, the charge expression used for the

GaAs pHEMT can be further improved to fit a wider range ofbias points. New charge equation can be formulated for otherswitch FET technologies based on proposed model topology.For high-frequency operation, additional model parameterssuch as resistances in series with and may be employedto improve the high-frequency response of the model. Theseimprovements open a window for further investigation andfuture research on enhanced switch models. Finally, althoughthis work has focused on switches, other types of circuitssubject to operation in the negative region can also benefitfrom the robustness offered by the modeling approach in thiswork, e.g., resistive mixer, oscillators, and amplifiers underhigh mismatch conditions.

ACKNOWLEDGMENT

The authors would like to thank Prof. I. Angelov, MicrowaveElectronics Laboratory, Chalmers University of Technology,Göteborg, Sweden, for valuable discussion and insights.This research was carried out at the GigaHertz Centre, Mi-

crowave Electronics Laboratory, Chalmers University of Tech-nology.


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Ankur Prasad (S’14) received the B.Tech.–M.Tech.dual degree in electrical engineering from the IndianInstitute of Technology Kanpur, India, in 2010, andis currently working toward the Ph.D. degree atthe Chalmers University of Technology, Göteborg,Sweden.He is currently with the Microwave Electronics

Laboratory, Chalmers University of Technology. Hisresearch interests are device characterization andmodeling.

Christian Fager (S’98–M’03) received the M.Sc.and Ph.D. degrees in electrical engineering andmicrowave electronics from the Chalmers Univer-sity of Technology, Göteborg, Sweden, in 1998 and2003, respectively.He is currently an Associate Professor and Project

Leader with the GigaHertz Centre, MicrowaveElectronics Laboratory, Chalmers University ofTechnology. His research interests are in the areas oflarge-signal transistor modeling and high-efficiencypower-amplifier architectures.

Dr. Fager was the recipient of the 2002 Best Student Paper Award of theIEEE Microwave Theory and Techniques Society (IEEE MTT-S) InternationalMicrowave Symposium (IMS).

Mattias Thorsell (S’08–M’11) received the M.Sc.and Ph.D. degrees in electrical engineering fromthe Chalmers University of Technology, Göteborg,Sweden, in 2007 and 2011, respectively.He is currently an Assistant Professor with the

Chalmers University of Technology. His researchinterests are characterization and modeling of non-linear microwave semiconductor devices.

Christer M. Andersson received the M.Sc. degreein engineering nanoscience from Lund University,Lund, Sweden, in 2009, and the Ph.D. degree inmicrowave electronics from the Chalmers Universityof Technology, Göteborg, Sweden, in 2013.Since 2013, he has been a member of the Amplifier

Group, Mitsubishi Electric Company InformationTechnology Research and Development Center,Ofuna, Japan. His main research interests arewide-bandgap devices and the design of high-effi-ciency power amplifiers.

Klas Yhland (M’07) received the M.Sc. degree in electronic engineering fromthe Lund University of Technology, Lund, Sweden, in 1992, and the Ph.D. de-gree in microwave electronics with the Chalmers University of Technology,Göteborg, Sweden, in 1999.From 1992 to 1994, he was with the Airborne Radar Division, Ericsson Mi-

crowave Systems. Since 1999, he has been Head of the National Laboratory forHigh Frequency and Microwave Metrology, SP Technical Research Institute ofSweden, Borås, Sweden. From 2000 to 2003, he was also with the MicrowaveElectronics Laboratory, Chalmers University of Technology. Since September2012, he has been an Adjunct Professor with the Terahertz and Millimetre WaveLaboratory, Chalmers University of Technology. His research interests are mi-crowave technology, uncertainty analysis, new measurement techniques, planarmeasurement techniques, and design and modeling of microwave circuits.

1590 ieee transactions on microwave theory and … · prasad et al.: symmetrical large-signal...

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