17 sep 2002embedded seminar2 outline the big picture who’s got the power? what’s in the bag of...

17 Sep 2002 Embedded Seminar 2

Outline

The Big Picture

Who’s got the Power?

What’s in the bag of tricks?


The Big Picture

Phenomenal increase in processor speed

3GHz Pentium 4 by the end of the year

Shrinkage in sizeMobility highly desiredBUT battery technology not improving at the same rate


Batteries Not Included

Nickel-based batteriesNickel-Iron

The first rechargeable, old technology

Nickel-cadmium and Nickel-Metal-HydrideHigh energy density – good for motors

Lithium-based batteriesPromising because lithium releases electrons easilyProblem with battery life, dangerous to handle

OthersZinc-air batteries – can work a laptop for 10 hours


Some Terminologies

Power is the rate of energy consumptionPower ≠ energy

Energy depends on how long you run the thing!

Optimizing for speed = optimizing for energy?

Some researchers look at average power

17 Sep 2002 6

Back to Basics

P- substrate

N+ source N+ drain

Gate

Gate oxide insulator

N-Channel Metallic Oxide Semiconductor Field Effect Transistor

17 Sep 2002 7

Back to Basics – ACTION!

P- substrate

N+ source N+ drain

Gate

Gate oxide insulator

+

-

+-

N-Channel Metallic Oxide Semiconductor Field Effect Transistor


P-channel MOSFET

N-channel MOSFET

CMOS

VDD

GND

Input: 0 = 0V 1 = +5V

Output

CMOS Inverter


P-channel MOSFET

N-channel MOSFET

CMOS

VDD

GND

Input: 0 = 0V

Output = 0

CMOS Inverter


P-channel MOSFET

N-channel MOSFET

CMOS

VDD

GND

Input: 1 = +5V

Output = 1

CMOS Inverter


Power in CMOS

21

2 DD SC DD leak DD static DDP C V f N Q V f N I V I V

P = total power VDD = supply voltage f = clock

frequency

N = switching (gate transition per clock cycle)

Ileak = leakage power Istatic = static power

QSC = quantity of charge carried by short-circuit current per

transistion


Power in CMOS

21

2 DD SC DD leak DD static DDP C V f N Q V f N I V I V

Switching power Short-circuit power Leakagepower

Staticpower

Dynamic power Static power


Switching Power

Accounts for most (90%) of power

Two major factor is supply voltage and frequency

Voltage scaling

Frequency scaling


Short Circuit Power

During switching, there is a short period of time when both gates are ON a path from VDD to ground

power dissipation


Leakage Power

Diode leakageSource (and drain) together with substrate forms a diodeAt times, this diode can be reverse-biased during which current can leak

Sub-threshold leakageEven when gate is not completely on, enough of a channel can form for some movement of charges from source to drain


Static Power

Reduced voltage feedingBoth gates can be “weakly on”

Weak current flow from VDD to ground

Other parasitic current flowsDue to imperfect manufacturing or operating conditions


A Digression – The Problems Of Scaling down

Latch-up effect

Short-channel effect

Punch-through effect

Hot electron effectGate erosion


Latch-up Effect


Tricks in the bag

Voltage Scaling

Frequency Scaling

Power Gating


Voltage Scaling

Lower VDD

For the same circuit and technology, this leads to higher gate delay

Total delay, , is made up of two components, = 1 + 2

1 is a constant

2 VDD


Frequency Scaling

Widely used in many processorsIntel SpeedStep on mobile processors

Leads to lower performanceObvious!


Power Gating

Turn off power to parts of the circuit

Can be problematic for circuits with memory


What About Memory?

SRAMImplemented using CMOS

DRAMEntirely different technology

Implemented using capacitors


SRAM

CMOS SRAM Cell

DRAM

Single Transistor DRAM cell


Model or Measure?

Hardware measurementMeasures the amount of current consumed

Depends on how the circuit is designed

Cannot get core CPU power breakdowns


Software Estimation

SPICE simulationVery slow

PowerMill from Synopsys

CAD ToolsPart of a lot of CAD tool chains, eg. Synopsys

Architectural based simulationEg: SimplePower, WATTCH etc.


Putting it Together – System Power

Reference:Marc A. Viredaz and Deborah A. Wallach, “Power Evaluation of a Handheld Computer: A Case Study”. Compaq Western Research Lab Technical Report 2001/1. May 2001.http://research.compaq.com/wrl/techreports/abstracts/2001.1.html


Dealing with it

System / OSAlgorithmsArchitectureCircuit/LogicTechnology


Technology

Low threshold, low voltage

Various technological issues as discussed


Circuit/Logic

Even within CMOS, there are different types of logic families that consumes different amount of energyTransistor sizeLayoutAsynchronous circuits

Clocking consumes a lot of power

Pipeline retiming


Architecture / Compiler

Trade off area for power


Architecture / Compiler

Trade off area for powerShorter wires less power

Parallelism and concurrency

Directives to allow compiler to doVoltage scalingFrequency scalingPower gatingOne more degree of freedom: activity


Algorithms

Low power algorithms

Parallelism and concurrency

A under-research area


System / OS

System level power managementHeuristics for transiting between various power modes

Operating environment sensitive power management

Battery or plugged-in?

Power-domain specific management schemes


Reducing Processor Power

Energy conscious code generationReduce switching

Instruction scheduling

Use of Gray code instead of binary

Low power modesInstruction compressionParallelism and concurrency


Reducing Memory Power

Reduce memory accessesAll compiler techniques for reducing cache misses

Use registers

Memory reference compactionPower aware page allocation

Group active pages together


Reducing Peripheral Power

CommunicationDifferent power modes for communicating devicesData compressionAdaptation in view of traffic and power

DiskSpin-down and different power modes (when?)

Display


Summary

Some research opportunities still exist

Especially in algorithms and operating systems

An integrated approach is neededAll levels of the system cooperating with one another

17 sep 2002embedded seminar2 outline the big picture who’s got the power? what’s in the bag of...

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