241-208 ch31 chapter 3 logic gates by taweesak reungpeerakul
DESCRIPTION
CH Inverter (INV) Symbols Truth Table InOut Timing Diagram Logic Expression: Out = InTRANSCRIPT
241-208 CH3 1
Chapter 3Logic Gates
By Taweesak Reungpeerakul
241-208 CH3 2
Contents Inverter AND Gate OR Gate NAND Gate NOR Gate XOR and XNOR Gates Integrated Circuit Logic Gates
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3.1 Inverter (INV) Symbols
Truth TableIn Out
0 11 0
Timing Diagram
Logic Expression: Out = In
1
1
In Out
In
Out
0
0
1
1
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3.2 AND Gate Symbols
Truth TableA B Out0 0 00 1 01 0 01 1 1
Timing Diagram
Logic Expression: Out = AB
AOut
B BA
Out&
A
B
A
B
Out
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3.3 OR Gate Symbols
Truth TableA B Out0 0 00 1 11 0 11 1 1
Timing Diagram
Logic Expression: Out = A+B
AOut
B BA
Out≥1
A
B
A
B
Out
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3.4 NAND Gate Symbols
Truth TableA B Out0 0 10 1 11 0 11 1 0
Timing Diagram
Logic Expression: Out = AB
AOut
B BA
Out&
A
B
Out
A
B
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3.5 NOR Gate Symbols
Truth TableA B Out0 0 10 1 01 0 01 1 0
Timing Diagram
Logic Expression: Out = A+B
A
B
AOut
B BA
Out≥1
Out
A
B
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3.6 XOR Gate Symbols
Truth TableA B Out0 0 00 1 11 0 11 1 0
Timing Diagram
Logic Expression: Out = A B+AB; AB
A
B
BA
Out=1A
OutB
Out
A
B
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XNOR Gate Symbols
Truth TableA B Out0 0 10 1 01 0 01 1 1
Timing Diagram
Logic Expression: Out = A B+AB; AB
A
B
AOut
B BA
Out=1
Out
A
B
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3.7 Integrated Circuit Logic Gates
CMOS: Complementary Metal-Oxide Semiconductor
Low Power Dissipation DC Power Supply: 5 V & 3.3 V CMOS Series: 74(or 54) + letter(s)
+ numbersLetters:
HC, HCT = High-speed CMOS LV, LVC = Low-voltage CMOS BCT = BiCMOS (combine CMOS&TTL)
Numbers: 00= Quad 2-input NAND 02= Quad 2-input NOR 04= Hex inverter
TTL: Transistor-Transistor Logic Not Sensitive to Electrostatic
Discharge Switching Speed DC Power Supply: 5 V TTL Series: 74 (or 54) + letter(s) +
numbersLetters:
S = Schottky TTL LS = Low-power Schottky TTL F = Fast TTL
Numbers: 08= Quad 2-input AND 10= Triple 3-input NAND 32= Quad 2-input OR
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3.7 IC Logic Gate (cont.) Packages DIP, SMD
IC Gate Config.
DIPTSSOP
LQFPTQFP
PBGA
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Performance Characteristics & Parameters
Propagation Delay Time:tP , tPHL , tPLH
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Performance Characteristics & Parameters (cont.)
DC Power Supply: 3.3 (CMOS), 5V (CMOS or TTL)
Retrieved from Motorola SN74LS00
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Performance Characteristics & Parameters (cont.)
Fan-out and Loading
indicates the number of loads that can be connecte d
if a logic IC drives several loads with the same characteristics.
For TTL device:- Unit loads (HIGH Logic) = IOH/IIH
Unit loads (LOW logic) = IOL/IIL
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Performance Characteristics & Parameters (cont.)
Power Dissipation (PD) PD = VCC (ICCH+ICCL)/2
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Performance Characteristics & Parameters (cont.)
I/O Logic Levels TTL: VIL =0.8 V, VIH =2 V VOL =0.4 V, VOH =2.4V
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Performance Characteristics & Parameters (cont.)
Speed-power Product (SPP)SPP = tP*PD (Joul unit)
Homework Lists (pp.153-158)
1,3,5,9,11,13,15,20,25,27,28,39,40,43
Assignments:-