3 phase high pf ac dc converter
TRANSCRIPT
Three-phase high power factor AC/DC converter
B.-R. Lin and T.-Y. Yang
Abstract: A unidirectional three-phase AC/DC converter is proposed to obtain almost unity powerfactor, draw sinusoidal line currents and keep the DC-bus voltage constant. Two active switchesand two power diodes are used in each converter leg to generate a three-level PWM waveform onthe AC terminal voltages. The proposed converter has simpler circuit configuration compared withthe conventional three-level PWM converters. The classical proportional-integral voltage controllerand the hysteresis current controller are adopted in the control scheme to achieve DC-bus voltageregulation and line-current command tracking. A neutral-point voltage compensator is used tobalance the neutral-point voltage due to load change. The validity and effectiveness of the proposedcontrol algorithm is verified through simulations and experimental results.
1 Introduction
Diode or phase-controlled rectifiers are widely utilised in thefront-end converter for the uncontrollable or controllableDC-bus voltage in industrial and commercial applications.However, low power factor and nonsinusoidal line currentsare drawn from the AC source owing to a large electrolyticcapacitor used on the DC link. Power pollutants such asreactive power and current harmonics result in line-voltagedistortion, heating of the transformer core and electricalmachines, and increased losses in the transmission anddistribution line. To meet the relevant standards in Europeand America, several current wave-shaping solutions [1–4]have been proposed to achieve power factor correction andcurrent-harmonic reduction. In [1] conventional single-phase rectifiers with one, two or four switches were usedto achieve power factor correction based on two-level(unipolar or bipolar) pulse-width modulation (PWM). In [2]the single-phase voltage-doubler boost rectifiers with one,two, three or four switches were used to achieve powerfactor correction and DC-bus voltage regulation. The DC-bus voltage is twice the peak mains voltage. Switched moderectifiers with three or four rectifier legs can achieve highpower factor and low current harmonics in the three-phasethree-wire or four-wire systems. Six or eight power switchesare used in the three-leg or four-leg converter of [5–9] togenerate bipolar PWM waveforms on the AC terminal. Ifthe bidirectional power flow is not necessary in theapplication system, switched-mode rectifiers are not a goodchoice for the large number of power switches. Multilevelrectifiers and inverters have been proposed [10–15] for high-power and medium-voltage applications because theyprovide advantages such as the low voltage rating of powersemiconductors and low voltage harmonics. However, the
disadvantages of the multilevel rectifiers are the largenumber of power semiconductors in the circuit, a complexcontrol scheme and the neutral-point voltage balanceproblem. In industrial applications with a unidirectionalpower flow, conventional multilevel converters are tooexpensive and complicated to implement.
A three-phase three-level AC/DC converter with fewerpower switches is presented to achieve almost unity powerfactor, to regulate the DC-link voltage and to achieve fastdynamic response. Six active switches are required in theproposed converter. Compared with conventional neutral-point diode-clamped or capacitor-clamped converters theproposed converter has fewer power switches and a simplecontrol scheme. Two control loops are used in the proposedcontrol algorithm: a proportional-integral voltage controllerin the outer control loop to maintain the DC-link voltageconstant, and an hysteresis-based current controller in theinner control loop to track line-current commands. Avoltage compensator is adopted to balance the neutral-pointvoltage. Three voltage levels are generated on the ACterminal to neutral-point voltages. The effectiveness andvalidity of the proposed control strategy are verifiedthrough computer simulation and experimental results.
2 System configuration and operation principle
2.1 System configurationConventional three-level AC/DC converters are based onneutral-point clamped, flying capacitor and series connec-tions of H-bridge topologies. A three-level neutral-pointdiode-clamped converter needs four active switches and twoclamping diodes in each converter leg to achieve powerfactor correction. A three-level converter with flyingcapacitor topology needs four active switches and oneflying capacitor to draw a sinusoidal line current from theutility system. Figure 1a shows the proposed single-phaseunidirectional power flow rectifier to draw a sinusoidal linecurrent with almost unity power factor and maintain theDC-bus voltage constant. There are a boost inductor L, twopower diodes Da1 and Da2, two DC-bus capacitors C1 andC2, and two active switches Sa1 and Sa2 in the proposedconverter. The voltage stress of switch Sa2 and diode Da2 isequal to half the DC-bus voltage, and the voltage stress of
The authors are with the Power Electronics Research Laboratory, Departmentof Electrical Engineering, National Yunlin University of Science andTechnology, Touliu City, Yunlin 640, Taiwan, ROC
r IEE, 2005
IEE Proceedings online no. 20045201
doi:10.1049/ip-epa:20045201
Paper first received 28th October 2004 and in final revised form 15th January2005. Originally published online: 8th April 2005
IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005 485
switch Sa1 and diode Da1 is equal to the DC-bus voltage.No clamping capacitor or diode is needed in the proposedsingle-phase converter. A unipolar PWM voltage waveformis generated on the voltage vao. Figure 1b shows the systemconfiguration of the proposed three-phase three-level AC/DC converter. It consists of three converter legs, three boostinductors on the AC side and two capacitors in series on theDC side. Two power switches and two fast recovery diodesare used in each leg. The main functions of the proposedthree-phase converter are current harmonic elimination,neutral-point voltage balance, unity power factor and DC-link voltage regulation. Two control loops in the systemachieve DC-link voltage regulation and line-current track-ing. The hysteresis comparators in the inner control looptrack the line-current commands. The proportional-integralcontroller in the outer control loop maintains the DC-linkvoltage constant.
2.2 Principle of operationThere are two independent active switches in the proposedconverter leg. Unipolar PWM voltage waveforms can begenerated on the AC terminal to neutral-point voltages.Before analysis of the proposed converter the followingassumptions are made: the power switches are ideal; thesupply voltage is constant during one switching period;Sxy¼ 1 (or 0) if active switch Sxy is turned on (or off),x¼ aBc, y¼ 1B2; and the capacitor voltages on the DCside are equal (vC1¼ vC2¼ vdc/2). In each converter leg thereare four operation states shown in Fig. 2 to generate threedifferent voltage levels. Figure 2a gives the equivalent circuitof the first operating state. In this state, positive line currentflows through the body diode of active switch Sa1 anddiode Da2 to charge capacitor C1. The AC-side voltagevao equals vdc/2. The line current isa is linearly decreasingin this state because the boost inductor voltage is negative
(vL¼ vsa�vdc/2o0). Figure 2b gives the equivalent circuit ofsecond operating state. The line current flows through thebody diode of active switch Sa1 and active switch Sa2. TheAC-side voltage vao equals 0. The boost inductor voltageequals vsa. The line current isa is linearly increasing if themains voltage vsa is positive. Figure 2c shows the equivalentthird operating state. The negative line current flowsthrough switch Sa1 and the body diode of switch Sa2 toobtain AC-side voltage vao¼ 0. The line current is linearly
vsa
L, r
Sa1
C 1
load
vC 1
vdc
isa
io
a
oi2
i3
i1
C 2vC 2
Da1
Da 2
n
p
Sa 2
a
vsa L, r
Sa1
C 1
load
vC 1
vdcisa
io
a
i2
i3
i1
C 2
vC 2
Da1
Da 2
n
pSa 2
vsb L, r
Sb1
isb
b
Db1
Db 2
Sb 2
vsc L, r
Sc1
isc
c
Dc1
Dc 2
Sc 2
oiso
b
Fig. 1 Proposed unidirectional AC/DC convertera Single-phase circuit configurationb Three-phase circuit configuration
vsa
L, r
C 1
load
load
load
load
vC 1
vdc
isa
io
a
oi 2
i1
C 2
vC 2
Da 2
n
pvsa > 0 isa
vsa
L, r
C 1
vC 1
vdc
isa
io
a
oi 2
C 2
vC 2
n
p
Sa 2
vsa> 0 isa
a
b
vsa
L, r
Sa1
C 1
vC 1
vdc
isa
io
a
oi2
C 2
vC 2
n
pvsa< 0 isa
vsa
L, r
C 1
vC 1
vdc
isa
io
a
o
i2
i3
C 2
vC 2Da1
n
pvsa < 0 isa
c
d
Fig. 2 Operating states of proposed single-phase AC/DC convertera State 1b State 2c State 3d State 4
486 IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
decreasing because vL¼ vso0. The equivalent circuit of thefourth operating state is given in Fig. 2d. The line currentflows through capacitor C2 and Da1 to generate ACterminal voltage vao¼�vC2. The negative line current willcharge capacitor C2. The boost inductor voltage equalsvsa+vC240 such that the line current is linearly increasing.In state 4 only one diode Da1 is conducting as shownin Fig. 2d. However, there are two devices conducting instates 1–3 (Fig. 2a–2c).
Based on this analysis of four operating states in eachconverter leg, two operating states can be selected in eachhalf cycle of mains voltage to control the line current withalmost unity power factor. During the positive line current,states 1 and 2 are used to generate high voltage level (vdc/2)and low voltage level (0) on the voltage vao. During thenegative phase voltage, states 3 and 4 are selected togenerate voltage levels 0 (high voltage level) and�vdc/2 (lowvoltage level) on the AC terminal voltage, respectively.During each half cycle of mains voltage, the high voltagelevel on the AC side is used to decrease the line current anda low voltage level is adopted to increase line current. Thesame analysis of phase-b and phase-c can be achievedaccording to the same analysis. The system behaviour of theproposed AC/DC converter can be expressed as
ddt
isa
isb
iscvC1
vC2
266664
377775 ¼
� rL 0 0 0 0
0 � rL 0 0 0
0 0 � rL 0 0
0 0 0 � 1RC1
� 1RC1
0 0 0 � 1RC2
� 1RC2
266664
377775
isaisbisc
vC1
vC2
266664
377775
þ
vsa � vaoLvsb � vboLvsc � vcoLi1C1
� i3C2
26666664
37777775
ð1Þ
where vao, vbo and vco are AC terminal to neutral-pointvoltages and i1 and i3 are DC-side currents. Based on the onand off states of the active switches in the proposedconverter, the DC-side currents and AC terminal voltagescan be expressed as
vao ¼ð1� Sa2ÞsignðvsaÞvC1� ð1� Sa1Þ
½1� signðvsaÞ�vC2
ð2Þ
vbo ¼ð1� Sb2ÞsignðvsbÞvC1� ð1� Sb1Þ
½1� signðvsbÞ�vC2
ð3Þ
vco ¼ð1� Sc2ÞsignðvscÞvC1� ð1� Sc1Þ
½1� signðvscÞ�vC2
ð4Þ
i1 ¼ð1� Sa2ÞsignðvsaÞisa þ ð1� Sb2ÞsignðvsbÞisb
þ ð1� Sc2ÞsignðvscÞiscð5Þ
i3 ¼ð1� Sa1Þ½1� signðvsaÞ�isa þ ð1� Sb1Þ½1� signðvsbÞ�isb þ ð1� Sc1Þ½1� signðvscÞ�isc
ð6Þ
where
signðvsxÞ ¼1; vsx400; vsxo0
�; x ¼ a; b; c ð7Þ
Based on (1)–(6) the system equations of the proposedconverter can be rewritten as
disadt
disbdt
discdt
dvC1
dt
dvC2
dt
266666666664
377777777775
¼
�rL
0 0
0 �rL
0
0 0 �rL
1� Sa2C1
� signðvsaÞ 1� Sb2C1
� signðvsbÞ 1� Sc2C1 � signðvscÞ
� 1�Sa1C2½1� signðvsaÞ� � 1�Sb1
C2½1� signðvsbÞ� � 1� Sc1
C2½1� signðvscÞ�
2666666666664
� 1� Sa2L signðvsaÞ 1� Sa1
L ½1� signðvsaÞ�
� 1� Sb2L signðvsbÞ 1� Sb1
L ½1� signðvsbÞ�
� 1� Sc2L signðvcaÞ 1� Sc1
L ½1� signðvscÞ�� 1
RC1� 1
RC1
� 1RC2
� 1RC2
37777777775
�
isa
isb
iscvC1
vC2
26666664
37777775þ
vsaL
vsbL
vscL
0
0
26666664
37777775
ð8Þ
Figure 3 gives the simplified circuit of the proposedconverter. If the switching signals of the active switchesare given the state equations (8) can be used to obtain theline current and DC-side voltages vC1 and vC2 by computersimulation.
3 Control scheme
The following functions are implemented: almost unitypower factor is achieved; sinusoidal line currents are drawnfrom the AC sources; constant DC bus voltage is obtained;and the neutral-point voltage on the DC bus is balanced.The internal high-bandwidth current control system isdesigned to achieve a short settling time and the outerlow-bandwidth voltage control system is designed to besomewhat slower.
3.1 DC-bus voltage regulationTo achieve the power balance between the AC-source sideand DC-load side of the AC/DC converter, a proportional-integral voltage controller is used to obtain the amplitude ofthe line current commands. The amplitude of line currentcommand is expressed as
Is ¼ kpDvdc þ ki
ZDvdcdt ð9Þ
where kp and ki are proportional and integral gains,respectively, and Dvdc¼ v*dc�vdc is the DC-bus voltage error,v*dc is the voltage command and vdc is the measured DC-sidevoltage. The parameters of voltage controller can beselected from the given system transfer function and thedesigned damping factor and natural angular frequency ofthe voltage response. The voltage error between the voltagecommand and the measured DC-bus voltage can bereduced by adjusting the amplitude of the line currents.To achieve unity power factor at the input side of theconverter, a phase-locked loop circuit generates three unitsinusoidal waves with 1201 phase shift. A VCO- type phase-locked loop IC (CD4066) and a counter IC (CD4040) are
IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005 487
used to achieve an eight-bit signal which is input to thedigital signal processor. The digital signal processorgenerates three balanced sinusoidal waves using a look-uptable with the input eight-bit digital signal. These balancedsinusoidal waves are synchronised to three-phase sourcevoltages and expressed as
eaðtÞebðtÞecðtÞ
24
35 ¼
sinotsinðot � 2p=3Þsinðot þ 2p=3Þ
24
35 ð10Þ
Input-current references are calculated by multiplying theamplitude of the input-current commands and the gener-ated unit sinusoidal waves
isaðtÞisbðtÞiscðtÞ
24
35 ¼ Is
eaðtÞebðtÞecðtÞ
24
35 ¼
Is sinotIs sinðot � 2p=3ÞIs sinðot þ 2p=3Þ
24
35 ð11Þ
3.2 Neutral-point voltage compensationTo balance the neutral-point voltage under load variation avoltage compensator is used in the control scheme tocompensate the neutral-point voltage. This additionalcurrent for neutral-point balance is given as
Inpc ¼ K½VC2� VC1
� ð12Þwhere VC1
and VC2are average voltages across capacitors C1
and C2, respectively, and K is a small gain of the neutral-point voltage compensator. To avoid a large DC term in theline current command due to unbalance neutral-pointvoltage, a limiter can be placed after the neutral-pointvoltage compensator. If the DC capacitor voltage VC2
isgreater than VC1
, then a small DC value is added to the line-current command. Capacitor voltage VC1
will be increased
in the next line period. Therefore the capacitor voltage VC1is
compensated. The resultant line-current commands areillustrated as
i�saðtÞi�sbðtÞi�scðtÞ
24
35 ¼
Is sinotIs sinðot � 2p=3ÞIs sinðot þ 2p=3Þ
24
35þ Inpc
111
2435
¼Is sinðotÞ þ Inpc
Is sinðot � 2p=3Þ þ Inpc
Is sinðot þ 2p=3Þ þ Inpc
24
35 ð13Þ
3.3 Line-current command trackingHysteresis current comparators track the input-currentreferences. The appropriate PWM generator obtains theswitching signals for the power switches. The line-currenterrors between the measured line currents and the currentcommands are sent to the hysteresis comparators togenerate the proper PWM signals for active switches. Basedon the operation states shown in Fig. 2, there are threevoltage levels vdc/2, 0 and�vdc/2 generated in each converterleg. One high voltage level and one low voltage level can beselected during the positive and negative half cycle of phasevoltage to track the line current command. During thepositive half cycle, high voltage levels vdc/2 and low voltagelevel 0 are generated on the AC terminal to neutral-pointvoltage. During the negative half cycle, high voltage level 0and low voltage level �vdc/2 are generated on the AC sideto control the line current. The high voltage level is adoptedto decrease the line current and low voltage level is used toincrease the line current. Figure 4a shows the sourcevoltage, line current, PWM signals and AC-side voltage foreach converter leg where x¼ a, b, c. Figure 4b gives the
Lr
isa
Lr
Lr
isb
isc
vsa
vsb
vsc
iso
(1−Sa1)[sign(vsa )−1]−vC 2
(1−Sb1)[sign(vsb )−1]−vC 2
(1−Sc1)[sign(vsc )−1]−vC 2
(1−Sa2)sign(vsa)vC 1
(1−Sb2)sign(vsb)vC 1
(1−Sc 2)sign(vsc)vC 1
vC 1
vC 2
i1
i3
i2
R
C1
C 2
(1-Sa2 )sign(v
sa )isa
(1-Sb2 )sign(v
sb )isb
(1-Sc 2 )sign(v
sc )isc
(1-Sa1 )[1-sign(v
sa )]isa
(1-Sb1 )[1-sign(v
sb )]isb
(1-Sc 1 )[1-sign(v
sc )]isc
[Sa 2 sign(vsa)+
Sa1(1-sign(vsa))]isa
[Sb2 sign(vsb)+
Sb1(1-sign(vsb))]isb
[Sc 2 sign(vsc)+
Sc1(1-sign(vsc)]isc
Fig. 3 Equivalent circuit of adopted three-phase AC/DC converter
488 IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
relationship between the measured phase voltage, hysteresiscurrent comparator and the PWM signals for activeswitches in each converter leg. The PWM signals of active
power switch shown in Fig. 4b are expressed as
Sa1 ¼ signðvsaÞ � hysðDisaÞ ð14Þ
Sa2 ¼ signðvsaÞ � hysðDisaÞ ð15Þ
Sb1 ¼ signðvsbÞ � hysðDisbÞ ð16Þ
Sb2 ¼ signðvsbÞ � hysðDisbÞ ð17Þ
Sc1 ¼ signðvscÞ � hysðDiscÞ ð18Þ
Sc2 ¼ signðvscÞ � hysðDiscÞ ð19Þwhere
hysðDisxÞ ¼1; ifDisx4h
0; ifDisxo� h
�ð20Þ
signðvsxÞ ¼1; if vsx400; if vsxo0
�ð21Þ
and Disx¼ i*sx�isx, signðvsaÞ ¼ 1� signðvsaÞ, x¼ a, b, c.Figure 5 gives the block diagram of the proposed controlscheme. The DC-bus voltage controller is used to obtain theamplitude of the line current command. Because the systeminput power factor is controlled to be unity, the currentamplitude from the output of DC-bus voltage controller ismultiplied with three unit sinusoidal waves in phase withmains voltages. A neutral-point voltage compensatorbalances the neutral-point voltage. An hysteresis currentcontroller tracks the line-current commands to achievepower factor correction.
4 Simulation and experimental results
The proposed three-phase unidirectional AC/DC converterwith power factor correction was verified through simula-tions and experimental results. A computer softwarepackage based on MATLAB/SIMULINK simulated thesystem behaviour. The RMS AC mains voltage is 220 Vwith 60Hz; the boost inductance is 3mH; the capacitanceof the two capacitors is 2,200mF; the hysteresis currentband is 0.5A and the DC-bus voltage vdc is equal to 400Vin the proposed converter. Figure 6 shows the simulated
sign(vsx )
Sx 2
vsx
i*sx
isx
0
0
01
1
1
vxo 0vdc /2
−vdc /2
i*sx+h
i*sx −h
Sx 1
01
hys(�isx )
a
b
vsx
hys(�isx )
hys(�isx )
Sx 1off, Sx 2 on
Sx 1on, Sx 2 off
Sx 1 Sx 2 off
Sx 1 Sx 2 off
vsx
> 0
< 0
> h
> h
< −h
< −h
Fig. 4 Phase voltage, current, PWM signals and control strategyfor each converter leg
isa
isc
isb
KVC 2
VC 1
Sa 2
Sb 2
Sc 2
Sa 1
Sb 1
Sc 1
PIv*dc
vdc
PLLvsa~vsc
vsa
vsb
vsc
sin(�t)
sin(�t−2π /3)
sin(�t+2π /3)
Is hys(�isa)
hys(�isb)
hys(�isc)
sign(vsa)
sign(vsb)
sign(vsc)
i*sa
i*sb
i*sc
isa
isb
isc
�isa
�isb
�isc
limiter
PWM Generator
DC-bus voltage regulator
neutral-point voltage compensator
+
−
+
−
+
−
Fig. 5 Block diagram of adopted converter
IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005 489
results of phase voltage, line current, PWM signals and ACterminal to neutral-point voltage in each phase. Powerswitches Sx2 (x¼ a, b, c) are active during each positivephase voltage and switches Sx1 are active during eachnegative phase voltage. Figure 7a shows the simulatedresults of three-phase mains voltages and line currents. Theline currents are balanced and sinusoidal waves with almostunity power factor. Figure 7b gives the simulated three-phase line current and neutral-line current. The neutral-linecurrent is close to zero. The DC-bus capacitor voltages areillustrated in Fig. 7c. Two capacitor voltages on the DC sideare almost balanced.
In the experimental tests a scaled down laboratoryprototype circuit was implemented to verify the systemperformance. The MUR 1560 fast-recovery diode isadopted for the main power diodes Da1BDc2. MOSFETs(IRFP460) are used for the active switches Sa1BSc2. TheRMS line voltage of the proposed rectifier is 110V with 60Hz; the boost inductance is 3 mH; the capacitance of thetwo capacitors is 2,200mF; the hysteresis current band is0.5A and the DC-bus voltage vdc is equal to 200V in theproposed converter. The control parameters of DC-busvoltage controller used in the experimental tests are kp¼ 0.3and ki¼ 6. The gain of neutral-point voltage compensatoris K¼ 0.03. A single-chip digital signal processor(TMS320C32) is adopted as the kernel in the implementa-tion of a digital controller. The control program was written
vsa
Sa1
vao
isa
Sa 2
10ms
200V
200V
20A
20V
20V
200V
200V
20A
20V
20V
200V
200V
20A
20V
20V
0V
0A
0V
0V
0V
0V
0A
0V
0V
0V
0V
0A
0V
0V
0V
a
b
c
vsb
Sb1
vbo
isb
Sb 2
10ms
vsc
Sc1
vco
isc
Sc 2
10ms
Fig. 6 Simulated results of phase voltage, line current, PWMsignals and AC-side voltagea Converter leg ab Converter leg bc Converter leg c
vsa vsb vsc
isa isb isc
5ms
50V
10A
0
a
b
c
iso
isa isb isc
5ms
10A
0A
0A
vC 1
vC 2
vC 1+vC 2
200V
200V
400V
10ms
5V
5V
5V
Fig. 7 Simulated results of proposed convertera Three-phase voltage and line currentb Three-phase current and line neutral currentc Capacitor voltages on dc side
490 IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
in assembly language and downloaded to the target board.The line voltage, inductor current and capacitor voltages aremeasured with a potential transformer, current transducerand optocoupler, respectively. Figure 8 shows the three-phase mains voltage and current before and after the PWMoperation in the proposed converter. Before the PWMoperation, three nonsinusoidal line currents are drawn fromthe AC source.
After the PWM operation the balanced and sinusoidalline currents with nearly unity power factor are drawn fromthe AC source. Figure 9 gives the measured results of phasevoltage, line current and AC side to neutral-point voltagefor each converter leg. Based on the measured results with apower meter analyser, Tables 1 and 2 give the measuredpower factor and total harmonic distortion under variousoutput loads. The power factor is close to 0.995 and THD is3.4% at the rated output power. Since the hysteresiscomparator is used in the current control loop, the largetotal harmonic distortion of line current at light load ismeasured and shown in Table 2. The measured switchingfrequency range is from 5.2 to 7.5 kHz. Figures 10 showsthe experimental results of three-phase voltage and linecurrent under the balanced and unbalanced AC mainsvoltage. In the proposed control scheme three balanced linecurrents are drawn from the AC source even if the AC
mains voltages are unbalanced. Figure 11 shows themeasured source currents including neutral line currentbefore and after the PWM operation in the proposedconverter. The neutral line current is almost zero afterthe PWM operation. Figure 12 gives the measureddynamic voltage response of the proposed converter dueto load change from 3 to 5 A. Due to the instantload change the energy stored on the capacitors isdischarged to the load. The voltage controller will beused to compensate the DC-bus voltage error with thechange of input-current command. Recovery time of
vsa
vsb
vsc
isa
isb
isc
after PWMbefore PWM
Fig. 8 Experimental results of three-phase mains voltage andcurrent before and after PWM operation in the proposed convertervsa, vsb, vsc 100 V/div; isa, isb, isc 10 A/div; time 20 ms/div
vsa
vao
isa
a
b
c
vsb
vbo
isb
vsc
vco
isc
Fig. 9 Measured results of phase voltage, line current and AC-sidevoltagea a-phaseb b-phasec c-phase
Table 1: Measured power factor of proposed converterunder various output powers
Output power (W) 100 200 400 600 800 1000
Power factor 0.98 0.99 0.992 0.994 0.995 0.995
Table 2: Measured THD of proposed converter undervarious output powers
Output power (W) 100 200 400 600 800 1000
Total harmonicdistortion (%)
7.8 6.1 4.6 4.1 3.7 3.4
IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005 491
the DC-link voltage due to load change is about three cyclesof line frequency. Based on the adopted control scheme twoDC-side capacitor voltages are balanced before and afterthe load variation.
5 Conclusions
A novel three-phase unidirectional AC/DC converter withless power switches has been presented to achieve powerfactor correction, low current distortion, three-level PWMoperation and regulated DC-bus voltage. Two activeswitches and two diodes are used in each converter leg.Only six switches and six diodes are used in the proposedconverter. Three and five different voltage levels aregenerated on the AC terminal to neutral-point voltagesand AC-side line-to-line voltages, respectively. The DC-busvoltage controller is used in the outer loop to achieve theamplitude of line-current command. An hysteresis currentcontroller is used in the inner loop to track the line-currentcommand. The simulation and experimental results showgood line-current waveforms with nearly unity power factorand low current harmonics.
6 References
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vsa
vsb
vsc
isa
isb
isc
a
b
vsa vsb vsc
isa isb isc
Fig. 10 Measured results of three-phase voltage and line current.a Balanced AC mains voltages; vsa, vsb, vsc 100 V/div.; isa, isb, isc 20A/div.; time 10 ms/div.b Unbalanced AC mains voltages; vsa, vsb, vsc 50 V/div.; isa, isb, isc 10A/div.; time 4 ms/div.
isa isb isc
iso
Fig. 11 Measured three-phase current and line neutral currentbefore and after PWM operationisa, isb, isc, iso 5 A/div.; time 20 ms/div.
vC1
Io
vC2
load change
Fig. 12 Measured results of the two capacitor voltages and loadcurrent from 3 to 5 A output load changevC1, vC2 20 V/div.; Io 3 A/div.; time 20 ms/div.
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