3/2/1-phase synchronous-rectified buck controller for...

12
uP9509 1 uP9509-DS-C3000, Dec. 2015 www.upi-semi.com 3/2/1-Phase Synchronous-Rectified Buck Controller for Mobile GPU Power Support NVIDIA’s Open VReg Type-2+ PWMVID Technology Wide Input Voltage Range 4.5V ~ 26V Robust Constant On-Time Control 3/2/1 Phase Operation Two Integrated MOSFET Drivers with Shoot- Through Protection and Internal Bootstrap Schottky Diode Adjustable Current Balancing by R DS(ON) Current Sensing Adjustable Operation Frequency External Compensation Dynamic Output Voltage Adjustment Adjustable Per-Phase Over Current Limit Power Good Indication Over Voltage Protection Under Voltage Protection Adjustable Soft-Start Time Over Temperature Protection RoHS Compliant and Halogen Free r e b m u N r e d r O e p y T e g a k c a P g n i k r a M p o T G A Q P 9 0 5 9 P u L 4 2 - 4 x 4 N F Q V P 9 0 5 9 P u General Description Applications Features Middle-High End GPU Core Power High End Desktop PC Memory Core Power Low Output Voltage, High Power Density DC-DC Converters Voltage Regulator Modules Ordering Information Note: (1) Please check the sample/production availability with uPI representatives. (2) uPI products are compatible with the current IPC/JEDEC J-STD-020 requirement. They are halogen-free, RoHS compliant and 100% matte tin (Sn) plating that are suitable for use in SnPb or Pb-free soldering processes. Pin Configuration The uP9509 is a 3/2/1-phase synchronous-rectified buck controller specifically designed to work with 4.5V ~ 26V input voltage and deliver high quality output voltage for high- performance graphic processor power. The uP9509 adopts proprietary RCOT TM technology, providing flexible selection of output LC filter and excellent transient response to load and line change. The uP9509 supports NVIDIA Open Voltage Regulator-2+ with PWMVID feature. The PWMVID input is buffered and filtered to generate accurate reference voltage, and the output voltage is precisely regulated to the reference input. The uP9509 integrates two bootstrapped MOSFET gate drivers and one PWM output achieving optimal balance between cost and flexibility. The uP9509 uses MOSFET R DS(ON) current sensing for channel current balance. Other features include accurate and reliable over current limit protection, adjustable on-time setting, power saving control input, and power good output. This part is available in a VQFN4x4 - 24L package. PHASE1 4 3 2 1 UGATE2 ISEN2 ISEN1 PSI REFIN BOOT1 LGATE1 PWM3 GND 10 9 8 7 BOOT2 VREF PGOOD PVCC TON 6 5 REFADJ VID 12 11 FBRTN COMP UGATE1 ISEN3 LGATE2 PHASE2 FB EN 15 16 17 18 13 14 21 22 23 24 19 20

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Page 1: 3/2/1-Phase Synchronous-Rectified Buck Controller for ...eip.tongfangpc.com/WebAgenda/uploads/P1605270035/... · 213 LGATE Lower Gate Driver for Phase 1. Connect this pin to the gate

uP9509

1uP9509-DS-C3000, Dec. 2015www.upi-semi.com

3/2/1-Phase Synchronous-Rectified Buck Controllerfor Mobile GPU Power

Support NVIDIA’s Open VReg Type-2+ PWMVIDTechnology

Wide Input Voltage Range 4.5V ~ 26V

Robust Constant On-Time Control

3/2/1 Phase Operation

Two Integrated MOSFET Drivers with Shoot-Through Protection and Internal BootstrapSchottky Diode

Adjustable Current Balancing by RDS(ON) CurrentSensing

Adjustable Operation Frequency

External Compensation

Dynamic Output Voltage Adjustment

Adjustable Per-Phase Over Current Limit

Power Good Indication

Over Voltage Protection

Under Voltage Protection

Adjustable Soft-Start Time

Over Temperature Protection

RoHS Compliant and Halogen FreerebmuNredrO epyTegakcaP gnikraMpoT

GAQP9059Pu L42-4x4NFQV P9059Pu

General Description

Applications

Features

Middle-High End GPU Core Power

High End Desktop PC Memory Core Power

Low Output Voltage, High Power Density DC-DCConverters

Voltage Regulator Modules

Ordering Information

Note:(1) Please check the sample/production availability withuPI representatives.(2) uPI products are compatible with the current IPC/JEDECJ-STD-020 requirement. They are halogen-free, RoHScompliant and 100% matte tin (Sn) plating that are suitablefor use in SnPb or Pb-free soldering processes. Pin Configuration

The uP9509 is a 3/2/1-phase synchronous-rectified buckcontroller specifically designed to work with 4.5V ~ 26Vinput voltage and deliver high quality output voltage for high-performance graphic processor power.

The uP9509 adopts proprietary RCOTTM technology,providing flexible selection of output LC filter and excellenttransient response to load and line change.

The uP9509 supports NVIDIA Open Voltage Regulator-2+with PWMVID feature. The PWMVID input is buffered andfiltered to generate accurate reference voltage, and theoutput voltage is precisely regulated to the reference input.

The uP9509 integrates two bootstrapped MOSFET gatedrivers and one PWM output achieving optimal balancebetween cost and flexibility. The uP9509 uses MOSFETR

DS(ON) current sensing for channel current balance.

Other features include accurate and reliable over currentlimit protection, adjustable on-time setting, power savingcontrol input, and power good output. This part is availablein a VQFN4x4 - 24L package.

PHASE1

4321

UG

AT

E2

ISE

N2

ISE

N1

PS

I

REFIN

BO

OT

1

LGATE1

PWM3GND

10

9

8

7

BO

OT

2

VREF

PG

OO

D

PVCC

TON

65

RE

FA

DJ

VID

12

11

FBRTN

COMP

UG

AT

E1

ISE

N3

LGATE2

PHASE2

FB

EN

15161718 1314

21

22

23

24

19

20

Page 2: 3/2/1-Phase Synchronous-Rectified Buck Controller for ...eip.tongfangpc.com/WebAgenda/uploads/P1605270035/... · 213 LGATE Lower Gate Driver for Phase 1. Connect this pin to the gate

uP9509

2 uP9509-DS-C3000, Dec. 2015www.upi-semi.com

Typical Application Circuit

FB

COMP

PHASE1

EN

BOOT1

UGATE1

LGATE1

LGATE2

UGATE2

BOOT2

PHASE2

PSI

PVCC

REFADJVIN = 5V~20V

REFIN

GND

VREF

VOUT

FBRTN

PGOOD

1.8V

VID

5V

TON

1.8V

ISEN1

ISEN2

VCC

PWM

UGATE

GNDLGATE

BOOT

PHASE

DriverISEN3

PWM3

5VVIN = 5V~20V

VSS_SNS

VCC_SNS

VSS_SNS

0.5kohm

Page 3: 3/2/1-Phase Synchronous-Rectified Buck Controller for ...eip.tongfangpc.com/WebAgenda/uploads/P1605270035/... · 213 LGATE Lower Gate Driver for Phase 1. Connect this pin to the gate

uP9509

3uP9509-DS-C3000, Dec. 2015www.upi-semi.com

Functional Pin Description

.oN emaN noitcnuFniP

1 1TOOB.1esahProfTOOB roftiucricpartstoobamrofot1ESAHPotnipsihtmrofroticapacatcennoC

.1esahpehtforevirdetagreppu

2 1ETAGU .1esahProfrevirDetaGreppU .TEFSOMreppu1esahpfoetagehtotnipsihttcennoC

3 NE .elbanE .elbanepihC

4 ISP .tupnIgnivaSrewoP .UPGmorflangislortnocgnivasrewopgniviecerniptupninA

5 DIV .DIV .niptupniDIVMWP

6 JDAFER.tnemtsujdAecnerefeR etarenegotrotargetniCRnahtiwnipsihttcennoC.niptuptuoDIVMWP

.egatlovNIFER

7 NIFER.tupnIecnerefeR tcennocrorotsiserahguorhtegatlovecnereferlanretxenaotnipsihttcennoC

.tiucricJDAFERehtfotuptuoehtot

8 FERV.egatloVecnerefeR roticapacgnilpuocedFu1tsaeltanatcennoC.niptuptuoegatlovODLV2

.DNGdnanipsihtneewteb

9 NOT.niPgnitteSemit-nO reppuehtfoemit-noehttesotNIVotnipsihtmorfrotsiseratcennoC

.TEFSOM

01 NTRBF.tiucriCecnerefeRehtrofnruteR siegatlovtuptuoerehwtniopdnuorgehtotnipsihttcennoC

.detalugerebot

11 BF .niPkcabdeeF .reifilpmarorreehtfotupnignitrevniehtsinipsihT

21 PMOC .tuptuOnoitasnepmoC .reifilpmarorreehtfotuptuoehtsinipsihT

31 3NESI.3NESI .tnerructuptuo3esahpesnesotmhok5.0htiwnip3ESAHPehtotnipsihttcennoC OD

.rotsiserrehtoesuTON

41 2NESI .2NESI .tnerructuptuo2esahpesnesotrotsiserahtiwnip2ESAHPehtotnipsihttcennoC

51 1NESI .1NESI .tnerructuptuo1esahpesnesotrotsiserahtiwnip1ESAHPehtotnipsihttcennoC

61 DOOGP.noitacidnIdooGrewoP pu-llupahtiwecruosegatlovaotnipsihttcennoC.erutcurtsniard-nepO

.rotsiser

71 2ETAGU .2esahProfrevirDetaGreppU .TEFSOMreppu2esahpfoetagehtotnipsihttcennoC

81 2TOOB.2esahProfTOOB roftiucricpartstoobamrofot2ESAHPotnipsihtmrofroticapacatcennoC

.2esahpehtforevirdetagreppu

91 2ESAHP.2esahProfniPesahP atcennoC.2esahprofrevirdetagreppufohtapnruterehtsinipsihT

.2esahpehtforevirdetagreppuroftiucricpartstoobamrofot2TOOBotnipsihtmorfroticapac

02 2ETAGL .2esahProfrevirDetaGrewoL .TEFSOMrewol2esahpfoetagehtotnipsihttcennoC

12 CCVP.CIehtroftupnIylppuS dnaylppusV5aotnipsihttcennoC.CIehtfoylppusrewopegatloV

.roticapaccimarecFu1atsaeltagnisuelpuoced

22 3MWP3esahPfotuptuOMWP .revirdetagnoinapmocehtfoniptupniMWPehtotnipsihttcennoC.

.noitarepoesahp2mumixamnehwDNGotnipsihttcennoC

32 1ETAGL .1esahProfrevirDetaGrewoL .TEFSOMrewol1esahpfoetagehtotnipsihttcennoC

42 1ESAHP.1esahProfniPesahP atcennoC.1esahprofrevirdetagreppufohtapnruterehtsinipsihT

.1esahpehtforevirdetagreppuroftiucricpartstoobamrofot1TOOBotnipsihtmorfroticapac

daPdesopxE .dnuorG .elbaliavanoitcennocecnadepmitsewolehthguorhtenalp/dnalsidnuorgotnipsihteiT

Page 4: 3/2/1-Phase Synchronous-Rectified Buck Controller for ...eip.tongfangpc.com/WebAgenda/uploads/P1605270035/... · 213 LGATE Lower Gate Driver for Phase 1. Connect this pin to the gate

uP9509

4 uP9509-DS-C3000, Dec. 2015www.upi-semi.com

Functional Block Diagram

PVCCPOR

GateControlLogic

BOOT1

UGATE1

PHASE1

LGATE1

BOOT2

UGATE2

PHASE2

LGATE2

PWM3

Soft Start&

Power OK

REFIN

FB

COMP

EN

Ramp Generation

ISEN3

ISEN2

ISEN1

Phase Selection

On-Time Generation

GateControlLogic

Current Balance

TO

N

PG

OO

D

OVPUVP

OVPUVP

OVPUVPOTP

VREF

VID

POR

LinearRegulator

H/LDetector

PVCC

REFADJ

FBRTN

PSI

OCL

GM

GM

GM

S/H

S/H

S/H

Current Limit

GM

Page 5: 3/2/1-Phase Synchronous-Rectified Buck Controller for ...eip.tongfangpc.com/WebAgenda/uploads/P1605270035/... · 213 LGATE Lower Gate Driver for Phase 1. Connect this pin to the gate

uP9509

5uP9509-DS-C3000, Dec. 2015www.upi-semi.com

Supply Input and Power On Reset

The uP9509 receives supply input from PVCC pin to providecurrent to gate drivers and internal control circuit. PVCC iscontinuously monitored for power on reset. The POR levelis typical 4.1V at rising. The TON pin voltage is used foron-time calculation and should be connected to the supplyinput of power stage.

The uP9509 integrates floating MOSFET gate driver thatare powered from the PVCC pin. A bootstrap schottky diodeis embedded to facilitates PCB design and reduce the totalBOM cost. No external Schottky diode is required in realapplications. An external Schottky diode with lower voltagedrop can improve the power conversion efficiency.

Phase Number of Operation (Hard-wire Programming)

The uP9509 supports 3/2/1 phase operation. The maximumphase number of operation is determined by checking thePWM3 status when POR. Connect PWM3 pin to GND with100kΩ resistor for maximum 2-phase operation; ConnectISEN2 to PVCC with 100kΩ resistor for maximum 1-phaseoperation. Once selected, the maximum phase number ofoperation is latched and can only be changed at the nextPOR.

Constant On-Time Setting

The uP9509 adopts a compensated constant-on-timecontrol scheme. A resistor R

TON connected to TON pin

programs the constant on time according to the equation:

RTON

(kΩ)

Figure 1. Switching Frequency vs. RTON

(ns) 1009

××= TON

IN

OUTON

RV

V)ns(T

where RTON

is in kΩ, VIN

is the supply input voltage andV

OUT is the output voltage.

Functional DescriptionVoltage Control Loop and PWMVID Function

Figure 2 illustrates the voltage control loop of the uP9509.FB and REFIN are negative and positive inputs of the ErrorAmplifier respectively. The Error Amplifier modulates theCOMP voltage V

COMP of buck converter to force FB voltage

VFB

follows VREFIN

.

COMP

REFADJ

REFIN

VREF

VID

2V

R1

R3

R2

PWMVID

FBRTNVSS_SNS

C

FB

R4VSTDBY

RSTDBY

R5

EA

Figure 2. Voltage Control Loop

The PWMVID signal from GPU is applied to the VID pin,which is the input pin of the internal buffer. This buffer playsthe role of level shifting, and the output of this buffer isinjected into the external RC integrator to generate REFINvoltage, which can be calculated as:

=REFINV

( )( ) +

+++×

+++++××

5R4R3R5R4R

5R4R3R//2R1R5R4R3R//2R

DVVREF

( )( ) 5R4R3R

5R4R5R4R3R//1R2R

5R4R3R//1RVVREF ++

+×+++

++×

where VREFIN,DC

is the DC voltage of REFIN, VVREF

is thevoltage of VREF (typically 2V), and D is the duty cycle ofPWMVID input.

Sw

itchi

ng F

requ

ency

(kH

z)

0

200

400

600

800

1000

1200

0 200 400 600 800 1000

Page 6: 3/2/1-Phase Synchronous-Rectified Buck Controller for ...eip.tongfangpc.com/WebAgenda/uploads/P1605270035/... · 213 LGATE Lower Gate Driver for Phase 1. Connect this pin to the gate

uP9509

6 uP9509-DS-C3000, Dec. 2015www.upi-semi.com

Functional DescriptionBoot Voltage and Standby Mode

The new generation PWMVID structure includes twooperation modes other than normal operation: boot modeand standby mode. During boot mode, the GPU stopssending PWMVID signal and the input of the PWMVID bufferis floating. The REFADJ pin enters high impedance stateafter the VID pin enters tri-state region, and the REFINvoltage can then be calculated as:

5R4R3R2R5R4R

VV VREFBOOT,REFIN ++++×=

During standby mode, other than GPU stopping thePWMVID transaction, an external system standby signaladditionally controls the entry of standby mode. Anadditional external switch should be connected in parallelwith the original PWMVID resistors as shown in Figure 3to generate the standby mode voltage:

( )( ) 5R4R3R

5R4RR//5R4R3R2R

R//5R4R3RV

V

STDBY

STDBYVREF

STDBY,REFIN

+++×

+++++

×

=

REFADJ

REFIN

VREF

VID

2V

R1

R3

R2

PWMVID

FBRTNVSS_SNS

CR4VSTDBY

RSTDBY

R5

Figure 3. Standby Mode Configuration

Channel Current Balance

The uP9509 senses phase currents for current balance bythe means of on-resistance of power stage low-sideMOSFET as shown in Figure 4.

Sample & Hold

Over Current Limit

CurrentBalance

ISEN2ICS1

ICS2

ISEN1

ICS3

GMAmplifier

VDC

GMAmplifier

GMAmplifier

ISEN3

Figure 4. RDS(ON)

Current Sensing Scheme

The GM amplifier senses the voltage drop across the low-side MOSFET and converts it into current signal each timeit turns on. The sampled and held current is expressed as:

( )( )ISENX

DCONDSLXCSX R

VRII

+×=

where ILX

is the phase N current in Ampere, RDS(ON)

is theon-resistance of low-side MOSFET of the power stage inmΩ, V

DC is an internal 30mV voltage source, and R

ISENX is

the external sensing resistor connected at ISENx pins. Inthis current sense mechanism, the valley of the inductorcurrent is sampled and held. Therefore, the equivalentsensed current can be described by the following equation:

LXAVG_LXSH_LX I21

II ∆×−=

The sensed current ILX_SH

is mirrored to the current balancecircuit, comparing between each other, and generatingcurrent adjusting signals for each phase. These currentadjusting signals are fed to the on-time circuit of the uP9509to separately adjust each phase on-time for the purpose ofadjusting current balance.

Soft-Start and Power Good

A built-in soft-start is used to prevent surge current frompower supply input during turn on. The error amplifier is athree-input device. Reference voltage V

REFIN or the internal

soft-start voltage SS whichever is smaller dominates thebehavior of the non-inverting inputs of the error amplifier.SS internally ramps up to PVCC with a slew ratedetermined by V

REFIN after the soft start cycle is initiated.

Accordingly, the output voltage will follow the SS signaland ramp up smoothly to its target level. The output voltageramp-up time can be selected through a resistor which isconnected from LGATE2 to GND. The output ramp-upselection table shown as following table.

Page 7: 3/2/1-Phase Synchronous-Rectified Buck Controller for ...eip.tongfangpc.com/WebAgenda/uploads/P1605270035/... · 213 LGATE Lower Gate Driver for Phase 1. Connect this pin to the gate

uP9509

7uP9509-DS-C3000, Dec. 2015www.upi-semi.com

Functional Description

R 2GL emiTpUpmaRegatloVtuptuO

k51 su051

k02 su005

k03 sm1

nepO sm5.1

Table 1. Output Ramp Up Time Setting

Power Saving Mode

The uP9509 provides power saving features for platformdesigners to program platform specific power savingconfiguration. There are four operation modes: multi-phaseCCM, multi-phase DCM, single-phase CCM, and single-phase DCM. The uP9509 switches between these fouroperation modes according to the input voltage level of thePSI pin. Figure 5 shows typical PSI application circuit,and table 1 shows recommended PSI setting voltage levelof four operation modes. In single-phase operation, theuP9509 auto-selects phase 1 to be the operating phase. InDCM, the uP9509 automatically reduces switchingfrequency at light load to maintain high efficiency. As theload current decreases, the rectifying MOSFET is turnedoff when zero inductor current is detected, and the converterruns in discontinuous conduction mode.

PSI Power State Selection

1.8V

H-L Logic

Figure 5. PSI application circuit

edoMnoitarepO ISPtagnitteSegatloVdednemmoceR

MCCesahP-itluM V8.1

MCDesahP-itluM V2.1

MCCesahP-elgniS V6.0

MCDesahP-elgniS DNG

Table 2. Recommended PSI Setting

Over Current Limit

The uP9509 monitors the inductor valley current by lowside MOSFET R

DS(ON) when it turns on. The over current

limit is triggered once the sensing current level is higherthan V

OC. When triggered, the over current limit will keep

high side MOSFET off even the voltage loop commands itto turn on.

The output voltage will decrease if the load continuouslydemands more current than current limit level. The currentlimit threshold is set by connecting a resistor (Roc) fromLGATE1 to GND. The voltage across PHASE and GND pinsis compared with V

OC for current limit. The current limit

threshold is calculated as:

( ) ( )( ) 2

RIPPLE

ONDS

OCLIM

IR

mVVAI +=

And , Roc resistance can be calculated as:

( ) ( ) ( ) uAuAmV

mVmVVmV

kROC

OC

58

255180

20500

+×−

VOC

is the per-phase GND-PHASE voltage when the powerstage low-side MOSFETs is turned-on; R

DS(ON) is the on-

resistance of equivalent per-phase power stage low sideMOSFET and I

RIPPLE is the peak-to-peak inductor ripple

current at steady state.

Over Voltage Protection (OVP)

The OVP is triggered if VFB

> 1.5xVREFIN

sustained 6us.When OVP is activated, the uP9509 turns on all low-sideMOSFET and turns off all high-side MOSFET. The overvoltage protection is a latch-off function and can only bereset by PVCC re-POR or EN restart.

Under Voltage Protection (UVP)

The under voltage protection is triggered if VFB

< 0.5xVREFIN

sustained 10us. When UVP is activated, the uP9509 turnsoff all high-side and low-side MOSFET. The under voltageprotection is a latch-off function and can only be reset byPVCC re-POR or EN restart.

Over Temperature Protection (OTP)

The uP9509 monitors the temperature of itself. If thetemperature exceeds typical 150oC, the uP9509 is forcedinto shutdown mode. The over temperature protection is alatch-off function and can only be reset by PVCC re-PORor EN restart.

Page 8: 3/2/1-Phase Synchronous-Rectified Buck Controller for ...eip.tongfangpc.com/WebAgenda/uploads/P1605270035/... · 213 LGATE Lower Gate Driver for Phase 1. Connect this pin to the gate

uP9509

8 uP9509-DS-C3000, Dec. 2015www.upi-semi.com

Package Thermal Resistance (Note 3)

VQFN4x4 - 24L θJA --------------------------------------------------------------------------------------------------------------------- 40oC/W

VQFN4x4 - 24L θJC ----------------------------------------------------------------------------------------------------------------------- 4oC/W

Power Dissipation, PD @ TA = 25OC

VQFN4x4 - 24L ------------------------------------------------------------------------------------------------------------------------------------ 2.5W

(Note 4)

Operating Junction Temperature Range ------------------------------------------------------------------------------------------- -40oC to +125oC

Operating Ambient Temperature Range ------------------------------------------------------------------------------------------- -40oC to +85oC

Input Voltage, VIN ---------------------------------------------------------------------------------------------------------------------------- 4.5V to 26V

Control Voltage, VPVCC

--------------------------------------------------------------------------------------------------------------------- 4.5V to 5.5V

Absolute Maximum Rating

Thermal Information

Recommended Operation Conditions

(Note 1)

Supply Input Voltage, PVCC ----------------------------------------------------------------------------------------------------------- -0.3V to +6.5V

BOOTx to PHASEx

DC ---------------------------------------------------------------------------------------------------------------------------------------- -0.3V to +6V

PHASEx to GND

DC ---------------------------------------------------------------------------------------------------------------------------------------- -0.7V to +28V

< 100ns ----------------------------------------------------------------------------------------------------------------------------------- -8V to +36V

BOOTx to GND

DC ---------------------------------------------------------------------------------------------------------------------------------------- -0.3V to +34V

< 100ns ----------------------------------------------------------------------------------------------------------------------------------- -5V to +42V

UGATEx to PHASEx

DC ---------------------------------------------------------------------------------------------------------------------------------------- -0.3V to +6V

< 100ns ----------------------------------------------------------------------------------------------------------------------------------- -5V to +7V

LGATEx to GND

DC ---------------------------------------------------------------------------------------------------------------------------------------- -0.3V to +6V

< 100ns ----------------------------------------------------------------------------------------------------------------------------------- -5V to +7V

Other Pins ------------------------------------------------------------------------------------------------------------------------------------- -0.3V to +6V

Storage Temperature Range ----------------------------------------------------------------------------------------------------------- -65oC to +150oC

Junction Temperature ------------------------------------------------------------------------------------------------------------------------------------ 150oC

Lead Temperature (Soldering, 10 sec) ------------------------------------------------------------------------------------------------------------ 260oC

ESD Rating (Note 2)

HBM (Human Body Mode) --------------------------------------------------------------------------------------------------------------------- 2kV

MM (Machine Mode) ----------------------------------------------------------------------------------------------------------------------------- 200V

Note 1. Stresses listed as the above Absolute Maximum Ratings may cause permanent damage to the device. Theseare for stress ratings. Functional operation of the device at these or any other conditions beyond those indicatedin the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditionsfor extended periods may remain possibility to affect device reliability.

Note 2. Devices are ESD sensitive. Handling precaution recommended.

Note 3. θJA

is measured in the natural convection at TA = 25oC on a low effective thermal conductivity test board of

JEDEC 51-3 thermal measurement standard.

Note 4. The device is not guaranteed to function outside its operating conditions.

Page 9: 3/2/1-Phase Synchronous-Rectified Buck Controller for ...eip.tongfangpc.com/WebAgenda/uploads/P1605270035/... · 213 LGATE Lower Gate Driver for Phase 1. Connect this pin to the gate

uP9509

9uP9509-DS-C3000, Dec. 2015www.upi-semi.com

Electrical Characteristics(PVCC = 5V, T

A = 25OC, unless otherwise specified)

retemaraP lobmyS snoitidnoCtseT niM pyT xaM stinU

tupnIylppuS

tnerruCtnecseiuQ IQV NIFER V,V8.1=NE,V9.0= BF ,V1=

gnihctiwson-- 1 -- Am

tnerruCnwodtuhS I NDHS V0=NE -- 2 -- Au

dlohserhTROPCCVP V HTRCCVP V CCVP gnisir 9.3 1.4 3.4 V

siseretsyHROPCCVP V SYHCCVP -- 3.0 -- V

ycaruccAegatloVFERV V FER 89.1 2 20.2 V

tnerruCgnicruoSFERV I FER 01 -- -- Am

NE:tupnIlortnoC

dlohserhTwoLcigoL V L_NE -- -- 6.0 V

dlohserhThgiHcigoL V H_NE 2.1 -- -- V

tnerruCnwod-lluPlanretnI I NE -- 01 -- Au

egatloVecnerefeR

dlohserhTelbasiDNIFER -- 1.0 -- V

egnaRegatloVecnerereRlanretxE V NIFER 2.0 -- 2 V

emiTnO

htdiWtohSenO T NO V NI V,V21= TUO F,V2.1= WS zHk003= -- 333 -- sn

emiTffOmuminiM T NIM_FFO -- 003 -- sn

emiTnOmuminiM T NIM_NO -- 08 -- sn

reifilpmArorrE

niaGCDpooLnepO OA ngiseDybdeetnarauG -- 07 -- Bd

tcudorPhtdiwdnaBniaG G )AE(WE ngiseDybdeetnarauG -- 01 -- zHM

egatloVtesffO V )AE(SO 1- -- 1 Vm

ecnatcudnoc-snarT MG -- 0202 -- V/Au

)kniS&ecruoS(tnerruCmumixaM I PMOC 003 -- -- Au

)ecnalaBtnerruC(reifilpmAesneStnerruC

egatloVtesffOtupnI V ASC_FFO 1- -- 1 Vm

tnerruCgnicruoSxaM I ASC_CRS 001 -- -- Au

egatloVxNESI V ASC_CD 52 03 53 Vm

ecnatsiseResneStnerruClanretnI R TNI_XNES -- 4 -- kΩ

NTRBF

tnerruCNTRBF I NTRBF gnihctiwson,V4.1=NE -- -- 005 Au

Page 10: 3/2/1-Phase Synchronous-Rectified Buck Controller for ...eip.tongfangpc.com/WebAgenda/uploads/P1605270035/... · 213 LGATE Lower Gate Driver for Phase 1. Connect this pin to the gate

uP9509

10 uP9509-DS-C3000, Dec. 2015www.upi-semi.com

Electrical Characteristics

retemaraP lobmyS snoitidnoCtseT niM pyT xaM stinU

tratStfoS

ROPtaemiTnoitazilaitinI T ROP_TINI -- -- 053 su

emiTnoitazilaitinI T TINI -- -- 052 su

reffuBDIVMWP

leveLwoLtupnIDIV V DIV_LI -- -- 6.0 V

leveLhgiHtupnIDIV V DIV_HI 2.1 -- -- V

yaleDetats-irTDIV T DIV_IRT -- 001 -- sn

V JDAFER ecnatsiseRecruoS R CRS_FB I CRS Am1= -- 02 -- Ω

V JDAFER ecnatsiseRkniS R KNS_FB I KNS Am1= -- 02 -- Ω

ISP

cigoLedoMgnivaSrewoP V ISP

MCCesahP-itluM 6.1 -- -- V

MCDesahP-itluM 1 -- 4.1 V

MCCesahP-elgniS 4.0 -- 8.0 V

MCDesahP-elgniS -- -- 2.0 V

srevirDetaG

ecruoSetaGreppU R CRS_GU I GU Am08-= -- 1 2 Ω

kniSetaGreppU R KNS_GU I GU Am08= -- 5.0 1 Ω

ecruoSetaGrewoL R CRS_GL I GL Am08-= -- 1 2 Ω

kniSetaGrewoL R KNS_GL I GL Am08= -- 4.0 8.0 Ω

emiTdaeD T TD -- 03 -- sn

edoiDykttohcSpartstooBlanretnI

egatloVdrawroF VF Am5.3=tnerruCsaiBdrawroF -- 33.0 -- V

dlohserhTnoitceteDtnerruCoreZ

dlohserhTtnerruCoreZ V CZ 5.0- -- 5.0 Vm

noitcetorP

dlohserhTPCO V CO 02 -- 002 Vm

dlohserhTPVO V PVO V BF V/ NIFER 051 -- -- %

dlohserhTPVU V PVU V BF V/ NIFER 04 -- 05 %

dlohserhTPTO -- 051 -- OC

rotacidnIdooGrewoP

leveLwoLtuptuODOOGP I KNIS Am4= -- -- 3.0 V

tnerruCegakaeL V GP V5= -- -- 1.0 Au

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uP9509

11uP9509-DS-C3000, Dec. 2015www.upi-semi.com

Package Information

Note1.Package Outline Unit Description:

BSC: Basic. Represents theoretical exact dimension or dimension targetMIN: Minimum dimension specified.MAX: Maximum dimension specified.REF: Reference. Represents dimension for reference use only. This value is not a device specification.TYP. Typical. Provided as a general value. This value is not a device specification.

2.Dimensions in Millimeters.3.Drawing not to scale.4.These dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm.

VQFN4x4 - 24L

3.90 - 4.10

Pin 1 markBottom View - Exposed Pad

2.30 - 2.80

0 .18 - 0.30

2.30 - 2.80 0.30 - 0.50

3.90 - 4.10

0 .0 - 0.05

0.80 - 1.00

0.20 REF

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uP9509

12 uP9509-DS-C3000, Dec. 2015www.upi-semi.com

Important Notice

uPI and its subsidiaries reserve the right to make corrections, modifications, enhancements, improvements, and otherchanges to its products and services at any time and to discontinue any product or service without notice. Customersshould obtain the latest relevant information before placing orders and should verify that such information is current andcomplete.

uPI products are sold subject to the taerms and conditions of sale supplied at the time of order acknowledgment.However, no responsibility is assumed by uPI or its subsidiaries for its use or application of any product or circuit; norfor any infringements of patents or other rights of third parties which may result from its use or application, including butnot limited to any consequential or incidental damages. No uPI components are designed, intended or authorized foruse in military, aerospace, automotive applications nor in systems for surgical implantation or life-sustaining. No licenseis granted by implication or otherwise under any patent or patent rights of uPI or its subsidiaries.

COPYRIGHT (C) 2015, UPI SEMICONDUCTOR CORP.

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uPI Semiconductor Corp.Sales Branch Office12F-5, No. 408, Ruiguang Rd. Neihu District,Taipei Taiwan, R.O.C.TEL : 886.2.8751.2062 FAX : 886.2.8751.5064