6antiandlogamplifiers(4p).pdf

8/12/2019 6AntiAndLogAmplifiers(4p).pdf

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FT221/4 Electronics 6 Log and AntiLog Amplifiers 1

6. Log and AntiLog

Amplifiers


Introduction

Log and Antilog Amplifiers are non-linear circuits in which theoutput voltage is proportional to the logarithm (or exponent) of the

input. It is well known that some processes such as multiplication and

division, can be performed by addition and subtraction of logs.

They have numerous applications in electronics, such as:

Multiplication and division, powers and roots

Compression and Decompression

True RMS detection

Process control


Two basic circuits

There are two basic circuits for logarithmic amplifiers

(a) transdiode and (b) diode connected transistor

Most logarithmic amplifiers are based on the inherent logarithmicrelationship between the collector current,Ic, and the base-emittervoltage, vbe, in silicon bipolar transistors.

Ri Q

vi

vo

Ri Q

vi

vo


Notes


2/24


Transdiode Log Amplifier

The input voltage is converted by R1 into a current, which then flows through thetransistor's collector modulating the base-emitter voltage according to the inputvoltage.

The opamp forces the collector voltage to that at the noninverting input, 0 V

From Ebers-Moll model the collector current is

whereIs is saturation current, q is the charge of the electron 1.6x10-9 Coulombs,

k is the Boltsmans constant 1.38x10-23 Joules, Tis absolute temperature, VT isthermal voltage.

For room temperature 300oK

The output voltage is therefore

TT VVbe

s

VVbe

s

kTqVbe

sc eIeIeII/// )1()1( ==

Vbe

s

Vbe

sc eIeII6.386.38 )1( =

=

=

==

IsR

Vin

IR

vV

I

iVVbeVout

iSi

iT

S

CT ln0259.0lg

3.2ln


Notes


Dynamic range of Log Amp.

Test: Discuss the factors limiting the dynamic range of transdiodelog amplifier. Suggest the methods to increase dynamic range

(a) The output is a perfect log function when IC>>IS. For the small

input Voltage (i.e. current) this limits the lower end of the dynamicrange.

To extend the lower end of the dynamic range use transistor with

small IS., e.g. for LM394 IS =0.25pA

TT VVbe

s

VVbe

s

kTqVbe

sc eIeIeII/// )1()1( ==

+==

S

CT

S

SCTbeout

I

IV

I

IIVVV lnln


Notes


3/24



(b) At upper end of the dynamic range the limitations is due to thebulk resistance of base and emitter regions rBE. Therefore Vbe

must be corrected to

output error is:actual output ideal output

Typically rBEis in range from 0.25 to 10

To extend the upper end of the dynamic range use transistor withsmall rBE.

e.g. for LM394 rBE=0.5

CBE

S

SCTbe Ir

I

IIVV +

+= ln

( )100/1lnln)100/1(

ln pKI

IK

I

pIKrOutputErro

S

i

S

i +=

+=


Notes



(c) The second factor is non-idealities of opamp, i.e. input biascurrentIOS

and offset voltage VOS.

this limits the lower end of the dynamic range

To extend the lower end of the dynamic range use ultra-low offsetopamps or special offset nulling techniques.

+=

S

OSCTout

I

IIVV ln

+=

+=S

OSOSiT

S

OSOSCTout

RI

VRIVV

RI

VRIRIVV lnln


Notes


4/24



For LM394 rBE =0.5 , and IS =0.25pA (at room temperature).Estimate the log conformity error at IC=1mA, 100 A and 10 A.

ForIS=1 mA the output error is 0.5 x 1mA= 0.5 mV.

Therefore

this gives

Estimate the max dynamic range with-in log conformity 1%

The upper limit isIC=0.26mV x /0.5 =0.52 mA The lower limit is 0.25 pA / 1% =25 pA.

The dynamic range is 0.52mA/25 pA=0.02 x 109 =2 x 107

( )100/1ln265.0 pmVmV +=

%94.1%100)1)26/5.0(exp( = mVmVp

( ) mVmVroutputerro 26.0%100/%11ln26 +=


Notes


Thermal and Frequency stability

This equation yields the desired logarithmic relationship over awide range of currents, but is temperature-sensitive because of VTand IS resulting in scale-factor and offset temperature-dependenterrors.

The system bandwidth is narrower for small signals becauseemitter resistance increases for small currents.

The source impedance of voltage signals applied to the circuit mustbe small compared to Ri. Omitting Ri yields a current-input logamp.

Using a p-n-p transistor changes the polarity of input signalsacceptable but limits the logarithmic range because of the degradedperformance of p-n-p transistors compared to n-p-n transistors


Notes


5/24


IC Log Amps.

These basic circuits needs additional components to improve theoverall performance, i.e:

to provide base-emitter junction protection, to reduce temperature effects,

bulk resistance error and op amp offset errors,

to accept bipolar input voltages or currents,

and to ensure frequency stability.

Such circuit techniques are used in integrated log amps: AD640,AD641, ICL8048, LOG100, 4127.

IC log amps may cost about ten times the components needed tobuild a discrete-component log amp.

Nevertheless, achieving a 1% logarithmic conformity over almostsix decades for input currents requires careful design.


Notes


Temperature Compensation

=

S

iTo

IR

vVv

1

ln

The equation for output voltage shows that the scale factor ofthe basic transdiode log amp depends on temperature because ofVTand

that there is also a temperature-dependent offset because ofIS.

Temperature compensation must correct both error sources.

Figure (next slide) shows the use of a second, matched,transistor for offset compensation and a temperature-dependentgain for gain compensation.


Notes


6/24



Temperature compensation in a transdiode log amp: a second transistor (Q2) compensates the offset current (IS) and

a temperature-sensitive resistor (R4) compensates the scale factorVT

=

11

lnS

iTo

IR

vVv

R1 Q1 D1vi

Ir

Q2

R2

R4 R3

vo

+to

V1


Notes



For transistors Q1 & Q2 we have

whereIr is a reference, temperature-independent, current.

The output voltage will be

Matched transistors (IS1 =IS2) will cancel offset.

In order to compensate the gain dependence on temperature, R4 must be muchsmaller thanR3 and such that d(VT/R4)/dT= 0.

This requires dR4/R4 = dVT/VT(= l/T).

At T= 298 K, the temperature coefficient ofR4 must be 3390 x 10-6K.

D1protects the base-emitter junction from excessive reverse voltages.

=

11

1 lnS

iTBE

IR

vVv

=

2

2 lnS

rTBE

I

IVv

( )

+=

+=

+=

i

S

S

rTBEBEo

v

RI

I

I

R

RV

R

Rvv

R

Rvv 11

24

3

4

312

4

31 ln111


Notes


7/24


Stability Considerations

Transdiode circuits have a notorious tendency to oscillate due to the presence ofan active element in the feedback that can provide gain rather than loss.

Consider the voltage-input transdiode. Ignoring op amp input errors, we have

and The feedback factorfor a given value of Vi,

is determined as

Differentiating IC and using the fact that

Ic = Vi/R, we obtain

indicating thatcan be greater than unity.

For instance, with Vi = 10 V we have = 10/0.026 = 400 = 52 dB, indicating

that in the Bode diagram the |1/| curve lies 52 dB below the 0 dB axis. Thus, the |1/| curve intersects the |a| curve atfc>> ft, where the phase shift

due to higher-order poles is likely to render the circuit unstable; an additionalsource of instability is the input stray capacitanceCn

cin IRVV = BEo VV =

BEcon dVdIRdVdV // ==

TiTc VVVIR // ==

RQ

vi

vo


Notes


Range Considerations

The transdiode circuit is compensated by means of an emitterresistorRE to decrease the value of and a feedback capacitor CFto combat Cn, as shown.

To investigate its stability, refer to the incremental model, wherethe BJT has been replaced by its common-base small-signal model.


Notes


8/24



Transistor parameters re and ro depend on the operating currentIc,

where VA is called the Early voltage (typically ~ 100 V). C is the base-collector junction capacitance. Both Cand Cn are typically ~10 pF range.

CTCTe IVIVr // = CAo IVr /=

Eedo RrRRrrRR +=+= 2and)(||||1

KCL at the summing junction yields

Eliminating ie and rearranging yields

where ie=-vo/R2 and C1=Cn+C+CF

)()(1/1 onFenn vvCjiCCjRv +++++

2

21

1

111

R

CRjv

R

CRjv Fon

+=

+

111

21

1

21

CRj

CRj

R

R

v

v F

n

o

+

+=


Notes



The | 1/b| curve has a low-frequency asymptote at R2/R1, a high-frequencyasymptote at C1/CF, and two breakpoints atf=fz andf= fp.

While C1/CF

andfz are constant,R2/R1 andfp depend on the operating currentIC. As such, they can vary over a wide range of values.

F

pz

p

z

n

o

CRf

CRf

ffj

ffj

R

R

v

v

22

1and

112

1where

)/(1

)/(1

1

21

==

+

+==

The hardest condition is when Ic =Ic(max), since this minimizes the valueofR2/R1 while maximizing that offp,.

As a rule of thumb,RE is chosen to makeR2(min)/R1 ~ 0.5 for a reasonably lowvalue of ||max,

CFis chosen to makefp(max) ~ 0.5fc for

reasonable phase margin.


Notes


9/24


Speed of Response

As the input level is decreased, we witness an increasing dominance of fp ,which slows down the dynamics of the circuit.

Since at sufficiently low current levels re>>RE, we havefp=1/(2reCF)

The corresponding time constant is = reCF=(VT/IC)CF =(VT/ Vi)RCFindicating that is inversely proportional to the input level, as expected.

For instance, withIc = 1 nA and Cp = 100 pF, we have = (26 x 10-3/10-9) x100 x 10-12 = 2.6 ms.

It takes 4.6 for an exponentialtransition to come within 1 percent of itsfinal value, therefore our circuit willtake about 12 ms to stabilize to within 1

percent.This limitation must be kept in mindwhen operating near the low end of thedynamic range.


Notes


Diode-connected Log Amp

In the second circuit a BJT connected as a diode to achieve the logarithmiccharacteristic.

The analysis is the same as above for the transdiode connection, but thelogarithmic range is limited to four or five decades because the base current addsto the collector current.

On the pro side, the circuit polarity can be easily changed by reversing the transistor,

the stability improves, and

the response is faster.


Notes


10/24


Input Current Inversion

The basic log amp in only accepts positive input voltages or currents.

Negative voltages or currents can be first rectified and then applied to the logamp, but this adds the errors from the rectifier.

Alternatively, the log amp can be preceded by a precision current inverter.

The current inverter in Figure below uses two matched n-p-n transistors and aprecision op amp to achieve accurate current inversion.

The collector-base voltage in both Q1 and Q2 is 0 V, so that the Ebers-Mollmodel for BJT transistors leads to

=

=

)1(

)1(/

22

/11

2

1

TBE

TBE

Vv

ESe

Vv

ESe

eIi

eIi

whereIES1 andIES2 are the respectiveemitter saturation currents of Q1 andQ2.


Notes


Input Current Inversion

From circuit inspection, assuming an op amp with infinite open-loop gain butfinite input currents and offset voltage,

Solving for the output current in terms

of the input current yields

+=

+=

+=

ioBEBE

boe

bie

Vvv

Iii

Iii

12

22

11

22/

1

12

/

1

2 1 bESVV

ES

bES

VV

ES

ESio IIe

I

IIe

I

Iii TioTio

++=

which shows that, in order to havesmall gain and offset errors, theoffset voltage must be smallcompared to VT,

the op amp offset current must besmall compared to the input current,

and Q1 and Q2 must be matched.


Notes


11/24


Exponential Amplifiers

An exponential or antilogarithmic amplifier (antilog amp), performs thefunction inverse to that of log amps:

its output voltage is proportional to a base (10, e) elevated to the ratio

between two voltages. Antilog amps are used together with log amps to perform analog

computation.

Similar to Log Apms there are two basic circuits for logarithmicamplifiers

(a) transdiode and

(b) diode connected transistor


Notes


Antilog Ampl ifier

Interchanging the position of resistor and transistor in a log amp yields a basicantilog amp.

The base-collector voltage is kept at 0 V, so that collector current is given by

and for negative input voltages we have:

There is again a double temperature dependence because ofI

S andV

T. Temperature compensation can be achieved by the same technique shown for

log amps.

( )TBEsc VvIi /exp)/exp(11 TiSCo VvRIRiv ==


Notes


12/24



The input voltage is applied to a voltage divider that includes a temperature sensor. If R3R4, vBC1 ~ 0V and applying to Q1

yields

where Vris a reference voltage and we have assumed VBE1>>VT(25 mV).

In Q2 VBC2 = 0V and hence : Also:

Substituting vBE1 and vBE2, and solving for vo,

if Ql and Q2 are matched yields

)1)/(exp( =TBEsc

VvII

5/)/exp(11 RVVvIi rTBEsc =

5/)/exp( 222 RVVvIi oTBEsc =

2134

4BEBEi vv

RR

Rv =

+

)43

4exp(

5

1

RR

R

V

v

R

RVv

T

iro

+

Therefore, if the temperaturecoefficient of R4 is such that

dR4/R4= d

VT/

VT = l/T thevoltage divider will compensate

for the temperature dependenceof VT. At T = 298 K, thetemperature coefficient of R4must be 3390 x 10-6K.


Notes


Log-Antilog

Log and antilog amp circuits include the same elements butarranged in different feedback configurations.

Some integrated log amps have uncommitted elements allowing usto implement antilog amps.

Some IC (like ICL8049) are a committed only antilog amp. Some so-called multifunction converters (AD538, LH0094, 4302)

include op amps and transistors to simultaneously implement logand antilog functions, or functions derived thereof, such as

multiplication,

division,

raising to a power,

or taking a root


Notes


13/24


Basic Multiplier

Multipliers are based on the fundamental logarithmic relationshipthat states that the product of two terms equals the sum of thelogarithms of each term.

This relationship is shown in the following formula:

ln(a xb) = lna + lnb

This formula shows that two signal voltages are effectivelymultiplied if the logarithms of the signal voltages are added.


Notes


Multiplication Stages

The multiplication procedure take three steps:

1. 1. To get the logarithm of a signal voltage use a Log amplifier.

2. 2. By summing the outputs of two log amplifiers, you get thelogarithm of the product of the two original input voltages.

3. 3. Then, by taking the antilogarithm, you get the product of thetwo input voltages as indicated in the following equations:

[ ] 2121*

)ln(exp)exp( VVVVVV OO ===

)ln(and)ln( 2*

21

*

1 VVVV ==

)ln()ln()ln( 2121*

2*

2* VVVVVVVO =+=+=


Notes


14/24


block diagram of an analog

multiplier The block diagram shows how the functions are connected to multiply two input

voltages.

Constant terms are omitted for simplicity.


Notes


Basic Multiplier Circuit ry

The outputs of the log amplifier arestated as follows:

where K1 = 0.025 V, K2 =RIebo andR =R1 = R2= R6.

The two output voltages from the logamplifiers are added and inverted by theunity-gain summing amplifier to producethe following result:

=

2

11)1(log ln

K

VKV inout

=

2

21)2(log ln

K

VKV inout

=

=

+

=

22

21

1

2

2

2

11)(

ln

lnln

K

VVK

K

V

K

VKV

inin

ininsumout


Notes


15/24


This expression is then applied to the antilog amplifier; the expression for themultiplier output voltage is as follows:

The output of the antilog (exp) amplifier is a constant (1/K2) times the productof the input voltages.

The final output is developed by an inverting amplifier with a voltage gain of

K2.

2

2122

212

22

211

1

2

1

)(

2(exp) ln1

expexp

K

VV

K

VVK

K

VVKKKK

V

KV

inininin

ininsumout

out

=

=

=

=

=

21

2

212 inin

inin VVK

VVKVout =

=


Notes


Four-Quadrant Multipliers

Four-Quadrant Multiplier is a device with two inputs and oneoutput.

Typically k = 0.1 to reduce the possibility of output overload.

It is called four-quadrant since inputs and output can be positive ornegative.

An example device is Motorola MC1494, powered by 15 V

power supply

VoutV2

V1

21 VVkVout =


Notes


16/24


Multiplier Applications

Alongside the multiplication Multipliers have many usessuch as:

Squaring Dividing

Modulation / demodulation

Frequency and amplitude modulation

Automatic gain control


Notes


AM & Squaring

Amplitude Modulation

Squaring circuit

VRF

VoutVLF

VoutVin


Notes


17/24


Divider by feedback

Divider

VoutVxKVm =

22

R

Vmi =

11

R

Vini =

VoutVxKVmVin ==

VxK

Vin

VxK

VmVout

=

=

Square root: If VoutVx=

VoutK

VinVout

=

K

VinVout

=


Notes


Test problems

1. Sketch the diagram for transdiode log amplifier and define its gain.

2. Describe the stability problem of this circuit.

3. Suggest the model to improve stability range. Use the BJT common basesmall-signal model shown on the Figure.

4. In this circuit let R=10 k, 1 mV < Vi < 10 V, C+ Cn = 20 pF, VA

= 100 V,r

d= 2 M, and f1= 1 MHz. Find suitable values forCf andRE.

5. For this circuit, find the time needed for output voltage to come within 1 % ofits final value (in worst case).

6. Discuss the factors limiting the dynamic range of transdiode log amplifier.Suggest the methods to increase dynamic range

7. For LM394 rs

==0.5 , and IS

=0.25pA (at room temperature). Estimate thelog conformity error at IC=1mA, 100 A and 10A.

8. Estimate the max dynamic range with-in log conformity 1%


Notes


18/24


Transistor parameters re and ro depend on the operating currentIc,

where VA is called the Early voltage (typically ~ 100 V). C is the base-

collector junction capacitance. Both Cand Cn are typically ~10 pF range.

CTCTe IVIVr // = CAo IVr /=

Eedo RrRRrrRR +=+= 2and)(||||1

KCL at the summing junction yields

Eliminating ie and rearranging yields

where ie=-vo/R2 and C1=Cn+C+CF

)()(1/1 onFenn vvCjiCCjRv +++++

2

21

1

111

R

CRjv

R

CRjv Fon

+=

+

111

21

1

21

CRj

CRj

R

R

v

v F

n

o

+

+=


Notes


Analogue Mult ipl iers

In analog-signal processing the need often arises for a circuit thattakes two analog inputs and produces an output proportional totheir product.

Such circuits are termed analog multipliers.

There are two different approaches to analog multipliers One of them is based on log/antilog amplifiers

Another utilizes the exponential transfer function of bipolartransistors (Gilbert cell) .

In following sections we consider applications of IC multipliersbased on log/antilog amplifiers


Notes


19/24


Log/Antilog Converter

The log and antilog functions can be combined in slide rule fashion toperform such operations as

multiplication,

division,

exponentiation, and

root computation.

With the help of simple op amp circuitry it can be configured foradditional operations, such as

multifunction conversion and

non-integer exponent approximations,

coordinate conversion, and true rms-to-dc conversion.

Although now the tendency is to implement these functions digitally,considerations of cost and speed often require their implementation inanalog hardware.


Notes


Multifunction Converters

A multifunction converter (4302) is a circuit that accepts three inputs, Vx, Vy, and Vzand yields an output Vo of the type: m

x

zyo V

VKVV

=

where Kis a suitable scale factor (typically K = 1),and m is a user-programmable exponent, in therange 0.2 < m < 5

where K is a suitable scalefactor (typically K = 1),and m is a user-programmable exponent, inthe range 0.2 < m < 5

By proper selection ofinput configuration andexponent, the circuit can beprogrammed for a varietyof operations:

etc./1,,,/, x

n

z

m

zzxyxo

VVVVVVVV =


Notes


20/24


4302 block diagram

The circuit diagram of 4302 is shown with frequency compensation and reverse-polarity protection omitted for simplicity.

By op amp action, we have

x

x

x R

VI =

y

y

y

R

VI =

z

zz

R

VI =

o

oo

R

VI =

The voltages at pins 6and 12 are proportionalto the log ratios of thecorresponding currents:

=

x

zT

I

IVV ln6

=

y

oT

I

IVV ln12


Notes


m=1

1.V6and V12 are derived directly from V11 so that V6= V12 = V11 .

By this impliesIz/Ix= Io/Iy that is,

Vz/Vx= Vo/Vy.

Thus,

( ) yoTxzT IIVVIIVV /ln/ln 126 ===

=

x

zyoV

VVV


Notes


21/24


m1

2.m < 1: V6 is derived directly from V11 while V12 is derived from V11 via a voltagedivider, V12=mV11, where m=R2/(R1+R2).

Letting V12=mV6yields ,

that is, This, in turn, yields ,

that is,

3.m > 1: V12 is derived directly from V11 while V6 is derived from V11 via a voltagedivider, V6=(1/m)V11, where (1/m)=R2/(R1+R2).

Letting V6=V12/m yields

m

xzxzyo IIIImII )/ln()/ln()/ln( ==m

xzyo IIII )/()/( =m

xzyo VVVV )/()/( =

121

2where,

+=

=

R

RRm

V

VVV

m

x

zyo


Notes


Multiplication and Division


Notes


22/24


Exponentiator - Root Extractor


Notes


4302 Adjustment

In each configuration the scale factor is calibrated by setting the input(s) to 10 Vand adjustingRy for Vo = 10 V.

To maintain the accuracy of division at low signal levels, the input offset errorsof the X and Z op amps must be nulled as follows

1. With Vz = Vx = 10.0 V, adjust R1 for Vo = 10.0 V.

2. With Vz = Vx = 100 mV, adjustR2 for Vo = 10.0 V. 3. With Vx = 100 mV and Vz = 10.0 mV, adjust R3 for Vo 1.00 V.

Repeat the procedure, if necessary.

The 4302 provides the following accuracies:

multiply, 0.25 percent;

divide, 0.25 percent;

square, 0.03 percent;

square root, 0.07 percent.


Notes


23/24


Test (2004 Suppl.)

The circuit diagram of 4302 is shown in Fig.2 with frequency compensation and reverse-polarity protection omitted for simplicity. Assume that RX= R Y= RZ= RO. The pins 6,11, 12 are connected as follows where R1=R2= 15 k. Find the expression for OutputVoltage VO. [13 marks]

(c) Make appropriate changes/connections to produce expression for Output Voltage

[5 marks]

321 /5 VVVo =

AY AO

13

QOQYiOiY

2

AY AO

7

QXQZ

iX

iZ

12

1

6 11

VY

VZ

VX

RZ

RX

RY RO

VO


Notes


4302 Test

1. m=1/3, pins 6 and 11 are short circuit, pin 12 volt. divider

2. m=R2/(R1+R2)=1/3, 3 R2=R1+R2, R1=2 R2

321 /5 VVVo =

13

7

14

1

10

12

3

2

6 11

VY

VZ

Vx

Vo

15V -15V

4302

m

x

zyo

V

VVV

=

R1 R2

3. V1 is connected to pin VZ4. V2 is connected to pin VX5. pin VY is connected to +5 V

6. R3=2R4 is voltage divider for +5V

R3

R4

+15V

+5V


Notes


24/24


4302 Test

13

7

14

1

10

12

3

2

6 11

VY

VZ

Vx

Vo

15V -15V

4302

m

x

zyo

V

VVV

=

41 2

/16 VVVo =


4302 Test

13

7

14

1

10

12

3

2

6 11

VY

VZ

Vx

Vo

15V -15V

4302

m

x

zyo

V

VVV

=21 /2 VVVo =


4302 Test

13

7

14

1

10

12

3

2

6 11

VY

VZ

Vx

Vo

15V -15V

4302

m

x

zyo

V

VVV

=212 VVVo =


4302 Test

13

7

14

1

10

12

3

2

6 11

VY

VZ

Vx

Vo

15V -15V

4302

m

x

zyo

V

VVV

=

22

31 /VVVo =

6antiandlogamplifiers(4p).pdf

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