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71M6533-DB Demo Board

USER’S MANUAL

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

Maxim Integrated Products, Inc. 160 Rio R obles, San Jose, CA 95134 USA 1 -408-601-1000

2012 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.


71M6533

3-Phase Energy Meter IC

DEMO BOARD 71M6533-DB

USER’S MANUAL

71M6533-DB Demo Board User’s Manual


Table of Contents

1 GETTING STARTED................................................................................................................................................ 7 1.1 General .................................................................................................................................................................... 7 1.2 Safety and ESD Notes ............................................................................................................................................ 7 1.3 Demo Kit Contents ................................................................................................................................................. 7 1.4 Demo Board Versions ............................................................................................................................................ 7 1.5 Compatibility ........................................................................................................................................................... 8 1.6 Suggested Equipment not Included ..................................................................................................................... 8 1.7 Demo Board Test Setup ......................................................................................................................................... 8

1.7.1 Setup with USB-to-Serial Adapter ..................................................................................................................... 9 1.7.2 Power Supply Setup ........................................................................................................................................ 10 1.7.3 Checking Operation......................................................................................................................................... 10 1.7.4 Serial Connection Setup .................................................................................................................................. 11

1.8 Using the Demo Board ......................................................................................................................................... 13 1.8.1 Serial Command Language ............................................................................................................................. 13 1.8.2 Using the Demo Board for Energy Measurements .......................................................................................... 21 1.8.3 Adjusting the Kh Factor for the Demo Board ................................................................................................... 21 1.8.4 Adjusting the Demo Boards to Different Current Transformers ....................................................................... 21 1.8.5 Adjusting the Demo Boards to Different Voltage Dividers ............................................................................... 22

1.9 Calibration Parameters ........................................................................................................................................ 23 1.9.1 General Calibration Procedure ........................................................................................................................ 23 1.9.2 Calibration Macro File ..................................................................................................................................... 24 1.9.3 Updating the Demo Code (hex file) ................................................................................................................. 24 1.9.4 Updating Calibration Data in Flash or EEPROM ............................................................................................. 24 1.9.5 Automatic Gains Calibration ............................................................................................................................ 25 1.9.6 Loading the Code for the 6533 into the Demo Board ...................................................................................... 25 1.9.7 The Programming Interface of the 71M6533 ................................................................................................... 27

1.10 Demo Code ........................................................................................................................................................ 27 1.10.1 Demo Code Description ............................................................................................................................... 27 1.10.2 Important Demo Code MPU Parameters ..................................................................................................... 27 1.10.3 Useful CLI Commands Involving the MPU and CE ...................................................................................... 33

2 APPLICATION INFORMATION ............................................................................................................................. 35 2.1 Calibration Theory ................................................................................................................................................ 35

2.1.1 Calibration with Three Measurements ............................................................................................................. 35 2.1.2 Calibration with Five Measurements ............................................................................................................... 37

2.2 Calibration Procedures ........................................................................................................................................ 38 2.2.1 Calibration Procedure with Three Measurements ........................................................................................... 39 2.2.2 Calibration Procedure with Five Measurements .............................................................................................. 40 2.2.3 Calibration Procedure for Rogowski Coil Sensors ........................................................................................... 40 2.2.4 Calibration Spreadsheets ................................................................................................................................ 41 2.2.5 Compensating for Non-Linearities ................................................................................................................... 45

2.3 Power Saving Measures ...................................................................................................................................... 46 2.4 Schematic Information ......................................................................................................................................... 46

2.4.1 Components for the V1 Pin ............................................................................................................................. 46 2.4.2 Reset Circuit .................................................................................................................................................... 46 2.4.3 Oscillator ......................................................................................................................................................... 47 2.4.4 EEPROM ......................................................................................................................................................... 47 2.4.5 LCD ................................................................................................................................................................. 48 2.4.6 Optical Interface .............................................................................................................................................. 48 2.4.7 Ferrites ............................................................................................................................................................ 49



2.5 Testing the Demo Board ...................................................................................................................................... 49 2.5.1 Functional Meter Test ...................................................................................................................................... 49 2.5.2 EEPROM ......................................................................................................................................................... 51 2.5.3 RTC ................................................................................................................................................................. 51 2.5.4 Hardware Watchdog Timer ............................................................................................................................. 52 2.5.5 LCD ................................................................................................................................................................. 52

2.6 Application Notes ................................................................................................................................................. 53 3 HARDWARE DESCRIPTION ................................................................................................................................. 55 3.1 71M6533 Board Description: Jumpers, Switches and Test Points .................................................................. 55 3.2 Board Hardware Specifications .......................................................................................................................... 58 4 APPENDIX ............................................................................................................................................................. 59 4.1 71M6533-DB Demo Board Electrical Schematic ................................................................................................ 60 4.2 71M6533-DB Demo Board Bill of Material .......................................................................................................... 63 4.3 71M6533-DB Demo Board PCB Layout............................................................................................................... 64 4.4 71M6533 Pin-Out Information .............................................................................................................................. 70 5 REVISION HISTORY ............................................................................................................................................. 75

List of Figures

Figure 1-1: Block Diagram for the 71M6533-DB Demo Board with Debug Board ............................................................... 9 Figure 1-2: DB6534T14A3 Demo Board with USB-to-Serial Adapter................................................................................ 10 Figure 1-3: Hyperterminal Sample Window with Disconnect Button (Arrow) ..................................................................... 12 Figure 1-4: Port Speed and Handshake Setup (left) and Port Bit setup (right) .................................................................. 12 Figure 1-5: Command Line Help Display .......................................................................................................................... 13 Figure 1-6: Typical Calibration Macro File ......................................................................................................................... 24 Figure 1-7: Emulator Window Showing Reset and Erase Buttons (see Arrows) ............................................................... 26 Figure 1-8: Emulator Window Showing Erased Flash Memory and File Load Menu......................................................... 26 Figure 2-1: Watt Meter with Gain and Phase Errors. ......................................................................................................... 35 Figure 2-2: Phase Angle Definitions .................................................................................................................................. 39 Figure 2-3: Calibration Spreadsheet for Three Measurements ......................................................................................... 42 Figure 2-4: Calibration Spreadsheet for Five Measurements ............................................................................................ 43 Figure 2-5: Calibration Spreadsheet for Rogowski coil ..................................................................................................... 44 Figure 2-6: Non-Linearity Caused by Quantification Noise ............................................................................................... 45 Figure 2-7: Voltage Divider for V1 ..................................................................................................................................... 46 Figure 2-8: External Components for RESETZ ................................................................................................................. 47 Figure 2-9: Oscillator Circuit .............................................................................................................................................. 47 Figure 2-10: EEPROM Circuit ........................................................................................................................................... 48 Figure 2-11: LCD Connections .......................................................................................................................................... 48 Figure 2-12: Optical Interface Block Diagram ................................................................................................................... 49 Figure 2-13: Meter with Calibration System ...................................................................................................................... 50 Figure 2-14: Calibration System Screen ........................................................................................................................... 50 Figure 2-15: Wh Load Line in Differential Mode at Room Temperature ............................................................................ 51 Figure 3-1: 71M6533-DB Demo Board - Board Description .............................................................................................. 57 Figure 4-1: 71M6533-DB Demo Board: Electrical Schematic 1/3...................................................................................... 60 Figure 4-2: 71M6533-DB Demo Board: Electrical Schematic 2/3...................................................................................... 61 Figure 4-3: 71M6533-DB Demo Board: Electrical Schematic 3/3...................................................................................... 62 Figure 4-4: 71M6533-DB Demo Board: Top View ............................................................................................................. 64 Figure 4-5: 71M6533-DB Demo Board: Top Copper ......................................................................................................... 65 Figure 4-6: 71M6533-DB Demo Board: Middle Layer 1 (Ground Plane) ........................................................................... 66 Figure 4-7: 71M6533-DB Demo Board: Middle Layer 2 (Supply Plane) ............................................................................ 67 Figure 4-8: 71M6533-DB Demo Board: Bottom Copper .................................................................................................... 68 Figure 4-9: 71M6533-DB Demo Board: Bottom View ........................................................................................................ 69 Figure 4-10: 71M6533/71M6533H epLQFP100: Pin Out (top view) .................................................................................. 73



List of Tables

Table 1-1: Selectable Display Options .............................................................................................................................. 11 Table 1-2: CE RAM Locations for Calibration Constants .................................................................................................. 23 Table 1-3: Flash Programming Interface Signals .............................................................................................................. 27 Table 1-4: MPU Input Parameters for Metering................................................................................................................. 29 Table 1-5: Selectable Pulse Sources ................................................................................................................................ 30 Table 1-6: MPU Instantaneous Output Variables .............................................................................................................. 30 Table 1-7: MPU Status Word Bit Assignment ................................................................................................................... 32 Table 1-8: MPU Accumulation Output Variables ............................................................................................................... 33 Table 1-9: CLI Commands for Data Memory .................................................................................................................... 33 Table 2-1: Power Saving Measures .................................................................................................................................. 46 Table 3-1: 71M6533-DB Demo Board Description ............................................................................................................ 55 Table 3-2: 71M6533-DB Demo Board Description ............................................................................................................ 56 Table 3-3: 71M6533-DB Demo Board Description ............................................................................................................ 57 Table 4-1: 71M6533-DB Demo Board: Bill of Material ...................................................................................................... 63 Table 4-2: 71M6533/71M6533H Pin Description Table 1/3 ............................................................................................... 70 Table 4-3: 71M6533/71M6533H Pin Description Table 2/3 ............................................................................................... 70 Table 4-4: 71M6533/71M6533H Pin Description Table 3/3 ............................................................................................... 72



1 GETTING STARTED 1.1 GENERAL

The Teridian™ 71M6533-DB Demo Board is a demonstration board for evaluating the 71M6533 device for 3-phase electronic power metering applications. It incorporates a 71M6533 integrated circuit, peripheral circuitry such as a serial EEPROM, emulator port, and on-board power supply as well as a USB-to-serial adapter that allows a connection to a PC through the USB port. The demo board allows the evaluation of the 71M6533 energy meter chip for measurement accuracy and overall system use.

The board is pre-programmed with a demo program in the flash memory of the 71M6533 IC. This embedded application is developed to exercise all low-level function calls to directly manage the peripherals, flash programming, and CPU (clock, timing, power savings, etc.).

The 71M6533 IC on the demo board is pre-programmed with default calibration factors. Since current sensors are not part of the Demo Kit, the demo board is tested but not calibrated at the factory.

1.2 SAFETY AND ESD NOTES

Connecting live voltages to the demo board system will result in potentially hazardous voltages on the demo board.

THE DEMO SYSTEM IS ESD SENSITIVE! ESD PRECAUTIONS SHOULD BE TAKEN WHEN HANDLING THE DEMO BOARD!

EXTREME CAUTION SHOULD BE TAKEN WHEN HANDLING THE DEMO BOARD ONCE IT IS CONNECTED TO LIVE VOLTAGES!

1.3 DEMO KIT CONTENTS

71M6533-DB Demo Board with 71M6533F IC and Pre-Loaded Demo Program

USB-to-Serial Adapter

5VDC/1000mA Universal Wall Transformer with 2.5mm Plug (Switchcraft 712A Compatible)

USB Cable

1.4 DEMO BOARD VERSIONS

Currently, only the following version of the Demo Board is available:

71M6533-DB Demo Board (REV 3.0, standard)

1

Teridian is a trademark of Maxim Integrated Products, Inc.



1.5 COMPATIBILITY

This manual applies to the following hardware and software revisions:

71M6533 or 71M6533H chip revision A03

Demo Kit firmware revision 4.p6q or later

71M6533-DB Demo Board REV 3.0

1.6 SUGGESTED EQUIPMENT NOT INCLUDED

For functional demonstration:

PC with Microsoft Windows operating systems: Windows XP, Windows ME, or Windows 2000, equipped with RS232 port (COM port) via DB9 connector

For software development (MPU code):

Signum ICE (In Circuit Emulator): ADM-51

http://www.signum.com

Keil 8051 “C” Compiler kit: CA51

www.keil.com/c51/ca51kit.htm, www.keil.com/product/sales

1.7 DEMO BOARD TEST SETUP

The 71M6533-DB Demo Board block diagram is shown in Figure 1-1. The configuration consists of a stand-alone (round) meter Demo Board and an optional Debug Board. The Demo Board contains all circuits necessary for operation as a meter, including display, calibration LEDs, and internal power supply. The optional Debug Board, uses a separate power supply, and is optically isolated from the Demo Board. It interfaces to a PC through a 9 pin serial port connector. For serial communication between the PC and the 71M6533, the Debug Board needs to be plugged with its connector J3 into connector J2 of the Demo Board.

The USB-Serial Adapter allows communication between the 71M6533-DB Demo Board and a PC via its USB port.

Connections to the external signals to be measured, i.e. scaled AC voltages and current signals derived from shunt resistors or from current transformers, are provided on the rear side of the demo board.

Caution: It is recommended to set up the demo board with no live AC voltage connected, and to connect live AC voltages only after the user is familiar with the demo system.

All input signals are referenced to the V3P3A (3.3V power supply to the chip).

Windows and Windows XP are registered trademarks of Microsoft Corp.

http://www.signum.com/

http://www.keil.com/c51/ca51kit.htm

http://www.keil.com/product/sales.htm



Figure 1-1: Block Diagram for the 71M6533-DB Demo Board with Debug Board

1.7.1 SETUP WITH USB-TO-SERIAL ADAPTER

The USB-to-Serial Adapter shipped with Demo Kits starting in June 2011 provides a connection to the Demo Board via USB. The USB-to-Serial Adapter is plugged into connector J2 of the DB6533 as shown in Figure 1-2.

The PC should be running HyperTerminal or a similar serial interface program. A suitable driver, e.g. the FTDI CDM Driver Package, must be installed on the PC to enable the USB port to be mapped as a virtual COM port. The driver can be found on the FTDI web site (http://www.ftdichip.com/Drivers/D2XX.htm).

The USB-to-Serial Adapter is self-powered via the USB port on the PC.

DEMONSTRATION METER

IA

IB

IC

VCVB

NEUTRAL

IAP

IBP

ICP

V3P3A

VCVBVA

3.3v

VA

GND

V3P3

GND

5V DC

EEPROM

ICE Connector

DIO56

DIO57

DIO58

TX

RX

DB9

to PC

COM Port

J5

68 Pin Connector

to NI PCI-6534

DIO Board

6533

Single Chip

Meter

TMUXOUT

CKTEST

3.3V LCD

DIO4DIO5

I D PINEUTRAL

External Current

Transformers

IAN

IBN

ICN

V3P3SYSWh

VARh

DIO6/WPULSE

DIO7/RPULSE

PULSE OUTPUTS

DIO9/YPULSE

DIO8/XPULSE

V3P3SYS

V3P3D

VBAT

PB

battery

(optional)

JP8

PB

On-board

components

powered by

V3P3D

OPTO

OPTO

OPTO

OPTO

OPTO

5V DC

V5_DBG

GND_DBG

V5_DBG

V5_DBG

RS-232

INTERFACE

GND_DBGV5_DBG

OPTO

OPTO

FPGA

04/25/2008

V5_NI

CE HEARTBEAT (1Hz)

MPU HEARTBEAT (5Hz)

DEBUG BOARD (OPTIONAL)

RTM INTERFACE

JP21J2

N/C

N/C

4

15, 16

13, 14

66

8

12

10

3

1

2

5, 7,

9, 11GND

V3P3SYS

JP1

I D N

http://www.ftdichip.com/Drivers/D2XX.htm



Figure 1-2: DB6534T14A3 Demo Board with USB-to-Serial Adapter

1.7.2 POWER SUPPLY SETUP

There are several choices for the meter power supply:

Internal (using phase A of the AC line voltage). The internal power supply is only suitable when the phase A voltage exceeds 220V RMS. A jumper needs to be installed across JP1 on the bottom of the board.

External 5VDC connector (J1) on the Demo Board.

1.7.3 CHECKING OPERATION

A few seconds after power up, the LCD display on the Demo Board should display this brief greeting:

H E L L 0

The “HELLO” message should be followed by the display of accumulated energy:

3. 0. 0 0 1

The Wh display should be followed by the text “Wh”, as shown below:

3. W h

The decimal dot in the rightmost segment will be blinking, indicating activity of the MPU inside the 71M6533.

The Demo Code allows cycling of the display using the PB button. By briefly pressing this button, the next available parameter from Table 1-1 is selected. This makes it easy to navigate various displays for Demo Boards without having to use the command line interface (CLI).



Step Display in left-most digit(s)

Text display

Correspon-ding CLI

command

Displayed Parameter

1 1 Delt C M1 Temperature difference from calibration temperature. Displayed in 0.1°C

2 2 HZ M2 Frequency at the VA_IN input [Hz]

3 3 Wh M3 Accumulated real energy [Wh]. The default display setting after power-up or reset.

4 4 Wh M4 Accumulated exported real energy [Wh].

5 5 VARh M5 Accumulated reactive energy [VARh].

6 6 VARh M6 Accumulated exported reactive energy [VARh].

7 7 VAh M7 Accumulated apparent energy [VAh].

8 8 HOURS M8 Elapsed time

9 9 TIME M9 Time of day (hh.mm.ss)

10 -- DATE M10 Date (yyyy.mm.dd)

11 11 PF M11 Power factor

12 12 -- M12 V/V phase angle [degrees]

13 13 EDGES M13 Zero crossings of the mains voltage

14 14 PULSES M14 Pulse counter

15 15 A M15 RMS current

16 16 V M16 RMS voltage

17 17 BAT V M17 Battery voltage

Table 1-1: Selectable Display Options

1.7.4 SERIAL CONNECTION SETUP

After connecting the DB9 serial port to a PC, start the HyperTerminal application and create a session using the following parameters:

Port Speed: 9600 bd or 300bd (see below)

Data Bits: 8

Parity: None

Stop Bits: 1

Flow Control: XON/XOFF

See section 3.1 for proper selection of the operation mode when main power is removed:

A jumper across pins 2-3 (VBAT-GND) of JP16 indicates that no external battery is available. The IC will stay in brownout mode when the system power is down and it will communicate at 9600bd.

A jumper across pins 1-2 (BATMODE-VBAT) indicates that an external battery is available. The IC will be able to transition from brownout mode to sleep and LCD modes when the system power is down and it will communicate at 300bd.

HyperTerminal can be found by selecting Programs Accessories Communications from the Windows start menu. The connection parameters are configured by selecting File Properties and then by pressing the



Configure button. Port speed and flow control are configured under the General tab (Figure 1-4, left), bit settings are configured by pressing the Configure button (Figure 1-4, right), as shown below. A setup file (file name “Demo Board Connection.ht”) for HyperTerminal that can be loaded with File Open is also provided with the tools and utilities.

Port parameters can only be adjusted when the connection is not active. The disconnect button, as shown in Figure 1-3 must be clicked in order to disconnect the port.

Figure 1-3: Hyperterminal Sample Window with Disconnect Button (Arrow)

Figure 1-4: Port Speed and Handshake Setup (left) and Port Bit setup (right)

Once, the connection to the demo board is established, press <CR> and the command prompt, >, should

appear. Type >? to see the Demo Code help menu. Type >i to verify the demo code revision.



1.8 USING THE DEMO BOARD

The 71M6533-DB Demo Board is a ready-to-use meter prepared for use with external current transformers (CTs).

Using the Demo Board involves communicating with the Demo Code via the command line interface (CLI). The CLI allows all sorts of manipulations to the metering parameters, access to the EEPROM, initiation of auto-cal sequences, selection of the displayed parameters, changing calibration factors and many more operations.

Before evaluating the 71M6533 on the Demo Board, users should get familiar with the commands and responses of the CLI. A complete description of the CLI is provided in section 1.8.1.

1.8.1 SERIAL COMMAND LANGUAGE

The Demo Code residing in the flash memory of the 71M6533 provides a convenient way of examining and modifying key meter parameters. Once the Demo Board is connected to a PC or terminal per the instructions

given in Section Error! Reference source not found. and 1.7.4, typing ‘?’ will bring up the list of commands

shown in Figure 1-5.

Figure 1-5: Command Line Help Display

The tables in this chapter describe the commands in detail.



Commands to Display Help on the CLI Commands:

? HELP Comment

Description: Command help available for each of the options below.

Command combinations:

? Command line interpreter help menu.

?] Display help on access CE data RAM

?) Display help on access MPU RAM

?, Display help on repeat last command

?/ Display help on ignore rest of line

?C Display help on compute engine control.

?CL Display help on calibration.

?EE Display help on EEPROM control

?ER Display help on error recording

?I Display help on information message

?M Display help on meter display control

?MR Display help on meter RMS display control

?R Display help on SFR control

?RT Display help on RTC control

?T Display help on trim control

?W Display help on the wait/reset command

?Z Display help on reset

Examples: ?? Display the command line interpreter help menu.

?C Displays compute engine control help.

Commands for CE Data Access:

] CE DATA ACCESS Comment

Description: Allows user to read from and write to CE data space.

Usage: ] [Starting CE Data Address] [option]…[option]


]A??? Read consecutive 16-bit words in Decimal, starting at address A

]A$$$ Read consecutive 16-bit words in Hex, starting at address A

]A=n=n Write consecutive memory values, starting at address A

]U Update default version of CE Data in flash memory

Example: ]40$$$ Reads CE data words 0x40, 0x41 and 0x42.

]7E=12345678=9876ABCD Writes two words starting @ 0x7E

All CE data words are in 4-byte (32-bit) format. Typing ]A? will access the 32-bit word located at the byte address 0x1000 + 4 * A = 0x1028.



Commands for MPU/XDATA Access:

) MPU DATA ACCESS Comment

Description: Allows user to read from and write to MPU data space.

Usage: ) [Starting MPU Data Address] [option]…[option]


)A??? Read three consecutive 32-bit words in Decimal, starting at address A

)A$$$ Read three consecutive 32-bit words in Hex, starting at address A

)A=n=m Write the values n and m to two consecutive addresses starting at address A

?) Display useful RAM addresses.

Example: )08$$$$ Reads data words 0x08, 0x0C, 0x10, 0x14

)04=12345678=9876ABCD Writes two words starting @ 0x04

MPU or XDATA space is the address range for the MPU XRAM (0x0000 to 0xFFF). All MPU data words are in 4-byte (32-bit) format. Typing ]A? will access the 32-bit word located at the byte address 4 * A = 0x28. The energy accumulation registers of the Demo Code can be accessed by typing two Dollar signs (“$$”), typing question marks will display negative decimal values if the most significant bit is set.

Commands for DIO RAM (Configuration RAM) and SFR Control:

R DIO AND SFR CONTROL Comment

Description: Allows the user to read from and write to DIO RAM and special function registers (SFRs).

Usage: R [option] [register] … [option]


RIx… Select I/O RAM location x (0x2000 offset is automatically added)

Rx… Select internal SFR at address x

Ra???... Read consecutive SFR registers in Decimal, starting at address a

Ra$$$... Read consecutive registers in Hex, starting at address a

Ra=n=m… Set values of consecutive registers to n and m starting at address a

Example: RI2$$$ Read DIO RAM registers 2, 3, and 4 in Hex.

DIO or Configuration RAM space is the address range 0x2000 to 0x20FF. This RAM contains registers used for configuring basic hardware and functional properties of the 71M6533 and is organized in bytes (8 bits). The 0x2000 offset is automatically added when the command RI is typed.

The SFRs (special function registers) are located in internal RAM of the 80515 core, starting at address 0x80.



Commands for EEPROM Control:

EE EEPROM CONTROL Comment

Description: Allows user to enable read and write to EEPROM.

Usage: EE [option] [arguments]


EECn EEPROM Access (1 Enable, 0 Disable)

EERa.b Read EEPROM at address 'a' for 'b' bytes.

EESabc..xyz Write characters to buffer (sets Write length)

EETa Transmit buffer to EEPROM at address 'a'.

EEWa.b...z Write values to buffer

CLS Saves calibration to EEPROM

Example: EEShello EET$0210

Writes 'hello' to buffer, then transmits buffer to EEPROM starting at address 0x210.

Due to buffer size restrictions, the maximum number of bytes handled by the EEPROM command is 0x40.

Auxiliary Commands:

Typing a comma (“,”) repeats the command issued from the previous command line. This is very helpful when examining the value at a certain address over time, such as the CE DRAM address for the temperature (0x40).

The slash (“/”) is useful to separate comments from commands when sending macro text files via the serial interface. All characters in a line after the slash are ignored.

Commands controlling the CE, TMUX and the RTM:

C COMPUTE ENGINE CONTROL

Comment

Description: Allows the user to enable and configure the compute engine.

Usage: C [option] [argument]


CEn Compute Engine Enable (1 Enable, 0 Disable)

CTn Select input n for TMUX output pin. n is interpreted as a decimal number.

CREn RTM output control (1 Enable, 0 Disable)

CRSa.b.c.d Selects CE addresses for RTM output

Example: CE0 Disables CE, followed by “CE OFF” display on LCD. The Demo Code will reset if the WD timer is enabled.

CT3 Selects the VBIAS signal for the TMUX output pin



Commands controlling the Auto-Calibration Function:

CL AUTO-CALIBRATION CONTROL

Comment

Description: Allows the user to initiate auto-calibration and to store calibration values.

Usage: CL [option]


CLB Begin auto-calibration. Prior to auto-calibration, the calibration coefficients are automatically restored from flash memory.

CLS Save calibration coefficients to EEPROM starting at address 0x0004

CLC Use machine-readable calibration protocol

CLR Restore calibration coefficients from EEPROM

CLD Restore coefficients from flash memory

Example: CLB Starts auto-calibration and saves data automatically.

Before starting the auto-calibration process, target values for voltage, duration and current must be entered in MPU RAM (see section 1.9.5) and the target voltage and current must be applied constantly during calibration. Calibration factors can be saved to EEPROM using the CLS command.

Commands controlling the Pulse Counter Function

CP PULSE-COUNT CONTROL Comment

Description: Allows the user to control the pulse count functions.

Usage: CP [option]


CPA Start pulse counting for time period defined with the CPD command. Pulse counts will display with commands M15.2, M16.2

CPC Clear the absolute pulse count displays (shown with commands M15.1, M16.1)

CPDn Set time window for pulse counters to n seconds, n is inter-preted as a decimal number.

Example: CPD60 Set time window to 60 seconds.

Pulse counts accumulated over a time window defined by the CPD command will be displayed by M14 after the defined time has expired.

M14 will display the absolute pulse count for the W and VAR outputs. These displays are reset to zero with the CPC command (or the XRAM write )1=2).

Commands for Identification and Information:

I INFORMATION MESSAGES Comment

Description: Allows user to read information messages.

Usage: I Displays complete version information

The I command is mainly used to identify the revisions of Demo Code and the contained CE code.



Commands for Controlling the RMS Values Shown on the LCD Display:

MR METER RMS DISPLAY CONTROL (LCD)

Comment

Description: Allows user to select meter RMS display for voltage or current.

Usage: MR [option]. [option]


MR1. [phase] Displays instantaneous RMS current

MR2. [phase] Displays instantaneous RMS voltage

Example: MR1.3 Displays phase C RMS current.

Phase 4 is the measured neutral current.

No error message is issued when an invalid parameter is entered, e.g. MR1.8.

Commands for Controlling the MPU Power Save Mode:

PS POWER SAVE MODE Comment

Description: Enters power save mode Disables CE, ADC, CKOUT, ECK, RTM, SSI, TMUX VREF, and serial port, sets MPU clock to 38.4KHz.

Usage: PS

Return to normal mode is achieved by resetting the MPU (Z command).

Commands for Controlling the RTC:

RT REAL TIME CLOCK CONTROL

Comment

Description: Allows the user to read and set the real time clock.

Usage: RT [option] [value] … [value]


RTDy.m.d.w: Day of week (year, month, day, weekday [1 = Sunday]). If the weekday is omitted it is set automatically.

RTR Read Real Time Clock.

RTTh.m.s Time of day: (hr, min, sec).

RTAs.t Real Time Adjust: (start, trim). Allows trimming of the RTC. If s > 0, the speed of the clock will be adjusted by ‘t’ parts per billion (PPB). If the CE is on, the value entered with 't' will be changing with temperature, based on Y_CAL, Y_CALC and Y_CALC2.

Example: RTD05.03.17.5 Programs the RTC to Thursday, 3/17/2005

RTA1.+1234 Speeds up the RTC by 1234 PPB.

The “Military Time Format” is used for the RTC, i.e. 15:00 is 3:00 PM.



Commands for Accessing the Trim Control Registers:

T TRIM CONTROL Comment

Description: Allows user to read trim and fuse values.

Usage: T [option]


T4 Read fuse 4 (TRIMM).

T5 Read fuse 5 (TRIMBGA)

T6 Read fuse 6 (TRIMBGB).

Example: T4 Reads the TRIMM fuse.

These commands are only accessible for the 71M6533H (0.1%) parts. When used on a 71M6533 (0.5%) part, the results will be displayed as zero.

Reset Commands:

W RESET Comment

Description: Watchdog control

Usage: W Halts the Demo Code program, thus suppressing the trigger-ing of the hardware watchdog timer. This will cause a reset, if the watchdog timer is enabled.

Battery-Mode Commands:

W RESET Comment

Description: Control of Sleep and LCD Modes when in Brownout Mode

These commands are accepted only when the 71M6533 is in Brownout mode.

Commands: BL Takes the 71M6533 to LCD Mode.

BS Takes the 71M6533 to Sleep Mode.

BWSn Takes the 71M6533 to Sleep Mode and sets the wake-up timer to n seconds.

BWMn Takes the 71M6533 to Sleep Mode and sets the wake-up timer to n minutes.



Commands for Controlling the Metering Values Shown on the LCD Display:

M METER DISPLAY CONTROL (LCD)

Comment

Description: Allows user to select internal variables to be displayed.

Usage: M [option]. [option]


M Wh Total Consumption (display wraps around at 999.999)

M0 Wh Total Consumption (display wraps around at 999.999)

M1 Temperature (C° delta from nominal)

M2 Frequency (Hz)

M3. [phase] Wh Total Consumption (display wraps around at 999.999)

M4. [phase] Wh Total Inverse Consumption (display wraps around at 999.999)

M5. [phase] VARh Total Consumption (display wraps around at 999.999)

M6. [phase] VARh Total Inverse Consumption (display wraps around at 999.999)

M7. [phase] VAh Total (display wraps around at 999.999)

M8 Operating Time (in hours)

M9 Real Time Clock

M10 Calendar Date

M11. [phase] Power factor

M13 Mains edge count for the last accumulation interval

M13.1 Main edge count (accumulated) – zero transitions of the input signal

M13.2 Main edge count for the last accumulation interval

M14.1 Absolute count for Wh pulses. Reset with CPC command.

M14.2 Absolute count for VARh pulses. Reset with CPC command.

M15.[phase] I RMS display

M16.[phase] V RMS display

Example: M3.3 Displays Wh total consumption of phase C.

M5.0 Displays VARh total consumption for all phases.

Displays for total consumption wrap around at 999.999Wh (or VARh, VAh) due to the limited number of

available display digits. Internal registers (counters) of the Demo Code are 64 bits wide and do not wrap around.

When entering the phase parameter, use 1 for phase A, 2 for phase B, 3 for phase C, and 0 or blank for all phases.



1.8.2 USING THE DEMO BOARD FOR ENERGY MEASUREMENTS

The 71M6533-DB Demo Board was designed for use with current transformers (CT).

The Demo Board may immediately be used with current transformers having 2,000:1 winding ratio and is programmed for a Kh factor of 3.2 and (see Section 1.8.4 for adjusting the Demo Board for transformers with different turns ratio).

Once, voltage is applied and load current is flowing, the red LED D5 will flash each time an energy sum of 3.2 Wh is collected. The LCD display will show the accumulated energy in Wh when set to display mode 3

(command >M3 via the serial interface).

Similarly, the red LED D6 will flash each time an energy sum of 3.2 VARh is collected. The LCD display will

show the accumulated energy in VARh when set to display mode 5 (command >M5 via the serial interface).

1.8.3 ADJUSTING THE KH FACTOR FOR THE DEMO BOARD

The 71M6533-DB Demo Board is shipped with a pre-programmed scaling factor Kh of 3.2, i.e. 3.2Wh per pulse. In order to be used with a calibrated load or a meter calibration system, the board should be connected to the AC power source using the spade terminals on the bottom of the board. The current transformers should be connected to the dual-pin headers on the bottom of the board.

The Kh value can be derived by reading the values for IMAX and VMAX (i.e. the RMS current and voltage values that correspond to the 250mV maximum input signal to the IC), and inserting them in the following equation for Kh:

Kh = IMAX * VMAX * 66.1782 / (In_8 * WRATE * NACC * X) = 3.19902 Wh/pulse.

The small deviation between the adjusted Kh of 3.19902 and the ideal Kh of 3.2 is covered by calibration. The default values used for the 71M6533-DB Demo Board are:

WRATE: 683

IMAX: 208 VMAX: 600 In_8: 1 (controlled by IA_SHUNT = 0)

NACC: 2520 X: 6

Explanation of factors used in the Kh calculation:

WRATE: The factor input by the user to determine Kh

IMAX: The current input scaling factor, i.e. the input current generating 177mVrms at the IA/IB/IC input pins of the 71M6533. 177mV rms is equivalent to 250mV peak.

VMAX: The voltage input scaling factor, i.e. the voltage generating 177mVrms at the VA/VB/VC input pins of the 71M6533

In_8: The setting for the additional ADC gain (8 or 1) determined by the CE register IA_SHUNT

NACC: The number of samples per accumulation interval, i.e. PRE_SAMPS *SUM_CYCLES

X: The pulse rate control factor determined by the CE registers PULSE_SLOW and PULSE_FAST

Almost any desired Kh factor can be selected for the Demo Board by resolving the formula for WRATE:

WRATE = (IMAX * VMAX * 66.1782) / (Kh * In_8 * NACC * X)

For the Kh of 3.2Wh, the value 171 (decimal) should be entered for WRATE at location 21 (using the CLI

command >]21=+171).

1.8.4 ADJUSTING THE DEMO BOARDS TO DIFFERENT CURRENT TRANS-FORMERS

The Demo Board is prepared for use with 2000:1 current transformers (CTs). This means that for the unmodified Demo Board, 208A on the primary side at 2000:1 ratio result in 104mA on the secondary side,

causing 177mV at the 1.7 resistor pairs R24/R25, R36/R37, R56/R57 (2 x 3.4 in parallel).



In general, when IMAX is applied to the primary side of the CT, the voltage Vin at the IA, IB, or IC input of the 71M6533 IC is determined by the following formula:

Vin = R * I = R * IMAX/N where N = transformer winding ratio, R = resistor on the secondary side

If, for example, IMAX = 208A are applied to a CT with a 2500:1 ratio, only 83.2mA will be generated on the se-condary side, causing only 141mV. The steps required to adapt a 71M6533-DB Demo Board to a transformer with a winding ratio of 2500:1 are outlined below:

1) The formula Rx = 177mV/(IMAX/N) is applied to calculate the new resistor Rx. We calculate Rx to 2.115

2) Changing the resistors R24/R25, R106/R107 to a combined resistance of 2.115 (for each pair) will

cause the desired voltage drop of 177mV appearing at the IA, IB, or IC inputs of the 71M6533 IC.

3) WRATE should be adjusted to achieve the desired Kh factor, as described in 1.8.3.

Simply scaling IMAX is not recommended, since peak voltages at the 71M6533 inputs should always be in the range of 0 through ±250mV (equivalent to 177mV rms). If a CT with a much lower winding ratio than 1:2,000 is used, higher secondary currents will result, causing excessive voltages at the 71M6533 inputs. Conversely, CTs with much higher ratio will tend to decrease the useable signal voltage range at the 71M6533 inputs and may thus decrease resolution.

1.8.5 ADJUSTING THE DEMO BOARDS TO DIFFERENT VOLTAGE DIVIDERS

The 71M6533-DB Demo Board comes equipped with its own network of resistor dividers for voltage

measurement mounted on the PCB. The resistor values (for the 71M6533-DB Demo Board) are 2.5477M

(R15-R21, R26-R31 combined) and 750 (R32), resulting in a ratio of 1:3,393.933. This means that VMAX

equals 176.78mV*3,393.933 = 600V. A large value for VMAX has been selected in order to have headroom for over-voltages. This choice need not be of concern, since the ADC in the 71M6533 has enough resolution, even when operating at 120Vrms or 240Vrms.

If a different set of voltage dividers or an external voltage transformer (potential transformer) is to be used,

scaling techniques similar to those applied for the current transformer should be used.

In the following example we assume that the line voltage is not applied to the resistor divider for VA formed by R15-R21, R26-R31, and R32, but to a voltage transformer with a ratio N of 20:1, followed by a simple resistor divider. We also assume that we want to maintain the value for VMAX at 600V to provide headroom for large voltage excursions.

When applying VMAX at the primary side of the transformer, the secondary voltage Vs is:

Vs = VMAX / N

Vs is scaled by the resistor divider ratio RR. When the input voltage to the voltage channel of the 71M6533 is the desired 177mV, Vs is then given by:

Vs = RR * 177mV

Resolving for RR, we get:

RR = (VMAX / N) / 177mV = (600V / 30) / 177mV = 170.45

This divider ratio can be implemented, for example, with a combination of one 16.95k and one 100 resistor.

If potential transformers (PTs) are used instead of resistor dividers, phase shifts will be introduced that will re-quire negative phase angle compensation. Standard Demo Code accepts negative calibration factors for phase.



1.9 CALIBRATION PARAMETERS

1.9.1 GENERAL CALIBRATION PROCEDURE

Any calibration method can be used with the 71M6533 chips. This Demo Board User’s Manual presents calibration methods with three or five measurements as recommended methods, because they work with most manual calibration systems based on counting "pulses" (emitted by LEDs on the meter).

Naturally, a meter in mass production will be equipped with special calibration code offering capabilities beyond those of the Demo Code. It is basically possible to calibrate using voltage and current readings, with or without pulses involved. For this purpose, the MPU Demo Code can be modified to display averaged voltage and current values (as opposed to momentary values). Also, automated calibration equipment can communicate with the Demo Boards via the serial interface and extract voltage and current readings. This is possible even with the unmodified Demo Code.

Complete calibration procedures are given in section 2.2 of this manual.

Regardless of the calibration procedure used, parameters (calibration factors) will result that will have to be applied to the 71M6533 chip in order to make the chip apply the modified gains and phase shifts necessary for accurate operation. Table 1-2 shows the names of the calibration factors, their function, and their location in the CE RAM.

Again, the command line interface can be used to store the calibration factors in their respective CE RAM addresses. For example, the command

>]10=+16302

stores the decimal value 16302 in the CE RAM location controlling the gain of the current channel (CAL_IA) for

phase A.

The command

>]11=4005

stores the hexadecimal value 0x4005 (decimal 16389) in the CE RAM location controlling the gain of the

voltage channel for phase A (CAL_VA).

Constant CE

Address (hex)

Description

CAL_VA

CAL_VB CAL_VC

0x11 0x13 0x15

Adjusts the gain of the voltage channels. +16384 is the typical value. The gain is directly proportional to the CAL parameter. Allowed range is 0 to 32767. If the gain is 1% slow, CAL should be increased by 1%.

CAL_IA

CAL_IB

CAL_IC

0x10 0x12 0x14

Adjusts the gain of the current channels. +16384 is the typical value. The gain is directly proportional to the CAL parameter. Allowed range is 0 to 32767. If the gain is 1% slow, CAL should be increased by 1%.

PHADJ_A

PHADJ_B PHADJ_C

0x18 0x19 0x1A

This constant controls the CT phase compensation. No compensation occurs when PHADJ=0. As PHADJ is increased, more compensation is introduced.

Table 1-2: CE RAM Locations for Calibration Constants



1.9.2 CALIBRATION MACRO FILE

The macro file in Figure 1-6 contains a sequence of the serial interface commands. It is a simple text file and can be created with Notepad or an equivalent ASCII editor program. The file is executed with HyperTerminal’s Transfer->Send Text File command.

Figure 1-6: Typical Calibration Macro File

It is possible to send the calibration macro file to the 71M6533H for “temporary” calibration. This will temporarily change the CE data values. Upon power up, these values are refreshed back to the default values stored in flash memory. Thus, until the flash memory is updated, the macro file must be loaded each time the part is powered up.

The macro file is run by sending it with the transfer send text file procedure of HyperTerminal.

Use the Transfer Send Text File command!

1.9.3 UPDATING THE DEMO CODE (HEX FILE)

The d_merge program updates the hex file (usually named 6533_4p6b_19jan08.hex or similar) with the values contained in the macro file. This program is executed from a DOS command line window. Executing the d_merge program with no arguments will display the syntax description. To merge macro.txt and old_6533_demo.hex into new_6533_demo.hex, use the command:

d_merge old_6533_demo.hex macro.txt new_6533_demo.hex

The new hex file can be written to the 71M6533 through the ICE port using the ADM51 in-circuit emulator or the TFP2 flash programmer.

1.9.4 UPDATING CALIBRATION DATA IN FLASH OR EEPROM

It is possible to make data permanent that had been entered temporarily into the CE RAM. The transfer to flash memory is done using the following serial interface command:

>]U

Thus, after transferring calibration data with manual serial interface commands or with a macro file, all that has to be done is invoking the U command.

Similarly, calibration data can also stored in EEPROM using the CLS command.

After reset, calibration data is copied from the EEPROM, if present. Otherwise, calibration data is copied from the flash memory. Writing 0xFF into the first few bytes of the EEPROM deactivates any calibration data previously stored to the EEPROM.

CE0 /disable CE

]10=+16022 /CAL_IA (gain=CAL_IA/16384)

]11=+16381 /CAL_VA (gain=CAL_VA/16384)

]12=+16019 /CAL_IB (gain=CAL_IB/16384)

]13=+16370 /CAL_VB (gain=CAL_VB/16384)

]14=+15994 /CAL_IC (gain=CAL_IC/16384)

]15=+16376 /CAL_VC (gain=CAL_VC/16384)

]18=+115 /PHADJ_A (default 0)

]19=+113 /PHADJ_B (default 0)

]1A=+109 /PHADJ_C (default 0)

CE1 /enable CE



1.9.5 AUTOMATIC GAINS CALIBRATION

The Demo Code is able to perform a single-point fast automatic calibration, as described in section 2.2. This calibration is performed for channels A, B, and C only, not for the NEUTRAL channel. The steps required for the calibration are:

1. Enter operating values for voltage and current in I/O RAM. The voltage is entered at MPU address

0x10 (e.g. with the command )10=+2400 for 240V), the current is entered at 0x11 (e.g. with the

command )11=+300 for 30A) and the duration measured in accumulation intervals is entered at 0x0F.

2. The operating voltage and current defined in step 1 must be applied at a zero degree phase angle to the meter (Demo Board).

3. The CLB (Begin Calibration) command must be entered via the serial interface. The operating voltage and current must be maintained accurately while the calibration is being performed.

4. The calibration procedure will automatically reset CE addresses used to store the calibration factors to their default values prior to starting the calibration. Automatic calibration also reads the chip temperature and enters it at the proper CE location temperature compensation.

5. CE addresses 0x10 to 0x15 and 0x18 to 0x1A will now show the new values determined by the auto-calibration procedure. These values can be stored in EEPROM by issuing the CLS command.

Tip: Current transformers of a given type usually have very similar phase angle for identical operating conditions. If the phase angle is accurately determined for one current transformer, the corresponding phase adjustment coefficient PHADJ_X can be entered for all calibrated units.

1.9.6 LOADING THE CODE FOR THE 6533 INTO THE DEMO BOARD

Hardware Interface for Programming: The 71M6533 IC provides an interface for loading code into the

internal flash memory. This interface consists of the following signals:

E_RXTX (data), E_TCLK (clock), E_RST (reset), ICE_E (ICE enable)

These signals, along with V3P3D and GND are available on the emulator headers J14 and J17. Production meters may be equipped with simple programming connectors, such as the 6x1 header used for J17.

Programming of the flash memory requires a specific in-circuit emulator, the ADM51 by Signum Systems (http//www.signumsystems.com) or the Flash Programmer (TFP2) available through Maxim distributors.

Chips may also be programmed before they are soldered to the board.

In-Circuit Emulator: If firmware exists in the 71M6533 flash memory; it has to be erased before loading a new

file into memory. Figure 1-7 and Figure 1-8 show the emulator software active. In order to erase the flash memory, the RESET button of the emulator software has to be clicked followed by the ERASE button ().

Once the flash memory is erased, the new file can be loaded using the commands File followed by Load. The dialog box shown in Figure 1-8 will then appear making it possible to select the file to be loaded by clicking the Browse button. Once the file is selected, pressing the OK button will load the file into the flash memory of the 71M6533 IC.

At this point, the emulator probe (cable) can be removed. Once the 71M6533 IC is reset using the reset button on the Demo Board, the new code starts executing.

Flash Programmer Module (TFP2): Follow the instructions given in the User Manual for the TFP2.



Figure 1-7: Emulator Window Showing Reset and Erase Buttons (see Arrows)

Figure 1-8: Emulator Window Showing Erased Flash Memory and File Load Menu



1.9.7 THE PROGRAMMING INTERFACE OF THE 71M6533

Flash Downloader/ICE Interface Signals

The signals listed in Table 1-3 are necessary for communication between the Flash Downloader or ICE and the 71M6533.

Signal Direction Function

ICE_E Input to the 71M6533 ICE interface is enabled when ICE_E is pulled high

E_TCLK Output from 71M6533 Data clock

E_RXTX Bi-directional Data input/output

E_RST Bi-directional Flash Downloader Reset (active low)

Table 1-3: Flash Programming Interface Signals

The E_RST signal should only be driven by the Flash Downloader when enabling these interface signals. The Flash Downloader must release E_RST at all other times.

1.10 DEMO CODE

1.10.1 DEMO CODE DESCRIPTION

The Demo Board is shipped preloaded with Demo Code revision 4.4.16 or later in the 71M6533 or 71M6533H chip. The code revision can easily be verified by entering the command >i via the serial interface (see section 1.8.1). Check with your local MAXIM INTEGRADED PRODUCTS representative or FAE for the latest revision.

The Demo Code offers the following features:

It provides basic metering functions such as pulse generation, display of accumulated energy, frequency, date/time, and enables the user to evaluate the parameters of the metering IC such as accuracy, harmonic performance, etc.

It maintains and provides access to basic household functions such as real-time clock (RTC).

It provides access to control and display functions via the serial interface, enabling the user to view and modify a variety of meter parameters such as Kh, calibration coefficients, temperature compensation etc.

It provides libraries for access of low-level IC functions to serve as building blocks for code development.

A detailed description of the Demo Code can be found in the Software User’s Guide (SUG). In addition, the comments contained in the library provided with the Demo Kit can serve as useful documentation.

The Software User’s Guide contains the following information:

Design guide

Design reference for routines

Tool Installation Guide

List of library functions

80515 MPU Reference (hardware, instruction set, memory, registers)

1.10.2 IMPORTANT DEMO CODE MPU PARAMETERS

In the Demo Code, certain MPU XRAM parameters have been given fixed addresses in order to permit easy

external access. These variables can be read via the serial interface, as described in section 1.7.1, with the )n$ command and written with the )n=xx command where n is the word address. Note that accumulation variables



are 64 bits long and are accessed with )n$$ (read) and )n=hh=ll (write) in the case of accumulation variables. Default values are the values assigned by the Demo Code on start-up.

All MPU Input Parameters are loaded by the MPU at startup and should not need adjustment during meter calibration.

MPU Input Parameters for Metering

XRAM Word

Address

Default Value

Name Description

0x00 433199 ITHRSHLDA

For each element, if WSUM_X or VARSUM_X of that element ex-ceeds WCREEP_THR, the sample values for that element are not

zeroed. Otherwise, the accumulators for Wh, VARh, and VAh are not updated and the instantaneous value of IRMS for that element is zeroed.

162I0SQSUM LSB

The default value is equivalent to 0.08A. Setting ITHRSHLDA to

zero disables creep control.

0x01 0 CONFIG

Bit 0: Sets VA calculation mode.

0: VRMS*ARMS 1: 22 VARW

Bit 1: Clears accumulators for Wh, VARh, and VAh. This bit need not be reset.

0x02 764569660 PK_VTHR

When the voltage exceeds this value, bit 5 in the MPU status word is set, and the MPU might choose to log a warning. Event logs are not implemented in Demo Code.

162V0SQSUM LSB

The default value is equivalent to 20% above 240Vrms.

0x03 275652520 PK_ITHR

When the current exceeds this value, bit 6 in the MPU status word is set, and the MPU might choose to log a warning. Event logs are not implemented in Demo Code.

162I0SQSUM LSB

The default value is equivalent to 20% above 30ARMS .

0x04 0 Y_CAL_DEG0 RTC adjust, 100ppb. Read only at reset in demo code.

0x05 0 Y_CAL_DEG1 RTC adjust, linear by temperature, 10ppb*ΔT, in 0.1˚C. Provided for optional code.

0x06 0 Y_CAL_DEG2 RTC adjust, squared by temperature, 1ppb*ΔT

2, in 0.1˚C.

Provided for optional code.

0x07 0 PULSEW_SRC This address contains a number that points to the selected pulse source for the Wh output. Selectable pulse sources are listed in Table 1-5.

0x08 4 PULSER_SRC This address contains a number that points to the selected pulse source for the VARh output. Selectable pulse sources are listed in Table 1-5.

0x09 6000 VMAX The nominal external RMS voltage that corresponds to 250mV peak at the ADC input. The meter uses this value to convert internal quantities to external. LSB=0.1V

0x0A 2080 IMAX The nominal external RMS current that corresponds to 250mV peak at the ADC input for channel A. The meter uses this value to convert internal quantities to external. LSB=0.1A



XRAM Word

Address

Default Value

Name Description

0x0B 0 PPMC

PPM/C*26.84. Linear temperature compensation. A positive value will cause the meter to run faster when hot. This is applied to both V and I and will therefore have a double effect on products.

0x0C 0 PPMC2 PPM/C

2*1374. Square law compensation. A positive value will

cause the meter to run faster when hot. This is applied to both V and I and will therefore have a double effect on products.

0x0D PULSEX_SRC This address contains a number that points to the selected pulse source for the XPULSE output. Selectable pulse sources are listed in Table 1-5.

0x0E PULSEY_SRC This address contains a number that points to the selected pulse source for the YPULSE output. Selectable pulse sources are listed in Table 1-5.

0x0F 2 SCAL Count of accumulation intervals for auto-calibration.

0x10 2400 VCAL Applied voltage for auto-calibration. LSB = 0.1V rms of AC signal applied to all elements during calibration.

0x11 300 ICAL Applied current for auto-calibration. LSB = 0.1A rms of AC signal applied to all elements during calibration. Power factor must be 1.

0x12 75087832 VTHRSHLD Voltage to be used for creep detection, measuring frequency, zero crossing, etc.

0x13 50 PULSE_WIDTH Pulse width in µs = (2*PulseWidth + 1)*397. 0xFF disables this feature. Takes effect only at start-up.

0x14 -- TEMP_NOM Nominal (reference) temperature, i.e. the temperature at which calibration occurred. LSB = Units of TEMP_RAW, from CE.

0x15 -- NCOUNT The count of accumulation intervals that the neutral current must

be above INTHRSHLD required to set the “excess neutral” error

bit.

0x16 -- INTHRSHLD The neutral current threshold.

162IxSQSUM LSB

Table 1-4: MPU Input Parameters for Metering

Any of the values listed in Table 1-5 can be selected for as a source for PULSEW and PULSER. The designation “source_I” refers to values imported by the consumer; “source_E” refers to energy exported by the consumer (energy generation).

Number Pulse

Source Description Number

Pulse Source

Description

0 WSUM Default for

PULSEW_SRC 18 VA2SUM

1 W0SUM 19 WSUM_I Sum of imported real energy

2 W1SUM 20 W0SUM_I Imported real energy on element A

3 W2SUM 21 W1SUM_I Imported real energy on element B

4 VARSUM Default for

PULSER_SRC 22 W2SUM_I

Imported real energy on element C

5 VAR0SUM 23 VARSUM_I Sum of imported reactive energy

6 VAR1SUM 24 VAR0SUM_I Imported reactive energy on element A

7 VAR2SUM 25 VAR1SUM_I Imported reactive energy on element B



Number Pulse

Source Description Number

Pulse Source

Description

8 I0SQSUM 26 VAR1SUM_I Imported reactive energy on element C

9 I1SQSUM 27 WSUM_E Sum of exported real energy

10 I2SQSUM 28 W0SUM_E Exported real energy on element A

11 INSQSUM 29 W1SUM_E Exported real energy on element B

12 V0SQSUM 30 W2SUM_E Exported real energy on element C

13 V1SQSUM 31 VARSUM_E Sum of exported reactive energy

14 V2SQSUM 32 VAR0SUM_E Exported reactive energy on element A

15 VASUM 33 VAR1SUM_E Exported reactive energy on element B

16 VA0SUM 34 VAR2SUM_E Exported reactive energy on element C

17 VA1SUM

Table 1-5: Selectable Pulse Sources

MPU INSTANTANEOUS OUTPUT VARIABLES

The Demo Code processes CE outputs after each accumulation interval. It calculates instantaneous values such as VRMS, IRMS, W and VA as well as accumulated values such as Wh, VARh, and VAh. Table 1-6 lists the calculated instantaneous values.

XRAM Word

Address Name DESCRIPTION

0x24 0x26 0x28

Vrms_A Vrms_B* Vrms_C

Vrms from element 0, 1, 2. 162VxSQSUM LSB

0x25 0x27 0x29

Irms_A Irms_B Irms_C Irms_N

Irms from element 0, 1, 2 or neutral

162IxSQSUM LSB

0x20 Delta_T Deviation from Calibration (reference) temperature.

LSB = 0.1 0C.

0x21 Frequency Frequency of voltage selected by CE input. If the selected voltage is below the sag threshold, Frequency=0. LSB Hz

Table 1-6: MPU Instantaneous Output Variables



MPU STATUS WORD

The MPU maintains the status of certain meter and I/O related variables in the Status Word. The Status Word is located at address 0x21. The bit assignments are listed in Table 1-7.

Status Word Bit

Name DESCRIPTION

0 CREEP

Indicates that all elements are in creep mode. The CE’s pulse variables will be “jammed” with a constant value on every accumulation interval to prevent spurious pulses. Note that creep mode therefore halts pulsing even when the CE’s pulse mode is “internal”.

1 MINVC Element C has a voltage below VThrshld. This forces that element into creep mode.

2 PB_PRESS A push button press was recorded at the most recent reset or wake from a battery mode.

3 SPURIOUS An unexpected interrupt was detected.

4 MINVB Element B has a voltage below VThrshld. This forces that element into creep mode.

5 MAXVA Element A has a voltage above VThrshldP.

6 MAXVB Element B has a voltage above VThrshldP.

7 MAXVC Element C has a voltage above VThrshldP.

8 MINVA Element A has a voltage below VThrshld. This forces that element into creep mode. It also forces the frequency and main edge count to zero.

9 WD_DETECT The most recent reset was a watchdog reset. This usually indicates a software error.

10 MAXIN The neutral current is over INThrshld. In a real meter this could indicate faulty distribution or tampering.

11 MAXIA The current of element A is over IThrshld. In a real meter this could indicate overload.

12 MAXIB The current of element B is over IThrshld. In a real meter this could indicate overload.

13 MAXIC The current of element C is over IThrshld. In a real meter this could indicate overload.

14 MINT

The temperature is below the minimum, -40C, established in option_gbl.h. This is not very accurate in the demo code, because the calibration temperature is usually poorly controlled, and the default temp_nom is usually many degrees off. –40C is the minimum recommended operating temperature of the chip.

15 MAXT

The temperature is above the maximum, 85C, established in option_gbl.h. This is not very accurate in the demo code, because the calibration temperature is usually poorly controlled, and the default temp_nom is usually many degrees off. 85C is the maximum recommended operating temperature of the chip.

16 BATTERY_BAD

Just after midnight, the demo code sets this bit if VBat < VBatMin. The read is infrequent to reduce battery loading to very low values. When the battery voltage is being displayed, the read occurs every second, for up to 20 seconds.

17 CLOCK_TAMPER Clock set to a new value more than two hours from the previous value.

18 CAL_BAD Set after reset when the read of the calibration data has a bad longitudinal redundancy check or read failure.

19 CLOCK_UNSET Set when the clock’s current reading is A) More than a year after the previously saved reading, or B) Earlier than the previously saved reading, or C) There is no previously saved reading.



Status Word Bit

Name DESCRIPTION

20 POWER_BAD

Set after reset when the read of the power register data has a bad longitudinal redundancy check or read failure in both copies. Two copies are used because a power failure can occur while one of the copies is being updated.

21 GNDNEUTRAL Indicates that a grounded neutral was detected.

22 TAMPER Tamper was detected †**

23 SOFTWARE A software defect was detected.

25 SAGA

Element A has a sag condition. This bit is set in real time by the CE and detected by the ce_busy interrupt (ce_busy_isr() in ce.c) within 8 sample intervals, about 2.6ms. A transition from normal operation to SAGA causes the power registers to be saved, because the demo PCB is powered from element A.

26 SAGB Element B has a sag condition. This bit is set in real time by the CE and detected by the ce_busy interrupt (ce_busy_isr() in ce.c) within 8 sample intervals, about 2.6ms.

27 SAGC‡ Element C has a sag condition. See the description of the other sag bits.

28 F0_CE A square wave at the line frequency, with a jitter of up to 8 sample intervals, about 2.6ms.

31 ONE_SEC Changes each accumulation interval.

Table 1-7: MPU Status Word Bit Assignment

MPU ACCUMULATION OUTPUT VARIABLES

Accumulation values are accumulated from XFER cycle to XFER cycle (see Table 1-8). They are organized as two 32-bit registers. The first register stores the decimal number displayed on the LCD. For example, if the LCD shows “001.004”, the value in the first register is 1004. This register wraps around after the value 999999 is reached. The second register holds fractions of the accumulated energy, with an LSB of 9.4045*10

-13*VMAX*IMAX*In_8 Wh.

The MPU accumulation registers always hold positive values.

The CLI commands with two question marks, e.g. )39?? should be used to read the variables.

XRAM Word

Address Name Description

0x2C Whi Total Watt hours consumed (imported)

0x44 Whe Total Watt hours generated (exported)

0x34 VARhi Total VAR hours consumed

0x4C VARhe Total VAR hours generated (inverse consumed)

0x3C VAh Total VA hours

0x2E Whi_A Total Watt hours consumed through element 0

0x46 Whe_A Total Watt hours generated (inverse consumed) through element 0

0x36 VARhi_A Total VAR hours consumed through element 0

0x4E VARhe_A Total VAR hours generated (inverse consumed) through element 0

0x3E VAh_A Total VA hours in element 0

0x30 Whi_B Total Watt hours consumed through element 1

0x48 Whe_B Total Watt hours generated (inverse consumed) through element 1

0x38 VARhi_B Total VAR hours consumed through element 1

0x50 VARhe_B Total VAR hours generated (inverse consumed) through element 1



0x40 Vah_B Total VA hours in element 1

0x32 Whi_C Total Watt hours consumed through element 2

0x4A Whe_C Total Watt hours generated (inverse consumed) through element 2

0x3A VARhi_C Total VAR hours consumed through element 2

0x52 VARhe_C Total VAR hours generated (inverse consumed) through element 2

0x42 VAh_C Total VA hours in element 2

Table 1-8: MPU Accumulation Output Variables

1.10.3 USEFUL CLI COMMANDS INVOLVING THE MPU AND CE

Table 1-9 shows a few essential commands involving data memory.

Command Description

)1=2 Clears the accumulators for Wh, VARh, and VAh by setting bit 1 of the CONFIG register.

)A=+2080 Applies the value 208A to the IMAX register

)9=+6000 Applies the value 600V to the VMAX register

)2F?? Displays the total accumulated imported Wh energy

MR2.1 Displays the current RMS voltage in phase A

MR1.2 Displays the current RMS current in phase B

RI5=26 Disables the emulator clock by setting bit 5 in I/O RAM address 0x05. This command will disable emulator/programmer access to the 71M6533.

RI5=6 Re-enables the emulator clock by clearing bit 5 in I/O RAM address 0x05.

]U

Stores the current CE RAM variables to flash memory. The variables stored in flash memory will be applied by the MPU at the next reset or power-up if no valid data is available from the EEPROM.

Table 1-9: CLI Commands for Data Memory



2 APPLICATION INFORMATION 2.1 CALIBRATION THEORY

A typical meter has phase and gain errors as shown by S, AXI, and AXV in Figure 2-1. Following the typical meter convention of current phase being in the lag direction, the small amount of phase lead in a typical current

sensor is represented as -S. The errors shown in Figure 2-1 represent the sum of all gain and phase errors. They include errors in voltage attenuators, current sensors, and in ADC gains. In other words, no errors are made in the ‘input’ or ‘meter’ boxes.

I

V

L

INPUT

S A XI

A XV

ERRORS

) cos( L IV IDEAL

) cos( S L XV XI A A IV ACTUAL

1

IDEAL

ACTUAL

IDEAL

IDEAL ACTUAL ERROR

W

I RMS METER

V RMS

XI A I ACTUAL I IDEAL ,

XV A V ACTUAL V IDEAL ,

L is phase lag

S is phase lead

Figure 2-1: Watt Meter with Gain and Phase Errors.

During the calibration phase, we measure errors and then introduce correction factors to nullify their effect. With three unknowns to determine, we must make at least three measurements. If we make more measurements, we can average the results.

2.1.1 CALIBRATION WITH THREE MEASUREMENTS

The simplest calibration method is to make three measurements. Typically, a voltage measurement and two Watt-hour (Wh) measurements are made. A voltage display can be obtained for test purposes via the command >MR2.1 in the serial interface.

Let’s say the voltage measurement has the error EV and the two Wh measurements have errors E0 and E60,

where E0 is measured with L = 0 and E60 is measured with L = 60. These values should be simple ratios—not percentage values. They should be zero when the meter is accurate and negative when the meter runs slow. The fundamental frequency is f0. T is equal to 1/fS, where fS is the sample frequency (2560.62Hz). Set all calibration factors to nominal: CAL_IA = 16384, CAL_VA = 16384, PHADJA = 0.

2



From the voltage measurement, we determine that

1. 1 VXV EA

We use the other two measurements to determine S and AXI.

2. 1)cos(1)0cos(

)0cos(0

SXIXV

SXIXV AAIV

AAIVE

2a. )cos(

10

S

XIXV

EAA

3. 1)60cos(

)60cos(1

)60cos(

)60cos(60

S

XIXVSXIXV AA

IV

AAIVE

3a.

1)60cos(

)sin()60sin()cos()60cos(60

SSXIXV AA

E

1)sin()60tan()cos( SXIXVSXIXV AAAA

Combining 2a and 3a:

4. )tan()60tan()1( 0060 SEEE

5. )60tan()1(

)tan(0

060

E

EES

6.

)60tan()1(tan

0

0601

E

EES

and from 2a:

7. )cos(

10

SXV

XIA

EA

Now that we know the AXV, AXI, and S errors, we calculate the new calibration voltage gain coefficient from the previous ones:

XV

NEWA

VCALVCAL

__

We calculate PHADJ from S, the desired phase lag:

)2cos()21(1)tan()2sin()21(

)2cos()21(2)21(1)tan(2

0

9

0

9

0

929

20

TfTf

TfPHADJ

S

S



Finally, we calculate the new calibration current gain coefficient, including compensation for a slight gain increase in the phase calibration circuit.

29

0

9

0

92020

)21()2cos()21(21

))2cos()21(222(21

1__

Tf

TfPHADJPHADJA

ICALICAL

XI

NEW

2.1.2 CALIBRATION WITH FIVE MEASUREMENTS

The five measurement method provides more orthogonality between the gain and phase error derivations. This method involves measuring EV, E0, E180, E60, and E300. Again, set all calibration factors to nominal, i.e. CAL_IA = 16384, CAL_VA = 16384, PHADJA = 0.

First, calculate AXV from EV:

1. 1 VXV EA

Calculate AXI from E0 and E180:

2. 1)cos(1)0cos(

)0cos(0

SXIXV

SXIXV AAIV

AAIVE

3. 1)cos(1)180cos(

)180cos(180

SXIXV

SXIXV AAIV

AAIVE

4. 2)cos(21800 SXIXV AAEE

5. )cos(2

21800

S

XIXV

EEAA

6. )cos(

12)( 1800

SXV

XIA

EEA

Use above results along with E60 and E300 to calculate S.

7. 1)60cos(

)60cos(60

IV

AAIVE SXIXV


8. 1)60cos(

)60cos(300

IV

AAIVE SXIXV


Subtract 8 from 7

9. )sin()60tan(230060 SXIXV AAEE

use equation 5:

10. )sin()60tan()cos(

21800

30060 S

S

EEEE

11. )tan()60tan()2( 180030060 SEEEE



12.

)2)(60tan(

)(tan

1800

300601

EE

EES

Now that we know the AXV, AXI, and S errors, we calculate the new calibration voltage gain coefficient from the previous ones:

XV

NEWA

VCALVCAL

__

We calculate PHADJ from S, the desired phase lag:

)2cos()21(1)tan()2sin()21(

)2cos()21(2)21(1)tan(2

0

9

0

9

0

929

20

TfTf

TfPHADJ

S

S

And we calculate the new calibration current gain coefficient, including compensation for a slight gain increase in the phase calibration circuit.

29

0

9

0

92020

)21()2cos()21(21

))2cos()21(222(21

1__

Tf

TfPHADJPHADJA

ICALICAL

XI

NEW

2.2 CALIBRATION PROCEDURES

Calibration requires that a calibration system is used, i.e. equipment that applies accurate voltage, load current and load angle to the unit being calibrated, while measuring the response from the unit being calibrated in a repeatable way. By repeatable we mean that the calibration system is synchronized to the meter being calibrated. Best results are achieved when the first pulse from the meter opens the measurement window of the calibration system. This mode of operation is opposed to a calibrator that opens the measurement window at random time and that therefore may or may not catch certain pulses emitted by the meter.

It is essential for a valid meter calibration to have the voltage stabilized a few seconds before the current is applied. This enables the Demo Code to initialize the 71M6533 and to stabilize the PLLs and filters in the CE. This method of operation is consistent with meter applications in the field as well as with international metering standards.

Each meter phase must be calibrated individually. The procedures below show how to calibrate a meter phase with either three or five measurements. The PHADJ equations apply only when a current transformer is used for the phase in question. Note that positive load angles correspond to lagging current (see Figure 2-2).

During calibration of any phase, a stable mains voltage has to be present on phase A. This enables the CE processing mechanism of the 71M6533 necessary to obtain a stable calibration.



Figure 2-2: Phase Angle Definitions

The calibration procedures described below should be followed after interfacing the voltage and current sensors to the 71M6533 chip. When properly interfaced, the V3P3 power supply is connected to the meter neutral and is the DC reference for each input. Each voltage and current waveform, as seen by the 71M6533, is scaled to be less than 250mV (peak).

2.2.1 CALIBRATION PROCEDURE WITH THREE MEASUREMENTS

Each phase is calibrated individually. The calibration procedure is as follows:

1) The calibration factors for all phases are reset to their default values, i.e. CAL_In = CAL_Vn = 16384,

and PHADJ_n = 0.

2) An RMS voltage Videal consistent with the meter’s nominal voltage is applied, and the RMS reading Vactual of the meter is recorded. The voltage reading error Axv is determined as Axv = (Vactual - Videal ) / Videal

3) Apply the nominal load current at phase angles 0° and 60°, measure the Wh energy and record the errors E0 AND E60.

4) Calculate the new calibration factors CAL_In, CAL_Vn, and PHADJ_n, using the formulae presented

in section 2.1.1 or using the spreadsheet presented in section 2.2.4.

5) Apply the new calibration factors CAL_In, CAL_Vn, and PHADJ_n to the meter. The memory

locations for these factors are given in section 1.9.1.

6) Test the meter at nominal current and, if desired, at lower and higher currents and various phase angles to confirm the desired accuracy.

7) Store the new calibration factors CAL_In, CAL_Vn, and PHADJ_n in the EEPROM memory of the

meter. If the calibration is performed on a Maxim’s Teridian Demo Board, the methods involving the command line interface, as shown in sections 1.9.3 and 1.9.4, can be used.

8) Repeat the steps 1 through 7 for each phase.

9) For added temperature compensation, read the value TEMP_RAW (CE RAM) and write it to

TEMP_NOM (CE RAM). If Demo Code 4.6n or later is used, this will automatically calculate the

correction coefficients PPMC and PPMC2 from the nominal temperature and from the characterization data contained in the on-chip fuses.

Tip: Step 2 and the energy measurement at 0° of step 3 can be combined into one step.

Voltage

Current+60°

Using EnergyGenerating Energy

Current lags

voltage

(inductive)

Current leads

voltage

(capacitive)

-60°

Voltage

Positive

direction



2.2.2 CALIBRATION PROCEDURE WITH FIVE MEASUREMENTS

Each phase is calibrated individually. The calibration procedure is as follows:

1) The calibration factors for all phases are reset to their default values, i.e. CAL_In = CAL_Vn = 16384,

and PHADJ_n = 0.

2) An RMS voltage Videal consistent with the meter’s nominal voltage is applied, and the RMS reading Vactual of the meter is recorded. The voltage reading error Axv is determined as Axv = (Vactual - Videal ) / Videal

3) Apply the nominal load current at phase angles 0°, 60°, 180° and –60° (-300°). Measure the Wh energy each time and record the errors E0, E60, E180, and E300.

4) Calculate the new calibration factors CAL_In, CAL_Vn, and PHADJ_n, using the formulae presented

in section 2.1.2 or using the spreadsheet presented in section 2.2.4.

5) Apply the new calibration factors CAL_In, CAL_Vn, and PHADJ_n to the meter. The memory

locations for these factors are given in section 1.9.1.

6) Test the meter at nominal current and, if desired, at lower and higher currents and various phase angles to confirm the desired accuracy.

7) Store the new calibration factors CAL_In, CAL_Vn, and PHADJ_n in the EEPROM memory of the

meter. If a Demo Board is calibrated, the methods involving the command line interface shown in sections 1.9.3 and 1.9.4 can be used.

8) Repeat the steps 1 through 7 for each phase.

9) For added temperature compensation, read the value TEMP_RAW (CE RAM) and write it to

TEMP_NOM (CE RAM). If Demo Code 4.6n or later is used, this will automatically calculate the

correction coefficients PPMC and PPMC2 from the nominal temperature and from the characterization data contained in the on-chip fuses.

Tip: Step 2 and the energy measurement at 0° of step 3 can be combined into one step.

2.2.3 CALIBRATION PROCEDURE FOR ROGOWSKI COIL SENSORS

Demo Code containing CE code that is compatible with Rogowski coils is available from MAXIM INTEGRADED PRODUCTS.

Rogowski coils generate a signal that is the derivative of the current. The CE code implemented in the Rogowski CE image digitally compensates for this effect and has the usual gain and phase calibration adjustments. Additionally, calibration adjustments are provided to eliminate voltage coupling from the sensor input.

Current sensors built from Rogowski coils have a relatively high output impedance that is susceptible to capacitive coupling from the large voltages present in the meter. The most dominant coupling is usually capacitance between the primary of the coil and the coil’s output. This coupling adds a component proportional to the derivative of voltage to the sensor output. This effect is compensated by the voltage coupling calibration coefficients.

As with the CT procedure, the calibration procedure for Rogowski sensors uses the meter’s display to calibrate the voltage path and the pulse outputs to perform the remaining energy calibrations. The calibration procedure must be done to each phase separately, making sure that the pulse generator is driven by the accumulated real energy for just that phase. In other words, the pulse generator input should be set to WhA, WhB, or WhC, depending on the phase being calibrated.

In preparation of the calibration, all calibration parameters are set to their default values. VMAX and IMAX are set to reflect the system design parameters. WRATE and PULSE_SLOW, PULSE_FAST are adjusted to obtain the

desired Kh.



Step 1: Basic Calibration: After making sure VFEED_A, VFEED_B, and VFEED_C are zero, perform either the

three measurement procedure (2.2.1) or the five measurement calibration procedure (2.2.2) described in the CT section. Perform the procedure at a current large enough that energy readings are immune from voltage coupling effects.

The one exception to the CT procedure is the equation for PHADJ—after the phase error, s, has been calculated, use the PHADJ equation shown below. Note that the default value of PHADJ is not zero, but rather –3973.

0

501786

fPHADJPHADJ SPREVIOUS

If voltage coupling at low currents is introducing unacceptable errors, perform step 2 below to select non-zero values for VFEED_A, VFEED_B, and VFEED_C.

Step 2: Voltage Cancellation: Select a small current, IRMS, where voltage coupling introduces at least 1.5% energy error. At this current, measure the errors E0 and E180 to determine the coefficient VFEED .

PREVIOUS

RMSMAX

MAXRMS VFEEDVI

VIEEVFEED

251800 2

2

2.2.4 CALIBRATION SPREADSHEETS

Calibration spreadsheets are available from MAXIM INTEGRADED PRODUCTS. They are also included in the CD-ROM shipped with any Demo Kit. Figure 2-3 shows the spreadsheet for three measurements. Figure 2-4 shows the spreadsheet for five measurements with three phases.

For CT and shunt calibration, data should be entered into the calibration spreadsheets as follows:

1. Calibration is performed one phase at a time.

2. Results from measurements are generally entered in the yellow fields. Intermediate results and calibration factors will show in the green fields.

3. The line frequency used (50 or 60 Hz) is entered in the yellow field labeled AC frequency.

4. After the voltage measurement, measured (observed) and expected (actually applied) voltages are entered in the yellow fields labeled “Expected Voltage” and “Measured Voltage”. The error for the voltage measurement will then show in the green field above the two voltage entries.

5. The relative error from the energy measurements at 0° and 60° are entered in the yellow fields labeled “Energy reading at 0°” and “Energy reading at 60°”. The corresponding error, expressed as a fraction will then show in the two green fields to the right of the energy reading fields.

6. The spreadsheet will calculate the calibration factors CAL_IA, CAL_VA, and PHADJ_A from the

information entered so far and display them in the green fields in the column underneath the label “new”.

7. If the calibration was performed on a meter with non-default calibration factors, these factors can be entered in the yellow fields in the column underneath the label “old”. For a meter with default calibration factors, the entries in the column underneath “old” should be at the default value (16384).



A spreadsheet is also available for Rogowski coil calibration (see Figure 2-5). Data entry is as follows:

1. All nominal values are entered in the fields of step one.

2. The applied voltage is entered in the yellow field labeled “Input Voltage Applied” of step 2. The entered value will automatically show in the green fields of the two other channels.

3. After measuring the voltages displayed by the meter, these are entered in the yellow fields labeled “Measured Voltage”. The spreadsheet will show the calculated calibration factors for voltage in the green fields labeled “CAL_Vx”.

4. The default values (-3973) for PHADJ_x are entered in the yellow fields of step 3. If the calibration

factors for the current are not at default, their values are entered in the fields labeled “Old CAL_Ix”.

5. The errors of the energy measurements at 0°, 60°, -60°, and 180° are entered in the yellow fields labeled “% Error …”. The spreadsheet will then display phase error, the current calibration factor and the PHADJ_x factor in the green fields, one for each phase.

6. If a crosstalk measurement is necessary, it should be performed at a low current, where the effects of crosstalk are noticeable. First, if (old) values for VFEEDx exist in the meter, they are entered in the spreadsheet in the row labeled “Old VFEEDx”, one for each phase. If these factors

are zero, “0” is entered for each phase.

7. Test current and test voltage are entered in the yellow fields labeled VRMS and IRMS.

8. The crosstalk measurement is now conducted at a low current with phase angles of 0° and 180°, and the percentage errors are entered in the yellow fields labeled “% error, 0 deg” and “% error, 180 deg”, one pair of values for each phase. The resulting VFEEDx factors are then displayed in the green fields labeled VFEEDx.

Figure 2-3: Calibration Spreadsheet for Three Measurements



Figure 2-4: Calibration Spreadsheet for Five Measurements



Figure 2-5: Calibration Spreadsheet for Rogowski coil



2.2.5 COMPENSATING FOR NON-LINEARITIES

Nonlinearity is most noticeable at low currents, as shown in Figure 2-6, and can result from input noise and truncation. Nonlinearities can be eliminated using the QUANT variable.

Figure 2-6: Non-Linearity Caused by Quantification Noise

The error can be seen as the presence of a virtual constant noise current. While 10mA hardly contribute any error at currents of 10A and above, the noise becomes dominant at small currents.

The value to be used for QUANT can be determined by the following formula:

LSBIMAXVMAX

IVerror

QUANT

100

Where error = observed error at a given voltage (V) and current (I), VMAX = voltage scaling factor, as described in section 1.8.3, IMAX = current scaling factor, as described in section 1.8.3, LSB = QUANT LSB value = 1.04173*10

-9W

Note: The LSB value for QUANT will depend on the CE code that is used for the application. Check the CE code

specification for the actual LSB value.

Example: Assuming an observed error as in Figure 2-6, we determine the error at 1A to be +1%. If VMAX is 600V, IMAX = 208A, QUANT LSB = 7.4162*10

-10, and if the measurement was taken at 240V, we determine

QUANT as follows:

11339104162.7208600

1240100

1

10

QUANT

QUANT is to be written to the CE location given in the data sheet or in the CE code specification. It does not

matter which current value is chosen as long as the corresponding error value is significant (5% error at 0.2A used in the above equation will produce the same result for QUANT).

Input noise and truncation can cause similar errors in the VAR calculation that can be eliminated using the QUANT_VAR variable. QUANT_VAR is determined using the same formula as QUANT.

0

2

4

6

8

10

12

0.1 1 10 100

I [A]

err

or

[%]

error



2.3 POWER SAVING MEASURES

In many cases, especially when operating the 71M6533 from a battery, it is desirable to reduce the power consumed by the chip to a minimum. This can be achieved with the measures listed in Table 2-1.

Power Saving Measure Software Control Typical Savings

Disable the CE CE_EN = 0 0.16mA

Disable the ADC ADC_DIS = 1 1.8mA

Disable clock test output CKTEST CKOUTDIS = 1 0.6mA

Disable emulator clock ECK_DIS = 1 0.1mA

Disable RTM outputs RTM_EN = 0 0.01mA

Disable SSI output SSI_EN = 0

Select DGND for the multiplexer input TMUX[3:0] = 0

Disable reference voltage output VREF_DIS = 1

Reduce the clock for the MPU MPU_DIV = 5 0.4mA

Table 2-1: Power Saving Measures

2.4 SCHEMATIC INFORMATION

In this section, hints on proper schematic design are provided that will help designing circuits that are functional and sufficiently immune to EMI (electromagnetic interference).

2.4.1 COMPONENTS FOR THE V1 PIN

The V1 pin of the 71M6533 can never be left unconnected.

A voltage divider should be used to establish that V1 is in a safe range when the meter is in mission mode (V1 must be lower than 2.9V in all cases in order to keep the hardware watchdog timer enabled). For proper debugging or loading code into the 71M6533 mounted on a PCB, it is necessary to have a provision like the header JP1 shown above R1 in Figure 2-7. A shorting jumper on this header pulls V1 up to V3P3 disabling the hardware watchdog timer.

Figure 2-7: Voltage Divider for V1

On the 71M6533-DB Demo Board this feature is implemented with resistors R83/R86, capacitor C31 and TP10. See the board schematics in the Appendix for details.

2.4.2 RESET CIRCUIT

Even though a functional meter will not necessarily need a reset switch, the 71M6533-DB Demo Boards provide a reset pushbutton that can be used when prototyping and debugging software (see Figure 2-8).. For a production meter, the RESET pin should be pulled down hard to GNDD.

V3P3

R2V1

R1 R3

5kΩ

C1

100pF

GND

V3P3

R2V1

R1 R3

5kΩ

C1

100pF

GND



Figure 2-8: External Components for RESETZ

2.4.3 OSCILLATOR

The oscillator of the 71M6533 drives a standard 32.768kHz watch crystal (see Figure 2-9). Crystals of this type are accurate and do not require a high-current oscillator circuit. The oscillator in the 71M6533 has been designed specifically to handle watch crystals and is compatible with their high impedance and limited power handling capability. The oscillator power dissipation is very low to maximize the lifetime of any battery backup device attached to the VBAT pin.

Figure 2-9: Oscillator Circuit

It is not necessary to place an external resistor across the crystal

For better resistance to EMI, the GND connection for the capacitors should be through a ferrite bead.

2.4.4 EEPROM

EEPROMs should be connected to the pins DIO4 and DIO5 (see Figure 2-10). These pins can be switched from regular DIO to implement an I2C interface by setting the I/O RAM register DIO_EEX (0x2008[4]) to 1. Pull-

up resistors of 3k must be provided for both the SCL and SDA signals.

R1

RESET

71M6533

DGND

V3P3DR2

VBAT/

V3P3D

Reset

Switch

1kΩ

1nF

10kΩ

R1

RESET

71M6533

DGND

V3P3DR2

VBAT/

V3P3D

Reset

Switch

1kΩ

1nF

10kΩ

XOUT

XIN

TEST

GND 71M6533

Ferrite



Figure 2-10: EEPROM Circuit

2.4.5 LCD

The 71M6533 has an on-chip LCD controller capable of controlling static or multiplexed LCDs. Figure 2-11 shows the basic connection for LCDs. Note that the LCD module itself has no power connection.

Figure 2-11: LCD Connections

2.4.6 OPTICAL INTERFACE

The 71M6533 IC is equipped with two pins supporting the optical interface: OPT_TX and OPT_RX. The OPT_TX pin can be used to drive a visual or IR light LED with up to 20mA, a series resistor (R2 in Figure 2-12) helps limiting the current). The OPT_RX pin can be connected to the collector of a photo-transistor, as shown in Figure 2-12.

DIO4

DIO5

71M6533EEPROM

SCL

SDA

V3P3D

10kΩ

10kΩ

DIO4

DIO5

71M6533EEPROM

SCL

SDA

V3P3D

10kΩ

10kΩ

segments

71M6533

LCD

commons

segments

71M6533

LCD

commons



Figure 2-12: Optical Interface Block Diagram

The IR diode should be connected between terminal 2 of header J12 on the Demo Board (cathode) and the V3P3 voltage (anode), which is accessible at terminal 1 of header J12 (see Figure 3).

J12 on the 71M6533-DB Demo Boards has all the provisions for connecting the IR LED and photo-transistor.

2.4.7 FERRITES

Ferrite beads on the PCB are useful for the rejection of noise and general EMI events such as ESD and EFT. Some precautions apply:

1) Ferrites should not be placed upstream from MOVs, TVS, and other clamping devices, since large currents will flow through the ferrites in the event of a surge. If the ferrite is not designed for large surge currents, it will burn up.

2) Placing ferrite beads directly in series with the ADC inputs of the 71M6533 can cause inaccuracies in Wh readings over temperature. Ferrites should be placed before the balance resistor and reservoir capacitor. For details, see Maxim Application Note AN-5292.

2.5 TESTING THE DEMO BOARD

This section will explain how the 71M6533 IC and the peripherals can be tested. Hints given in this section will help evaluating the features of the Demo Board and understanding the IC and its peripherals.

2.5.1 FUNCTIONAL METER TEST

This is the test that every Demo Board has to pass before being integrated into a Demo Kit. Before going into the functional meter test, the Demo Board has already passed a series of bench-top tests, but the functional meter test is the first test that applies realistic high voltages (and current signals from current transformers) to the Demo Board.

Figure 2-13 shows a meter connected to a typical calibration system. The calibrator supplies calibrated voltage and current signals to the meter. It should be noted that the current flows through the CT or CTs that are not part of the Demo Board. The Demo Board rather receives the voltage output signals from the CT. An optical pickup senses the pulses emitted by the meter and reports them to the calibrator. Some calibration systems have electrical pickups. The calibrator measures the time between the pulses and compares it to the expected time, based on the meter Kh and the applied power.

OPT_TX

R2

R1

OPT_RX

71M6533

V3P3SYS

Phototransistor

LED

10kΩ100pF

V3P3SYS

OPT_TX

R2

R1

OPT_RX

71M6533

V3P3SYS

Phototransistor

LED

10kΩ100pF

OPT_TX

R2

R1

OPT_RX

71M6533

V3P3SYS

Phototransistor

LED

10kΩ100pF

OPT_TX

R2

R1

OPT_RX

71M6533

V3P3SYS

Phototransistor

LED

10kΩ100pF

V3P3SYS



Figure 2-13: Meter with Calibration System

Maxim’s Teridian Demo Boards are not calibrated prior to shipping. However, the Demo Board pulse outputs are tested and compared to the expected pulse output rate. Figure 2-14 shows the screen on the controlling PC for a typical Demo Board. The error numbers are given in percent. This means that for the measured Demo Board, the sum of all errors resulting from tolerances of PCB components, CTs, and 71M6533 tolerances was –3.41%, a range that can easily be compensated by calibration.

Figure 2-15 shows a load-line obtained with a 6533 in differential mode. As can be seen, dynamic ranges of 10,000:1 for current can be achieved with good circuit design, layout, cabling, and, of course, good current sensors.

Figure 2-14: Calibration System Screen

Calibrator

AC Voltage

Current CT

Meter

under

Test Optical Pickup

for Pulses

Cali

bra

ted

Ou

tpu

ts

Pu

lse

Co

un

ter

PC



Figure 2-15: Wh Load Line in Differential Mode at Room Temperature

2.5.2 EEPROM

Testing the EEPROM provided on the Demo Board is straightforward and can be done using the serial command line interface (CLI) of the Demo Code.

To write a string of text characters to the EEPROM and read it back, we apply the following sequence of CLI commands:

>EEC1 Enables the EEPROM

>EESthis is a test Writes text to the buffer

>EET80 Writes buffer to address 80

Written to EEPROM address 00000080 74 68 69 73 20 69 73 20 61 ….

Response from Demo Code

>EER80.E Reads text from the buffer

Read from EEPROM address 00000080 74 68 69 73 20 69 73 20 61 ….

Response from Demo Code

>EEC0 Disables the EEPROM

2.5.3 RTC

Testing the RTC inside the 71M6533 IC is straightforward and can be done using the serial command line interface (CLI) of the Demo Code.

To set the RTC and check the time and date, we apply the following sequence of CLI commands:

>M10 LCD display to show calendar date

>RTD05.09.27.3 Sets the date to 9/27/2005 (Tuesday)

>M9 LCD display to show time of day

>RTT10.45.00 Sets the time to 10:45:00. AM/PM distinction: 1:22:33PM = 13:22:33

-0.2

-0.15

-0.1

-0.05

0

0.05

0.1

0.15

0.2

0.01 0.1 1 10 100 1000

Err

or

[%]

I [A]

Load Line in Differential Mode

Error(%)



2.5.4 HARDWARE WATCHDOG TIMER

The hardware watchdog timer of the 71M6533 is disabled when the voltage at the V1 pin is at 3.3V (V3P3). On the Demo Boards, this is done by plugging in a jumper at TP10 between the V1 and V3P3 pins.

Programming the flash memory or emulation using the ADM51 In-Circuit-Emulator can only be done when a jumper is plugged in at TP10 between V1 and V3P3.

Conversely, removing the jumper at TP10 will enable the hardware watchdog timer.

2.5.5 LCD

Various tests of the LCD interface can be performed with the Demo Board, using the serial command line interface (CLI):

Setting the LCD_EN register to 1 enables the display outputs.

Register Name Address [bits] R/W Description

LCD_EN 2021[5] R/W Enables the LCD display. When disabled, VLC2, VLC1, and VLC0 are ground as are the COM and SEG outputs.

To access the LCD_EN register, we apply the following CLI commands:

>RI21$ Reads the hex value of register 0x2021

>25 Response from Demo Code indicating the bit 5 is set

>RI21=5 Writes the hex value 0x05 to register 0x2021 causing the display to be switched off

>RI21=25 Sets the LCD_EN register back to normal

The 71M6533 provides a charge pump capable of boosting the 3.3VDC supply voltage up to 5.0VDC. The boost circuit is enabled with the LCD_BSTEN register. The 6533 Demo Boards have the boost circuit enabled by

default.


LCD_BSTEN 2020[7] R/W Enables the LCD voltage boost circuit.

To disable the LCD voltage boost circuit, we apply the following CLI commands:


>8E Response from Demo Code indicating the bit 7 is set

>RI20=E Writes the hex value 0x0E to register 0x2020 causing the LCD boost to be switched off

>RI20=8E Enables the LCD boost circuit

The LCD_CLK register determines the frequency at which the COM pins change states. A slower clock means

lower power consumption, but if the clock is too slow, visible flicker can occur. The default clock frequency for the 71M6533-DB Demo Boards is 150Hz (LCD_CLK = 01).


LCD_CLK[1:0] 2021[1:0] R/W Sets the LCD clock frequency, i.e. the frequency at which SEG and COM pins change states.

fw = CKADC/128 = 38,400

00: fw/29, 01: fw/2

8, 10: fw/2

7, 11: fw/2

6

To change the LCD clock frequency, we apply the following CLI commands:


>25 Response from Demo Code indicating the bit 0 is set and bit 1 is cleared.

>RI21=24 Writes the hex value 0x24 to register 0x2021 clearing bit 0 – LCD flicker is visible now



>RI21=25 Writes the original value back to LCD_CLK

2.6 APPLICATION NOTES

Please check on the Maxim web site or contact your local Maxim Integrated Products sales representative for Application Notes.



3 HARDWARE DESCRIPTION 3.1 71M6533-DB DEMO BOARD DESCRIPTION: JUMPERS, SWITCHES

AND TEST POINTS

The items described in the following tables refer to the flags in Figure 3-1.

Item # Reference Designator

Name Use

1, 2, 6 TP2, TP4, TP6 VA, VB, VC Two-pin header test points. One pin is the VA, VB, or VC line voltage input to the IC and the other end is V3P3.

4 JP1

PS_SEL[0] A jumper is placed across JP1 to activate the internal power supply. JP1 is on the bottom of the board.

Caution: High Voltage! Do not touch!

3, 8, 11 J4, J6, J8

VA_IN, VB_IN, VC_IN

VA_IN, VB_IN, and VC_IN are the line voltage inputs to the board. Each input has a resistor divider that leads to the pin on the IC associated with the voltage input to the ADC. These inputs are spade terminals mounted on the bottom of the board.

Caution: High Voltage! Do not touch these pins!

5 J9 NEUTRAL The NEUTRAL voltage input connected to V3P3. This input is a spade terminal mounted on the bottom of the board.

7 SW2 RESET Chip reset switch: When the switch is pressed, the RESET pin of the IC is pulled high which resets the IC into a known state.

9 JP8 VBAT, GND

Three-pin header that allows selection of power to the VBAT pin. When the jumper is placed between pins 1 and 2 (default setting of demo board) VBAT is tied to the IC

supply. An external battery can be connected between terminals 2 and 3.

10 SW3 PB

Pushbutton connected to the PB pin on the IC. This push-button can be used in conjunction with the Demo Code to wake the IC from sleep mode or LCD mode to brown-out mode. In mission mode, the pushbutton serves to cycle the LCD display.

Table 3-1: 71M6533-DB Demo Board Description

3




Name Use

12 J12 OPT_RX, VBAT, OPT_TX, GND

Five-pin header for access to the optical port (UART1). Terminal 2 monitors the TX_OPT output of the IC. Terminal 4 monitors the OPT_RX input to the IC.

No jumper should be place across VBAT and OPT_TX_OUT

13 J1 5 Volt external

supply Plug for connecting the external 5 VDC power supply.

14, 20, 24, 32

TP13, TP14, TP15, TP16

GND GND test points.

15 JP20 -- Two-pin header for selecting the signal for the pulse LED (D6). With a jumper between pins 1 and 2, RPULSE is selected. Pins 2 and 3 select YPULSE.

16 D6 VARS VARh pulse LED.

17 TP21 -- Two-pin header providing access to the signals powering the RPULSE LED (D5).

18 JP19 SEG21/DIO08 Two-pin header for selecting the signal for the pulse LED (D5). With a jumper between pins 1 and 2, WPULSE is selected. Pins 2 and 3 select XPULSE.

19 TP20 -- Two-pin header providing access to the signals powering the WPULSE LED (D6).

21 D5 WATTS Wh pulse LED.

22 JP16 BAT MODE Selector for the operation of the IC when main power is re-moved. A jumper across pins 2-3 (default) indicates that no external battery is available. The IC will stay in brownout mode when the system power is down and it will communi-cate at 9600bd. A jumper across pins 1-2 indicates that an external battery is available. The IC will be able to trans-ition from brownout mode to sleep and LCD modes when the system power is down and it will communicate at 300bd.

23 JP6 DIO03_R Three-pin header providing access to DIO03.

25 JP7 ICE_EN To enable the ICE interface a jumper is installed across pins 2 and 3.

26 U8 -- LCD display – eight digits, 14 segments.

27 JP13, JP14, JP15

DIO56, DIO57, DIO58

Two-pin headers providing access to the DIO signals DIO56, DIO57, and DIO58.

28 J2 DEBUG Connector for USB-Serial Adapter. 2x8 pin male header.

29 U5 -- The IC 71M6533 soldered to the PCB.

30 TP8 CKTEST, TMUXOUT

Test points for access to the CKTEST and TMUXOUT pins on the IC.

31 TP17 VREF Test point for access to the VREF pin on the IC.

33 TP10 V1_R Three-pin header for control of the V1 input to the IC.

34 J18 -- SPI interface connector.

35, 39, 41, 43

J19, J20, J21, J22

IAN/IAP, IBN/IBP, ICN/ICP, IDP

Two-pin headers for monitoring the current channel inputs.

36 J14 EMULATOR I/F 2x10 emulator connector port for the Signum ICE ADM-51 or for the TFP2 Flash Programmer.





Name Use

37 J17 -- Alternative connector for the ICE interface.

38, 40, 42, 44

J3, J5, J7, J10 -- Two-pin headers mounted on the bottom of the board. The outputs from the CTs are to be connected here.


Figure 3-1: 71M6533-DB Demo Board - Board Description

(Default jumper settings indicated in yellow)

95 8

12

13

22

20

11

14

15

21

1 2 6 743

16

18

19

27 26 23

10

25282930313233

34

24

35

37

36

40

38

41

42

43

17

39

44



3.2 BOARD HARDWARE SPECIFICATIONS

PCB Dimensions

Diameter 6.5” (165.1mm)

Thickness 0.062” (1.6mm)

Height w/ components 1.5” (38.1mm)

Environmental

Operating Temperature -40°…+85°C (function of crystal oscillator affected outside –10°C to +60°C)

Storage Temperature -40°C…+100°C

Power Supply

Using internal AC supply 240V…700V RMS

DC Input Voltage (powered from DC supply) 5VDC 0.5V

Supply Current 25mA typical

Input Signal Range

AC Voltage Signals (VA, VB, VC) 0…240V RMS

AC Current Signals (IA, IB, IC) from CT 0…0.25V p/p (176mV RMS)

Interface Connectors

DC Supply Jack (J1) to Wall Transformer Concentric connector, 2.5mm

Emulator (J14 and J17) 10x2 header, 0.05” pitch and 6x1 header, 0.1” pitch

Voltage Input Signals Spade terminals on PCB bottom

Current Input Signals 0.1” headers on PCB bottom

USB-Serial Adapter (J2) 8x2 header, 0.1” pitch

SPI Interface 5x2 header, 0.1” pitch

Functional Specification

Program Memory 128KByte FLASH memory

NV memory 1Mbit serial EEPROM

Time Base Frequency 32.768kHz, 20PPM at 25°C

Time Base Temperature Coefficient -0.04PPM/°C2 (max)

Controls and Displays

Reset Push-button (SW2)

PB Push-button (SW3)

Numeric Display 8-digit LCD, 14-segments per digit

“Watts” red LED (D5)

“VARS” red LED (D6)

Measurement Range

Voltage 120…700 V rms (resistor division ratio 1:3,398)

Current 1.7 termination for 2,000:1 CT input (208A)



4 APPENDIX

This appendix includes the following documentation, tables and drawings:

71M6533-DB Demo Board Description

71M6533-DB Demo Board Electrical Schematic

71M6533-DB Demo Board Bill of Materials

71M6533-DB Demo Board PCB layers (copper, silk screen, top and bottom side)

71M6533-DB Demo Board Electrical Schematic

71M6533/71M6533H IC Description

71M6533/71M6533H Pin Description

71M6533/71M6533H Pin-out

4


Page: 60 of 75 REV 3

4.1 71M6533-DB DEMO BOARD ELECTRICAL SCHEMATIC

Figure 4-1: 71M6533-DB Demo Board: Electrical Schematic 1/3

R6

100, 2W

+C12200uF, 16V

R7

130

+C210UF, 6.3V

R4

25.5K

R2

8.06K

R101

100K

1 2

JP13

VBAT

1 2

JP14

R100

100K

GNDVBAT

R102

100K

1 2

JP15

GNDVBAT

V3P3

GND

R141100, 2W

R1391.5

NEUTRAL

L15

Ferrite Bead 600ohm

R10

62

GND

R11

62

R12

62

UART_TX

R9

68.1

6.8V, 1W

NEUTRAL

*

Wednesday, March 26, 2008

SELECTION

ON BOARD SUPPLY

EXT 5Vdc SUPPLY THRU J1

EXT 5Vdc SUPPLY THRU

DEBUG BOARD

POWER SUPPLY SELECTION TABLE

PS_SEL[0] (JP1)

IN

OUT

OUT

123

J1

RAPC712

1

G3

1

G6

UART_RX

DIO56

DIO58DIO57

TMUXOUTCKTEST

UART_TX

* = 1206 PACKAGE

*

*

L1

Ferrite Bead 600ohm

GNDFooting holes

V3P3

C4630nF, 1000VDC

DEBUG CONNECTOR

1

J4

VA_IN

VA_IN

VA_IN

VBAT

RV1VARISTOR

1 2JP1

PS_SEL[0]

1 23 45 67 89 1011 1213 1415 16

J2

HEADER 8X2

DIO56DIO58

GNDGND

GNDGND

DIO57VBATCKTEST_T

UART_TX_TTMUXOUT_T

UART_RX

5Vdc EXT SUPPLY

12

TP8CKTEST

Title

Size Document Number Rev

Date: Sheet of

D6533T14A3 3.0

71M6533-4L-DB Neutral Current Capable

B

1 3

+C410uF, 6.3V

C50.1uF

TMUXOUT

OFF PAGE

OUTPUTS

C421000pF

OFF PAGE

INPUTS

61

8 U6

TL431

D4

1N4148

12

D3

1N4736A

C6

0.47uF, 1000VDC




R144

0

ICP_IN

ICN_IN

R133

0

R65

100, 2W

R353.4

L6Ferrite Bead 600ohm

L7Ferrite Bead 600ohm C23

1000pF

ICP

R363.4

R23 750

ICN

C121000pF

V3P3

12

J7

IC_IN*

*

*

V3P3

R54 750

V3P3

IDN_IN

IDP_IN

R138

0

R373.4



V3P3

R453.4

12

J10

ID_IN

ICP_IN

*

**

12

J21

IC

OFF PAGE

OUTPUTS

R142

0

IAN_IN

IAP_IN

VA_IN

R131

0

R253.4

VB_IN

L3

Ferrite Bead 600ohm




L12

Ferrite Bead 600ohm

R143

0

IDP_IN

ICN_IN

V3P3

C91000pF

IDP

VC_IN

NEUTRAL

IDN

C111000pF

C141000pF

C131000pF

IAN

VC_IN

IAP

VA

IDN_IN

VBVC

IAPIBPICP

C44NC

V3P3

R243.4

R14750

IBN

IAN

GND

12

J19

IA

ICN

R72750

VC

C81000pF

*

V3P3

V3P3

RV2VARISTOR

V3P3

*

RV3VARISTOR

IAP_IN

*

R55750

R56750

C85NC

OFF PAGE

INPUTS

GND

GND

C82NC

IAN_IN12

J3

IA_IN

C71

NC

R73

100, 2W

C72

NC

VB_IN

IBP_IN

NEUTRAL

C73

NC

R140

0

C74

NC

C75NC

NEUTRAL

C76NC

VOLTAGE

CONNECTIONS

GND

C47NC

C77

NC

12

J20

IB

VA_IN

R32750

VA

R15

220K

CURRENT

CONNECTIONS

GND

C78NC

IBN_IN

R52750

V3P3

R81

10K

VB

C321000pF

IDP

IDN

R53 750

V3P3

C331000pF

12

J22

ID

R57750

R89

10K

R9010K

1

J9

NEUTRAL

12

TP2

VA

C83NC

GND

C151000pF

GND

NEUTRAL

R82

10K

*

C84NC

GND

* *

V3P3

* = 1206 PACKAGE

R84

10K

R31

4.7K

R30

120K

NEUTRAL

R16

220K

R19

220K

R18

220K

R17

220K

C48NC

R20

220K

R21

220K

R27

220K

R26

220K

R29

220K

R28

220K

R47

220K

R42

220K

R43

220K

R44

220K

R51

4.7K

R48

220K

R41

220K

1

J6

VB_IN

R85

10K

R38

220K

R39

220K

R50

120K

R40

220K

R49

220K

IBP_IN

IBN_IN

R46

220K

R132

0

R333.4

12

TP6

VC

R71

4.7K

R67

220K


R62

220K

V3P3

1

J8

VC_IN

L5

Ferrite Bead 600ohm

R63

220K

R64

220K

12

TP4

VB

C161000pF

R68

220K

R61

220K

V3P3

R70

120K

IBP

R58

220K

R343.4

R59

220K

R60

220K

R22750

R69

220K

IBN

R66

220K

C101000pF

V3P3

12

J5

IB_IN

GND

R87

10K

*

**

Title


Date: Sheet of

D6533T3A3 3.0


B

2 3Thursday, March 27, 2008

R8810K

*




Title


Date: Sheet of

D6533T3A3 3.0


B

3 3Thursday, March 27, 2008

OPT

_TX

V3P3

VB

UART_RX

TP1TP

SEG28/DIO08

123

TP10

V1

GND

C61

22pF

RXTX

VC

GND

Note: Populate J14 or

J17 but not both.

IBN

PSDO

OPT_RX

TM

UX

OU

T

SEG

30

/DIO

10

SEG35/DIO15

SEG35/DIO15

C62

22pF

C431000pF

V3P3V3P3

SEG

17

GND

R79

100

OPT_RX

GND

A01

A12

A23

GND4

SDA5SCL6WP7VCC8

U4

SER EEPROM

VBAT

OPT_TX

C20

0.1uF

E_RST

GND

OPT_TX_OUT

UAR

T_

TX

C49

1000pF

C63

22pF

XOUT

R8620.0K 1%

R83 16.9K 1%

GND

GND

GND

PCLK

GND

123456

J17

ICE Header

C64

22pF

SEG02

SEG

38

/DIO

18

PC

LK

GND

ICP

SEG28/DIO08

SEG

18

R75

0

TP15TP

C53100pF C69

1000pF

TP16TP

V3P

3D

ICE_EN

SEG

26

/DIO

06

123

JP16

BAT_MODE

PCSZ

C701000pF

SEG00

GND

RESET

C26

NC

SEG26/DIO06

R9962

SEG49/DIO29

TCLK

PC

SZ

CKT

EST

R1

1K

SEG

43

/DIO

23

XOUT

UART_RX

R107

10K

123

JP20

UART_TX

PULSE OUTPUT

TMUXOUTCKTEST

OFF PAGE

OUTPUTS

VBAT

R113

100

SEG12

SEG

27

/DIO

07

ICN

SEG37/DIO17

C361000pF

VBAT

C27

22pF

DIO

56

SEG36/DIO16

OFF PAGE

INPUTS

GND

IDP

GND

GND

C791000pF

VAVB

ICP

VC

IAPIBP

V1

ICE

_E

N

D5

D6

R76

10K

Note: Place

C31, L14, C21

close to IC

(U5)

Note: Place

C24, C25, Y1

close to IC

(U5)

VBAT

R77

NC

PB

DIO56

C57

1000pF

DIO57DIO58

GN

D

C801000pF

123

JP8

VBAT

SEG20

IAN

12345

J12

OPT IF

SEG

39

/DIO

19

GND

+

C45

10uF

VBAT

IAP

XIN

C811000pF

VBAT

C501000pF

IDP

SEG

20

GND

IBN

R91

1K

GN

DD

1

SEG

9/E

_R

XT

X2

DIO

2/O

PT

_T

X3

TM

UX

OU

T4

TX

5

SEG

3/P

CL

K6

V3P

3D

7

SEG

19

/CK

TE

ST

8

V3P

3S

YS

9

SEG

4/P

SD

O1

0

SEG

5/P

CS

Z1

1

SEG

37

/DIO

17

12

SEG

38

/DIO

18

/MTX

13

DIO

56

14

DIO

57

15

DIO

58

16

DIO

31

7

CO

M0

18

CO

M1

19

CO

M2

20

CO

M3

21

SEG

67

/DIO

47

22

SEG

68

/DIO

48

23

SEG

69

/DIO

49

24

SEG

70

/DIO

50

25

SEG0026SEG0127SEG0228SEG34/DIO1429SEG35/DIO1530SEG64/DIO4431SEG49/DIO2932SEG36/DIO1633SEG6/PSDI34SEG50/DIO3035SEG07/MUX_SYNC36SEG0837SEG65/DIO4538GNDD39SEG63/DIO4340SEG47/DIO2741SEG46/DIO2642SEG45/DIO2543SEG33/DIO1344SEG1245SEG44/DIO2446SEG1347SEG1448SEG1549SEG71/DIO5150

SEG

16

51

SEG

17

52

SEG

18

53

SEG

43

/DIO

23

54

ICE

_E

55

SEG

20

56

SEG

21

57

SEG

22

58

SEG

23

59

SEG

24

/DIO

4/S

DC

K6

0S

EG

25

/DIO

5/S

DA

TA

61

SEG

26

/DIO

6/W

PU

LS

E6

2S

EG

27

/DIO

7/R

PU

LSE

63

SEG

39

/DIO

19

64

SEG

40

/DIO

20

65

SEG

41

/DIO

21

66

SEG

28

/DIO

8/X

PU

LSE

67

SEG

29

/DIO

9/Y

PU

LSE

68

SEG

30

/DIO

10

69

SEG

31

/DIO

11

70

RX

71

VBA

T7

2V

2P

57

3R

ES

ET

74

GN

DD

75

GNDA76

V3P3A77

VC78

VB79

VA80

IDN81

IDP82

ICN83

ICP84

IBN85

IBP86

IAN87

IAP88

VREF89

V190

DIO1/OPT_RX91

GNDD92

XIN93

TEST94

XOUT95

NC96

PB97

SEG11/E_RST98

SEG61/DIO4199

SEG10/E_TCLK100

U5

6533-100TQFP

SEG

37

/DIO

17

C17

0.1uF

DIO

57

C190.1uF

GN

D

GN

D

TP14TP

TP13TP

SEG18

C511000pF

RES

ET

R31K

VBAT

GND

C21

100pF

C30

22pF

R78

1K

V3P

3

GND

SEG63/DIO43

VBAT

GND

SEG

40

/DIO

20

IDN

C521uF

Y1

32.768KHZ

ICN

VREFD

IO58

SEG

21

GN

D

GN

D

SEG16

RST_EMUL

GND

GND

C31

22pF

CKTEST

V2P

5

R103

10K

GND

1 2

TP20

1 2

TP21

PSD

O

GND

SEG

41

/DIO

21

SEG24/DIO04

C24

33pF

SW3

RESET

IDN

Note: C53

and R107

should be

close to the

IC

GND

RXTX

E_RST

R9862

VBAT

SEG07

PSDI

E_RXTX

E_TCLK

R9762

C25

15pF

IBP

TCLKRST_EMUL

123

JP19

12345678910

11121314151617181920

J14

HEADER 10X2

SEG

22

GND

SEG14R74

10K

V3P3

V3P3

SEG27/DIO07

VBA

T

C28

0.1uF

V2P5

GND

R111

0

C220.1uF

C29

NC

SEG13


SEG

28

/DIO

08

SEG25/DIO05

GND

R10510K

R104

10K

ICE_ENDIO

03

GND

SEG12

V3P3D

SEG

23

R108

1K

XIN

SEG30/DIO10

Note: Place

C29, R78

close to IC

(U5)

OPT_TX

TP17

VREF

E_TCLK

SEG29/DIO09

1 23 45 67 89 10

J18

SPI Inter face

VA

VBAT

UAR

T_

RX

C18

0.1uF

SEG08

CO

M0

C55100pF

R109

10K

IAN

SEG33/DIO13

SEG

29

/DIO

09

R110

0

123

JP6

HEADER 3

VBAT

GNDDIO03

SEG63/DIO43

SERIAL EEPROM

OPTICAL I/F

SEG

24

/DIO

04

SEG40/DIO20

R106

5K

V3P3GND

GN

D

COM2

GND

SEG64/DIO44

SEG31/DIO11

SEG34/DIO14

SEG01

SEG38/DIO18

CO

M1

COM31

-,1F,1E,1D2

33

-,2F,2E,2D4

55

-,3F,3E,3D6

77

-,4F,4E,4D8

99

-,5F,5E,5D10

1111

-,6F,6E,6D12

1313

-,7F,7E,7D14

1515

-,8F,8E,8D16

1717

COM218

COM0198A,8B,8C,8DP2021217A,7B,7C,7DP2223236A,6B,6C,6DP2425255A,5B,5C,5DP262727

4A,4B,4C,4DP2829293A,3B,3C,3DP3031312A,2B,2C,2DP3233331A,1B,1C,1DP343535COM136

U8VIM-828-DP

SEG65/DIO45

SEG41/DIO21

SEG22

COM3

SEG17

SEG28/DIO08

SEG39/DIO19

SEG07

SEG13

SEG33/DIO13

SEG15

SEG65/DIO45

GND

COM1

SEG43/DIO23

SEG49/DIO29

EMULATOR I/F

COM0

LCD

123

JP7

ICE_EN

SEG02

SW2

RESET

GNDC

OM

2

SEG08

SEG64/DIO44

SEG23

SEG

25

/DIO

05

PSDI

VBAT

CO

M3

SEG01

SEG15

E_R

XTX

C30.1uF

SEG

31

/DIO

11

SEG34/DIO14

V3P

3

SEG36/DIO16

GND

SEG21

SEG

16

C54

NC

SEG00

SEG14



4.2 71M6533-DB DEMO BOARD BILL OF MATERIAL

Table 4-1: 71M6533-DB Demo Board: Bill of Material

Item Q Reference Part

PCB

Footprint

Digi-Key/Mouser Part

Number Part Number Manufacturer

1 1 C1 2200uF radial P5143-ND ECA-1CM222 Panasonic

2 3 C2,C4,C45 10uF RC1812 478-1672-1-ND TAJB106K010R AVX

3 8 C5,C17-C20,C22,C28,C29 0.1uF RC0603 445-1314-1-ND C1608X7R1H104K TDK

4 1 C6 0.47uF B1918-ND 2222 383 30474 Vishay

5 29 C8-C13,C15,C23,C33-C44 1000pF RC0603 445-1298-1-ND C1608X7R2A102K TDK

C47-C51, C56-C59

6 3 C21,C32,C54 NC RC0603

7 1 C24 33pF RC0603 445-1275-1-ND C1608C0G1H330J TDK

8 1 C25 7pF RC0603 490-3564-1-ND GQM1885C1H7R0CB01D Murata

9 13 C26,C27,C31,C60-C68 22pF RC0603 445-1273-1-ND C1608C0G1H220J TDK

10 1 C46 0.03uF axial 75-125LS30-R 125LS30-R Vishay

11 1 C52 1uF RC0603 PCC2224CT-ND ECJ-1VB1C105K Panasonic

12 2 C53,C55 100pF RC0603 445-1281-1-ND C1608C0G1H101J TDK

13 1 D1 UCLAMP3301D SOD-323 -- UCLAMP3301D.TCT SEMTECH

14 1 D3 6.8V ZENER D041 1N4736ADICT-ND 1N4736A-T DIODES

15 1 D4 Switching Diode D035 1N4148DICT-ND 1N4148-T DIODES

16 2 D5,D6 LED radial 404-1104-ND H-3000L Stanley

17 1 D8 NC SOD-323

18 1 J1 DC jack (2.5mm) RAPC712 502-RAPC712X RAPC712X Switchcraft

19 1 J2 HEADER 8X2 8X2PIN S2011E-36-ND PZC36DAAN Sullins

20 4 J3,J5,J7,J16 HEADER 2 2X1PIN S1011E-36-ND PZC36SAAN Sullins

21 4 J4,J6,J8,J9 Spade Terminal A24747CT-ND 62395-1 AMP

22 1 J10 DUAL ROW 12X2 PIN MALE 12X2PIN 929665-09-12-ND 3M

23 1 J11 DUAL ROW 12X2 PIN FEMALE 12X2PIN S7115-ND PPPC122LFBN-RC Sullins

24 1 J12 HEADER 5 5X1PIN S1011E-36-ND PZC36SAAN Sullins


26 1 J14 10X2 CONNECTOR, 0.05" 571-5-104068-1 5-104068-1 AMP


28 1 J18 HEADER 5X2 5X2PIN S2011E-36-ND PZC36DAAN Sullins

29 6 JP1,JP13,JP14,JP15,JP17,JP18 HEADER 2 2X1PIN S1011E-36-ND PZC36SAAN Sullins

30 5 JP6,JP7,JP8,JP16,JP19,JP20 HEADER 3 3X1PIN S1011E-36-ND PZC36SAAN Sullins

31 1 JP12 HEADER 9 9X1PIN S1011E-36-ND PZC36SAAN Sullins

32 17 L1-L9,L11-L18 Ferrite bead, 600 Ohm RC0805 445-1556-1-ND MMZ2012S601A TDK

33 3 RV1,RV2,RV3 VARISTOR radial 594-2381-594-55116 238159455116 Vishay

34 1 R2 8.06K, 1% RC0805 311-8.06KCRCT-ND RC0805FR-078060KL Yageo

35 1 R4 25.5K, 1% RC0805 311-25.5KCRCT-ND RC08052FR-072552L Yageo

36 4 R6,R65,R73,R141 100, 2W axial 100W-2-ND RSF200JB-100R Yageo

37 1 R7 130, 1% RC1206 311-130FRCT-ND RC1206FR-071300L Yageo

38 1 R9 68, 1% RC1206 311-68.0FRCT-ND RC1206FR-0768R0L Yageo

39 11 R10,R11,R12,R90,R92,R93, 62 RC0805 P62ACT-ND ERJ-6GEYJ620V Panasonic

R95,R96,R97,R98,R99

40 7 R14,R32,R34,R52,R53,R72, 750, 1% RC0805 P750CCT-ND ERJ-6ENF7500V Panasonic

R135

41 33 R15-R21,R26-R29,R38-R44, 220K, 1% RC0805 311-220KCRCT-ND RC0805FR-07220KL Yageo

R46-R49,R58-R64,R66-R69

42 8 R24,R25,R36,R37,R56,R57 3.4, 1% RC1206 311-3.40FRCT-ND RC1206FR-073R40L Yageo

R136,R137

43 3 R30,R50,R70 120K, 1% RC0805 311-120KCRCT-ND RC0805FR-071203L Yageo

44 3 R31,R51,R71 4.70K, 1% RC0805 311-4.70KCRCT-ND RC0805FR-074701L Yageo

45 9 R74,R76,R80,R103,R104,R105, 10K RC0805 P10KACT-ND ERJ-6GEYJ103V Panasonic

R106,R107

46 2 R75,R94 0 RC0805 P0.0ACT-ND ERJ-6GEY0R00V Panasonic

47 1 R77 NC RC0805

48 4 R78,R91,R108,R111 1K RC0805 P1.0KACT-ND ERJ-6GEYJ102V Panasonic

49 2 R79, R110 100 RC0805 P100ACT-ND ERJ-6GEYJ101J Panasonic

50 1 R83 16.9K, 1% RC0805 P16.9KCCT-ND ERJ-6ENF1692V Panasonic

51 1 R86 20.0K, 1% RC0805 P20.0KCCT-ND ERJ-6ENF2002V Panasonic

52 3 R100,R101,R102 100K RC0805 P100KACT-ND ERJ-6GEYJ104V Panasonic

53 4 R131,R132,R133,R134 0 RC1206 P0.0ECT-ND ERJ-8GEY0R00V Panasonic

54 1 R139 1.5 RC1206 P1.5ECT-ND ERJ-8GEYJ1R5V Panasonic

55 1 SW2,SW3 SWITCH P8051SCT-ND EVQ-PJX05M Panasonic

56 10 TP1-TP8,TP20,TP21 TP 2X1PIN S1011E-36-ND PZC36SAAN Sullins

57 1 TP10 TP 3X1PIN S1011E-36-ND PZC36SAAN Sullins

58 4 TP13-TP16 Test Point 5011K-ND 5011 Keystone 1)

60 3 U1,U2,U3,U7 BAV99DW SOT363 BAV99DW-FDICT-ND BAV99DW-7-F DIODES

61 1 U4 SER EEPROM SO8 AT24C256BN-10SU-1.8-ND AT24C256BN-10SU-1.8 ATMEL

62 1 U5 71M6533 100TQFP -- 71M6533-IGT TERIDIAN

63 1 at U5 100TQFP Socket 100TQFP -- IC149-100-154B51 Yamaichi

64 1 U6 REGULATOR, 1% SO8 296-1288-1-ND TL431AIDR Texas Instruments

65 1 Y1 32.768kHz XC1195CT-ND ECS-.327-12.5-17X-TR ECS

66 1 U8 LCD, 3.3V 153-1110-ND VIM-828-DP5.7-6-RC-S-LV VARITRONIX 2)



4.3 71M6533-DB DEMO BOARD PCB LAYOUT

Figure 4-4: 71M6533-DB Demo Board: Top View



Figure 4-5: 71M6533-DB Demo Board: Top Copper



Figure 4-6: 71M6533-DB Demo Board: Middle Layer 1 (Ground Plane)



Figure 4-7: 71M6533-DB Demo Board: Middle Layer 2 (Supply Plane)



Figure 4-8: 71M6533-DB Demo Board: Bottom Copper



Figure 4-9: 71M6533-DB Demo Board: Bottom View



4.4 71M6533 PIN-OUT INFORMATION

Power/Ground/NC Pins:

Name Type Pin # Description

GNDA P 76 Analog ground: This pin should be connected directly to the ground plane.

GNDD P 1, 39, 75, 92

Digital ground: This pin should be connected directly to the ground plane.

V3P3A P 77 Analog power supply: A 3.3V power supply should be connected to this pin. V3P3A must be the same voltage as V3P3SYS.

V3P3SYS P 9 System 3.3V supply. This pin should be connected to a 3.3V power supply.

V3P3D P 7 Auxiliary voltage output of the chip, controlled by the internal 3.3V selection switch. In mission mode, this pin is internally connected to V3P3SYS. In BROWNOUT mode, it is internally connected to VBAT. This pin is floating in LCD and sleep mode.

VBAT P 72 Battery backup power and oscillator supply. A battery or super-capacitor is to be connected between VBAT and GNDD. If no battery is used, connect VBAT to V3P3SYS.

V2P5 O 73 Output of the internal 2.5V regulator. A 0.1µF capacitor to GNDA should be connected to this pin.

Table 4-2: 71M6533/71M6533H Pin Description Table 1/3

Analog Pins:

Name Type

Pin # Description

IAP/IAN, IBP/IBN, ICP/ICN, IDP/IDN

I

88,87, 86,85, 84,83, 82,81

Differential Line Current Sense Inputs: These pins are voltage inputs to the internal A/D converter. Typically, they are connected to the outputs of current sensors. Unused pins must be tied to V3P3A. IDP/IDN are additional Line Current Sense Input pins.

VA, VB, VC

I 80, 79, 78

Line Voltage Sense Inputs: These pins are voltage inputs to the internal A/D converter. Typically, they are connected to the outputs of resistor dividers. Unused pins must be tied to V3P3A.

V1 I 90

Comparator Input: This pin is a voltage input to the internal comparator. The voltage applied to the pin is compared to an internal BIAS voltage (1.6V). If the input voltage is above the reference, the comparator output will be high (1). If the comparator

output is low, a voltage fault will occur. A series 5k resistor should be connected from V1 to the resistor divider.

VREF O 89 Voltage Reference for the ADC. This pin should be left unconnected (floating).

XIN XOUT

I 93, 95

Crystal Inputs: A 32kHz crystal should be connected across these pins. Typically, a 33pF capacitor is also connected from XIN to GNDA and a 15pF capacitor is connected from XOUT to GNDA. It is important to minimize the capacitance bet-ween these pins. See the crystal manufacturer datasheet for details.




Digital Pins:


COM3, COM2, COM1, COM0

O

21, 20, 19, 18

LCD Common Outputs: These 4 pins provide the select signals for the LCD display.

SEG0…SEG2, SEG12,

SEG13…SEG15, SEG16…SEG18, SEG20…SEG23,

DIO3, DIO56…DIO58

O

26-28, 45 47-49,

51-53 56-59, 17,

14-16

Dedicated LCD Segment Outputs.

SEG24/DIO4 …

SEG31/DIO11, SEG33/DIO13

… SEG41/DIO21, SEG43/DIO23


… SEG50/DIO30, SEG61/DIO41, SEG63/DIO43


… SEG71/DIO51

I/O

Multi-use pins, configurable as either LCD SEG driver or DIO. (DIO4 = SCK, DIO5 = SDA when configured as EEPROM interface, WPULSE = DIO6, VARPULSE = DIO7, DIO8 = XPULSE, DIOO9 = YPULSE when configured as pulse outputs). Unused pins must be configured as outputs or tied to V3P3D or GNDD.

SEG3/PCLK SEG4/PSDO SEG5/PCSZ SEG6/PSDI

I/O

6, 10, 11, 34

Multi-use pins, configurable as either LCD segment driver or SPI PORT.

E_RXTX/SEG9 I/O

2, 98 Multi-use pins, configurable as either emulator port pins (when ICE_E pulled

high) or LCD SEG drivers (when ICE_E tied to GND). E_RST/SEG11

E_TCLK/SEG10 O 100

ICE_E I 55 ICE enable. When low, E_RST, E_TCLK, and E_RXTX become LCD segment pins. For production units, this pin should be pulled to GND to disable the emulator port.

CKTEST/SEG19, MUXSYNC/SEG7

O 8, 36

Multi-use pins, configurable as either Clock PLL/multiplexer control outputs or LCD segment drivers. CKTEST can be enabled and disabled by CKOUT_EN.

TMUXOUT O 4 Digital output test multiplexer. Controlled by DMUX[3:0].




OPT_RX/DIO1 I/O 91

Multi-use pin, configurable as either Optical Receive Input or general DIO. When configured as OPT_RX, this pin is a regular UART RX pin. If this pin is unused it must be configured as an output or tied to V3P3D or GNDD.

OPT_TX/DIO2 I/O 3 Multi-use pin, configurable as either Optical LED Transmit Output. When configured as OPT_TX, this pin is capable of directly driving an LED for transmitting data in an IR serial interface.

RESET I 74

Chip reset: This input pin is used to reset the chip into a known state. For normal operation, this pin is pulled low. To reset the chip, this pin should be pulled high. This pin has an internal 30μA (nominal) current source pull-down. No external reset circuitry is necessary.

RX I 71 UART input. If this pin is unused it must be configured as an output or tied to V3P3D or GNDD.

TX O 5 UART output.

TEST I 94 Enables Production Test. This pin must be grounded in normal operation.

PB I 97 Push button input. Should be at GND when not active. A rising edge sets the IE_PB flag. It also causes the part to wake up if it is in SLEEP or LCD mode. PB does not have an internal pull-up or pull-down resistor.


Pin types: P = Power, O = Output, I = Input, I/O = Input/Output



1

Teridian

71M6533

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

75

74

73

72

71

70

69

68

67

66

65

64

63

62

61

91

92

93

94

95

96

97

98

99

10

02

6

27

28

29

30

51

52

53

54

55

56

57

58

59

60

90

89

88

87

86

85

84

83

82

81

80

79

78

77

76

SEG38/DIO18/MTX

SEG9/E_RXTXGNDD

TMUXOUT

SEG37/DIO17

TXSEG3/PCLK

V3P3DSEG19/CKTEST

SEG4/PSDOSEG5/PCSZ

DIO2/OPT_TX

V3P3SYS

DIO3

COM1COM2COM3

COM0

DIO57DIO58

DIO56G

ND

D

SE

G1

4S

EG

13

SE

G1

2

SE

G7

/MU

X_

SY

NC

SE

G8

SE

G5

0/D

IO3

0S

EG

6/P

SD

IS

EG

36

/DIO

16

SE

G4

9/D

IO2

9

SE

G2

/TE

ST

2S

EG

1/T

ES

T1

SE

G1

5

SE

G0

/TE

ST

0

SE

G6

5/D

IO4

5

SE

G4

4/D

IO2

4

SE

G4

5/D

IO2

5

SE

G4

7/D

IO2

7S

EG

46

/DIO

26

SE

G3

3/D

IO1

3

SE

G6

3/D

IO4

3

SE

G6

4/D

IO4

4

SEG16

SEG27/DIO7/RPULSESEG39/DIO19

SEG26/DIO6/WPULSESEG25/DIO5/SDATA

SEG29/DIO9/YPULSE

RXSEG31/DIO11

GNDDRESETV2P5VBAT

SEG24/DIO4/SDCKSEG23SEG22

SEG28/DIO8/XPULSESEG41/DIO21SEG40/DIO20

ICE_E

SEG18SEG17

SEG30/DIO10

SEG20SEG21

SEG43/DIO23V

BV

CV

3P

3A

GN

DA

VA

PB

NC

XO

UT

TE

ST

XIN

DIO

1/O

PT

_R

XV

1

ICN

VR

EF

IAP

IBN

ICP

GN

DD

SE

G1

1/E

_R

ST

SE

G1

0/E

_T

CL

KS

EG

61/D

IO4

1

IAN

IBP

IDP

SE

G3

5/D

IO1

5S

EG

34

/DIO

14

SEG67/DIO47SEG68/DIO48SEG69/DIO49SEG70/DIO50

SE

G7

1/D

IO5

1

IDN

Figure 4-10: 71M6533/71M6533H epLQFP100: Pin Out (top view)



5 REVISION HISTORY Revision Date Description

1.0 1-30-2008 Initial release

1.1 2-5-2008

Updated copyright date in footers. Added text stating that no jumper should be across VBAT and OPT_TX_OUT (J12) and updated Figure 3-1. Updated pin description tables. Corrected Figure 2-9, added load line graph for differential mode.

1.2 2-25-2008 Updated to include Demo Board revision DB6533T14A3 and new pin-out arrangement of 71M6533. Updated Calibration Procedures section.

2.0 6-13-2011

Replaced Teridian logo with Maxim logo in headers. Removed list of Application Notes from section 2.6.

Added information on the USB-to-Serial Adapter.

2.1 9-26-2011 Corrected calculation and address for WRATE on page 23.

Intermediate revision (not published).

3 7-31-2012

Removed references to TGP1 Gang Programmer (no longer supported) and to Debug Board (replaced by USB-Serial Adapter).

Changed naming conventions (71M6533-DB). Corrected name for TFP2. Removed references to 71M6533H (the 71M6533-DB is shipped with the 71M6533).

Updated Figure 2-9.

Added comments on the use of ferrites and reference to Application Note AN-5292 (2.4.7).

Added Battery-Mode Commands in section 1.8.1.

71m6533-db demo board - maxim integrated · alone (round) meter demo board and an optional debug...

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