8 7 6 5 4 3 2 1 fino m33 -...

TABLE_TABLEOFCONTENTS_ITEM
























ANGLES

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

DATE

APPDENG

DATE

APPDCK

ECNZONEREV

DO NOT SCALE DRAWING

X.XXX

X.XX

XX

DIMENSIONS ARE IN MILLIMETERS

THIRD ANGLE PROJECTIOND

SIZE

APPLICABLENOTED AS

MATERIAL/FINISH

NONE

SCALE

DESIGNER

MFG APPD

DESIGN CK

RELEASE

QA APPD

ENG APPD

DRAFTER

METRIC

OFSHT

DRAWING NUMBER

TITLE

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PARTII NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

Apple Computer Inc.

12345678

12345678

B

C

D

A

B

C

D

A

REV.

DESCRIPTION OF CHANGE







































TABLE_TABLEOFCONTENTS_HEADTABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEMTABLE_TABLEOFCONTENTS_ITEM

























FINO M335/19/05

Shasta Serial / Misc24 05/19/200518 FINO-ME

051-6863

SCH,MLB,FINO,M33

07 ENGINEERING RELEASED381758 05/19/05 ?

1 154

07

63 05/19/2005FINO-EG45 MEMORY ADDR BRANCHING

1.5V Vreg12 05/19/200510 FINO-PC

CPU VCORE MORE BYPASS52 05/19/200537 FINO-MS

CPU VCORE VREG50 05/19/200536 M33-MS

PROC DECOUPLING49 05/19/200535 FINO-MS

CPU POWER AND BYPASS48 05/19/200534 FINO-MS

CPU STRAPS47 05/19/200533 FINO-MS

KODIAK EI B44 05/19/200532 Q63

CPU EI AND IO43 05/19/200531 FINO-MS

KODIAK EI A42 05/19/200530 Q63

KODIAK EI PWR & CAPS41 05/19/200529 Q63

I2C Connections39 05/19/200528 FINO-ME

Fan 2 & HD Temp33 05/19/200527 FINO-PC

Fan 0, 1 & System Temp32 05/19/200526 FINO-PC

SMU SUPPLEMENTAL (4)31 05/19/200525 FINO-MS



System Management Unit28 05/19/200522 Q63

Pulsar Aliases27 05/19/200521 FINO-ME

PULSAR2 CLOCKS26 05/19/200520 FINO-ME

103 05/19/2005Q6365 Shasta HyperTransport

Shasta Core Power23 05/19/200517 Q63

KODIAK & SHASTA MISC20 05/19/200516 FINO-ME

KODIAK CORE & BYPASS19 05/19/200515 Q63

Vesta Core / Misc17 05/19/200514 FINO-HC

5V & 3.3V Fets16 05/19/200513 FINO-PC

2.5V Vreg15 05/19/200512 FINO-PC

1.2V Vreg13 05/19/200511 FINO-PC

1.8V VREG11 05/19/20059 M33-PC

FUNC TEST 2 OF 29 05/19/20058 FINO-ME

Signal Alias8 05/19/20057 FINO-DD

POWER CONN / ALIAS7 05/19/20056 M33-PC

FUNC TEST 1 OF 26 05/19/20055 FINO-ME

Table Items5 05/19/20054 FINO-DD

Power Block Diagram4 05/19/20053 FINO-PC

130 05/19/2005FINO-HC73 ENET SERIES TERM

129 05/19/2005M33-MB72 Disk Connectors

127 05/19/2005M33-MB71 Shasta Disk

125 05/19/2005Q6370 BootROM

122 05/19/2005Q6369 USB 2.0 PCI Interface

121 05/19/2005FINO-EG68 AIRPORT & BLUETOOTH

120 05/19/2005FINO-EG67 PCI SERIES TERMINATION

119 05/19/2005Q6366 Shasta PCI Interface

PULSAR2 POWER25 05/19/200519 Q63

98 05/19/2005Q6363 KODIAK HT16

97 05/19/2005FINO-DD62 KODIAK PCI-E CONST

96 MASTERM33-DD61 TMDS / ExtVGA

93 05/19/2005FINO-DD60 GPU DVI & DACs

92 05/19/2005FINO-DD59 GPU Straps

91 MASTERM33-DD58 FB Parallel Termination

90 05/19/2005FINO-DD57 GPU GDDR SDRAM B

89 05/19/2005FINO-DD56 GPU GDDR SDRAM A

88 05/19/2005FINO-DD55 FB Series Termination

87 05/19/2005FINO-DD54 GPU Frame Buffer

86 05/19/2005FINO-DD53 GPU Core Power

85 MASTERM33-DD52 Graphics Vregs

84 05/19/2005FINO-DD51 GPU PCIe

82 05/19/2005Q6350 KODIAK PCI-E X16

70 05/19/2005FINO-RT49 On-Board DDR SDRAM

69 05/19/2005FINO-RT48 On-Board DDR SDRAM

68 05/19/2005FINO-RT47 MLB Mem Series Term

67 05/19/2005FINO-RT46 Memory Dimm A

62 05/19/2005FINO-RT44 Main Memory Clock Buffer

61 05/19/2005FINO-RT43 Parallel Term

59 05/19/2005FINO-RT42 Kodiak Memory Dq/Ctl

58 05/19/2005Q6341 KODIAC NBMEM PWR & CAPS

56 05/19/2005FINO-MS40 CPU ALIASES & MISC

101 05/19/2005FINO-EG64 HT ALIASES

55 05/19/2005FINO-MS39 T,V,I SENSORS

89 FINO-SO 05/19/2005154 AUDIO: POWER SUPPLIES

88 FINO-SO 05/19/2005153 AUDIO: CONNECTORS

87 FINO-SO 05/19/2005152 AUDIO: SPEAKER AMP

86 FINO-SO 05/19/2005150 AUDIO: LINE OUT AMP

85 FINO-SO 05/19/2005148 AUDIO: LINE INPUT AMP

84 FINO-SO 05/19/2005147 AUDIO: CODEC

83 FINO-PC 05/19/2005145 Flash Connector

82 FINO-PC 05/19/2005144 Flash Media Ctrl

81 FINO-MB 05/19/2005143 USB Device Interfaces

80 Q63 05/19/2005142 USB Host Interfaces

79 FINO-HC 05/19/2005140 FIREWIRE CONNECTORS

78 Q63 05/19/2005139 Vesta FireWire PHY

77 Q63 05/19/2005138 Shasta FireWire

76 FINO-HC 05/19/2005136 ETHERNET CONNECTOR

75 Q63 05/19/2005132 Vesta Ethernet PHY

74 Q63 05/19/2005131 Shasta Ethernet

CONTENTS DATESYNC MASTERPDF CSACSAPDF DATECONTENTS SYNC MASTER SYNC MASTER DATEPDF CSA CONTENTS

54 05/19/2005FINO-MS38 CPU AVDD VREGSystem Block Diagram2 05/19/20052 FINO-DD

DSIZE

OFSHT

DRAWING NUMBER



III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT


12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

PAGES 29,30

SMU SUPPLEMENTAL

U2801

RTC

PAGE 28

BATTERY

SYSTEM LED

ALS

BUTTONS

TEMP SENSORS

PAGE 28

SMU

U2800

PAGES 32,33

FANS

UE400

FLASH

667MHZ OR 733MHZ

JF303

PAGE 153

PAGE 153

JF301

PAGE 150

PAGE 152

JF300

PAGE 153

PAGE 148

PAGE 147

UE700

INTERFACE

BNDI

JEC00, JEC01JD600

PAGE 136 PAGE 140

PAGE 139PAGE 132

U1701

PAGE 142

PAGE 127

PAGE 131 PAGE 138

PAGE 24

PAGE 24

PAGE 119

PAGE 103

PAGE 127

JC901

PAGE 129

PAGE 129

JC900

PAGE 142

UC200UC500

PAGE 125 PAGE 122 PAGE 121

JC150

PAGE 145

PAGE 144

JE500

CF

CTLR

SD

MEDIA CARD CONNECTOR

UE401

PAGE 144

USB

HUB

PAGE 143 PAGE 143

JE350JE310/JE320/JE330

PAGES 67,70PAGES 68

J6700

PAGE 67

PAGE 61

ELASTIC INTERFACE

PARALLEL

U6200

64-BIT

PAGE 62

PAGE 39

PAGE 26PAGE 25

U2500

EXT VGA

TMDS

PAGE 96

PAGE 90

U9000, U9001

PAGE 89

U8900, U8901

M33:1.8V/700MHZ

M33:1.8V/700MHZ

M23:1.8V/600MHZ

M23:1.8V/600MHZ M33:RV380 XT

PAGES 84,86,87,93

U8400

U1900

PAGE 19

PAGE 59

PAGE 98PAGE 20

82

PAGE 42

PAGE 43,48

U4300

GPUTERM

DIMM64MX8

MEMORY

SERIES

MAIN MEMORY

TERMPCIE X16

MAIN MEMORY

1.8V/533MHZ

64-BIT

FRAME BUFFER

I2C

SATACONNECTOR

PCIE

KODIAKPAGE

NEO 10SCPU

HYPERTRANSPORT

HYPERTRANSPORT

CORE

CONTROL = 2.5V

HYPERTRANSPORT

8-BIT

APPLE PI

32-BIT

APPLE PI

BUFFER B

64-BIT

FRAMEBUFFER A

FRAME

MISC

SATA U2300

SATA1

SATA2

1.2V/1.5GHZ

SATA/150

UATA/133UATA

UATA

3.3V/133MHZCONNECTOR

PCI

GPIO/PCI64

CORE

PAGE 23

ETHERNET FIREWIRE

I2S2I2S0

I2S

I2S1SCCA SCCB

8-bit TX/RX

2 Diff pairs

1

FIREWIRE A

0

GMII (3.3V/125MHz)

8-bit TX & 8-bit RX

CONNECTOR

4 Diff pairs

CLOCKSPOWER

ETHERNETCONNECTORS

32-bit PCI (5V-3.3V/33MHz)

AMPSPEAKER

CONNECTORCOMBO OUT

OPTICAL OUT

LINE OUT

SPEAKERCONNECTOR

LINE INCONNECTOR

LINE INAMP

AUDIO CODEC

AMPLINE OUT

1394 OHCI (3.3V/98MHz)

S/PDIF

NCs

FRAME BUFFER

1.2V/800MHZ

PCM3052A

FIREWIRE AGIG ETHERNET

SHASTA

VESTA

HARD DRIVE

OPTICAL

5

USB

321

uPD720101

PCI

BOOTROMCONNECTOR

PULSAR2

CLOCK

BUFFER

ONBOARD MEMORY

4

WIRELESSUSB 2.0

USB

INTERFACE

BNDI

CONNECTORS

J9602, J9603

M23:RV370 XT 2.5GHZ

2

07051-6863

154

System Block DiagramSYNC_DATE=05/19/2005SYNC_MASTER=FINO-DD

IN

IN

LM339A

V+

GND

LM339A

V+

GND

IN

LM339A

V+

GND

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

FET SWITCHPP1V2_RUN

HT BUS

FET SWITCHPP1V2_PWRON

SWITCHER LINEAR

PP1V8_GPUPAGE 13

SHASTA CORE

PAGE 85FET SWITCH

PP1V2_ALL

PCI BUS

PP3V3_RUNPP3V3_ALL

SWITCHER

SYS_POWERUP_L

PAGE 13

CPU CORE

LINEAR

GPU CORE

FET SWITCH

PP5V_ALLPP12V_RUN

POWER SWPP1V8_RUN

PP12V_ALL

FW CONN

AUDIO CODEC

PP5V_RUN

PAGE 7

J700 SYS_POWERUP_L

USB CONN

PP5V_PWRON

VESTA CORE

SWITCHER

PP2V5_RUN

LINEAR

PP1V8_TPVDD

POWER CONNECTOR

FET SWITCH

PP2V5_PWRON

PP1V5_RUN

PP1V5_PWRON

PAGE 12

PAGE 12

PAGE 85 PAGE 11

PAGE 50

PAGE 11

PAGE 91

PAGE 15

PAGE 16

PAGE 85

PAGE 85

PAGE 13

PP1V5_VDDC_CT

PAGE 85

PP0V9_GPU_VTT

SWITCHER

20" PANEL POWER

EI

PULSARKODIAK CORE

17" LCD INVERTER

GPU MEMORY

OPTICAL

VESTA

MODEM & BT

SMUPOWER SEQUENCE PIN

PAGE 15

MAIN MEMORY

PP1V8_PWRON

PP3V3_PWRONFET SWITCH

PAGE 16

PAGE 15

PP2V5_ALL

USB2 HOST

SWITCHER

PP1V2_TPVDD

LINEAR

PAGE 85

LINEAR

PP2V5_GPU_A2VDD

LINEARPP2V5_RUN_CPU_AVDD

PAGE 54

AUDIO CODEC

LINEARPP4V5_RUN_AUDIO

PAGE 154

FET SWITCH

LINEAR

LINEAR

0.01UF

402CERM16V20%

2

1 C440

13 12 13 12

PP1V8_RUN

150K5%1/16WMF-LF4022

1R442

1%1/16W

402MF-LF

100K

2

1R443

402

10K

MF-LF1/16W5%

2

1R441

402

10K

MF-LF1/16W5%

2

1R431

PP2V5_ALL

PP2V5_ALL

PP2V5_ALL

SOI-LF

3

14

9

8

12

U400

SOI-LF

3

1

7

6

12

U400

PP3V3_PWRON

PP1V2_PWRON

SOI-LF

3

2

5

4

12

U400

PP5V_ALL

PP2V5_ALL

10V

0.1UF20%

CERM402

2

1 C441

100K

5%1/16WMF-LF402

21

R430

0.01UF

402CERM16V20%

2

1 C430

100K

5%1/16WMF-LF402

21

R440

Power Block Diagram

051-6863 07

1544

SYNC_MASTER=FINO-PC SYNC_DATE=05/19/2005

U400P2

SMU_PWRSEQ_P1_3

NC_SMU_PWRSEQ_P1_0 SMU_PWRSEQ_P1_0

SMU_PWRSEQ_P1_1

PS_1V_REF

COMPARE_PP1V2

PWR_GOOD_PP1V2

SMU_PWRSEQ_P9_6

SMU_PWRSEQ_P1_2

SMU_PWRSEQ_P9_5

TURN_ON_PP3V3_PWRON_L

PS_1V_REF

COMPARE_PP1V8

TURN_ON_PP1V2_L

PWR_GOOD_PP1V8

SMU_PWRSEQ_P1_4NC_SMU_PWRSEQ_P1_4

16

28

6 28

28

4

28

28

28

15

4

28 6

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD

QTY DESCRIPTIONPART#

TABLE_ALT_ITEM

TABLE_ALT_ITEM

TABLE_ALT_ITEM

PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:

TABLE_ALT_HEAD


TABLE_ALT_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM


QTY DESCRIPTIONPART#TABLE_5_ITEM

TABLE_5_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_5_ITEM

TABLE_11_HEAD

TABLE_11_HEAD

TABLE_11_HEAD

REFERENCE DESIGNATOR(S) BOM OPTIONQTY DESCRIPTION VALUE VOLT. WATT. TOL.PART # PACKAGEDEVICE

TABLE_ALT_ITEM

TABLE_ALT_ITEM

MISC PARTS

ASICS

ALTERNATES

PROCESSORS

VOLTAGE

1.20V

1.20V

1 MECH1 17_INCH_LCDM23 CPU HEATSINK603-7318

1341T1752 U2800PURCH ASSY, SMU BIG

603-7322 M33 GPU HEATSINK MECH2 20_INCH_LCD1

1875-1614 CPU GAP FILLER GAP1

1343S0319 IC,PULSAR2,100P,P8MM,BGA U2500

LED700,LED702378S0119 KINGBRIGHT LED378S0114

Q5011,Q5021MOSFET,N-CH,VISHAY376S0207 376S0146

Q5010,Q5020376S0204 376S0130 MOSFET,N-CH,VISHAY

1 U1900IC,KODIAK,V1.1,PBGA,200MM343S0371

343S0283 1 U2300IC,ASIC,SHASTA,V1.1,PBGA

U1701IC,ASIC,VESTA,V1.3343S0324 1

341T1751 UC5001 IC,FLASH,1MX8,3.3V,90NS

CPU_2_0GHZ U4300337S3165 337S3158 IC,DD3.1,2.0G,CJA

U4300337S3164 337S3157 CPU_2_2GHZ IC,DD3.1,2.0G,FJA

U43001 CPU_2_0GHZ2.0GHZCBGA-576-1MMPROCESSOR337S3158 1.15V 46W 50MVIC,GPUL,DD3.1,2.0G,85C,CQA

U4300 CPU_2_2GHZ1 CBGA-576-1MMPROCESSOR 2.2GHZ337S3157 1.15V 51W 50MVIC,GPUL,DD3.1,2.2G,85C,FQA

MECH11 20_INCH_LCDM33 CPU HEATSINK603-7321

SYNC_MASTER=FINO-DD SYNC_DATE=05/19/2005

07

5 154

Table Items

051-6863

820-1783 1 MLB1PCB,FAB,MLB,M23 17_INCH_LCD

051-6790 PCB,SCHEM,MLB,M23 SCH11 17_INCH_LCD

051-6863 PCB,SCHEM,MLB,M331 20_INCH_LCDSCH1

1 PCB,FAB,MLB,M33 MLB1 20_INCH_LCD820-1766

1 VPP1062-2082 SPEC,VENDOR PACKAGING PROCEDURE

825-6447 1 BARCODE LABEL, MLB LBL1

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NO TEST XW NETS

EE IDENTIFIED NO TEST NETS

FUNC TEST NETSNOTES FROM TOM FUSSELMAN

PLACE TWO TEST POINTS ON TOP SIDE

FOR PP3V3_ALL AND GND

PLACE WITHIN 1 INCH OF EACH OTHER

USE FAT TRACES

TOP SIDE ONLY

I1000

I1001

I1002

I1003

I1004

I1005

I1006

I1007

I1008

I1009

I1010

I1011

I1012

I1013

I1014

I1015

I1016

I1017

I1018

I1019

I1020

I1022

I1023

I1024

I1026

I1027

I1028

I1029

I1030

I1031

I1032

I1033

I1034

I1035

I1036

I1037

I1038

I1039

I1040

I1041

I1042I1043 I1044

I1045

I1046

I1047

I1048

I1049

I1050

I1051

I1052

I1053

I1054

I1055

I1056

I1057

I1058

I1059

I1060

I1061

I1062

I1063

I1064

I1065

I1066

I1067

I1068

I1069

I1070

I1071

I1072

I1080

I1088

I1089

I1090

I1091

I1092

I1093

I1094

I1095

I1096

I1097

I1098

I1099

I1100

I1101

I1102

I1103

I1104

I1105

I1106

I1107

I1108

I1109

I1110

I1111

I1112

I1113

I1114

I1115

I1116

I1117

I1118

I1120

I1121

I1122

I1123

I1124

I1125

I1126

I1127

I1128

I1129

I1130

I1131

I1132

I1133

I1134

I1135

I1136

I1137

I1138

I1139

I1140

I1141

I1142

I1143

PP1V8_RUN PP3V3_RUN

PP1V5_PWRON

PP1V2_ALL

PP2V5_RUN

PP5V_ALLPP3V3_ALL

PP12V_RUN

I1155

I1156

I1157

I1158

I1160

I1161

I1162

I1164

I1165

I1166

I1167

I1168

I1170

I1171

I1172

I1173

I1175

I1176

I1177

I1179

I1181

I1182

I1183

I1184

I1185

I1187

I1188

I1189

I1190

I1192

I1193

I1195

I1196

I1197

I1199

I1200

I1202

I1203

I1204

I1206

I1207

I1208

I1210

I1211

I1212

I1214

I1215

I1216

I1218

I1219

I1220

I1221

I1223

I1224

I1226

I1227

I1228

I1229

I1230

I1232

I1233

I1234

I1236

I1237

I1238

I1239

I1241

I1242

I1244

I1245

I1246

I1248

I1249

I1250

I1252

I1253

I1254

I1255

I1257

I1258

I1259

I1262

I1263

I1264

I1266

I1267

I1268

I1269

I1271

I1272

I1273

I1275

I1276

I1277

I1278

I1280

I1281

I1283

I1285

I1286

I1287

I1288

I1289

I1291

I1292

I1293

I1294

I1296

I1297

I1299

I1300

I1301

I1302

I1303

I1305

I1306

I1307

I1310

I1311

I1312

I1313

I1314

I1316

I1317

I1318

I1320

I1322

I1323

I1324

I1325

I1326

I1327

I1329

I1330

I1332

I1333

I1334

I1335

I1336

I1337

I1338

I1339

I1340

I1341

I1343

I1344

I1345

I1346

I1348

I1349

I1350

I307

I348

I349

I350

I356

I357

I358

I360

I361

I362

I375

I376

I428

I429

I826

I836

I837

I839

I841

I846

I847

I848

I849

I850

I851

I883

I947

I948

I949

I950

I951

I952

I953

I954

I955

I957

I958

I959

I960

I961

I962

I963

I964

I965

I969

I971

I972

I973

I974

I975

I976

I977

I978

I982

I984

I985

I986

I987

I988

I989

I990

I991

I992

I993

I994

I995

I996

I997

I998

I999

FUNC TEST 1 OF 2

051-6863

1546

07

SYNC_MASTER=FINO-ME SYNC_DATE=05/19/2005

FUNC_TEST=TRUEPP1V8_RUN

PP3V3_RUN FUNC_TEST=TRUE

PP1V5_PWRON FUNC_TEST=TRUE

PP1V2_ALL FUNC_TEST=TRUE

PP2V5_RUN FUNC_TEST=TRUE

PP5V_ALL FUNC_TEST=TRUE

PP3V3_ALL FUNC_TEST=TRUE

FUNC_TEST=TRUEPP12V_RUN

GND FUNC_TEST=TRUE

NO_TEST=YES TP_SB<25>

NC_SATA_TXD_P2NO_TEST=YES

RFBD<3>NO_TEST=YES

RAM_DQ_R<28>NO_TEST=YES

NO_TEST=YES RAM_DQ_R<44>





RFBD<113>NO_TEST=YES







RFBD<62>NO_TEST=YES

RFBD<66>NO_TEST=YES

RFBD<96>NO_TEST=YES









RFBD<97>NO_TEST=YES



RFBD<105>NO_TEST=YESRFBD<104>NO_TEST=YES

RFBD<98>NO_TEST=YES




RFBD<118>NO_TEST=YESNO_TEST=YES RFBD<117>



RFBD<85>NO_TEST=YES

RFBD<86>NO_TEST=YES

RFBD<87>NO_TEST=YES

RFBD<88>NO_TEST=YES

RFBD<90>NO_TEST=YES

RFBD<91>NO_TEST=YES

RFBD<92>NO_TEST=YES

RFBD<95>NO_TEST=YES

RFBD<67>NO_TEST=YES

RFBD<74>NO_TEST=YES

RFBD<75>NO_TEST=YES

RFBD<76>NO_TEST=YES

RFBD<79>NO_TEST=YES


RFBD<71>NO_TEST=YES

RFBD<72>NO_TEST=YES


RFBD<94>NO_TEST=YES

RFBD<81>NO_TEST=YES

RFBD<78>NO_TEST=YES

RFBD<65>NO_TEST=YES






FUNC_TEST=TRUE SMU_MANUAL_RESET_L

FUNC_TEST=TRUE SMU_BOOT_TXD

FUNC_TEST=TRUE SMU_BOOT_BUSY

FUNC_TEST=TRUE SMU_BOOT_CE

FUNC_TEST=TRUE SMU_BOOT_CNVSS

SMU_BOOT_RXDFUNC_TEST=TRUE

SMU_BOOT_SCLKFUNC_TEST=TRUE

POWER_BUTTON_LFUNC_TEST=TRUE

SYS_POWERUP_LFUNC_TEST=TRUE

RESET_BUTTON_LFUNC_TEST=TRUESMU_RESET_LFUNC_TEST=TRUE

SYS_POWER_BUTTON_LFUNC_TEST=TRUE

=PP5V_RUN_CPUFUNC_TEST=TRUE

=PP3V3_ALL_SMUFUNC_TEST=TRUEFUNC_TEST=TRUE PPVCORE_CPU

NO_TEST=YES TP_NEC_SRCLK

TP_NEC_SRMODNO_TEST=YES





NO_TEST=YES NC_CLK_RAI_GIGE_25MHZRFBD<5>NO_TEST=YES


NO_TEST=YES RAM_DQ_R<40>NO_TEST=YES RAM_DQ_R<41>

















NO_TEST=YES RAM_DQ_R<58>NO_TEST=YES RAM_DQ_R<59>NO_TEST=YES RAM_DQ_R<60>


RFBD<1>NO_TEST=YES

RFBD<6>NO_TEST=YES

RFBD<10>NO_TEST=YES

RFBD<11>NO_TEST=YES

RFBD<14>NO_TEST=YES

RFBD<15>NO_TEST=YES

RFBD<16>NO_TEST=YES

NO_TEST=YES RFBD<18>

RFBD<19>NO_TEST=YES

RFBD<32>NO_TEST=YES

RFBD<33>NO_TEST=YES

RFBD<34>NO_TEST=YES

RFBD<36>NO_TEST=YES

RFBD<40>NO_TEST=YES

RFBD<37>NO_TEST=YES

RFBD<38>NO_TEST=YES

RFBD<50>NO_TEST=YES


RFBD<61>NO_TEST=YES

RFBD<57>NO_TEST=YES

RFBD<53>NO_TEST=YES

GND_NEC_AVSS_RNO_TEST=YESGND_GPU_TPVSSNO_TEST=YESGND_U1100NO_TEST=YESGND_AUDIO_SPKRAMP_PLANENO_TEST=YES

KPGND2_FMAXNO_TEST=YESNO_TEST=YES TDIODE_POS_FMAX

NO_TEST=YES INA138_OUT

NO_TEST=YES RAMCLK_AVSS

NO_TEST=YES GND_AUDIO

NO_TEST=YES GND_AUDIO_SPKRAMP

NO_TEST=YES KOD_K07_GND

NO_TEST=YES KOD_G10_GND

NO_TEST=YES KOD_J13_GND

NO_TEST=YES KOD_L13_GND

NO_TEST=YES KOD_H08_GND

NO_TEST=YES PCIE_SLOTA_PRSNT_L

NO_TEST=YES U8500_GND

GND_GPU_TXVSSRNO_TEST=YESNO_TEST=YES GND_GPU_VSSDI

NO_TEST=YES GND_GPU_AVSSN

GND_GPU_AVSSQNO_TEST=YESGND_GPU_A2VSSNNO_TEST=YESGND_GPU_A2VSSQNO_TEST=YESKOD_L15_GNDNO_TEST=YES

NO_TEST=YES PP_3V3SBPCI_B9

PP_VIOPCIUSB2_C2NO_TEST=YESPP_1V2PWRONDISKSB_CCNO_TEST=YES

NO_TEST=YES PP2V5_VESTA_BIASVDD1

NO_TEST=YES PP2V5_VESTA_XTALVDD1

NO_TEST=YES PP1V2_VESTA_PLLVDD2NO_TEST=YES PP1V2_VESTA_PLLVDD1

NO_TEST=YES PP2V5_VESTA_BIASVDD2

NO_TEST=YES PP2V5_VESTA_XTALVDD2

NO_TEST=YES PP1V2_VESTA_FAVDDL

NO_TEST=YES PP2V5_VESTA_FAVDDM

NO_TEST=YES PP3V3_VESTA_FAVDDH

NO_TEST=YES PP3V3_PWRON_NEC_AVDD

NO_TEST=YES KPVDD2

NO_TEST=YES KPGND2

NO_TEST=YES CPU_DIODE_POS

FMAXT_PNO_TEST=YES

CPU_DIODE_NEGNO_TEST=YES

NO_TEST=YES FMAXT_M

CORE_ISNS_PNO_TEST=YESCORE_ISNS_MNO_TEST=YES

NO_TEST=YES PPV_RUN_CPU_AVDD_R_L

NO_TEST=YES NC_CLK_RAI_REFCLK_66M

NO_TEST=YES NC_CPU_B_TBEN_CLK_US

NO_TEST=YES NC_PMR_CLK_DIS_L

NC_SATA_RXD_N2_CNO_TEST=YES

NC_SATA_TXD_N2NO_TEST=YES

NO_TEST=YES TP_SB<28>NO_TEST=YES TP_SB<29>


GND_U1200NO_TEST=YES

PP_2V5PWRONNBMISCNO_TEST=YES

PP_1V2PWRONPULSAR1NO_TEST=YESPP_1V5PULSAR2NO_TEST=YESPP_1V5PWRONPULSAR2NO_TEST=YES

NO_TEST=YES PP_VEINB

PP_3V3ALLSMUNO_TEST=YES

PP_3V3ALLSMUAVCCNO_TEST=YES

GND_SMU_AVSSNO_TEST=YES

NO_TEST=YES GND_CPU_AVDD

VC_AGNDNO_TEST=YES

GND_GPU_PVSSNO_TEST=YES

KPVDD2_FMAXNO_TEST=YES

VC_OUTSEN_RNO_TEST=YES

GND_GPU_MPVSSNO_TEST=YES

NO_TEST=YES GND_AUDIO_MIC

NO_TEST=YES NC_EI_NB_TO_CPU_B_CLK_P

NO_TEST=YES NC_EI_NB_TO_CPU_B_CLK_N

NC_EI_NB_TO_CPU_B_AD<0..43>NO_TEST=YESNO_TEST=YES NC_EI_NB_TO_CPU_B_SR_P<0..1>

NO_TEST=YES NC_EI_NB_TO_CPU_B_SR_N<0..1>

NO_TEST=YES NC_EI_CPU_B_TO_NB_CLK_P

NO_TEST=YES NC_EI_CPU_B_TO_NB_CLK_N

NO_TEST=YES NC_EI_CPU_B_TO_NB_AD<0..43>

NO_TEST=YES NC_EI_CPU_B_TO_NB_SR_P<0..1>

NC_NB_CPU_B0_INT_LNO_TEST=YES

NC_CPU_B1_QACK_LNO_TEST=YESNC_HT_MB_TO_NB_CAD_P<8..15>NO_TEST=YES

NO_TEST=YES NC_HT_MB_TO_NB_CAD_N<8..15>

NC_HT_NB_TO_MB_CAD_P<8..15>NO_TEST=YESNO_TEST=YES NC_HT_NB_TO_MB_CAD_N<8..15>

NC_CLK_RAI_200M_N<0>NO_TEST=YESNC_CLK_RAI_200M_P<0>NO_TEST=YESNC_CLK_RAI_PCIEA_N<0>NO_TEST=YES

NO_TEST=YES NC_CLK_RAI_PCIEA_P<0>

NC_CLK_RAI_PCIEB_N<0>NO_TEST=YES

NC_CLK_RAI_PCIEC_N<0>NO_TEST=YES

NC_CLK_RAI_PCIEB_P<0>NO_TEST=YES

NC_CLK_RAI_PCIEC_P<0>NO_TEST=YES

NO_TEST=YES NC_A_AVREG_1NO_TEST=YES NC_A_AVREG_0

NO_TEST=YES NC_A_AVREG_2

NO_TEST=YES NC_CPU_B_APSYNC

NO_TEST=YES NC_EI_CPU_B_SYSCLK_N

NC_HT_NB_TO_MB_CLK_N<1>NO_TEST=YESNO_TEST=YES NC_EI_CPU_B_SYSCLK_P

NC_HT_NB_TO_MB_CLK_P<1>NO_TEST=YESNO_TEST=YES NC_J2904_11

NO_TEST=YES NC_J2904_12

NO_TEST=YES NC_NCV1009_1



NO_TEST=YES NC_NCV1009_ADJ


NO_TEST=YES NC_RAM_ARB0_REF25MHZ

NO_TEST=YES NC_RAM_ARB1_REF25MHZ

NO_TEST=YES NC_SMU_PWRSEQ_P1_0

NO_TEST=YES NC_SMU_PWRSEQ_P1_4















RFBD<28>NO_TEST=YESRFBD<27>NO_TEST=YESRFBD<26>NO_TEST=YESRFBD<25>NO_TEST=YES

RFBD<21>NO_TEST=YES

RFBD<22>NO_TEST=YES

RFBD<23>NO_TEST=YES


RFBD<56>NO_TEST=YES

RFBD<54>NO_TEST=YES

RFBD<52>NO_TEST=YES



NO_TEST=YES AUD_4V5_FBNO_TEST=YES TP_FBBCS1_L

ITS_RUNNINGNO_TEST=YES

NO_TEST=YES Q800_D

NO_TEST=YES Q800_G

Q802_BNO_TEST=YESNO_TEST=YES Q801_B

Q802_ENO_TEST=YESQ803_BNO_TEST=YES

NO_TEST=YES TP_USB2_PWREN<0>

NO_TEST=YES TP_SB_FSTESTNO_TEST=YES TP_USB2_PWREN<1>

TP_SB_PLLTESTNO_TEST=YESTP_USB2_PWREN<2>NO_TEST=YES

NO_TEST=YES TP_USB2_PWREN<3>

TP_NEC_NTEST1NO_TEST=YESNO_TEST=YES TP_USB2_PWREN<4>

TP_NEC_SMCNO_TEST=YESTP_NEC_SMI_LNO_TEST=YES

TP_NEC_TESTNO_TEST=YESNO_TEST=YES UATA_DASP_L_DS

RFBD<30>NO_TEST=YES





NO_TEST=YES NC_SATA_RXD_P2_C




NC_I2S2_MCLKNO_TEST=YES




RFBD<7>NO_TEST=YES

RFBD<8>NO_TEST=YES

LED802_1NO_TEST=YESPCI_CLK66M_SB_INT_RNO_TEST=YES

NO_TEST=YES LED801_1

RFBD<13>NO_TEST=YES

RFBD<2>NO_TEST=YES

PP_OVDD_PULSAR1NO_TEST=YES

PP_2V5PWRONSBNO_TEST=YES

GND_AUD_LOAMPNO_TEST=YES

NO_TEST=YES GND_AUDIO_CODEC

NO_TEST=YES GND_AUD_LOAMP_CHGPMP





NC_NB_CPU_A1_INT_LNO_TEST=YES

NO_TEST=YES NC_EI_CPU_B_TO_NB_SR_N<0..1>

NC_CPU_B0_QACK_LNO_TEST=YES

NC_CPU_A1_QACK_LNO_TEST=YES

NC_NB_CPU_B1_INT_LNO_TEST=YES

NO_TEST=YES PP_3V3PWRONSBPCI64

NO_TEST=YES GND_U1300

PP_1V2PWRONSBVCORENO_TEST=YES

PP_1V2PWRONSBPLL45VDDNO_TEST=YES

PP_2V5PWRONSB_B9NO_TEST=YESPP12V_AUDIO_SPKRAMPNO_TEST=YES

NO_TEST=YES TDIODE_NEG_FMAX

NO_TEST=YES DAGND

NO_TEST=YES KOD_H05_GND

85 50

154

69

70

70

69

70

70

69

69

69

69

69

70

69

69

69

69

28

29

70

70

70

70

70

70

70

70

70

70

69

69

69

69

69

69

69

69

69

70

70

70

70

70

70

70

154

55

55

69

69

70

150

69

70

69

89

68

68

68

68

68

68

90

68

68

68

68

68

89

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

68

68

68

68

68

29

29

29

29

29

29

12

29

29

8

28

68

68

68

89

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

154

154

152

97

97

97

97

97

84

101

50

50

55

55

55

154

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

68

68

68

89

89

89

89

154

148

154

90

68

68

68

152

97

7

7

7

7

7

7

7

7

142

129

88

61

61

61

61

61

61

88

142

61

61

61

61

61

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

61

61

61

61

61

29

28

28

28

28

28

28

29

7

29

28

28

7

7

50

122

122

61

61

61

142

27 88

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

142 93 11

152

55

55

55

62

7

7

82

82

82

82

82

82

85

93

93

93

93

93

93

98

119

122

127

132

132

139

132

139

139

139

139

139

142

48

48

48

55

48

55

55

55

48

27

26

20

129

129

142

142

142

12

20

25

25

25

41

28

28

28

48

50

86

55

50

87

153

56

56

56

56

56

56

56

56

56

56

56

101

101

101

101

27

27

27

27

27

27

27

27

82

82

82

27

27

101

27

101

29

29

55

55

55

55

55

27

27

4

4

142

142

142

142

142

142

142

142

142

142

142

142

142

142

142

142

142

142

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

154

87

7

8

8

8

8

8

8

143

24

143

24

143

143

122

143

122

122

122

129

88

142

142

142

142

142

129

55

88

88

142

154

61

61

61

88

88

8

26

8

88

88

25

23

150

147

150

88

61

61

61

56

56

56

56

56

23

13

23

24

119

7

55

55

82

Preliminary

125

OUT

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

P/N 518-0188

ON IN RUN AND SLEEP

PWRON RAILS

CHASSIS MOUNTING

GPU MOUNTING

ALL RAILSRUN RAILS

SILKSCREEN:1 SILKSCREEN:2 SILKSCREEN:RUN

GND RAILS

ONLY ON IN RUN

ALWAYS ON WHEN UNIT HAS AC POWER (TRICKLE)

CHASSIS GND

PP5V_RUN

PP3V3_PWRON

PP1V5_PWRON

PP2V5_PWRON

PP1V2_PWRON

PP5V_ALL

PP5V_ALL PP3V3_RUN

PP2V5_RUN

PP5V_PWRON

PP1V5_RUN

PP3V3_RUNPP5V_RUN

SM

21

XW701

SM

21

XW702

SM

21

XW703

PP12V_RUN

PP1V2_RUN

CRITICAL

74LCX125

TSSOP

314

17

2

U700CERM

0.1UF10V20%

4022

1 C700

GREEN2.0X1.25A

DEVELOPMENT

2

1

LED701GREEN2.0X1.25A

2

1

LED702

PP3V3_PWRON

330

1/10W

603MF-LF

5%

21

R700

2.0X1.25AGREEN

2

1

LED700

SM

21

XW705

SM

21

XW706

SM

21

XW707

PP12V_RUN

PP3V3_RUN

M-RT-THHM9607E-P2

9

87

65

43

2

1413

1211

10

1

J700 PP3V3_ALL PP12V_ALL

PP1V8_PWRON

OMIT

4P75R41

ZH700

OMIT

4P75R41

ZH701

OMIT

4P75R41

ZH702

OMIT

4P75R41

ZH703

0.01UF20%

CERM402

NOSTUFF

16V2

1 C704

0.01UF

NOSTUFF

20%16VCERM402

2

1 C702

NOSTUFF

16V20%

CERM402

0.01UF

2

1 C703

PP1V8_RUN

OMIT

4P25R3P5ZH704

OMIT

4P25R3P5ZH705

16V

NOSTUFF

0.01UF20%

CERM402

2

1 C707

0.01UF20%16VCERM402

NOSTUFF

2

1 C706

0.01UF

CERM

NOSTUFF

20%16V

4022

1 C705

MF-LF402

1/16W5%10K

2

1R702

PP3V3_ALL

PP3V3_ALL

PP1V2_ALL

PP2V5_ALL

PP12V_ALL

PP3V3_ALL

330

1/10W5%

MF-LF603

21

R710

MF-LF

NOSTUFF

0

5%1/16W

402

21

R721

MF-LF1/16W5%

0

402

NOSTUFF

21

R711

SM

21

XW700

4P25R3P5

OMIT

1

ZH706

SM

21

XW708

SM-1ELEC6.3V20%330UF

2

1 C722

603MF-LF

5%

330

1/10W

DEVELOPMENT

21

R701

PP5V_ALL

SYNC_MASTER=M33-PC

07

7 154

051-6863

POWER CONN / ALIASSYNC_DATE=05/19/2005

=PP5V_PWRON_BNDI

=PP5V_PWRON_USB

=PP3V3_ENET

=PP3V3_PWRON_BNDI

=PP3V3_PWRON_BT

=PP3V3_PWRON_CPU

=PP3V3_PWRON_PULSAR

=PP3V3_PWRON_SB

=PP3V3_PWRON_SB_PCI32


=PP3V3_PWRON_SMU

=PP3V3_PWRON_USB

MIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.60MMVOLTAGE=0V

GND_CHASSIS_TMDS

=PP2V5_PWRON_NB_MISC

=PP2V5_PWRON_HT

=PP2V5_PWRON_NB_PCIE

=PP1V8_RUN_RAM

PP12V_AUDIO_SPKRAMP

=PP5V_RUN_CPU

ZH706P1

=PP5V_PATA

=PP3V3_AUDIO

=PP3V3_RUN_I2C

=PP3V3_RUN_PULSAR

=PP3V3_RUN_SMU

=PP3V3_SB_PCI

=PPVIO_PCI_USB2

=PP1V2_PWRON_HT_NBTX

=PP1V2_PWRON_PULSAR

=PP1V2_PWRON_SB_HT

=PP1V2_PWRON_SB_VCORE

INV_CUR_HI

GND_CHASSIS_FIREWIRE

GND_CHASSIS_RJ45

GND_CHASSIS_VGA

ZH700P1

GND_CHASSIS_USB

=PPOVDD_PULSAR

GND_CHASSIS_AUDIO_EXTERNAL

GND_AUDIO_SPKRAMP

=PPV_EI_CPU=PPV_EI_NB

=PP1V5_PWRON_PULSAR

=PP1V8_PWRON_DIMM

=PP12V_GPU

=PP1V8_PWRON_NBMEM

=PP1V8_PWRON_RAM

=PPVCORE_PWRON_NB_HT

=PPVCORE_PWRON_NB

=PPVCORE_PWRON_NB_PCIE

=PP3V3_ALL_GPU

=PP2V5_ENETFW

=PP3V3_ENETFW

=PP2V5_RUN_I2C

=PPV_GPU_MEM

ZH703P1

=PP2V5_ENET

SYS_POWERUP_L

ITS_PLUGGED_INITS_RUNNING

=PP2V5_PWRON_SB

GND_AUDIO

LCD_PWM

=PP1V2_GPU_PCIE

SYS_POWERFAIL_L

=PP2V5_PWRON_PULSAR

=PP1V2_ENETFW

=PP3V3_ALL_SMU

=PP3V3_FW

=PP12V_ALL_GPU

=PP5V_ALL_GPU

=PP3V3_ALL_CPU

ZH702P1

=PP12V_ALL_FW

=PP12V_CPU

HS_SDF801

ZH704P1

ZH705P1

=PP3V3_RUN_SB_PCI

=PP2V5_PWRON_NB_HT

PP5V_AUDIO_ANALOG

=PP3V3_RUN_CPU

=PP3V3_GPU

=PP3V3_PCI

=PP3V3_PATA

=PP1V8_PWRON_RAM_I2C_VDD

=PP5V_AUDIO

=PP5V_GPU

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

MAKE_BASE=TRUEVOLTAGE=0

GND_CHASSIS_LEFT

NET_SPACING_TYPE=POWER

MIN_NECK_WIDTH=0.2MMGND_CHASSIS_BNDI

MIN_LINE_WIDTH=0.6MMVOLTAGE=0MAKE_BASE=TRUENET_SPACING_TYPE=POWER

=PP1V2_PWRON_SB

=PP1V2_PWRON_DISK_SB

VOLTAGE=0MIN_LINE_WIDTH=0.6MM

MAKE_BASE=TRUE

GND_CHASSIS_RIGHTMIN_NECK_WIDTH=0.2MM


ITS_ALIVE

SYS_POWERUP_L_BUF




VOLTAGE=3.3V


VOLTAGE=12V


MAKE_BASE=TRUEVOLTAGE=1.2V

MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM




VOLTAGE=3.3V



MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2MMNET_SPACING_TYPE=POWER

MAKE_BASE=TRUE

PP5V_ALL

MAKE_BASE=TRUE

VOLTAGE=12V

PP12V_ALL


MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2MMNET_SPACING_TYPE=POWER

VOLTAGE=2.5V

PP2V5_ALLMAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MM


NET_SPACING_TYPE=POWERMIN_NECK_WIDTH=0.2MM

PP1V2_ALL

VOLTAGE=1.2VMIN_LINE_WIDTH=0.6MM

MAKE_BASE=TRUE



MAKE_BASE=TRUEPP3V3_ALL

PP1V8_RUN


VOLTAGE=1.8VMAKE_BASE=TRUE



MIN_NECK_WIDTH=0.2MMVOLTAGE=2.5V


MAKE_BASE=TRUE

PP1V8_PWRON

NET_SPACING_TYPE=POWERMAKE_BASE=TRUEMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM

PP3V3_RUN

MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MMMAKE_BASE=TRUE

PP12V_RUN

PP1V2_RUN

PP1V5_RUN


MAKE_BASE=TRUEVOLTAGE=1.5V



VOLTAGE=5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MMMAKE_BASE=TRUE

PP5V_PWRON

VOLTAGE=2.5V

PP2V5_RUN


MAKE_BASE=TRUE


MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MMVOLTAGE=1.2V

PP1V2_PWRON

VOLTAGE=2.5V

MAKE_BASE=TRUEMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM

PP2V5_PWRON


PP1V5_PWRON


VOLTAGE=1.5VMAKE_BASE=TRUE



MAKE_BASE=TRUEMIN_NECK_WIDTH=0.25MM

PP3V3_PWRON

VOLTAGE=5VPP5V_RUN



VOLTAGE=0V

119

56

85

96

56

39

154

48

59

91

50

138

93

24

43

145

30

153

28

154

47

56

70

58

59

139

139

90

28

119

139

29

154

92

136

23

30

144

28

103

152

8

152

20

154

152

30

42

25

69

39

42

132

132

89

12

24

154

132

28

55

153

55

91

125

92

16

143

143

132

121

55

25

20

23

23

28

142

96

20

98

82

61

6

6

129

147

39

25

30

119

122

98

25

103

23

92

140

136

96

143

25

153

6

29

41

12

67

96

20

62

98

19

82

85

17

17

39

87

136

6

6

23

6

92

84

28

25

17

6

140

85

85

55

140

50

8

24

98

150

54

85

121

129

67

91

143

24

127

16

6

6

6

6

6

6

6

6

Preliminary

G

D

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

CPU HEATSINK MOUNTING HOLES

DIAG LED(OVERTEMP LED)

SCC_GPIO_L

SCC_TRXC

SCC_TXD_L

SCC_RTS_L

SCC_DTR_L

SCC_RXD

SERIAL DEBUG

CHKSTOP LEDPLL LOCK LED

OMIT

4P75R41

ZH800OMIT

4P75R41

ZH801OMIT

4P75R41

ZH803OMIT

4P75R41

ZH802

402

0.01UF20%16VCERM2

1 C880

402

0.01UF20%16VCERM2

1 C881

402

0.01UF20%

CERM16V

2

1 C882

402

0.01UF20%16VCERM2

1 C883

REDSM

DEVELOPMENT

2

1LED801

2N7002SOT23-LF

DEVELOPMENT

Q800_D

2

1

3

Q800

2N3904LFSOT23

DEVELOPMENT

Q801_B

2

3

1 Q801

SM

DEVELOPMENT

2N3906 2

3

1

Q802

1K

MF-LF1/16W

DEVELOPMENT

402

5%

2

1R835

GREEN2.0X1.25A

DEVELOPMENT

2

1

LED802

180

MF-LF402

5%

DEVELOPMENT

1/16W

2

1R837

1/16WMF-LF

DEVELOPMENT

1K

402

5%

2

1R838

2N3904LFSOT23

DEVELOPMENT

2

3

1 Q803180

1/16WMF-LF402

5%

DEVELOPMENT

21

R839

SMRED

2

1LED850

SOT232N3904LF

2

3

1 Q8505%

402

1/16W

1K

MF-LF

21

R851

PP5V_ALL

402

5%1/16WMF-LF

1K

2

1R850

M-ST-5087SM

DEVELOPMENT

9

8

7

65

4

3

2

101

J800

PP5V_PWRON

MF-LF1/16W5%180

DEVELOPMENT

4022

1R833

5%1/16WMF-LF

DEVELOPMENT

1K

4022

1R834

402MF-LF

5%

30K

1/16W

21

R836

SYNC_DATE=05/19/2005SYNC_MASTER=FINO-DD

Signal Alias

07

8 154

051-6863

=PP5V_RUN_CPU=PP5V_RUN_CPU

CPU_CHKSTOP_L

Q800_G

Q802_B

LED801_1

LED802_1Q803_C

I2S1_RESET_L

I2S1_MCLK

I2S1_DEV_TO_SB_DTII2S1_SYNC

I2S1_BITCLK

I2S1_SB_TO_DEV_DTO

HS_SDF800

DIAG_LEDMAKE_BASE=TRUE

DIAG_LED_R

Q803_BPLLLOCK

Q802_E

LED850P2

HS_SDF801 HS_SDF802 HS_SDF803

LED850P1

8 8

7 7

56 43

6

6

6 6

43

6

6

6

6 9

24

24

24 24

24

24

28

6 9

6

Preliminary

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

ADDING FUNC_TEST=TRUE TO THESE NETSOF THE BOARD

LAYOUT HAVING DIFFICULTY PLACING TEST POINTS ON THESE NETSPCB LAYOUT ADDS TEST POINTS. THIS LIST IS A RESULT OF PCBNOTE FOR SHARING: DO NOT INCLUDE THIS LIST UNTIL

WHEN THE DEVELOPMENT BOM OPTION IS ENABLED

THE FOLLOWING NETS DO NOT HAVE

AND SIGNAL INTEGRITY.TEST COVERAGE WILL BE BY FCT

TEST POINT BECAUSE OF ROUTING DENSITYTHE FOLLOWING NETS ARE USED ONLY

TESTED VIA TEST JETTHE FOLLOWING PULSAR NETS WILL BE

JTAG TEST POINTS NEED TO BE ON THE BOTTOM

I1

I10 I100

I101

I102

I103

I106

I109

I11

I114

I115

I116

I117

I118

I119

I12

I120

I121

I122

I123

I124

I125

I126

I127

I128

I129

I13

I130

I131

I132

I133

I134

I135

I136

I137

I138

I139

I14

I140

I141

I142

I143

I144

I145

I146

I147

I148

I149

I15

I150

I151

I152

I153

I154

I155

I156

I157

I158

I159

I16

I160

I161

I162

I163

I164

I165

I166

I167

I168

I169

I17

I170

I171

I172

I173

I174

I175

I176

I177

I178

I179

I18

I180

I181

I182

I183

I184

I185

I186

I187

I188

I189

I19

I191

I192

I193

I194

I195

I196

I197

I198

I199

I2

I20

I200

I201

I202

I203

I204

I205

I206

I207

I208

I209

I21

I210

I211

I212

I213

I214

I215

I216

I217

I218

I219

I22

I220

I221

I222

I223

I224

I225

I226

I227

I228

I229

I23

I230

I232

I233

I234

I235

I236

I238

I239

I24

I240

I241

I242

I244

I245

I246

I247

I248

I25

I26

I27

I28

I29

I3

I30

I31

I32

I33

I34

I35

I36

I37

I38

I39

I4

I40

I41

I42

I43

I44

I45

I46

I47

I48

I49

I5

I50

I51

I52

I53

I54

I55

I56

I57

I58

I59

I6

I60

I61

I62

I63

I64

I65

I66

I67

I68

I69

I7

I70

I71

I72

I73

I74

I75

I76

I77

I78

I79

I8

I80

I81

I82

I83

I84

I85

I86

I87

I88

I89

I9

I90

I91

I92

I93

I94

I95

I96

I97

I98

I99

1549

051-6863

SYNC_DATE=05/19/2005SYNC_MASTER=FINO-ME

07

FUNC TEST 2 OF 2

FUNC_TEST=TRUE TP_JTAG_VESTA_TDOFUNC_TEST=TRUE TP_JTAG_VESTA_TDI

FUNC_TEST=TRUE TP_JTAG_VESTA_TCK

FUNC_TEST=TRUE JTAG_NB_TMS

FUNC_TEST=TRUE JTAG_NB_TCK

FUNC_TEST=TRUE TP_JTAG_SB_TCK

FUNC_TEST=TRUE JTAG_SB_TRST_L

NO_TEST=YES PCIE_SLOTA_TO_NB_P<0..15>

NO_TEST=YES NB_PLL_OUT_TRG_R

NO_TEST=YES PP5V_T555

NO_TEST=YES ENET_TX_EN

ENET_RXD<0>NO_TEST=YES


ENET_RXD_R<4>NO_TEST=YES

100M_P<0>NO_TEST=YES

NO_TEST=YES CLK_RAIREF_200M_P_R

NO_TEST=YES PP1V5_RUN_FOR_LED

NO_TEST=YES LED_PP1V5_RUN_N

ENET_RXD_R<3>NO_TEST=YESNO_TEST=YES ENET_RXD_R<2>

TP_VESTA_TXC_RXC_DELAYNO_TEST=YES

NO_TEST=YES PULSAR_1V5_RUN_SWITCH

TP_VESTA_TVCO_24NO_TEST=YES

NO_TEST=YES SB_AIRPRT_CLK_33MHZ_R

SB_CLK25M_SATA_RNO_TEST=YESNO_TEST=YES QUA0_REF_25MHZ_R




NO_TEST=YES TSENSE_GPU_ADD0

NO_TEST=YES ENET_TXD<6>

NO_TEST=YES LED8700_P

NO_TEST=YES TP_VESTA_LINK2_L

ENET_TXD<4>NO_TEST=YES

NO_TEST=YES LED_PP1V5_RUN_P


NO_TEST=YES NC_J3108_11NO_TEST=YES NC_J3108_10

ENET_TXD_R<4>NO_TEST=YES

ENET_TXD_R<7>NO_TEST=YESENET_TXD_R<6>NO_TEST=YES

ENET_TXD_R<3>NO_TEST=YESENET_TXD_R<2>NO_TEST=YES



NO_TEST=YES NC_SMU_FAN_TACH3

NC_SMU_FAN_TACH7NO_TEST=YESNC_SMU_SER_SELNO_TEST=YES

NO_TEST=YES NC_SYS_DOOR_AJAR_L

NO_TEST=YES NC_SMU_CPU_VID_LE1

NO_TEST=YES NC_SMU_FAN_RPM3


NO_TEST=YES TP_HT_MB_TO_NB_CLK_P<1>

NC_I2C_SMU_CPU_SCL_INNO_TEST=YESNC_PSRONO_TEST=YES


NO_TEST=YES ENET_TX_ER_R

ENET_RXD<7>NO_TEST=YESENET_RXD<6>NO_TEST=YESENET_RXD<5>NO_TEST=YES



ENET_TXD_R<1>NO_TEST=YESENET_TXD_R<0>NO_TEST=YESENET_TXD<7>NO_TEST=YES


ENET_TXD_R<5>NO_TEST=YES

NO_TEST=YES NC_SLOT_TOTAL_PWR

NO_TEST=YES NC_CPU_AFN

NO_TEST=YES TP_HT_MB_TO_NB_CLK_N<1>



ENET_TX_EN_RNO_TEST=YES

NO_TEST=YES ENET_TX_ER

TP_VESTA_PHYA<4>NO_TEST=YES

NO_TEST=YES TP_VESTA_SPD0

NO_TEST=YES TP_VESTA_REGSUP2

NO_TEST=YES TP_VESTA_RGMIIEN

NO_TEST=YES TP_VESTA_REGCTL1

TP_VESTA_REGSEN2NO_TEST=YES

NO_TEST=YES TP_VESTA_MANMS

NO_TEST=YES TP_VESTA_FDXLED_L

NO_TEST=YES TP_VESTA_HUB

NO_TEST=YES TP_VESTA_LINK1_L

NO_TEST=YES TP_VESTA_2_5V_EN

NO_TEST=YES TP_VESTA_DNC_C9

NO_TEST=YES TP_VESTA_DNC_E9

NO_TEST=YES TP_VESTA_EN_10B

NO_TEST=YES TP_VESTA_FDX

NO_TEST=YES TP_VESTA_AN_EN


NO_TEST=YES TP_VESTA_ER



NO_TEST=YES NC_SMU_CPU_VID_LE0

NC_PSRO_ENABLENO_TEST=YES


NO_TEST=YES TP_VESTA_REGSEN1


NO_TEST=YES TP_VESTA_RBC0

NO_TEST=YES TP_VESTA_RBC1

TP_VESTA_REGCTL2NO_TEST=YES


NO_TEST=YES TP_VESTA_F1000


NO_TEST=YES TP_VESTA_REGSUP1

TP_VESTA_TDBL<0>NO_TEST=YES


NO_TEST=YES LED_PP1V8_RUN_PNC_J3108_9NO_TEST=YES


NO_TEST=YES TSENSE_GPU_ADD1

NO_TEST=YES GPU_DIODE_PLUS

NO_TEST=YES CPU_A_TBEN_CLK_R

NO_TEST=YES CPU_B_TBEN_CLK_R

NO_TEST=YES CPU_B_APSYNC_R

NO_TEST=YES HT_SB_REFCLK_R

NO_TEST=YES HT_NB_REFCLK_H0_R

NO_TEST=YES CLK_RAIREF_200M_N_R

NO_TEST=YES NB_PMR_CLK_P_R

NO_TEST=YES NB_PMR_CLK_N_R

NO_TEST=YES NB_PCIE_REFCLK_P_C

NO_TEST=YES NB_PCIE_REFCLK_N_C

NO_TEST=YES QUA1_REF_25MHZ_R

NO_TEST=YES NB_DDR_REFCLK_N_RNO_TEST=YES NB_DDR_REFCLK_P_RNO_TEST=YES PCIE_C_REFCLKIN_N_CNO_TEST=YES PCIE_C_REFCLKIN_P_CNO_TEST=YES PCIE_B_REFCLKIN_N_CNO_TEST=YES PCIE_B_REFCLKIN_P_CNO_TEST=YES PCIE_A_REFCLKIN_N_CNO_TEST=YES PCIE_A_REFCLKIN_P_CNO_TEST=YES GFX_SLOT_PCIE_REFCLK_N_CNO_TEST=YES GFX_SLOT_PCIE_REFCLK_P_C

NO_TEST=YES SB_USB2_CLK_33MHZ_RNO_TEST=YES CLK_RAI_REFCLK_66M_R

NO_TEST=YES PCI_CLK33M_SB_EXT_R

NO_TEST=YES NB_APSYNC_R

NO_TEST=YES CLK_RAI_GIGE_25MHZ_R


NO_TEST=YES NC_PP1V5_PULSAR

NC_JTAGMUX_3NO_TEST=YES

NC_J3108_8NO_TEST=YES

NC_J3108_12NO_TEST=YES

NO_TEST=YES NC_CPU_TBEN_CLKNO_TEST=YES TP_SB_WATCHDOGNO_TEST=YES TP_NB_APSYNCNO_TEST=YES TP_I2S2_SB_TO_DEV_DTO Q803_CNO_TEST=YES 100M_N<0>NO_TEST=YES

CKA_P<0>NO_TEST=YES

HT_NB_P<0>NO_TEST=YESHT_NB_REFCLK_NF<0>NO_TEST=YESHT_NB_REFCLK_PF<0>NO_TEST=YES

HT_NB_TO_SB_CAD_P<0..7>NO_TEST=YESHT_NB_TO_SB_CLK_P<0>NO_TEST=YESHT_NB_TO_SB_CLK_N<0>NO_TEST=YES

NO_TEST=YES HT_SB_TO_NB_CAD_N<0..7>

NO_TEST=YES HT_SB_TO_NB_CAD_P<0..7>

NO_TEST=YES EI_NB_TO_CPU_SR_N<0>NO_TEST=YES EI_NB_TO_CPU_CLK_PNO_TEST=YES EI_NB_TO_CPU_CLK_NNO_TEST=YES EI_CPU_TO_NB_SR_P<1>NO_TEST=YES EI_CPU_TO_NB_SR_N<1>NO_TEST=YES EI_CPU_TO_NB_CLK_PNO_TEST=YES EI_CPU_TO_NB_CLK_NNO_TEST=YES CLK_KOD_100M_PF<0>NO_TEST=YES CLK_KOD_100M_NF<0>NO_TEST=YES HT_SB_TO_NB_CTL_P<0>NO_TEST=YES HT_NB_TO_SB_CTL_N<0>NO_TEST=YES HT_NB_TO_MB_CTL_P<1>NO_TEST=YES HT_NB_TO_MB_CTL_N<1>

NO_TEST=YES PCIE_NB_TO_SLOTA_PF<4>

NO_TEST=YES PCIE_NB_TO_SLOTA_NF<12>

HT_SB_TO_NB_CLK_P<0>NO_TEST=YES

NO_TEST=YES HT_MB_TO_NB_CTL_N<1>



LED_PP1V2_RUN_PNO_TEST=YESNO_TEST=YES KP_V<1>

NO_TEST=YES KP_V<2>

NO_TEST=YES PP1V2_RUN_FOR_LED

NO_TEST=YES PCIE_NB_TO_SLOTA_PF<13>NO_TEST=YES PCIE_NB_TO_SLOTA_P<10>

PCIE_NB_TO_SLOTA_P<1>NO_TEST=YES

PCIE_NB_TO_SLOTA_N<3>NO_TEST=YES

NO_TEST=YES UATA_DD<14>

PCIE_NB_TO_SLOTA_N<0>NO_TEST=YES

CPU_SENSE_KP_VNO_TEST=YES

NO_TEST=YES NB_PLL_OUT_TRG

NO_TEST=YES GPU_DIODE_MINUS

NO_TEST=YES CPU_A_APSYNC_R

NO_TEST=YES HT_NB_REFCLK_L0_R

LED8701_PNO_TEST=YES

NO_TEST=YES TSENSE_GPU_OVERTEMP_LNO_TEST=YES PP3V3_GPU_TSENSENO_TEST=YES T555_PWMNO_TEST=YES T555_OUTNO_TEST=YES T555_THRESNO_TEST=YES T555_DISC

HT_SB_TO_NB_CLK_N<0>NO_TEST=YES

CKA_N<0>NO_TEST=YES

HT_NB_N<0>NO_TEST=YES

PCIE_SLOTA_TO_NB_N<0..15>NO_TEST=YES

NO_TEST=YES UATA_DD<1>

NO_TEST=YES PCIE_NB_TO_SLOTA_NF<7>

PCIE_NB_TO_SLOTA_NF<13>NO_TEST=YES

NO_TEST=YES UATA_DA<0>

HT_NB_TO_SB_CAD_N<0..7>NO_TEST=YES

NO_TEST=YES PLLLOCK

TP_VESTA_TEST_1394<1>NO_TEST=YES

TP_VESTA_TEST_1394<0>NO_TEST=YES

NO_TEST=YES TP_NB_B_TRIGGER_OUTNO_TEST=YES TP_NB_A_TRIGGER_OUT

NO_TEST=YES CARD_READER_ACTIVITY_R

TP_VESTA_TVCONO_TEST=YES

TP_VESTA_TEST<0>NO_TEST=YES

TP_VESTA_TDBL<1>NO_TEST=YESTP_VESTA_TDBL<2>NO_TEST=YES

TP_VESTA_TEST<1>NO_TEST=YES

NO_TEST=YES TP_VESTA_FAVDDL

NO_TEST=YES EI_NB_TO_CPU_SR_P<0>

FUNC_TEST=TRUE JTAG_NB_TRST_L

FUNC_TEST=TRUE JTAG_NB_TDI

FUNC_TEST=TRUE TP_JTAG_VESTA_TRST_LFUNC_TEST=TRUE TP_JTAG_VESTA_TMS

FUNC_TEST=TRUE JTAG_NB_TDO

FUNC_TEST=TRUE TP_JTAG_SB_TMSFUNC_TEST=TRUE TP_JTAG_SB_TDOFUNC_TEST=TRUE TP_JTAG_SB_TDI

JTAG_CPU_TCKFUNC_TEST=TRUEJTAG_CPU_TDIFUNC_TEST=TRUEJTAG_CPU_TDOFUNC_TEST=TRUE

JTAG_CPU_TRST_LFUNC_TEST=TRUE

JTAG_CPU_TMSFUNC_TEST=TRUE

NO_TEST=YES HT_MB_TO_NB_CTL_P<1>

97

132

132

132

132

132

132

132

132

132

132

132

132

132

132

132

132

132

132

97

97

97

97

97

47

30

30

24

84

131

131

131

131

97

131

131

131

131

131

131

131

131

131

131

131

131

131

131

131

131

131

131

131

131

131

131

131

131

131

131

131

131

131

131

131

131

97

97

101

101

101

56

56

56

56

56

56

56

97

97

97

97

97

97

97

84

84

84

129

84

97

101

84

129

97

97

129

43

56

30

30

43

43

43

47

43

20

20

20

20

82

92

130

130

130

130

82

26

12

12

130

130

132

12

139

26

26

26

13

130

130

93

130

136

132

130

12

11

31

31

130

130

130

130

130

130

130

31

31

31

31

31

31

31

101

31

56

130

130

130

130

130

130

130

130

130

130

130

130

31

56

101

31

31

130

130

132

132

17

132

17

17

132

132

132

132

17

17

17

132

132

132

31

132

130

130

31

56

132

17

132

132

132

17

132

132

132

17

139

130

11 31

130

93

93

26

26

26

26

26

26

26

26

26

26

26

26

26

26

26

26

26

26

26

26

26

26

26

26

26

26

130

12

30

31

31

27

24

44

154 8 82

84

98

98

98

101

101

101

101

101

43

43

43

43

43

43

43

82

82

101

101

98

98

82

82

101

98

82

82

13

55

55

13

82

82

82

82

127

82

55

59

93

26

26

136

93

92

92

92

92

101

84

98

82

127

82

82

127

101

8

139

139

56

56

144

132

132

139

139

132

139

43

20

20

20

20

20

30

30

30

43

30

98

Preliminary

FB

LD

HD

GND

COMP

SS

VCC VC

G

D

S

G

D

S

G

D

S

LM339A

V+

GND

G

D

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

U1100_FEEDBACK

1.8V VOLTAGE REGULATOR

PLACE LED NEAR VREG

POWER BUDGET CURRENT OF TOTAL RAILS

NOTE:

10.9A PEAK7.2A CONTINUOUS

SET OUTPUT=1.85V FOR FRAMEBUFFER.

VOUT=VREF*(R903+R905)/R905=1.85VDCIRU3037ACS VREF=0.8VDC

HIGH TO ENABLEPOWER BUDGET CURRENT OF FET2.7A PEAK2.3A CONTINUOUS

0

805

1/8W5%

MF-LF

21

R1102

402

1%1/16WMF-LF

3.32K

2

1R1105

1.1K

NOSTUFF

805MF-LF

5%1/8W

2

1R1104

PP5V_ALL

1UF

CERM

10%6.3V

4022

1 C1104

PP12V_ALL

MBR0520LXXGSOD-123

2 1

D1100

SOD-123MBR0520LXXG

2 1

D1101SOD-123MBR0520LXXG

2

1D1102

CERM

1UF20%25V

8052

1 C1117

2200PF

603

5%50VCERM2

1 C1105

805CERM25V20%1UF

2

1 C1116

PP1V8_PWRON

PP1V8_RUN

220PF25V5%

CERM402

2

1 C1106

IHLP

1.5UH

CRITICAL

21

L1101SOIIRU3037ACS

2 6

8

3

5

4

1

7

U1100

1%1/16WMF-LF402

4.42K

2

1R1103

0.1UF25V

603CERM

20%2

1 C1115 402

1%1/16WMF-LF

4.99K

2

1R1101

5%

CERM50V

330PF

8052

1 C1113

NOSTUFF

603

3300PF10%

CERM50V2

1 C1107

50VCERM603

0.0180UF10%

2

1 C1114

4.7

805

1/8WMF-LF

5%

2

1R1100

SO-8IRF7413

321

4

8765

Q1103

PP12V_RUN

2N7002SOT23-LF

2

1

3

Q1140

470K

402

5%1/16WMF-LF

2

1R1140

1UF25V20%

NOSTUFF

CERM805

2

1 C1112

NTD60N02RCASE369

3

1

4

Q1101

NTD60N02RCASE369

3

1

4

Q1102

20%

ELECTH-MCZ

16V

680UF2

1 C110220%

ELECTH-MCZ

16V

680UF2

1 C1103

CERM

10UF10%16V

12102

1 C1111

CERM

0.001UF20%50V

402

NOSTUFF

2

1 C1140

8X11.5-TH

390UF20%

ELEC6.3V2

1 C1109

330

MF-LF

DEVELOPMENT

402

1/16W5%

2

1R1160

DEVELOPMENT

2.0X1.25AGREEN

2

1

LED1100

10UF20%6.3VCERM1206

C1110

PP1V8_RUN

SOI-LF

DEVELOPMENT3

14

9

8

12

U1201

PP3V3_RUN

SOT23-LF2N7002

2

1

3

Q1100

SM

21

XW1100

SYNC_DATE=05/19/2005SYNC_MASTER=M33-PC

1.8V VREG

051-6863 07

11 154

MIN_LINE_WIDTH=0.45MMMIN_NECK_WIDTH=0.25MMVOLTAGE=0 V

GND_U1100

Q903_GATE

U1100_SS MIN_LINE_WIDTH=0.45MMMIN_NECK_WIDTH=0.25MM

U1100_GATE_H

GND_U1100

U1100_VC_R


1V1_REF

LED_PP1V8_RUN_N

LED_PP1V8_RUN_P

Q1101_GATE


Q1102_DRAINMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MM


U1100_GATE_L

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.45MM U1100_VC_D

U1100_COMP


R904_P2

R1101_P2

SYS_SLEEP


U1100_VC

PWRON_L

U1100_FEEDBACK

GND_U1100

54 30 26 16

16

85

15

15

11

11

13

13

13

11

6

6

12

9

9

12

12

6

Preliminary

G

D

S

G

D

S

FB

LD

HD

GND

COMP

SS

VCC VC

G

D

S

LM339A

V+

GND

G

D

S

GND

VOUTVIN

NOISECONT

S

G

D

G

D

S

CRITICAL BOM OPTIONTABLE_5_HEAD

PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_5_ITEM

KODIAK CORE VOLTAGE REGULATORNOTE:

U1200_FEEDBACK

TURNING ON PP2V5_PWRON WITH 1V2_PWRON

SO THAT 1.5V IS THE FIRST RAIL UP ON KODIAK

PLACE LED NEAR VREG

LOAD FROM POWER BUDGET

@ VGS=3.5 VRDSON=0.012 OHM

1.3A PEAK CURRENT DRAW1.0A CONTINUOUS CURRENT DRAW

PP1V5_PWRON_PULSAR

LOAD FROM POWER BUDGET

IRU3037ACS VREF=0.8VDC

7.2A CONTINUOUS CURRENT DRAW8.5A PEAK CURRENT DRAW 1.25V R1205=4.02K

1.30V R1205=3.24K1.35V R1205=2.87K

VOUT=VREF*(R1203+R1205)/R1205=1.30VDC

CERM16V10%10UF

12102

1 C1201

ELEC

1500UF20%6.3V

TH-MCZ

2

1 C1209

ELEC

1500UF6.3V20%

TH-MCZ

2

1 C1208

3.24K

MF-LF

1%

402

1/16W

2

1R1205

603CERM

20%10V

1UF

NOSTUFF

2

1 C1207

NOSTUFF

CERM

1UF20%25V

12062

1 C1212

PP5V_ALL

NTD60N02RCASE369

3

1

4

Q1201

50VCERM

20%1800PF

8052

1 C1205

0

805

1/8WMF-LF

5%

21

R12021UF

CERM402

6.3V10%

2

1 C1204

220PF5%25VCERM402

2

1 C1206

PP12V_ALL

0.1UF

CERM16V20%

6032

1 C1214

603

10V

1UF

CERM

20%2

1 C1216

CERM

1UF25V

805

20%2

1 C1217

MBR0520LXXGSOD-123

2 1

D1200

MBR0520LXXGSOD-123

2 1

D1201SOD-123MBR0520LXXG

2

1D1202

NTD60N02RCASE369

3

1

4

Q1202

SM

1.53UH3

2

1

L1201

NOSTUFF

MF-LF

1.1K5%1/4W

12062

1R1204

IRU3037ACSSOI

2 6

8

3

5

4

1

7

U1200

MF-LF402

1%1/16W

2.05K

2

1R1203

8.45K

MF-LF

1%

402

1/16W

2

1R1201

CERM50V

0.012UF

805

10%2

1 C12155%50VCERM

150PF

4022

1 C1213

805MF-LF1/8W5%10

2

1R1200

PP1V5_RUN

402CERM10V20%0.1UF

2

1C1250

SOT23-LF2N7002

2

1

3

Q1251

PP5V_PWRON

5%

MF-LF402

100K

1/16W

2 1

R1250

20%

ELEC

680UF16V

TH-MCZ

2

1 C120210UF

1210

16V10%

CERM2

1 C1210

DEVELOPMENT

402

330

MF-LF1/16W5%

2

1R1260

2.0X1.25A

DEVELOPMENT

GREEN

2

1

LED1200DEVELOPMENT

SOI-LF

3

1

7

6

12

U1201MF-LF1/16W5%

0

402

DEVELOPMENT

21

R1261

6.3V

10UF

805-1

20%

CERM2

1 C1218

PP1V5_PWRON

PP1V5_PWRON

PP3V3_RUN

SOT23-LF2N7002

2

1

3

Q1200NOSTUFF

0

5%1/16WMF-LF402

21

R1206

0

5%

402

1/16WMF-LF

21

R1207

10%

X5R

10UF

805

6.3V2

1 C12720.01UF

16VCERM

20%

4022

1C1271

OMIT

MM1572FNSOT-25A

51

4

2

3

U1270

10K

402MF-LF1/16W5%

2

1R1270

805CERM

20%1UF10V

2

1 C1270

PP3V3_PWRON

SM

21

XW1200

IRLML2402SOT23

DEVELOPMENT

2

1

3

Q1271

SOT23-LF2N7002

DEVELOPMENT

2

1

3

Q1270

DEVELOPMENT

5%10K1/16WMF-LF4022

1R1273

5%10K1/16WMF-LF402

DEVELOPMENT

2

1R1274

PP12V_RUN

SI3446DVLFTSOP

4

36

5

2

1

Q1250

20%16VCERM402

0.01UF2 1

C1275

051-6863 07

12 154

SYNC_MASTER=FINO-PC SYNC_DATE=05/19/2005

1.5V Vreg

353S1145 MM1571FN1 CRITICALU1270

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.45MMU1200_GATE_L

PULSAR_1V5_RUN_SWITCH



PP1V5_RUN_PULSAR

PP1V5_PWRON_PULSARVOLTAGE=1.5V


MAKE_BASE=TRUE

U1270_CONT

MAKE_BASE=TRUENC_PP1V5_PULSAR

U1270_NOISE

=PP1V5_PWRON_PULSAR

SYS_POWERUP_L

SYS_SLEEP

PP1V5_RUN_FOR_LED

1V1_REF

LED_PP1V5_RUN_N

LED_PP1V5_RUN_P

U1200_SS

PWRON_L TURN_ON_PP1V5_L

TURN_ON_PP1V2_L

R1201_P2

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.45MMU1200_VC

MIN_LINE_WIDTH=0.45MMMIN_NECK_WIDTH=0.25MMR2204_P2

U1200_COMP

GND_U1200

=PP1V5_PULSAR


VOLTAGE=0 V

GND_U1200

Q1202_DRAIN


GND_U1200

Q1250G


U1200_GATE_H


U1200_VC_D


U1200_VC_R

U1200_FEEDBACK

Q1201_GATE


54 30

85

26

50

16

16

28

15

85

15

25

7

13

13

13

13

12

12

12

9

9

7

6

11

9

11

9

9

11

4

6

25

6

6

Preliminary

G

D

S G

D

S

FB

LD

HD

GND

COMP

SS

VCC VC

G

D

S

LM339A

V+

GND

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

2.6A CONTINUOUS

PEAK CURRENT 1.3A IF KODIAK 1.2V CAN BE TURNED OFF IN SLEEP. 0.6A/M33 0.0A/M23 IF NOT1.0A CONTINUOUS

@ VGS=2.5 V

PP1V2_PWRON FET SWITCH

RDSON=0.04 OHM

SET OUTPUT=1.22-1.23V

U1300_FEEDBACK

VOUT=VREF*(R1003+R1005)/R1005=1.22-1.23VDCIRU3037ACS VREF=0.8VDC

@ VGS=2.5 V

NOTE:

PLACE LED NEAR VREG

POWER BUDGET CURRENT OF TOTAL RAILS3.2A PEAK

PP1V2_PWRON COMES UP BEFORE GPU_POWERUP_L SO THAT SHASTA CORE GETS POWER BEFORE ANYTHING ELSE

PEAK CURRENT 1.3A

RDSON=0.04 OHM

PP1V2_RUN FET SWITCH

PP1V2_ALL VOLTAGE REGULATOR

NOSTUFF

5%

MF-LF

0

402

1/16W

21

R1314

47K

5%1/16WMF-LF402

20_INCH_LCD&DEVELOPMENT

21

R1315

PP1V2_ALL

PP1V2_ALLPP1V2_ALL

PP3V3_RUN

PP5V_RUNPP3V3_RUN

CERM

20%

402

16V

0.01UF


2

1 C1320

CDRH104R-SM

3.8UH21

L1301

2N7002SOT23-LF


2

1

3

Q1304NOSTUFF

SOT23-LF2N7002

2

1

3

Q1307

NOSTUFF

1%

MF-LF402

10K1/16W

2

1R1306

SM

21

XW1300

0.01UF

402

20%

CERM16V

2

1 C1321


20%16VCERM402

0.01UF21

C1322

NOSTUFF

3300PF10%

CERM603

50V2

1 C1307

1/16W1%

MF-LF402

10K

2

1R1305

NOSTUFF

1.1K5%

MF-LF1/4W

12062

1R1304

NOSTUFF

25VCERM

20%1UF

12062

1 C1312

SOD-123MBR0520LXXG

2

1D1302

PP12V_ALL

25V

805

1UF20%

CERM2

1 C1317

50VCERM

20%1800PF

8052

1 C1305

MBR0520LXXGSOD-123

2 1

D1300

SOD-123MBR0520LXXG

2 1

D1301

805MF-LF1/8W5%

021

R1300805

25V

1UF20%

CERM2

1 C1300

220PF

CERM

5%25V

4022

1 C1306

1UF10%6.3V

402CERM2

1 C1304

IRU3037ACSSOI

2 6

8

3

5

4

1

7

U1300

1800UF20%

ELEC6.3V

TH-KZJ-LF

2

1 C13095.36K

402MF-LF1/16W1%

2

1R1303

PP1V2_RUN

PP5V_ALL

1/16W

100K

MF-LF

5%

402


2 1

R1308

PP5V_ALL

SI3446DVTSOP

436521

Q1306

PP1V2_PWRON

2N7002SOT23-LF

2

1

3

Q1305

1/16W5%

MF-LF402

100K2 1

R1309

PP5V_ALL

402

25V10%0.0068UF

CERM2

1 C1314 402

56PF5%50VCERM2

1 C1313

603

16VCERM

20%0.1UF

2

1 C1315

5%18K1/16WMF-LF4022

1R1301

5%

MF-LF1/16W

0

402

21

R1312

402MF-LF

NOSTUFF

1/16W5%

021

R1313

805

4.75%1/8WMF-LF

2

1R1302

IRF7807ZPBFSO-8

321

4

8765

Q1301

IRF7807ZPBFSO-8

321

4

8765

Q1302

1210

10UF

CERM16V10%

2

1 C1302

1210

10UF

CERM16V10%

2

1 C1303

TSOPSI3446DV


4

3 6

5

2

1

Q1303

10UF16V10%

CERM1210

2

1 C1301

DEVELOPMENT

SOI-LF

3

2

5

4

12

U1201

402

330

DEVELOPMENT

MF-LF1/16W5%

2

1R1350

2.0X1.25AGREEN

DEVELOPMENT

2

1

LED1300MF-LF1/16W

5%100K

402

DEVELOPMENT

2

1R1351

1/16W5%

47K

402

DEVELOPMENT

MF-LF2

1R1352

5%

DEVELOPMENT

402

1/16WMF-LF

021

R1353

CERM10V20%

402

DEVELOPMENT

0.1UF

2

1 C1350

1.2V VregSYNC_DATE=05/19/2005SYNC_MASTER=FINO-PC

15413

07051-6863

Q1006_G

Q1003_G

Q1305_G


Q1302_DRAIN

PWRON_L

U1300_SS

SYS_SLEEP

GPU_POWERUP_L

Q1301_GATE



U1300_GATE_H

U1300_VC_R


MIN_NECK_WIDTH=0.25MMR1304_P2 MIN_LINE_WIDTH=0.45MM


U1300_VC

R1301_P2

PP1V2_RUN_FOR_LED

LED_PP1V2_RUN_N

LED_PP1V2_RUN_P

TURN_ON_PP1V2_L

MIN_LINE_WIDTH=0.45MMMIN_NECK_WIDTH=0.25MMU1300_VC_D

U1300_COMP MIN_LINE_WIDTH=0.45MMMIN_NECK_WIDTH=0.25MM

U1300_GATE_L

GND_U1300


VOLTAGE=0 V

TURN_ON_PP1V2_L Q1304_G

GND_U1300

1V1_REF

GND_U1300

U1300_FEEDBACK

54 30 26

16

16

15

15

13

13

85

12

12

12

13

12

13

12

13

11

11

85

9

9

9

4

6

4

6

11

6

Preliminary

G

D

S G

D

S

G

D

S

ENGND

IN OUTADJ

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PP2V5_PWRON FET SWITCHPEAK CURRENT 0.1A

@ VGS=2.5 VRDSON=0.04 OHM

PP2V5_ALL VOLTAGE REGULATOR

RDSON=0.04 OHM

0.1A CONTINUOUS

NOSTUFF OPTION TO DELAY 2.5V PWRON TO COME UP WITH 3.3V PWRON

VOUT=VREF*(R1581+R1582)+1=5.505VDCIRU3037CS VREF=1.24VDCSET OUTPUT=2.5V

PP2V5_RUN FET SWITCH

@ VGS=2.5 V

POWER BUDGET CURRENT OF TOTAL RAILS

NOTE:

0.2A PEAK

PEAK CURRENT 0.1A

6.3VCERM1206

10UF20%

2

1 C1580

PP2V5_ALL

PP3V3_ALL

PP2V5_ALLPP2V5_ALL

0.01UF20%

402CERM16V

2

1 C1581

20%16VCERM402

0.01UF21

C1582

PP2V5_RUN

SOT-3632N7002DW-X-F

4

5

3Q15042N7002DW-X-F

SOT-363

1

2

6 Q1504

PP5V_ALL

5%

100K

402

1/16WMF-LF

2 1

R1508

SI3446DVTSOP

436521

Q1506

PP2V5_PWRON

2N7002SOT23-LF

2

1

3

Q1505

5%

MF-LF1/16W

402

100K2 1

R1509

PP5V_ALL

NOSTUFF

402

0

1/16WMF-LF

5%

21

R1512

0

5%1/16WMF-LF402

21

R1513

TSOPSI3446DV

4

3 6

5

2

1

Q1503

CASE-C1ELEC6.3V20%330UF

2

1 C15831%1/16WMF-LF402

1.02K

2

1R1581

1/16W1%

402

1K

MF-LF2

1R1582

CRITICAL

SOP-8

MIC39102

32

8765

1 4

U1580

402

5%3.3K

1/16WMF-LF

2

1R1580

SYNC_DATE=05/19/2005SYNC_MASTER=FINO-PC

15415

07051-6863

2.5V Vreg


SYS_SLEEP

U1580_ADJ

U1580_EN

PWRON_L

Q1505_G

Q1503_G

Q1506_G

54 30 26 16

16

13

13

16

12

12

4

11

11 Preliminary

G

D

S

G

D

S

02

G

D

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

POWER SEQUENCING PIN TO DELAY TO BRING UP 3.3V LAST FOR SHASTA

IRF7413SO-8

CRITICAL

321

4

8765

Q1600

5%1/16WMF-LF402

47K

2

1R1600

1/16W

402

3.6K5%

MF-LF2

1R1602

SO-8IRF7413

321

4

8765

Q1602402

1/16WMF-LF

5%3.6K

2

1R1607

1/16W

402MF-LF

5%47K

2

1R1601

SOT-3632N7002DW-X-F

4

5

3

Q1601

2N7002DW-X-FSOT-363

1

2

6

Q1601

CERM402

0.01UF20%16V

2

1 C1600

0.01UF20%16VCERM402

2

1 C1601

SN74LVC1G02SOT23-5

4

5

3

2

1

U1601

PP12V_ALL

PP5V_ALL

PP3V3_ALL

PP12V_ALL

PP5V_PWRONPP3V3_ALL

PP3V3_PWRON

402

5%

MF-LF

01/16W

2

1R1604

NOSTUFF

402

0

1/16W5%

MF-LF

21

R1603

20%

CERM402

0.1UF10V

2

1 C1603

SOT23-LF2N7002

2

1

3

Q1603

10K1/16W

402

5%

MF-LF2

1R1605

NOSTUFF

402

5%

MF-LF1/16W

10K

2

1R1608

NOSTUFF

1/16WMF-LF

5%

402

3.3K

2

1R1609


051-6863 07

16 154

5V & 3.3V Fets

Q1601G

SYS_SLEEP


GATE_5V_PWRON

SYS_POWERUP_L_BUF

PP3V3_RUN

SYS_POWERUP

PWRON_L

GATE_3V3_PWRON

54 30 26 15

13

13

12

12

15

7

11

11

4

7

6

15

Preliminary

RESET*

TDI

DVDD

VESTA MISC

1 OF 3

PVDDAVDDL AVDD

GNDAGNDOVDD

REGSUP1REGSEN1REGCTL1

REGSUP2REGSEN2REGCTL2

2.5V_EN

DNCDNC

TDOTCKTMSTRST*

NCNC

G

D

S

G

D

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

Page Notes

IPU

IPU

VESTA HAS INTERNAL PULLUPS. MLB

PULLUPS MAY BE NOSTUFFED IN EVT.

RESET ASSERT REQUIREMENT IS 20MS TO 100MS

To keep Vesta from being held

IPU

IPU

IPU

0 - OVDD=3.3V

1 - OVDD=2.5V

2.5V_EN

WHEN OVDD=2.5V GMII PINS ARE NOT 3.3V TOLERANT

IPD

SCHMITT TRIGGER W/ INTERNAL PULLUP

M23: PP3V3_ENETFW IS AN ALL RAIL

M23: PP3V3_ENETFW IS AN ALL RAIL

VESTA JTAG

(NONE)

regulator will be in continuous mode.

Signal aliases required by this page:

Controls operating mode of Vesta 1.2V

Power aliases required by this page:

regulator. If both options are off the

NC

NC

L9/M9 N5/N6 N9/N10

M23: ADDED C1726 AND C1744 PER BROADCOM RECOMMENDATIONS

in reset when system is offNOTE: Reset GPIO is active HIGH

L6/M6

BOM options provided by this page:- VESTA1V2_BURST / VESTA1V2_PULSE

10V

402CERM

0.1uF20%

2

1 C1710

402CERM10V20%0.1uF

2

1 C1711

402

10V20%

CERM

0.1uF

2

1 C171220%10VCERM402

0.1uF

2

1 C1713

CERM

0.1uF20%10V

4022

1 C1703

10VCERM402

20%0.1uF

2

1 C1702

402

10V20%

CERM

0.1uF

2

1 C170120%10V

0.1uF

402CERM2

1 C1700 402CERM10V20%

0.1uF

2

1C1722

10VCERM402

20%0.1uF

2

1C1725

CERM10V

402

20%0.1uF

2

1C1721

402CERM10V20%

0.1uF

2

1C1724

0.1uF

402CERM10V20%

2

1C17310.1uF

20%10VCERM402

2

1C1730

10VCERM402

20%0.1uF

2

1C1720

10VCERM402

20%0.1uF

2

1C1723

0.1uF

402CERM10V20%

2

1C17430.1uF

402

20%10VCERM 2

1C17420.1uF

402

20%

CERM10V

2

1C17410.1uF

402CERM10V20%

2

1C1740

805

6.3VX5R

10%10UF

2

1 C1708

FERR-EMI-600-OHM

SM

21

L1700

VESTA-V1.3FBGA-200-LF

OMIT

D8

E8

E10

D7

E7

H4

E2

E1

F2

F1

G4

G5

N4

A15

K1

F15

A7

A1

M13

C3

K2

J2

F14

C14

B7

B2

A2

J1

C15

B15

B1

E9

C9

N10

N9

N6

N5

M9

M6

L9

L6

R12

R3

P11

P10

P5

P4

N8

N7

M8

M7

L8

L7

J12

J11

P9

P8

P7

P6

H12

H11

M3U1701

5%1/16WMF-LF402

1K

2

1R1740

402MF-LF1/16W5%1K

2

1R1743

402MF-LF1/16W5%1K

2

1R1742

402MF-LF1/16W5%1K

2

1R1741

10UF10%

X5R6.3V

8052

1C1726

805X5R

10%10UF

6.3V2

1C1744

0

5%1/16W

402MF-LF

NOSTUFF

21

R1720

402CERM

10%1UF6.3V2

1 C1750

47K

MF-LF402

5%1/16W

2

1R1751

SOT-3632N7002DW-X-F

1

2

6

Q1750

10K5%

MF-LF402

1/16W

2

1R1750

SOT-3632N7002DW-X-F

4

5

3

Q1750

10UF

805

6.3VX5R

10%

2

1 C1714

10K1/16W

402MF-LF

5%

2

1R1752

Vesta Core / Misc

051-6863 07

SYNC_MASTER=FINO-HC SYNC_DATE=05/19/2005

17 154

VESTA_RESET_RC

=PP3V3_ENETFW

=PP2V5_ENETFW

VESTA_RESET_HENETFW_RESET

=PP3V3_ENETFW

MAKE_BASE=TRUE

TP_JTAG_VESTA_TMS MAKE_BASE=TRUE

TP_JTAG_VESTA_TDO

=JTAG_VESTA_TRST_L

=JTAG_VESTA_TCK=JTAG_VESTA_TDO

=JTAG_VESTA_TMS

TP_VESTA_2_5V_EN

TP_VESTA_REGCTL1

TP_VESTA_REGSUP1TP_VESTA_REGSEN1

TP_VESTA_REGCTL2

TP_VESTA_REGSUP2TP_VESTA_REGSEN2

TP_VESTA_DNC_C9TP_VESTA_DNC_E9

=JTAG_VESTA_TCK=JTAG_VESTA_TDI=JTAG_VESTA_TDO

MAKE_BASE=TRUE

TP_JTAG_VESTA_TCK

=PP3V3_ENETFW

=JTAG_VESTA_TDI

VOLTAGE=1.2V

PP1V2_VESTA_AVDDLMIN_NECK_WIDTH=0.25 MMMIN_LINE_WIDTH=0.50 MM

=PP3V3_ENETFW

=PP3V3_ENETFW

VESTA_RESET_L

=JTAG_VESTA_TRST_L

MAKE_BASE=TRUE

TP_JTAG_VESTA_TDI

MAKE_BASE=TRUE

TP_JTAG_VESTA_TRST_L

=JTAG_VESTA_TMS

=PP1V2_ENETFW

139

139

139

139

139

132

139

132

132

132

132

139

17

132

17

17

17

17

132

7

7

132 24

7

17

17

17

17

9

9

9

9

9

9

9

9

9

17

17

17

7

17

7

7

17

17

7

Preliminary

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

VDD_CORE

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

CORE_GND

VDD_CORE

CORE & PCI-E POWER

(9 OF 10)

(1.6V-1.2V)PP

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

DRAWING

Q63 = PP1V6

1.6V

2

PAGE 19

KODIAK CORE KODIAK-ASIC-040812

BGA

SEE_TABLE

U15

T20

T16

R22

R18

R14

P21

AC22

AC18

AC14

AB21

AB17

AA23

P17

AA19

AA15

Y20

Y16

W22

W18

W14

V21

V17

U19

N15

U14

T21

T17

R23

R19

R15

P20

AC23

AC19

AC15

AB20

AB16

AA22

P16

AA18

AA14

Y21

Y17

W23

W19

W15

V20

V16

U18

N14

U1900 6.3V

1UF

CERM402

10%

2

1 C1906

6.3V

1UF

CERM402

10%

2

1 C1900

6.3V

1UF

CERM402

10%

2

1 C1905

6.3V

1UF

CERM402

10%

2

1 C1914

6.3V

1UF

CERM402

10%

2

1 C1913

6.3V

1UF

CERM402

10%

2

1 C1919

6.3V

1UF

CERM402

10%

2

1 C1924

6.3V

1UF

CERM402

10%

2

1 C1918

6.3V

1UF

CERM402

10%

2

1 C1923

6.3V

1UF

CERM402

10%

2

1 C1912

6.3V

1UF

CERM402

10%

2

1 C1911

6.3V

1UF

CERM402

10%

2

1 C1917

6.3V

1UF

CERM402

10%

2

1 C1922

6.3V

1UF

CERM402

10%

2

1 C1916

6.3V

1UF

CERM402

10%

2

1 C1921

6.3V

1UF

CERM402

10%

2

1 C1910

6.3V

1UF

CERM402

10%

2

1 C1915

6.3V

1UF

CERM402

10%

2

1 C1920

6.3V

1UF

CERM402

10%

2

1 C1904

P4MMSM

1

PP1900

6.3V

1UF

CERM402

10%

2

1 C1909

6.3V

1UF

CERM402

10%

2

1 C1903

6.3V

1UF

CERM402

10%

2

1 C1908

6.3V

1UF

CERM402

10%

2

1 C1902

6.3V

1UF

CERM402

10%

2

1 C1907

6.3V

1UF

CERM402

10%

2

1 C1901

07051-6863

19 154

SYNC_DATE=05/19/2005SYNC_MASTER=Q63

KODIAK CORE & BYPASS

=PPVCORE_PWRON_NB

<XR_PAGE_TITLE>

LAST_MODIFIED=Thu May 19 14:26:38 2005

59A6 42A4 20A8 3A4

Preliminary

PP

PP

ADD1

ADD0

ALERT

SMBDATA

SMBCLK

VCC

NC_5

NC_1

STBY

DXP

NC_16

GND

NC_9

NC_13

DXN

(SYM_VER2)

PMR_CLK_STOP_L

CE1_LT_TCK

CE1_B_TDO

CE1_DI1_TMS

CE1_MC_TDI

CE1_DI2_TRST

CE0_TEST

SYS_THDIO_D

SYS_THDIO_G

VD5_0

VD5_1

VD5_2

NORTH_BRIDGE_RESET_L

HRESET_L

SUSPENDACK_L

SUSPENDREQ_L

SYS_ISCL0

SYS_ISCA0

SYS_ISCA1

SYS_ISCL1

API_ISCA

API_ISCL

PMR_CLK_P

PMR_CLK_N

(10 OF 10)

POWER/TEST/MISC

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

ON PAGE 24 )

SHASTA GPIO TERMINATIONS

NOTE:

PLACE TERM R/C CLOSE TO KODIAK

NOTE: LOW = DISABLE PMR_CLK

PMR_CLK_STOP CAN BE USED TO STOP ALL CLOCKS IN KODIAK

KODIAK JTAG_TRST PULLED HIGH

AND SYS_IO_RESET_L (SMU)

PCI_RESET_L IS AN ’AND’ OF SB_PCI_RESET_L (SB)

THESE PINS HAVE INTERNAL PULLUPS OR PULLDOWNS

PLACE R2012 IN AN ACCESSIBLE LOCATION

USED FOR DEBUG

C2055 ADDED FOR KODIAK RAM DECOUPLING

PAGE 58 IS SHORT ONE CAP

KODIAK ALIASES

1 | 0 | 98/99hiZ | 1 | 56/57

1 | hiZ| 9A/9B

A0 | A1 | ADDR----+----+------ 0 | 0 | 30/31 0 | hiZ| 32/33

0 | 1 | 34/35hiZ | 0 | 52/53

1 | 1 | 9C/9D

hiZ | hiZ| 54/55

NEED TO CHECK ALL I2C ADDRESSES

TO ALLOW SMU DEBUG ACCESS

(SOME OF THESE ARE NOSTUFFSHASTA ALIASES

SHASTA JTAG

NB_OVERTEMP

PLACE BY IC

1UF

402CERM6.3V10%

2

1C2052

402CERM6.3V10%1UF

2

1C2051

CERM402

1UF10%6.3V

2

1C2050

1.5PF

402CERM

NOSTUFF

50V+/-0.25PF

2

1 C2053402

5%

MF-LF

0

1/16W

2

1R2000 402

1/16W1%

MF-LF

60.4

NOSTUFF

2

1R2001

402

1/16W1%

MF-LF

60.4

NOSTUFF

2

1R2002

402

1/16W1%

MF-LF

1K

2

1R2003

NOSTUFF

0

5%1/16W

402MF-LF

21

R2012

10K

MF-LF

5%1/16W

4022

1R2013

SM

2 1

XW2000SMP4MM

1

TP2000

SMP4MM1

TP2002

402MF-LF

4.7K5%1/16W

2

1R2053

1/16WMF-LF402

5%4.7K

NOSTUFF

2

1R2054

10K

5%1/16WMF-LF402

21

R2061

10K

5%1/16WMF-LF402

21

R2062

402MF-LF1/16W5%

10K21

R2063

402MF-LF1/16W5%

10K21

R2064

0

NOSTUFF

5%1/16WMF-LF402

21

R2074

1/16WMF-LF

5%4.7K

4022

1R2073

1UF10%6.3VCERM402

2

1 C2055

1/16W5%

MF-LF

0

402

NOSTUFF

21

R2087

5%1/16WMF-LF

1K

NOSTUFF

4022

1R2084

402

5%1/16WMF-LF

1K

2

1R2085

5%1/16WMF-LF

1K

4022

1R2083

5%1/16WMF-LF

1K

NOSTUFF

4022

1R2086

CERM10V

20%0.1UF

402

2

1 C2080

10%

0.0022UF

50V

CERM402

21

C2081

MAX6690MEE

QSOP

2

15

12

14

9

5

16

13

1

87

3

4

11

6

10

U2080

1/16W5%

MF-LF402

20021

R2082

BGA

KODIAK-ASIC-040812

AH01

AF05

AF02

G15

F15AJ05

AK03

AH06

AG04

AJ01

AJ03

AG02

AE09

AE10

AL01

AG01AG07

AJ04

AK06

AL02

AG05

AG08

AH03

AG03

U1900

KODIAK & SHASTA MISC

051-6863 07

20 154


=PP3V3_RUN_SMU

MIN_NECK_WIDTH=0.38MMMIN_LINE_WIDTH=0.38mm

TSENSE_NB_VCC

NB_THERM_KMIN_LINE_WIDTH=0.25mmMIN_NECK_WIDTH=0.25MMDIFFERENTIAL_PAIR=TSENSE_NB

NET_SPACING_TYPE=TSENSE_DIFPAIRNET_PHYSICAL_TYPE=10MIL_WIDTH

I2C_NB_TEMP_SCL

I2C_NB_TEMP_SDA TSENSE_NB_ADD0

TSENSE_NB_OVERTEMP_L

TSENSE_NB_ADD1

SYS_OVERTEMP_L

=PP1V8_PWRON_NBMEM

RAI_EXP_INTR_L<2>

JTAG_SB_TRST_L

JTAG_NB_TCK

NB_PU_RST_L


JTAG_NB_TRST_L

MAKE_BASE=TRUETP_JTAG_SB_TMS

MAKE_BASE=TRUENB_SLOT_RESET_L

JTAG_SB_TDI

JTAG_SB_TCKMAKE_BASE=TRUE

TP_JTAG_SB_TCK

MAKE_BASE=TRUETP_JTAG_SB_TDO

RAI_EXP_INTR_L<1>

RAI_EXP_INTR_L<0>

MAKE_BASE=TRUETP_JTAG_SB_TDI

NB_PU_RST_L

NB_THERM_A

CE0TEST

JTAG_NB_TRST_L

JTAG_NB_TDO

NB_PMR_CLK_P

NB_HRST_L

I2C_NB_A_SCL

NB_PMR_CLK_N

I2C_NB_C_SCL

I2C_NB_B_SDA

JTAG_NB_TDI

JTAG_NB_TMS

I2C_NB_B_SCL

I2C_NB_A_SDA

I2C_NB_C_SDA

NB_SUSPEND_REQ_L

NB_SUSPEND_ACK_L

TERM_RC


PMR_CLK_DIS_L

PP_2V5PWRONNBMISC

PCI_RESET_LMAKE_BASE=TRUE

=PCI_ROM_RESET_L

=PCI_USB2_RESET_L

=PCI_AIRPORT_RESET_L

=GPU_RESET_L

JTAG_SB_TDO

JTAG_SB_TMS

RAI_EXP_INTR_L<3>

MAKE_BASE=TRUENC_PMR_CLK_DIS_L PMR_CLK_DIS_L

NB_THERM_K

NB_PMR_CLK_STOP_L


=PP3V3_PWRON_SB

MIN_LINE_WIDTH=0.25mmMIN_NECK_WIDTH=0.25MMDIFFERENTIAL_PAIR=TSENSE_NB

NET_PHYSICAL_TYPE=10MIL_WIDTH

NET_SPACING_TYPE=TSENSE_DIFPAIR

NB_THERM_A

39

39

39

119

59

30

30

30

56

30

93

58

28

28

28

24

28

28

39 24

30

30

20

20

30

20

30

27

27

30

30

62

20

119

20

23

7

20

39

39

24

7

24

9

9

20

7

9

9

24

24

24 9

9

24

24

9

20

20

9

9

26

39

26

39

39

9

9

39

39

39

30

30

7

20

6

92

125

122

121

84

24

24

24

6 20

20

7

7

20 Preliminary

VIO1

POWER

VDDO33

VDDO25

VIO2

VDDP_KL

VDDC

GND

GND

GND

(1 OF 8)

PP

PP

PP

DRAWING

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

Shasta max (est 06/30/03) current:

DIGITAL - 1.2V - 950 mA (1175 mW)

VDDPs - 2.5V - 100 mA ( 250 mW)

I/O 3.3 - 3.3V - 220 mA ( 770 mW)

Page NotesPower aliases required by this page:

- =PP3V3_PWRON_SB_PCI64 (VIO1) (TO 5V OR 3.3V)

- =PP3V3_PWRON_SB

- =PP2V5_PWRON_SB

- =PP1V2_PWRON_SB_VCORE

characteristics required by the PCI

appropriate PCI bus voltage and

other Shasta supplies.


For PCI_AD<63..32>

ANALOG12 - 1.2V - 600 mA ( 760 mW)

I/O 2.5 - 2.5V - 20 mA ( 60 mW)

For PCI_AD<31..0>

PCI, otherwise 3.3V.

(NONE)

(NONE)

Power Sequencing:

Total: 3015 mW

Must power Shasta VCore rail before any

BOM options provided by this page:

spec for 5V vs. 3.3V operation.

different drive timing

NOTE: PCI pads use the VIO supply to meet

CONNECT VIO2 TO

VIO1 TO SAME IF 64-BIT

- =PP3V3_PWRON_SB_PCI32 (VIO2) (TO 5V OR 3.3V)

10V

0.1uF

CERM402

20%

2

1 C2304

10V

0.1uF

CERM402

20%

2

1 C2305

10V

0.1uF

CERM402

20%

2

1 C2306

10V

0.1uF

CERM402

20%

2

1 C2307

10V

0.1uF

CERM402

20%

2

1 C2308

10V

0.1uF

CERM402

20%

2

1 C2309

10V

0.1uF

CERM402

20%

2

1 C2302

10V

0.1uF

CERM402

20%

2

1 C2301

10V

0.1uF

CERM402

20%

2

1 C2300

10V

0.1uF

CERM402

20%

2

1 C2314

10V

0.1uF

CERM402

20%

2

1 C2313

10V

0.1uF

CERM402

20%

2

1 C2312

10V

0.1uF

CERM402

20%

2

1 C2311

10V

0.1uF

CERM402

20%

2

1 C2310

0.1uF

10V

CERM402

20%

2

1 C23340.1uF

10V

CERM402

20%

2

1 C2333

10V

0.1uF

CERM402

20%

2

1 C2339

10V

0.1uF

CERM402

20%

2

1 C2338

10V

0.1uF

CERM402

20%

2

1 C2332

10V

0.1uF

CERM402

20%

2

1 C2331

10V

0.1uF

CERM402

20%

2

1 C2337

10V

0.1uF

CERM402

20%

2

1 C2336

10V

0.1uF

CERM402

20%

2

1 C2330

10V

0.1uF

CERM402

20%

2

1 C2335

10V

0.1uF

CERM402

20%

2

1 C2324

402

10V

0.1uF

CERM

20%

2

1 C2323

10V

0.1uF

CERM402

20%

2

1 C2329

402

10V

0.1uF

CERM

20%

2

1 C2328

0.1uF

10V

CERM402

20%

2

1 C2322

10V

0.1uF

CERM402

20%

2

1 C2321

10V

0.1uF

CERM402

20%

2

1 C23270.1uF

10V

CERM402

20%

2

1 C2326

10V

0.1uF

CERM402

20%

2

1 C2320

10V

0.1uF

CERM402

20%

2

1 C2325

10V

0.1uF

CERM402

20%

2

1 C2351

10V

0.1uF

CERM402

20%

2

1 C2350

10V

0.1uF

CERM402

20%

2

1 C2357

10V

0.1uF

CERM402

20%

2

1 C2356

10V

0.1uF

CERM402

20%

2

1 C2355

10V

0.1uF

CERM402

20%

2

1 C2362

10V

0.1uF

CERM402

20%

2

1 C2361

10V

0.1uF

CERM402

20%

2

1 C2360

10V

0.1uF

CERM402

20%

2

1 C2365

V1.1

SEE_TABLE

SHASTA

BGA-LF

Y19

W22

L21

K21

H17

H18

V8

D1

B5

B2

B1

AB6

AB2

AB10

AA3

W4

V7

U9

U12

R2

M1

L7

H1

F8

F4

AA2

AA1

G15

D19

P15

N8

M15

L8

L15

K8

J15

J12

T15

T10

R9

R12

R10

H8

H15

D2

C19

AB22

AB1

W5

W19

U22

U13

U10

T12

R19

P9

P4

AA6

P14

P13

P12

P10

N9

N22

N13

N12

N11

N10

AA10

M2

M14

M13

M12

M11

M10

L9

L16

L14

L13

A5

L12

L11

L10

K9

K7

K13

K12

K11

K10

J22

A22

J16

J14

J13

J11

J10

H9

H2

F7

F3

E22

A2

A1

U2300

SM

2 1

XW2304

SM

2 1

XW2303

SM

2 1

XW2300 SMP4MM1 PP2300

P4MMSM

1 PP2303

SMP4MM1 PP2304

10V

0.1uF

CERM402

20%

2

1 C2303

ABBREV=DRAWING

TITLE=KILOHANA

23 154

051-6863 07

SYNC_MASTER=Q63 SYNC_DATE=05/19/2005

Shasta Core Power

NO_TEST=YESPP_2V5PWRONSB

=PP3V3_PWRON_SB

PP_3V3PWRONSBPCI64


=PP1V2_PWRON_SB_VCORE

=PP2V5_PWRON_SB


PP_1V2PWRONSBVCORE

=PP2V5_PWRON_SB

<XR_PAGE_TITLE>


154D2 149A3 120C4 119A3 29C7 29B4 24D2 24C3

138C6

138C6

24B7

119C3

119C3

24A6

24D5

24D5

20D2

23B2

23C2

3A3

3A2

3B2

3C1

3A2

3C1

Preliminary

GNDPLL_49

GNDXTAL_18 PLL_45

GND

VIOPME

PLL_49VDD

PLL_45VDD

XGI

XTALS

TEST

PWR_MGT

PCI

GPIO

I2C

I2S2

I2S1

I2S0

(2 OF 8)

PCI1C_BE_4_L

PCI1C_BE_5_L

PCI1C_BE_6_L

PCI1C_BE_7_L

PCI1PAR64_H

XGI_DTI_H

XGI_DTO1_H

XGI_CLK_H

XGI_DTO0_H

PCI1ACK64_L

PCI1REQ64_L

PCI1AD_60_H

PCI1AD_63_H

PCI1AD_62_H

PCI1AD_61_H

PCI1AD_50_H

PCI1AD_52_H

PCI1AD_53_H

PCI1AD_51_H

PCI1AD_59_H

PCI1AD_58_H

PCI1AD_57_H

PCI1AD_56_H

PCI1AD_55_H

PCI1AD_54_H

PCI1AD_40_H

PCI1AD_41_H

PCI1AD_42_H

PCI1AD_43_H

PCI1AD_44_H

PCI1AD_49_H

PCI1AD_48_H

PCI1AD_47_H

PCI1AD_46_H

PCI1AD_45_H

PCI1AD_39_H

PCI1REQ_5_L

PCI1AD_32_H

PCI1AD_34_H

PCI1AD_38_H

PCI1AD_37_H

PCI1AD_36_H

PCI1AD_33_H

PCI1AD_35_H

PCI1GNT_5_L

PCI1GNT_4_L

PCI1REQ_4_L

PCI1GNT_3_L

PCI1REQ_3_L

XTAL_18XTALVDD VDD

FSTEST

XTAL_18_I

XTAL_18_O

XTALI

XTALO

PLLTEST

TEST_MODE_H

TDI

TCK

TMS

TDO

INTRWD_H

I2CDATA_H

I2CCLK_H

PCI_SEL32BIT_H

GPIO_H_3

GPIO_H_2

GPIO_H_1

I2S2SYNC_H

I2S2BITCLK_H

I2S2MCLK_H

I2S2DTO_H

I2S2DTI_H

GPIO_H_0

I2S1DTO_H

I2S1MCLK_H

I2S1BITCLK_H

I2S1SYNC_H

I2S1DTI_H

I2S0BITCLK_H

I2S0SYNC_H

I2S0DTI_H

I2S0DTO_H

I2S0MCLK_H

RESET_L

STOPXTALS_L

SUSPENDREQ_L

SUSPENDACK_L

PCI1PME_L

TRST_L

PP

PP

PP

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

DRAWING

PLACE R2402 CLOSE TO SHASTA

AUDIO GPIO - see note on right

NorthBridge / SouthBridge MPIC Routing

DIFFERENTIAL_PAIR

DO NOT swap between RPAKs

ELECTRICAL_CONSTRAINT_SET

- _PP2V5_PWRON_SB

- _PP3V3_PCI




- PCI_64BIT:

- MPIC_NB/MPIC_SB:

Page Notes

- _PP3V3_PWRON_SB

- _PP1V2_PWRON_SB

(NONE)

NOTE: XGC required for Shasta GPIOs

the audio circuit to provide the

NOTE: It is the responsibility of

36

8

14

GPIO

16

24

13

(SCCB)

20

19

21

9

22

15

12

45

26

35

(I2S1_RESET_L)

I2S2: S/P-DIF

NC

46

53

54

52

48

27

34

33

32

30

49

7

(SCCA)

51

(I2S0_DEV_TO_SB_DTI) 6

50

47

31

29

I2S0: Audio DAC

(I2S2_DEV_TO_SB_DTI)

25

28

10

11

17

37

38

39

40

41

42

43

44

AUDIO GPIOS

SPEC SHOWS LOAD CAPACITANCE OF 16PF FOR 197S0004

necessary pull-ups & pull-downs.

FROM SOUTHBRIDGE

FROM NORTHBRIDGE

TO CPU

Configures Shasta for 64-bit PCI

To SouthBridge ->

NET_SPACING_TYPE

AUDIO PAGES IS RESPONSIBLE FOR TERMINATION OF I2S0 AND I2S2

DO NOT ADD PULLUP/DOWN FOR I2S0 AND IS=2S2 IN THIS PAGE

(I2S1_DEV_TO_SB_DTI)

Re-pin within each RPAK as necessary

interrupt controller.

Selects whether NorthBridge or

SouthBridge MPIC will be used for

I2S1: Soft Modem

23

18

(I2S2_RESET_L)

PLACE R2432 CLOSE TO SHASTA

805X5R6.3V

10%10UF

2

1 C2400

10%6.3V

1uF

CERM402

2

1 C2401

10%6.3V

1uF

CERM402

2

1 C2411

805X5R6.3V

10%10UF

2

1 C2410

805X5R6.3V

10%10UF

2

1C2420

10%6.3V

1uF

CERM402

2

1C2421

805X5R6.3V

10%10UF

2

1C2430

10%6.3V

1uF

CERM402

2

1C2431

1/16W5%

402

10K

MF-LF

2

1R2400

CRITICAL

18.432M

SM

21

Y2490

200

MF-LF402

1%1/16W

2

1R2490

50V

22pF

CERM402

5%

2

1 C2491

50V

22pF

CERM402

5%

2

1C2490

4.7K

MF-LF402

1%1/16W

2

1R2480

SHASTAV1.1

BGA-LF

Y13

V13

W13

AB12

W14

V15

U15

T9

U7

W2

Y4

W17

W12

Y11

A3

W11

AA11

AB11

U11

V11

W10

E9

Y12

AA12

AA13

AB13

U14

W6

U16

AB21

U17

K17

W18

E18

Y20

AA20

AA19

K20

K22

H22

J20

H21

G22

F22

J19

H20

G21

F21

J17

H19

K18

D22

G20

D21

C22

G19

F20

C21

E20

D20

F19

E19

G18

G17

C20

B21

A21

F16

G16

F17

F18

A20

D18

L17

V12

W9

Y7

Y8

AA5

AB4

AA7

V9

AB5

V10

AA8

Y6

U8

Y5

W7

AA4

AB7

Y9

W8

AB3

Y2

V5

V14

U2300

10V

0.1uF

CERM402

20%

2

1 C2440

10K

MF-LF402

5%1/16W

1 2

R2450

10K

MF-LF402

5%1/16W

1 2

R2451

10K

MF-LF402

5%1/16W

1 2

R2452

10K

MF-LF402

5%1/16W

1 2

R2453

10K

MF-LF402

5%1/16W

21

R2456

10KMF-LF4025%

1/16W1 2

R2457

10K

MF-LF402

5%1/16W

21

R2459

1/16W5%

402

10K

MF-LF

21

R2463

SAT_PWRON1K

MF-LF402

1%1/16W

21

R2460

MF-LF402

5%1/16W

4.7K21

R2461

10K

MF-LF402

5%1/16W

21

R2466

10K

MF-LF402

5%1/16W

21

R2465

10K

MF-LF402

5%1/16W

21

R2467

10K

MF-LF402

5%1/16W

21

R2468

1K

MF-LF402

1%1/16W

NOSTUFF

21

R2462

10K

MF-LF402

5%1/16W

21

R2455

10K

MF-LF402

5%1/16W

21

R2454

3.3

MF-LF805

5%1/8W

21

R2405

MF-LF

3.3

805

5%1/8W

21

R2410

3.3

MF-LF805

5%1/8W

21

R2420

3.3

MF-LF805

5%1/8W

21

R2430

10K

MF-LF402

5%1/16W

21

R2464

10K

MF-LF402

5%1/16W

21

R2422

MF-LF402

5%1/16W

4.7K

NOSTUFF

21

R2406

10K

MF-LF402

5%1/16W

21

R2404

10K

MF-LF402

5%1/16W

21

R2421

SAT_RUN

1K

MF-LF402

1%1/16W

21

R2416

NOSTUFF

10K

MF-LF402

5%1/16W

21

R2417

10K

MF-LF402

5%1/16W

2 1

R2413

10K MF-LF402

5%1/16W

2 1

R2414

10K

MF-LF402

5%1/16W

2 1

R2415

1/16W5%

MF-LF

10K

4022

1R2476

MPIC_SB

2N3904LFSOT23

2

3

1 Q2476

MPIC_SB

10K

MF-LF402

5%1/16W

21

R2475

1/16W5%

402MF-LF

0MPIC_SB

21

R2478

MPIC_NB 0

MF-LF402

5%1/16W

2

1R2479

NO STUFF0

MF-LF402

5%1/16W

21

R2407

MPIC_NB10K

21R2408

MPIC_NB21R2409

MPIC_NB21R2412

MPIC_NB

MF-LF402

5%1/16W

21R2418

10K

MF-LF402

5%1/16W

21

R2419

SM

2 1

XW2400 P4MMSM

1 PP2400

P4MMSM

1 PP2405

P4MMSM

1PP2406

I586

I587

I588

I589

I590

I591

I592

I593

I594

I595

I596

I597

I598

I599

I600

I601

3363RP2410

3354RP2410

3381RP2420

3372RP2410

3363RP2420

3381RP24103363RP24303372RP2430

3354RP2430

3381RP24303372RP24203354RP2420

0

MF-LF402

5%1/16W

21

R2402

0

MF-LF402

5%1/16W

21

R2432

Shasta Serial / MiscSYNC_DATE=05/19/2005SYNC_MASTER=FINO-ME

154

051-6863 07

24TITLE=KILOHANA

ABBREV=DRAWING

SB_CPU_VDNAP2

NB_SLOT_RESET_LPCI_AIRPORT_INT_L

NB_SLOT_RESET_L_R

SB_PCI_SEL32BIT

RAI_EXP_INTR_L<3>

RAI_EXP_INTR_L<0>

=PP3V3_PWRON_SB

VOLTAGE=1.2V

PP1V2_PWRON_SB_PLL45VDD

MIN_NECK_WIDTH=0.38mmMIN_LINE_WIDTH=0.50mm

P3MM SPACING PCI_AIRPORT_INT_L

I2S1_DEV_TO_SB_DTI

I2S1_RESET_L

CPU_A0_INT_R_L

NB_CPU_A0_INT_L

I2S0_MCLKI2S0_TO_DEV AUDIO

I2S0_MCLK

I2S0_BITCLKI2S0_MCLK_R

I2S2_SB_TO_DEV_DTO_R

I2S2_MCLK_R

I2S2_BITCLK_R

I2S2_SYNC_R

I2S2_SB_TO_DEV_DTO

I2S1_SYNC_R

I2S1_BITCLK_R

I2S1_MCLK_R


I2S1_SYNC

I2S1_BITCLK

I2S1_MCLK

I2S1_SB_TO_DEV_DTO

I2S0_SYNC_R

I2S0_BITCLK_R


I2S0_SYNC

I2S0_SB_TO_DEV_DTO

P3MM SPACING PCI_USB2_INT_L

P3MM SPACING SB_CPU_A1_SRESET_L

SB_CPU_B0_SRESET_LP3MM SPACINGSB_CPU_B1_SRESET_LP3MM SPACING

=PP2V5_PWRON_SB

I2S0_DEV_TO_SB_DTI

P3MM SPACING I2S1_RESET_L

SB_GPIO_H_3

=PP3V3_RUN_SB_PCI

NB_TO_SB_INT

SB_CPU_A0_INT_L

NB_INT_L_R

=PP3V3_RUN_SB_PCI

MAKE_TBEN_SYNC_L

SYS_OVERTEMP_L

PCI_USB2_INT_L

PCI_AIRPORT_INT_L

I2S1_RESET_L

SB_CPU_A0_INT_L

SB_CPU_A1_INT_L

SB_CPU_B0_INT_L

SB_CPU_B1_INT_L

RAI_ALERT_L

SB_CLK18M_XTALO

PP_1V2PWRONSBPLL45VDD

ENET_ENERGYDET

FW_LOWPWR

ENETFW_RESET

MAKE_TBEN_SYNC_L

SMU_TO_SB_INT_L

SYS_SLEWING_L

RAI_FATAL_L

GIGE_P2_INTB_L

GIGE_P1_INTA_L

FW_LOWPWR_R=PP3V3_PWRON_SB

NB_CHP_FLT_N_B

SB_CPU_VDNAP1

SB_TO_SMU_INT_L

SB_VDNAP0

SB_GPIO14

SB_CPU_VDNAP2

LOGIC_BRD_GOOD

SYS_OVERTEMP_L

MB_SLOT_RESET_L

NB_SLOT_RESET_L

PCIX_INT_L

=PP1V2_PWRON_SB

SB_SFC_RESET_L

I2S2_DEV_TO_SB_DTII2S2_TO_SB

SB_CLK18M_XTALO0.38mm SPACING

I2S2_BIDIR I2S2_SYNC

I2S1_SYNCI2S1_BIDIRI2S1_BITCLKI2S1_BIDIRI2S1_MCLKI2S1_TO_DEV 0.25mm SPACING

I2S0_BITCLKI2S0_BIDIR


SB_CLK25M_SATASB_CLK25M_ATA 0.38mm SPACINGSB_CLK18M_XTALO_R0.38mm SPACING

I2S2_MCLKI2S2_TO_DEV 0.25mm SPACING

I2S0_SB_TO_DEV_DTOI2S0_TO_DEV


SB_CLK18M_XTAL 0.38mm SPACING SB_CLK18M_XTALI

I2S0_SYNCI2S0_BIDIR



TP_SB_FSTEST

=PP3V3_PWRON_SB

VOLTAGE=1.2V

PP1V2_PWRON_SB_PLL49VDD

MIN_LINE_WIDTH=0.50mm

MIN_NECK_WIDTH=0.38mm

SB_CPU_B0_SRESET_L

SB_CPU_B1_SRESET_L

SB_CPU_A1_SRESET_L

SB_CPU_A0_SRESET_L

SB_CPU_B1_INT_L

SB_CPU_B0_INT_L

SB_CPU_A1_INT_L

SB_CPU_A0_INT_L

AUDIO_MIC_ID

AUDIO_HP_DET_L

AUDIO_LI_OPTICAL_PLUG_L

AUDIO_LO_DET_L

AUDIO_LO_OPTICAL_PLUG_L

ENET_ENERGYDET

MAKE_TBEN_SYNC_L

PCI_USB2_INT_L

ENETFW_RESET

FW_LOWPWR_R

RAI_FATAL_L

RAI_ALERT_L

GIGE_P2_INTB_L

GIGE_P1_INTA_L

RAI_EXP_INTR_L<1>

RAI_EXP_INTR_L<2>

PCIX_INT_L

SB_GPIO14

MB_SLOT_RESET_L

SYS_OVERTEMP_L

SB_VDNAP0

LOGIC_BRD_GOOD

SB_TO_SMU_INT_L

SB_CPU_VDNAP1

NB_CHP_FLT_N_B

SB_CLK25M_SATA

SB_CLK18M_XTALO_R

SB_CLK18M_XTALI

SB_TEST_MODE_PD

TP_SB_PLLTEST

JTAG_SB_TMS

JTAG_SB_TDI

JTAG_SB_TDO

JTAG_SB_TCK

TP_SB_WATCHDOG

I2C_SB_SDA

I2C_SB_SCL

SB_GPIO_H_3

I2S0_RESET_L

VOLTAGE=2.5V

PP2V5_PWRON_SB_XTALVDD

MIN_LINE_WIDTH=0.50mmMIN_NECK_WIDTH=0.38mm

VOLTAGE=2.5V

PP2V5_PWRON_SB_XTAL18VDD


SB_STOPXTALS_L

SMU_SUSPENDREQ_L

SB_SUSPENDACK_L

SYS_PME_L

JTAG_SB_TRST_L

SYS_SLEWING_L

NB_TO_SB_INT

SMU_TO_SB_INT_L

NET_SPACING_TYPE=P3MM SPACING

SB_SFC_RESET_L

I2S0_RESET_LP3MM SPACING

P3MM SPACING SB_CPU_B0_INT_L

P3MM SPACING SB_CPU_B1_INT_L

MB_SLOT_RESET_LP3MM SPACING

SB_CPU_A0_SRESET_LP3MM SPACING

P3MM SPACING SB_CPU_A0_INT_LP3MM SPACING NB_TO_SB_INT

P3MM SPACING NB_SLOT_RESET_L

P3MM SPACING I2S2_RESET_L

I2S2_SYNC

I2S2_RESET_L

I2S2_BITCLK

=PP3V3_PWRON_SB

SHASTA_SYS_IO_RESET_L

SYS_IO_RESET_L

I2S2_DEV_TO_SB_DTI

I2S2_MCLK

P3MM SPACING SB_CPU_A1_INT_L

I2S2_BITCLKI2S2_BIDIR

AUDIO_LI_DET_L

AUDIO_SPKR_ID

AUDIO_SPDIFIN_INT_L

AUDIO_HP_MUTE_L

AUDIO_LO_MUTE_L

AUDIO_SPKR_MUTE_L

AUDIO_EXT_MCLK_SEL


119

119

119

119

56

56

56

56

24

138

93

50

24

93

24

93

50

24

122

23

119

28

28

23

28

23

28

43

28

23

119

28

24

121

20

121

24

24

154

154

147

154

24

24

24

24

147

147

122

56

56

56

23

147

24

24

24

24

122

121

24

132

24

26

20

28

28

31

143

28

24

24

154

154

24

24

24

147

147

26

154

147

24

147

24

154

20

56

56

56

56

132

122

24

143

24

31

28

28

26

147

30

122

20

26

147

56

24

154

154

154

154

20

30

154

154

154

24

20

24

20

20

7

24

8

8

56

42

24

24

24

24

8

8

8

8

24

24

24

24

24

24

7

24

8

24

7

24

24

7

24

20

24

24

8

24

24

24

24

24

24

6

24

139

17

24

24

24

24

24

24

24 7

24

24

24

24

24

24

24

20

24

20

24

7

24

24

24

24

8

8

8

24

24

24

24

24

24

8

24

24

8

24

6

7

24

24

24

24

24

24

24

24

154

154

154

153

153

24

24

24

17

24

24

24

24

24

20

20

24

24

24

20

24

24

24

24

24

24

24

24

6

20

20

20

20

9

39

39

24

24

28

28

28

28

9

24

24

24

24

24

24

24

24

24

24

24

20

24

24

24

24

7

28

24

24

24

24

153

153

154

154

150

152

154 Preliminary

VDD_OVDD_2

VDD_OVDD_3

VDD_OVDD_5 VSS_OVDD_5

VSS_OVDD_3

VSS_OVDD_1VDD_OVDD_1

VDD_33_XTAL

VDD_OVDD_4 VSS_OVDD_4

VSS_15_C4

VSS_OVDD_2

VSS_15_PLL2VDD_15_PLL2

VDD_15_12_4

VDD_15_C4

VDD_15_PLL1

VSS_33_XTAL

VSS_15_PLL1

VDD_33_I VSS_33_I

VSS_12_6

VDD_15_C1

VDD_12_5

VSS_25

VSS_15_C3VDD_15_C3

VDD_25

VSS_12_5

VSS_33_BC

VSS_12_4VDD_12_4

VSS_15_PLL4

VSS_12_1

VSS_12_2

VDD_33_BC

VDD_12_1

VSS_15_C2

VDD_12_2

VDD_12_3 VSS_12_3

VDD_15_PLL4

VDD_15_C2

VDD_15_PLL3 VSS_15_PLL3

VDD_15_12_1

VDD_15_12_2

VDD_15_12_3

SHARED PIN

SYM 2 OF 2

VSS_15_C1

PP

PP

PP

PP

PP

PP

PP

PP

PP

DRAWING

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

Q63 APPLICATION IS PWRON

PLL_VDD ON IN SLEEP

ON IN SLEEP

ON IN SLEEP

PLACE NEAR PULSAR2

PLACE NEAR PULSAR2

PLACE NEAR PULSAR2

PLACE NEAR PULSAR2

PLACE NEAR PULSAR2

Q63 APPLICATION IS RUN

Q63 APPLICATION IS POWER ON


1/16W5%

402MF-LF

4.721

R2501

BGAPULSAR2

SEE_TABLE

A3

B5

A7

B7

B10

D11

E1

K2

G1

L8

M4

D1

D12

C8

G11

M6

E12

J10

K11

M12

K8

K4

A1

B4

A5

C9

B11

B12

C2

L2

G2

K9

L4

D2

D10

B8

F11

L6

F2

C5

A9

J11

K5

H11

K12

M10

M7

M3

U2500

1/16W5%

402MF-LF

021

R2510

1/16W5%

402MF-LF

0

NOSTUFF

21

R2511

20%

402CERM

0.1UF

10V2

1 C2572

20%

402CERM

0.1UF

10V2

1 C2573

1/16W5%

402MF-LF

021

R2512

1/16W5%

402MF-LF

021

R2513

1/16W5%

402MF-LF

021

R2514

1/16W5%

402MF-LF

021

R2515

1/16W5%

402MF-LF

021

R2516

20%

402CERM

0.1UF

10V2

1 C2501

20%

402CERM

0.1UF

10V2

1 C2575

SM

2 1

XW2500SMP4MM

1PP2500

SM

2 1

XW2501

SM

2 1

XW2502

SM

2 1

XW2503

SMP4MM

1PP2501

SMP4MM

1PP2502

P4MMSM

1PP2503

SMP4MM

1PP2506

SMP4MM

1PP2505

P4MMSM

1PP2507

SMP4MM

1PP2504

P4MMSM

1PP2508

1/16W5%

402MF-LF

4.721

R2503

1/16W5%

402MF-LF

4.721

R2505

20%

402CERM

0.1UF

10V2

1 C2505

0603

180-OHM-1.5A

21

L2501

20%

402CERM

0.1UF

10V2

1 C2509

20%

402CERM

0.1UF

10V2

1 C2511

0603

180-OHM-1.5A

21

L2503

20%

402CERM

0.1UF

10V2

1 C2513

0603

180-OHM-1.5A

21

L2505

20%

402CERM

0.1UF

10V2

1 C2515

0603

180-OHM-1.5A

21

L2507

20%

402CERM

0.1UF

10V2

1 C2517

20%

402CERM

0.1UF

10V2

1 C2519

20%

402CERM

0.1UF

10V2

1 C25221/16W5%

402MF-LF

4.721

R25070603

180-OHM-1.5A

21

L2509

20%

402CERM

0.1UF

10V2

1 C2520

20%

402CERM

0.1UF

10V2

1 C2527

20%

402CERM

0.1UF

10V2

1 C2528

20%

402CERM

0.1UF

10V2

1 C2529

20%

402CERM

0.1UF

10V2

1 C2530

20%

402CERM

0.1UF

10V2

1 C2551

20%

402CERM

0.1UF

10V2

1 C2523

20%

402CERM

0.1UF

10V2

1 C2524

20%

402CERM

0.1UF

10V2

1 C2525

20%

402CERM

0.1UF

10V2

1 C2526

20%

402CERM

0.1UF

10V2

1 C2531

20%

402CERM

0.1UF

10V2

1 C2532

20%

402CERM

0.1UF

10V2

1 C2533

20%

402CERM

0.1UF

10V2

1 C2534

10V

0.1UF

CERM402

20%

2

1 C2535

10V

0.1UF

CERM402

20%

2

1 C2536

10V

0.1UF

CERM402

20%

2

1 C2537

10V

0.1UF

CERM402

20%

2

1 C2538

10V

0.1UF

CERM402

20%

2

1 C2574

1/16W5%

402MF-LF

4.721

R2509

20%

603CERM1

2.2UF

6.3V2

1 C2545

20%

603CERM1

2.2UF

6.3V2

1 C2569

20%

603CERM1

2.2UF

6.3V2

1 C2503

20%

603CERM1

2.2UF

6.3V2

1 C2507

20%

603CERM1

2.2UF

6.3V2

1 C2521

ABBREV=DRAWING

TITLE=KILOHANA

PULSAR2 POWERSYNC_DATE=05/19/2005SYNC_MASTER=Q63

051-6863 07

15425

C2545_1


=PP3V3_PWRON_PULSAR

=PP3V3_PWRON_PULSAR

VOLTAGE=3.3VMIN_LINE_WIDTH=0.64mmMIN_NECK_WIDTH=0.2MM

PP3V3_PSL_XTAL

PP1V5_PSL_PLL2

VOLTAGE=1.5V



PP_1V5PULSAR2

PP_1V2PWRONPULSAR1

=PP1V5_PWRON_PULSAR

=PP1V5_PULSAR

=PP1V2_PWRON_PULSAR

=PP1V5_PULSAR

=PP1V5_PWRON_PULSAR

=PP3V3_PWRON_PULSAR MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.5MM

C2521_1


C2507_1


C2503_1


C2569_1

=PP3V3_RUN_PULSAR

=PP1V2_PWRON_PULSAR

=PP2V5_PWRON_PULSAR

PP3V3_PLSR_I

PP_OVDD_PULSAR1

PP_1V5PWRONPULSAR2

NO_TEST=YES


VOLTAGE=3.3V

PP3V3_PLSR_I

VOLTAGE=1.5V



PP1V5_PSL_PLL1

VOLTAGE=1.5V



PP1V5_PSL_PLL4

VOLTAGE=1.5V



PP1V5_PSL_PLL3

=PP1V5_PWRON_PULSAR

=PPOVDD_PULSAR

=PP2V5_PWRON_PULSAR

=PPOVDD_PULSAR

<XR_PAGE_TITLE>


25C4

25B8

25D8

25C3

25C4

25D8

25B8

25B2

25A5

25B5

25A5

25D3

25A5

25B2

25D3

25B4

26D8

26D8

25C3

25B3

25C3

25D3

3B4

3B4

3A4

3A4

3B2

3A4

3A4

3B4

3A7

3B2

3C1

25C4

25B2

3A4

3A3

3C1

3A3

Preliminary

XIN

GPCLK33_F1

GPCLK33_F2

GPCLK33_F0

GPCLK33_E1

GPCLK33_E0

GPCLK25_F0

GPCLK25_F1

GPCLK25_E0

GPCLK25_E1

HTBEN_1

HTBEN_0

SLEWING*

HCLKN_2

HCLKN_1

HCLKP_0

HSYNC_2

SCLK

SDATA

HCLKP_2

HCLKN_0

HSYNC_1

PD

HSYNC_0

XOUT

HCLKP_1

RESET*

OEMODE

TEST_MODE

GPCLK12_C0

REF_25

REF_15

REF_33

GPCLK12P_A1

GPCLK12P_B0

GPCLK12N_A0

GPCLK12N_A1

GPCLK12N_B0

GPCLK12P_A0

ASEL_INT*

GPCLK12P_C0

GPCLK12N_C0

GPCLK12P_C1

GPCLK12N_C1

GPCLK12P_C2

GPCLK12N_C2

GPCLK12P_C3

GPCLK12N_C3

GPCLK12P_C4

GPCLK12N_C4

GPCLK12P_D0

GPCLK12N_D0

SYM 1 OF 2

PP

PP

PP

DRAWING

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

MB_PCIX_REFCLK

66MHZ, 1.5VOVDD

33MHZ, 3.3V

33MHZ, 3.3V

PLACE ALL 0-OHM SERIES RESISTORSRESON THIS PAGE NEAR PULSAR

PULLED UP TO PP3V3_RUN ON P.28

1.5VOVDD

1.5VOVDD

1.5VOVDD

33MHZ, 3.3V

66MHZ, 3.3V

66MHZ, 3.3V

25MHZ, 2.5V

25MHZ, 2.5V

25MHZ, 2.5V

25MHZ, 2.5V

66MHZ, 1.2V

66MHZ, 1.2V

66MHZ, 1.2V

100MHZ, 1.2V

100MHZ, 1.2V

100MHZ, 1.2V

100MHZ, 1.2V

100MHZ, 1.2V

100MHZ, 1.2V

100MHZ, 1.2V

100MHZ, 1.2V

100MHZ, 1.2V

300MHZ, 1.2V

300MHZ, 1.2V

200MHZ, 1.2V

200MHZ, 1.2V

200MHZ, 1.2V

200MHZ, 1.2V

(100MHZ FOR ASPEN)

66MHZ, 1.5VOVDD

200MHZ, 1.5VOVDD

200MHZ, 1.5VOVDD

200MHZ, 1.5VOVDD

200MHZ, 1.5VOVDD

TO 1.8V ON QUASAR PAGES

QUASAR CLOCKS ARE RESISTOR DIVIDED DOWN

LAST MODIFIED: APR 26, 04

200MHZ, 1.5VOVDD

200MHZ, 1.5VOVDD

PLACE R2602 BESIDE R2659

BGA

PULSAR2

C11

C12

E3

A12

B2

B1

C3

L1

F1

H10

C1

E2 A10

A11

C10

B9

A8

B3

C4

A6

A2

A4

B6

M2

M1

K1

J2

J1

J3

H2

H3

H1

E10

G12

K10

L11

L10

M9

L7

M5

K3

E11

F12

J12

L12

M11

L9

M8

L5

L3

H12

D3

U2500

1/16W5%

402MF-LF

021

R2654

1/16W5%

402MF-LF

021

R2656

5%1/16W

402MF-LF

0

NO STUFF

21

R2652

1/16W5%

402MF-LF

330K

NO STUFF

21

R2658

SM-2

CRITICAL

25.0000M21

Y2601

CERM402

5%33PF

50V2

1 C2605

5%

402CERM

33PF

50V2

1C2607

1/16W5%

402MF-LF

24

NOSTUFF

2

1R2662F-ST-SM

U.FL-R_SMT

NOSTUFF

1

2

3

J2600

1/16W5%

402MF-LF

24

NOSTUFF

2

1R2664

1/16W1%

402MF-LF

1K

2

1R2625

MF-LF402

1/16W1%1K

2

1R2626

1/16W1%

402MF-LF

1K

2

1R2627

5% 402

021

R2612

1/16W5%

402MF-LF

10K

2

1R2613

1/16W1%

402MF-LF

1K

NOSTUFF

2

1R2618

NOSTUFF

1/16W1%

402MF-LF

1K

2

1R2621

1/16W5%

402MF-LF

10K

NOSTUFF

2

1R2614

1/16W5%

402MF-LF

0

2

1R2623

1/16W5%

402MF-LF

10K

2

1R2616

1/16W5% 402

MF-LF

021

R2628

1/16W5%

402MF-LF

021

R2631

1/16W5%

402MF-LF

021

R2632

1/16W5%

402MF-LF

021

R2635

1/16W5%

402MF-LF

021

R2636

1/16W5%

402

0

MF-LF

21

R2641

1/16W5%

402MF-LF

021

R2643

1/16W5%

402MF-LF

021

R2645

1/16W5%

402MF-LF

021

R2647

1/16W5%

402MF-LF

021

R2649

1/16W5%

402MF-LF

021

R2651

1/16W5%

402MF-LF

021

R2653

0

402MF-LF1/16W5%

21

R2655

0

MF-LF402

5%1/16W

21

R2657

0

5%

402MF-LF

1/16W21

R2659

1/16W5%

402MF-LF

021

R2660

1/16W5%

402MF-LF

021

R2663

1/16W5%

402MF-LF

021

R2665

1/16W5%

402MF-LF

021

R2637

1/16W5%

402MF-LF

021

R2639

1/16W5%

402MF-LF

021

R2634 5%

402MF-LF

0

1/16W

21

R2633

1/16W5% 402

MF-LF

021

R2629

1/16W5% 402

MF-LF

0NOSTUFF

21R2630

1/16W5%

402MF-LF

021

R2668

1/16W5%

402MF-LF

021

R2669

1/16W5%

402MF-LF

021

R2670

5%

402MF-LF

0

1/16W

21

R2671

1/16W5%

402MF-LF

021

R2672

1/16W5%

402MF-LF

021

R2673

1/16W5%

402MF-LF

021

R2666

1/16W5%

402MF-LF

021

R2667

402

0

MF-LF1/16W5%

21

R2675 1/16W5%

402MF-LF

021

R2674

5% 402

021

R2600

SMP4MM

1PP2602

P4MMSM

1PP2600

P4MMSM

1PP2601

1/16W

402MF-LF

1%

49.9

NOSTUFF

21

R2601

ABBREV=DRAWING

TITLE=KILOHANA

PULSAR2 CLOCKSSYNC_DATE=05/19/2005SYNC_MASTER=FINO-ME

26

051-6863 07

154

EI_NB_SYSCLK_N

EI_CPU_B_SYSCLK_P

EI_CPU_B_SYSCLK_N

HT_CLK66M_SB

CPU_A_APSYNC_R

CPU_B_TBEN_CLK_R

CLK_RAI_PCIEB_N<0>

HT_NB_REFCLK_N<0>

HT_NB_REFCLK_P<0>

CLK_KOD_100M_P<0>

PCIE_C_REFCLKIN_N_C

PCIE_B_REFCLKIN_N_C

PCIE_B_REFCLKIN_P_C

PCIE_A_REFCLKIN_N_C

GFX_SLOT_PCIE_REFCLK_N_C

CLK_RAI_PCIEA_P<0>

CLK_RAI_PCIEC_N<0>

CLK_RAI_PCIEC_P<0>

CLK_RAI_PCIEB_P<0>

CLK_RAI_PCIEA_N<0>

PCIE_A_REFCLKIN_P_C

NB_PMR_CLK_N

NB_PMR_CLK_P_R

NB_PCIE_REFCLK_P_C

NB_PCIE_REFCLK_N_C

GFX_SLOT_PCIE_REFCLK_P_C

CLK_RAIREF_200M_P_R

NB_APSYNC_R

CPU_B_APSYNC_R

HT_SB_REFCLK_R

HT_NB_REFCLK_L0_R

SB_USB2_CLK_33MHZ_R

NB_DDR_REFCLK_P

PLS2_X_OUT_B

PLS2_INTERM

PCI_CLK33M_USB2

CLOCK_RESET_L

NB_PMR_CLK_P

NB_PMR_CLK_N_R

PLS2_REF33

PLS2_REF25

SYS_SLEWING_L_R

SB_CLK25M_SATA_R

EI_CPU_A_SYSCLK_P

EI_CPU_A_SYSCLK_N

SYS_SLEWING_L

CPU_A_TBEN_CLK_US

NC_CPU_B_TBEN_CLK_US

CPU_A_APSYNC

CPU_B_APSYNC

CLK_RAI_200M_N<0>

NB_APSYNC

EI_NB_SYSCLK_P

CLK_RAI_200M_P<0>

CLK_KOD_100M_N<0>

CLK_PCIE_SLOTA_P<0>

CLK_PCIE_SLOTA_N<0>

NB_DDR_REFCLK_N

CLK_RAI_GIGE_25MHZ

CPU_A_TBEN_CLK_R

CLK_RAIREF_200M_N_R

QUA0_REF_25MHZ_R

QUA1_REF_25MHZ_R

RAM_ARB1_REF25MHZ

PLS2_X_IN_B

PLS2_EXTCLK

I2C_CLOCK_B_SDA

PLSR2_OEMODE

SYS_SLEEP

PLS2_REF15

PLSR2_PD

PP3V3_PLSR_I

PCIE_C_REFCLKIN_P_C

HT_NB_REFCLK_H0_R

PLSR2_TM

I2C_CLOCK_B_SCL

PLSR2_ASEL_INT_L

PLS2_RESET_L

PLS2_X_IN

RAM_ARB0_REF25MHZ

PCI_CLK66M_SB_INT_R

PCI_CLK66M_SB_INT

CLK_RAI_REFCLK_66M_R

PCI_CLK33M_AIRPORT

PCI_CLK33M_SB_EXT_RR

PLS2_X_OUT

SB_AIRPRT_CLK_33MHZ_R

CLK_RAI_GIGE_25MHZ_R

NB_DDR_REFCLK_P_R

NB_DDR_REFCLK_N_R

SB_CLK25M_SATA

CLK_RAI_REFCLK_66M

CPU_TBEN_CLK

PCI_CLK33M_SB_EXT_R


54 30 16 15

50

13

56

101

101

97

27

27

28

56

56

97

97

97

12

119

119

42

27

27

103

9

9

27

98

98

82

9

9

9

9

9

27

27

27

27

27

9

20

9

9

9

9

9

9

9

9

9

9

59

27

28

20

9

9

56

56

24

56

6

56

27

27

42

42

27

82

84

84

59

27

9

9

9

9

27

39

11

25

9

9

39

27

6

27

9

121

27

9

9

9

9

24

27

27

9

Preliminary

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

N/C CPUB CLOCKS

GENERATES CPUA AND CPUB TBEN_CLK

IT IS THE INPUT TO THE AND GATE WHICH

CPU_TBEN_CLK IS FOR Q63 ONLY

N/C QUASAR CLOCKS

N/C RAINIER CLOCKS

CLOCK CONSTRAINTS

RESPECTIVE BUS PAGES

NOTE:

NET_SPACING_TYPE

N/C ALIASES

ELECTRICAL_CONSTAINT_SET

ALL OTHER CLOCK CONTRAINTS ON THEIR

NET_PHYSICAL_TYPEDIFFERENTIAL_PAIR

I67

I68

I69

I70

SYNC_MASTER=FINO-ME

Pulsar Aliases

15427

07051-6863

SYNC_DATE=05/19/2005

P3MM SPACING PCI_CLK_SBPCI_CLK_SBPCI_CLK66M_SB_INT

NB_PMR_CLKNB_PMR_CLK NB_PMR_CLK_SPNB_PMR_CLKNB_PMR_CLK_P

MAKE_BASE=TRUENC_CLK_RAI_REFCLK_66M

NB_PMR_CLK_N NB_PMR_CLKNB_PMR_CLK NB_PMR_CLK_SPNB_PMR_CLK

MAKE_BASE=TRUEPCI_CLK33M_USB2 =PCI_CLK33M_USB2

CLK_RAI_200M_N<0>MAKE_BASE=TRUE

NC_CLK_RAI_200M_N<0>

CLK_RAI_GIGE_25MHZ

MAKE_BASE=TRUENC_CLK_RAI_200M_P<0>

MAKE_BASE=TRUENC_CLK_RAI_PCIEA_N<0> CLK_RAI_PCIEA_N<0>

MAKE_BASE=TRUENC_CLK_RAI_PCIEA_P<0> CLK_RAI_PCIEA_P<0>

MAKE_BASE=TRUENC_CLK_RAI_PCIEB_N<0> CLK_RAI_PCIEB_N<0>

MAKE_BASE=TRUENC_CLK_RAI_PCIEB_P<0> CLK_RAI_PCIEB_P<0>

CLK_RAI_REFCLK_66M

CLK_RAI_200M_P<0>

CLK_RAI_PCIEC_P<0>MAKE_BASE=TRUE

NC_CLK_RAI_PCIEC_P<0>

CLK_RAI_PCIEC_N<0>MAKE_BASE=TRUE

NC_CLK_RAI_PCIEC_N<0>

CPU_TBEN_CLK

EI_CPU_B_SYSCLK_P

EI_CPU_B_SYSCLK_N

CPU_B_APSYNC

RAM_ARB0_REF25MHZMAKE_BASE=TRUE

NC_RAM_ARB0_REF25MHZ

RAM_ARB1_REF25MHZMAKE_BASE=TRUE

NC_RAM_ARB1_REF25MHZ

MAKE_BASE=TRUENC_CLK_RAI_GIGE_25MHZ

PCI_CLK_SBPCI_CLK_SB PCI_CLK_SBPCI_CLK33M_SB_EXT_RR

MAKE_BASE=TRUENC_CPU_TBEN_CLK

MAKE_BASE=TRUENC_CPU_B_APSYNC

MAKE_BASE=TRUENC_EI_CPU_B_SYSCLK_N

MAKE_BASE=TRUENC_EI_CPU_B_SYSCLK_P

26

26

26

119

20

6 20

26 122

26 6

26

6

6 26

6 26

6 26

6 26

26

26

26 6

26 6

26

26

26

26

26 6

26 6

6

26

9

6

6

6

Preliminary

P9[7]P9[6]P9[5]

P8[7]P8[6]P8[5]

P3[7]P3[6]P3[5]P3[4]

P2[6]P2[7]

P2[4]P2[5]

P1[4]P1[3]P1[2]P1[1]P1[0]

P0[4]

P0[0]

P0[2]P0[3]

P0[1]

P0[7]P0[6]P0[5]

P3[3]P3[2]P3[1]P3[0]

P2[3]P2[2]P2[1]P2[0]

P1[5]P1[6]P1[7]

PCNVSSRESET*XOUT

VREFXIN

P7[7]P7[6]P7[5]P7[4]P7[3]P7[2]P7[1]P7[0]

P6[7]P6[6]P6[5]P6[4]P6[3]P6[2]P6[1]P6[0]

P10[0]P10[1]

P9[3]P9[2]P9[1]P9[0]

P8[4]P8[3]P8[2]P8[1]P8[0]

P10[6]P10[7]

P10[2]P10[3]P10[4]P10[5]

VCC

AVSSVSS

AVCC

SQW/OUT

VBAT

SDA

SCL

X1X2

GND

VCC

PPPP

PP

PP

PP

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

DRAWING

P1[0] NOT USED --->

System Management Unit

DRIVEN PUSH/PULL

PULLUP AT LEVEL SHIFTER P.30

CLK1

Y

Portable

RXD0S AN02

RTS0*/

Desktop

S CTS0*

RXD1

Y = Primary function

(see aliases below)

S = Spare

AN06

AN07

AN21

INT4*

AN2

Y

Y

Y

Y

Y

S

Y Y

TA2in

INT5*

Y

Y

AC adapter ID.

affect other analog inputs such as

this page.

NOTE: Some primary and alternate functions

NOTE: All analog inputs to SMU should have

a 100pF capacitor to the SMU AVSS

signal (GND_SMU_AVSS). None of

provided on another page.

provided on this page. Please.

reuire pull-ups that are not.

to ensure missing pull-ups are

review the latest SMU specification

those capacitors are provided on

NOTE: Pinout matches SMU pinout v1.51.

Caps should connect to GND_SMU_AVSS.

(NONE)

(NONE)

NOTE: CPU current/voltage monitoring


Y

Y

S

S

Y Y

SS

SS

Y Y

Y

Y

Y

Y Y

Y

Y

Y

Y

Y

Y Y

Y

Y

YY

Y

Y

S N YY

NS

S

Y Y Y Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

S

S

IOC3

CLK3

IOC7

Sin3

IOC6

IOC5

Sout3

YY YYY

Y

YY

Y

Y Y

Y

Y

YY

Y

Y

N S YY

Y

S

YY

N

N

Y

YY

S

Y

Y

YY

S

Y Y

SN Y Y

Y Y Y Y

Y

Y

Y Y

Y Y

YY

Y Y

N

N

S

S

YY

Y

Y

Y S

Y S

S

Y Y

S

S

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

AN22

IOC2

AN05

AN04

AN20

AN03

KI3*

Y

Y SYY

YYY

S

Y

AN27

AN26

KI1*

AN0

AN1

AN3

KI0* Y

Y

Y

Y

Y

Y

S

S

AN25

INT2*

CE*

AN24

TB2in

NMI*

Y

Y

Y

Y

Y

Y

Y

Y

Y

YYY

Y

Y

Y

Y

YY Y

YY Y

Y

Y

Y

Y

Y

Y

Y

Y YYY

SS

SYYS

SS

Y Y

Y

Y

Y

S

Y

Y

Y

Y Y Y

Y

Y

Y

Y

S

Y

Y

Y

Y

Y Y S S

Y

Y

Y Y

Y

Y Y YY

Y

Y

SS SS

TA3in

TA3out

TA2out

Y

Y

Y

Y

N

Y

Y

Y

SDA

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

Y

YY

Y

Y

Y

Y N

Y

S

Y

N

Y

YY

N

Y

N

Y

Y

Y

YY

Y

Y

Y

YYY

Y Y Y

Y

Y

Y

Y

Y

NYY

Y Y

Y

Y

Y

Y S

S

N

N

S

S

S

N = Alternate function

Y Y

Server

Portable

Consumer

Y

Entry Desktop

S

Consumer

Desktop

Server

Entry Desktop

N NY Y

Tower & Server

Real Time Clock

NC

Alternate Functions

Port

6.4

6.3

Port

6.1

6.2

6.0

7.2

Y

Y

S

Y

TA1out

SCL

TXD1

(BUSY)RTS1*TXD0

CLK0

TA4out

TA4in

INT0*

INT1*



(CPU_SENSE_I/CPU_SENSE_V) requires

100K/10uF RC filter at SMU pins.

SMU_VREF should be same signal or

reference used by monitoring

circuit, but be aware that this will

N

Y

Y

Y

SCLmm

TB1in

TB0in

INT3*

Keep crystal subcircuit close to SMU.

IOC4

SDAmm

KI2*

N

SY

Y

AN00

AN01

YY

YYYY

Y

3.0

3.1

3.2

3.3

10.7

8.5

YYTA1inAN23

YY

DIFFERENTIAL_PAIRELECTRICAL_CONSTRAINT_SET NET_SPACING_TYPE

Y2800’S LOAD CAPACITANCE IS 12PF

7.4

SMU Pull-ups / pull-down

NET_SPACING_TYPE DIFFERENTIAL_PAIR

- =PPVREF_SMU (SMU AVCC OR 2.5V REFERENCE)

- =PP3V3_PWRON_SMU

- =PP3V3_ALL_RTC

- =PP3V3_ALL_SMU


CRITICAL

10.0000M

8X4.5MM-SM

21

Y2800

SEE_TABLE

M30280F8-LFQFP-80

10

12

11

77

13

9

79

80

1

2

3

4

5

7

8

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

40

41

42

43

32

33

34

35

36

37

38

39

44

45

46

47

48

49

50

51

52

53

54

55

56

57

58

68

69

70

71

72

73

74

76

59

60

61

62

63

64

65

66

67

6

75

78

U2800

DS1338U-33MSOP

2

1

8

37

5

6

4

U2801

6.3V

1uF

CERM402

10%

2

1 C282510K

MF-LF402

5%1/16W

2

1R2825

50V

18PF

CERM402

5%

2

1C2804

50V

18PF

CERM402

5%

2

1C2805

0

MF-LF402

5%1/16W

2

1R2817

NO STUFF

10M

MF-LF402

5%1/16W

21

R281610K

MF-LF402

5%1/16W

2

1R2827

1/16W1%

402MF-LF

2.0K21

R2812

1/16W1%

402MF-LF

2.0K

NOSTUFF

21

R2811

1/16W5%

402MF-LF

10K

NOSTUFF

21

R2813

1/16W1%

402MF-LF

100K21

R2810

10K

1/16W5%

402MF-LF

21

R2802

10K

MF-LF402

5%1/16W

21

R2800

1/16W5%

402MF-LF

10K12

R2804

10V

0.1uF

CERM402

20%

2

1 C2809

10V

0.1uF

CERM402

20%

2

1C2808

0.1uF

10VCERM402

20%

2

1C28020.1uF

20%10V

CERM402

2

1C2801

805

10UF

6.3VX5R

10%

2

1C2800

6.3V

1uF

CERM402

10%

2

1 C2803

4.7

MF-LF402

5%1/16W

21

R2815

SM

21

XW2800

CRITICAL

32.768KSM-LF

4

1

Y2801

I456

I457

10K

1/16W5%

402MF-LF

21

R2801

P4MMSM

1PP2800

SM

2 1

XW2802P4MMSM

1 PP2801

SM

2 1

XW2801

SM

P4MM

1PP2806

SMP4MM

1PP2805

P4MMSM

1PP2804

I472

I473

I474

I475

051-6863 07

28 154


System Management Unit

ABBREV=DRAWING

TITLE=KILOHANA

P3MM SPACING SYS_RESET_BUTTON_L

P3MM SPACING CLOCK_RESET_L

P3MM SPACING SMU_IO_RESET_L

SMU_RESET_L

SMU_IO_RESET_L

SYS_POWER_BUTTON_LSMU_CLK10M_XOUT_R

SMU_CLK10M_XIN

PP_3V3ALLSMUAVCC

=PP3V3_ALL_SMU

PP_3V3ALLSMU

SMU_CLK10M_XINSMU_CLK10M_XTAL 0.38MM SPACING

SMU_BOOT_CE

=PP3V3_ALL_SMU

SMU_RESET SYS_IO_RESET_L0.25MM SPACING

SYS_POWERUP_L

SMU_SLEEP

SMU_SUSPENDREQ_L

SYS_SLEWING_L

SYS_PME_L


=PP3V3_RUN_SMU

=PP3V3_PWRON_SMU

CPU_VID<2>

I2C_SMU_CPU_SDA_IN

I2C_SMU_A_SDA_IN I2C_SMU_A_SDA

I2C_SMU_A_SCL

RTC_CLK32K_X1RTC_CLK32K_XTAL 0.38MM SPACING

SMU_SER_SEL

SMU_FAN_RPM3

SMU_PWRSEQ_P1_4

SMU_FAN_RPM6

SMU_FAN_RPM7

SAT_MRESET_L

CPU_A_INSERTED_L

SMU_FAN_PWM8

CPU_B_INSERTED_L

SMU_FAN_PWM9

SMU_CLK10M_XOUT0.38MM SPACING

RTC_CLK32K_X20.38MM SPACING

NB_TDI

NB_TCK

NB_TMS

NB_TDO_SMU

SMU_BOOT_BUSYMAKE_BASE=TRUE

CPU_VID<5>

SMU_BOOT_SCLK

I2C_SMU_CPU_SCL_OUT_L

I2C_SMU_CPU_SDA_OUT_L

I2C_SMU_A_SCL_OUT_L

I2C_SMU_A_SCL_IN

I2C_SMU_E_SDA

I2C_SMU_A_SCL_OUT_L

I2C_SMU_A_SDA_OUT_L

SMU_FAN_TACH1

SMU_FAN_TACH2

SMU_FAN_TACH4

SMU_FAN_TACH5

I2C_SMU_A_SDA_IN

I2C_SMU_A_SCL_IN

SMU_FAN_TACH6

SMU_FAN_TACH7

SMU_FAN_TACH3

I2C_SMU_E_SCL

SYS_OVERTEMP_L

SMU_CLK10M_XOUT

SMU_FAN_RPM4

CPU_VID<2>

CPU_VID<1>

I2C_SMU_B_SDA

I2C_SMU_B_SCL

SMU_SLEEP

SMU_FAN_TACH8

SB_TO_SMU_INT_L

SB_STOPXTALS_L

SMU_PWRSEQ_P9_5

I2C_SMU_CPU_SCL_OUT_L

SMU_PWRSEQ_P1_1

SMU_PWRSEQ_P1_0

SMU_FAN_TACH9

SYS_DOOR_AJAR_L

SMU_FAN_TACH0

I2C_SMU_A_SDA_OUT_L

DIAG_LED

SMU_SUSPENDREQ_L

SYS_POWERFAIL_L

I2C_SMU_CPU_SCL_IN

CPU_VID<1>

CPU_VID<0>

CPU_VID<4>

CPU_VID<3>

I2C_RTC_SDA

=PP3V3_ALL_SMU

=PP3V3_ALL_RTC

RTC_CLK32K_X1

RTC_CLK32K_X2

I2C_RTC_SCL

GND_SMU_AVSS

SMU_FAN_RPM5

CPU_BYPASS

CPU_SENSE_V

SMU_PWRSEQ_P1_3

SMU_PWRSEQ_P1_2

SMU_BOOT_TXD

SMU_BOOT_CNVSS

SMU_FAN_RPM1

SMU_FAN_RPM2

SMU_BOOT_RXD

SYS_POWERUP_LMAKE_BASE=TRUE


SYS_SLEWING_L

SYS_PME_L

SYS_LED

SB_SUSPENDACK_L

NB_SUSPENDACK_L

SYS_POWER_BUTTON_L

=PPVREF_SMU

0.38MM SPACING SMU_CLK10M_XOUT_R

VOLTAGE=0VGND_SMU_AVSS



CPU_TEMP

CPU_SENSE_I

CPU_VID<4>

CPU_VID<3>

PP3V3_ALL_SMU_AVCC



VOLTAGE=3.3V

CPU_VID<0>

I2C_SMU_CPU_SDA_IN

I2C_SMU_CPU_SCL_IN

SB_CPU_VDNAP2

SMU_FAN_RPM0

SMU_PWRSEQ_P9_6

SYS_SLOT_PWR

SB_CPU_VDNAP1

SB_CPU_VDNAP0_OR_QREQ_OR_SPDIF

CLOCK_RESET_L

SYS_RESET_BUTTON_L

SYS_RESET_BUTTON_LSYS_NORTH_RESET_L

0.25MM SPACINGSMU_RESET SYS_NORTH_RESET_L

SYS_NORTH_RESET_L

0.25MM SPACING SYS_NORTH_RESET_L

<XR_PAGE_TITLE>


157D3

157D3

157D3

157A6

157A6

157A6

38B3

38B3

157D6

38B3

30B6

30B6

157D5

30B6

30A6

30A6

157C2

30A6

29D7

29D7

38D7

29D7

29D3

29D3

38D2

29D3

29C7

29C7

39D4

38C7

38B3

45A4

29C7

29B7

29B7

45A6

30D6

38B8

30D8

43A4

29B7

45A6

30D8

30D8

30D8

30D8

29A6

29A6

122A7

30C8

43A6

122A7

30C6

38B1

30C8

38C3

30C8

29A6

43A6

122A7

28D6

28D6

28D6

28D3

28C1

157C6

28D2

28D6

119A4

30C8

30A7

28C3

113A6

29C3

29D5

30C5

24C2

30C8

30A7

45A8

28D6

31A4

28B1

113A6

157C6

31A4

45B1

45B1

28D3

28D3

28D3

28C3

28D3

28C3

28B3

30B8

30B8

28C1

28C2

28D2

29D6

28B3

29D8

30A5

26D4

28C3

20C1

29A4

30B7

29C3

24B3

39A7

39A7

29D8

30A5

43A8

28C2

29A1

157C8

28C1

26D4

28B1

28B3

29A1

43B1

43B1

28B3

28C1 28C3

28B1

28B1

28B1

8D6

28B3

29D8

29A4

29D8

8D6

8A5

8A5

24B7

16C8

28B3

28B3

24B2

24B5

20B3

8D8

29D7

157C6

32D8

32C8

32D8

32C8 20B3

32D8

32C8

24A7

29C6

29C6

28B1

32D8

24C3

32C8

38B3

8B6

28B1

8A3

8A5

28A4

121B1

121B1

16C8

24B2

24B5

8D6

28D4

24D2

24D2

28D4

8D6

8D6 20C3

20C3

20C3

20C3

6C7

26D7

28B3

6C7

28D6

6C7 28D6

28D6

3B6

28B6

29D3

3B6

21C5

8A6

6C7

24B5

24A3

21C1

3C1

3A7

3B4

28C3

28C3

28B6 39D8

39D8

28D1

157A8

32B8

4D1

32B5

32A5

29A5

30D4

32B5

30C3

32A5

28A7

28D1

29C3

29C3

6C7

29D7

29D1

29D3

28B3

28B3

28B6

28B6

39B8

28A4

28B6

32C5

32B8

32A8

32D5

28A5

28A4

32B5

32A5

32A8

39B8

8B5

28D6

32A8

28A5

28A5

6D7

6D7

6C7

32B5

24C2

24B5

4D1

28A4

4D1

4D1

32A5

8B8

32C5

28A5

8A7

24B5

7A4

28C3

28C3

28C3

28C3

28C3

39B5

3B6

3C4

28D6

28D6

39B5

6A5

32D5

30A7

30A7

4D1

4D1

29D1

29D3

32C5

32B8

157D1

8A6

28A4

24A3

21C1

8C7

24B5

30B3

6C7

29B1

28B6

6A5

30A7

30A7

28A4

28A4

29B3

28A5

28A5

28A5

24C3

32C5

4D1

31A4

24C3

157C6

26D7

6C7

6C7 6B7

6B7

6B7

6B7

Preliminary

G

D

S

G

D

S



DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_5_ITEM

518S0171I2C ADDR:72(1001000)

DIGITAL GND THROUGHOUT

SYS LED’S

SAME CONNECTOR AS Q63 CPU CARD FOR SAT

POWERRESET

SYS POWER AND RESET BUTTON

SMU RESET BUTTON

SMU DEBUG/DOWNLOAD CONNECTOR

FROM SMU

DRIVE STRONG HRESET AND BYPASS TO CPU

PCB: PLACE Q2984 NEAR CPU

ALWAYS ON (TRICKLE)

RTC BATTERYAMBIENT LIGHT SENSOR CONNECTOR

518S0170

POWER BUTTON HEADER

TH

BB10209-A5

CRITICAL

1 2

J2902

SPSTSM

43

21

SW2902

SPSTSM

DEVELOPMENT

43

21

SW2900

5%

1K

402MF-LF1/16W

21

R2913

SPSTSM

DEVELOPMENT

43

21

SW2901

DEVELOPMENT

5%

402

1K

1/16WMF-LF

21

R2912

5%1/16WMF-LF402

1K21

R2902

PP5V_PWRON

SM6WHITE

2 1

LED2901

NOSTUFF

402MF-LF1/16W5%

021

R2900

17_INCH_LCD

56.21%

MF-LF1/16W

4022

1R2903

FDV301NSM

2

1

3

Q2901

4.7K5%1/16WMF-LF402

NOSTUFF

2

1R2908

SOT23MMBD914XXG

3

1

D2900

SOD-123

B0530WXF

2 1

DS2900

MF-LF402

1/16W5%30K

2

1R2929

6.3VCERM402

1UF10%

2

1 C2900

DEVELOPMENT

5%

402

1/16WMF-LF

021

R2931

DEVELOPMENT

F-RT-SMSM12B-SRSS-TB-LF

9

8

7

6

5

4

3

2

12

11

10

1

13

14

J2904

I6

1/16W

402MF-LF

5%0

NOSTUFF

2

1R2925

1%

100

DEVELOPMENT

402

1/16WMF-LF

21

R2930

402MF-LF1/16W5%

1K21

R2983

402MF-LF1/16W5%

1K21

R2984

2N7002DW-X-FSOT-363

1

2

6

Q2984

SOT-3632N7002DW-X-F

4

5

3

Q2984

SM53398-0471

4

3

2

1

6

5

J2901

PP3V3_PWRON

53398-0271SM

2

1

4

3

J2903

10K5%

MF-LF402

1/16W

2

1 R292410K5%

MF-LF402

1/16W

NOSTUFF

2

1 R2923

CERM402

10V20%0.1UF

2

1 C2904

10V

402

0.1UF20%

CERM2

1 C2905

R2903114S3921 20_INCH_LCD1 RES, 39.2 OHM, 1%, 402

SMU SUPPLEMENTAL (2)

07051-6863

29 154

SYNC_MASTER=FINO-MS SYNC_DATE=05/19/2005

NC_J2904_6

SMU_BOOT_SCLK

SMU_BOOT_CNVSS

POWER_BUTTON_L

CPU_HRESET_L

CPU_BYPASS_L

CPU_BYPASS

CPU_HRESET

SYS_RESET_BUTTON_L

SYS_POWER_BUTTON_L

=PP3V3_ALL_RTC



PP3V3_ALL_BATT_SAFETYVOLTAGE=3.3V


MAKE_BASE=TRUE

PP3V3_ALL_RTC PP3V3_ALL_BATT


VOLTAGE=3.3V

=PPV_EI_CPU

=PP3V3_ALL_SMU

SMU_BOOT_CE

SMU_MANUAL_RESET_L

SMU_BOOT_TXDNC_J2904_11

NC_J2904_12

SMU_BOOT_BUSY

SMU_MANUAL_RESET_L

=PP3V3_ALL_SMU

RESET_BUTTON_L

POWER_BUTTON_L


SYS_LED_DRV_K

SYS_LED_DRV_CMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM

SYS_LED

SMU_RESET_L

SMU_BOOT_RXD

I2C_ALS_SCLI2C_ALS_SDA

SMU_BOOT_BUSY_R

56 48

29

29

47

28

28

28

28

29

28

30

7

28

29

28

28

29

7

29

28

28

6

6

6

43

43

28

31

28

6

28

7

6

6

6

6

6

6

6

6

6

6

6 28

6

6

39

39

Preliminary

G

D

S

G

D

S

125

125

G

D

S

G

D

S

G

D

S

EN*

GND

BA

A*/B Y*

Y

VCC

G

D

S

G

D

S

Y0

Y1

GNDE*

A

VCC

G

D

S

YA

GND

VCC

125

Y

GND

VCC

A 34 Y

GND

VCC

A 34

Y

GND

VCC

A 34 Y

GND

VCC

A 34

G

D

S

G

D

S

G

D

S

G

D

S

G

D

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PCB; PLACE U5640 AND R3039 NEAR CPU

LEVEL SHIFT TDO FROM CPU TO MUX

CONSIDER COMBINING Q3040 AND Q3006 TO A DUAL PART

TO LEVEL SHIFTER

PULLDOWNS TO BUFFERS/LOGIC GATES

SHARE CPU AND NB JTAG TDO WITH SMU

VIH=2V

SYS_NORTH_RESET FROM SMU TO NB_PU_RSTSAME AS Q63

SAME AS Q63

SMU TO NB SUSPEND_REQ MISC. SMU BUFFERSSAME AS (Q63).

U700 IS POWERED BY PP3V3_ALL

NB SUSPEND_ACK_L LEVEL 2.5V TO 3.3V LEVEL SHIFTER

VCC RANGE 0.8V - 2.7V

VIH = 1.0V, 3.3V TOLERANT






NB JTAG IS A DEVELOPMENT ONLY FEATURE

SHARE CPU AND NB JTAG TMS WITH SMU

ALL JTAG-RELATED PINSSMU DRIVES 3.3V PUSH-PULL ON

STRAIGHT TO NB

PULLUP IFKODIAK JTAG IS NOSTUFFED

PCB: PLACE U3030 AND U3031 NEAR CPU AND KODIAK.PCB: PLACE 33 OHM RES NEAR U3030/31 PART.

PCB: PLACE R3050, Q3050, R3051 NEAR CPU. PLACE Q3021, R3052 NEAR SMU.

PCB: PLACE U3070 NEAR SMU

PCB: PLACE U3071 NEAR SMU OR NEAR KODIAK.


3.3V TOLERANT

SHARE SMU JTAG TCK WITH CPU AND NB (PRIMARY PLAN)

LEVEL SHIFT SMU TMS TO CPU (PRIMARY PLAN)

U5640 IS POWERED BY PPV_EI_CPU

VIH = 1.0V

DEMUX DRIVES PUSH-PULL 2.5V

LEVEL SHIFT SMU TMS TO CPU (BACKUP PLAN)

STUFF IF USING REGISTERED DIMM

SHARE SMU JTAG TDI WITH CPU AND NB (PRIMARY PLAN)

SMU JTAG TDI TO CPU (BACKUP PLAN)

SMU JTAG TCK TO CPU (BACKUP PLAN)

SOT-3632N7002DW-X-F

1

2

6

Q3005

2N7002DW-X-FSOT-363

4

5

3

Q3000

402MF-LF1/16W

0

NOSTUFF

5%

21

R3008

5%

100

402MF-LF1/16W

2 1

R3022

5%

100

MF-LF402

1/16W

2 1

R3023

TSSOP

74LCX125

814

107

9

U7005%1/16W

4.7K

402MF-LF

2

1R3021

74LCX125

TSSOP

614

47

5

U700

2N7002SOT23-LF

NOSTUFF

2

1

3

Q3040

1K1/16WMF-LF402

NOSTUFF

5%

2

1R3040

2N7002DW-X-FSOT-363

4

5

3

Q3005

5%4.7K

402MF-LF1/16W

2

1R3003

5%1/16WMF-LF402

4.7K

2

1R3010

2N7002SOT23-LF

NOSTUFF

2

1

3

Q3006

CRITICAL

TSSOPSN74LVC2G157

3

5

8

4

7

2

6

1

U3070

0.1UF

CERM10V20%

4022

1C3070

NOSTUFF

0

1/16WMF-LF402

5%

21

R3009

5%

MF-LF402

1/16W

10K2 1

R3050

5%

402MF-LF1/16W

1K

2

1R3051 100

MF-LF402

1/16W5%

2

1R3052

SOT232N3904LF

2

3

1 Q3050

0.1UF

CERM10V20%

4022

1C3071

5%1K1/16W

402MF-LF

2

1R30935%

402MF-LF1/16W

1K

2

1R3091

SOT232N3904LF

NB_SUSPEND_ACK_L_R

2

3

1 Q3090

MF-LF402

1/16W

10K

5%

2 1

R3090

5%

MF-LF1/16W

0

NOSTUFF

402

2 1

R3092

2N7002DW-X-FSOT-363

1

2

6

Q3000

2N7002DW-X-FSOT-363

4

5

3

Q3021

CRITICAL

74LVC1GSC70-6

4

6

5

2

3

1

U3071

0.1UF

CERM10V20%

4022

1C3030

5%

MF-LF402

1/16W

332 1

R303033

1/16W

402MF-LF

5%

2 1

R3031

33

DEVELOPMENT

5%

MF-LF402

1/16W

2 1

R303333

5%

MF-LF402

1/16W

DEVELOPMENT

2 1

R3032

DEVELOPMENT

0.1UF

CERM10V20%

4022

1C3031

MF-LF402

1/16W5%10K

2

1R3034

MF-LF402

1/16W5%10K

2

1R3035

33

1/16W

402MF-LF

5%

2 1

R3039

SOT-3632N7002DW-X-F

1

2

6

Q3021

MF-LF402

1/16W

10K

5%

2 1

R3038

100K

5%

402MF-LF1/16W

21

R3036

1/16WMF-LF402

5%

100K21

R3071

100K

5%

402MF-LF1/16W

21

R3037

100K

5%

402MF-LF1/16W

21

R3070

CRITICAL

VSSOPSN74AUC2G125

6

8

14

2

U5640

CRITICAL

SOT23-6SN74AUC2G34

6

5

2

1

U3030SOT23-6

SN74AUC2G34

4

5

2

3

U3030

DEVELOPMENT

SOT23-6SN74AUC2G34

6

5

2

1

U3031DEVELOPMENT

SOT23-6SN74AUC2G34

4

5

2

3

U3031

SOT-3632N7002DW-X-F 1

2

6

Q3080

1/16WMF-LF

4.7K

402

5%

2

1R3083

SOT-3632N7002DW-X-F

1

2

6

Q3081

1/16WMF-LF402

5%1K

2

1R3084NOSTUFF

33

1/16W

402MF-LF

5%

2 1

R3085

5%

MF-LF402

1/16W

33

NOSTUFF

2 1

R3082

1K5%

402MF-LF1/16W

2

1R3081

2N7002DW-X-FSOT-363

4

5

3

Q30815%

402

4.7K

MF-LF1/16W

2

1R3080

2N7002DW-X-FSOT-363

4

5

3

Q3080

NOSTUFF

0

1/16W

402MF-LF

5%

21

R3099

NOSTUFF

0

1/16W

402MF-LF

5%

21

R3098

1K

MF-LF402

1/16W5%

2

1R3027

SOT-3632N7002DW-X-F

4

5

3

Q3031

1K1/16WMF-LF402

5%

2

1R3026

SOT232N3904LF

2

3

1 Q30305%

MF-LF402

1/16W

10K2 1

R3020

NOSTUFF

5%

MF-LF402

1/16W

332 1

R3028

5%

402MF-LF1/16W

1K

2

1R3000

5%1/16WMF-LF402

100

2

1R3001

5%

MF-LF402

1/16W

0

NOSTUFF

21

R3002

5%

402

4.7K

MF-LF1/16W

2

1R30075%10K1/16WMF-LF4022

1R3006



051-6863 07

30 154

JTAG_CPU_TCK

SMU_JTAG_TDI

SMU_JTAG_TDI_L

JTAG_CPU_TDIJTAG_CPU_TDI_2_R

=PP3V3_RUN_SMU

=PPV_EI_CPU

JTAG_CPU_TMSJTAG_CPU_TMS_RSMU_CPU_TMS

=PP3V3_PWRON_SMU

JTAG_CPU_TMS_2_L

SMU_CPU_TMS

JTAG_SMU_TMS_2_R

SMU_JTAG_TCK

SMU_JTAG_TCK_L

JTAG_CPU_TCK_2_R

=PP3V3_RUN_SMU

=PPV_EI_CPU

SYS_IO_RST_L_R

SMU_IO_RESET

=PP3V3_PWRON_SMUJTAG_CPU_TMS_2_R JTAG_CPU_TMS

=PPV_EI_CPU

SMU_JTAG_TCK

JTAG_NB_TCK_R


SMU_JTAG_TDI

JTAG_NB_TDI_R

JTAG_CPU_TCK_RJTAG_CPU_TDI_R

SMU_CPU_NB_SEL

=PP3V3_PWRON_SMU

JTAG_NB_TDO

NB_SUSPENDACK_LNB_SUSPENDACK

JTAG_NB_TMS

SMU_CPU_TMS



JTAG_CPU_TDI JTAG_CPU_TCK

JTAG_NB_TDI JTAG_NB_TCK

=PP3V3_PWRON_SMU

SYS_IO_RESET_L

=PP3V3_PWRON_SMU

SMU_SLEEP

SMU_IO_RESET_L

SYS_SLEEP_R SYS_SLEEP

NB_PU_RESET


PMU_SUSPEND_REQ

SYS_SLEEP SYS_2SLEEP_R


SYS_IO_RST_L_R

=PP3V3_PWRON_SMU

=PP3V3_PWRON_SMU

NC_JTAGMUX_3

SMU_JTAG_TDOJTAG_CPU_TDO_3V3

SMU_JTAG_TMS

NB_SUSPEND_ACK_L

SMU_JTAG_TDI

SMU_JTAG_TCK

SMU_JTAG_TMS

SMU_CPU_NB_SEL

SMU_SUSPENDREQ_L

NB_SUSPEND_REQ_L

SYS_NORTH_RESET_L

NB_PU_RST_L

SYS_NORTH_RESET_L_R

JTAG_CPU_TDO

JTAG_CPU_TDO_R

JTAG_CPU_TDO_L

=PP3V3_PWRON_SMU

JTAG_CPU_TDO_3V3


JTAG_NB_TDO

=PPV_EI_CPU

SMU_SUSPENDREQ_L_R

54

54

30

30

56

56

56

26

26

56

48

48

48

39

39

39

16

39

16

39

39

48

30

47

43

30

47

43

47

30

43

30

30

43

122

43

15

30

15

30

43

43

43

30

47

28

30

30

28

30

30

30

28

30

28

28

30

119

30

13

28

13

28

30

30

43

30

28

30

43

31

43

20

29

43

28

31

20

29

28

43

29

31

20

31

31

28

30

20

20

43 43

28

28

28

12

20

12

20

28

28

31

31

31

31

31

28

47

28

20

30

29

30

30

30

7

7

30 30

7

30

30

7

7

30

67

7

30

7

30

7

30

30

7

20

28

20

30

7

7

30 30

20 20

7

24

7

28

28

11

7

11

7

30

7

7

9

31

30

30

20

30

30

30

30

24

20

28

20

43

7

30

7

20

7

Preliminary

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

SELECT BETWEEN CPU OR NB TMS AND TDO FROM/TO SMU

M23/M33 ONLY CONNECTS I2C TO KODIAK NOW; CPU HAS PULLUPS ON ITS PG.

CPU VID<0:5>VID CONTROLLED BY SMU

2.2V FOR CPU VRM10.

NOTE:PULL UP CPU_VID<5>TO

Q63 NET NAME (SHARED PAGE)

P0.5

P0.6

P0.4

P0.3

P0.2

P0.1

P0.0

P0.7

P1.6

P1.7

P2.0

P1.5

P2.1

P1.4

P1.0

P1.1

P1.2

P1.3

M23 SMU ALLOCATION

CPU_VID_LE0

CPU_VID_LE1

CPU_SENSE_I1

CPU_SENSE_V1

CPU_TEMP1

POWERFAIL*

FAN_TACH2_1

DOOR_AJAR*

SMU_SCCL_SEL

FAN_CNTL0_6

FAN_CNTL0_5

FAN_CNTL0_4

CPU_SENSE_I0

CPU_SENSE_V0

CPU_TEMP0

CPU_BYPASS

PS1_3

PS1_4

P2.7

P3.0

P3.1

P3.2

P3.3

P2.6

P2.5

P2.2

P2.3

P2.4

P3.4

P3.5

P3.6

P3.7

P6.0

P6.1

P6.2

P6.3

P6.4

P6.5

CPU_VID[2]

CPU_VID[1]

CPU_VID[0]

OVERTEMP*

IIC_E_CLK

IIC_E_DAT

CPU_VID[3]

CPU_VID[4]

CPU_VID[5]

IIC_A_CLK

IIC_A_DAT

FAN_TACH2_7

FAN_TACH2_6

FAN_TACH2_5

FAN_TACH2_4

FAN_TACH2_3

FAN_TACH2_2

DIAG_LED

TCK

TDI

P7.2

P7.7

P7.6

P7.5

P7.4

P7.3

P7.0

P7.1

P6.6

P6.7

P8.0

P9.2

P9.1

P9.0

P8.1

P8.2

P8.3

P8.4

P8.5

P8.6

P8.7

SMU_DOORBELL*

CPU_HRESET

CLK_RESET*

NB_RESET*

SYSTEM_LED

FAN_CNTL7_7

FAN_CNTL7_5

FAN_CNTL7_4

FAN_CNTL7_3

DEBUG_RXD

DEBUG_TXD

IIC_B_DAT

IIC_B_CLK

SLEEP

POWERUP*

NB_TMS

SLEWING*

VDNAP0

PME*

VDNAP2

CPU_TMS

P10.1

P10.4

P10.3

P10.2

P10.0

P9.3

P9.5

P9.6

P9.7

P10.5

P10.6

P10.7

RST_BUTTON*

PWR_BUTTON*

SUSPEND_REQ*

SUSPEND_IO_ACK*

SUSPEND_ACK*

IO_RESET*

STOP_XTAL*

SLOT_TOTAL_PWR

TDO

VDNAP1

PS9_5

PS9_6

M23 NET NAME

M23/M33 DOESN’T USE. P1.0 NC ON PG 7.

M23/M33 DOESN’T USE P1.4. NC ON PG 7.

COMMENT (ONLY IF USE DIFFERS FROM Q63)

M23/M33 DOESN’T HAVE THOSE FANS.

Q63 USES SMU_SER_SEL FOR SPDIF-SMU-DEBUG. NOT M23/M33 FEATURE.

M23/M33 DOESN’T NEED TO MAKE VDNAP0 DO TRIPLE-DUTY.

M23/M33 USES TACH0 (P2.2), TACH1 (P2.3), TACH2 (P2.4) ONLY.

M23/M33 DOESN’T HAVE THIS FAN (P7.4)

M23/M33 USES FAN_RPM0 (P7.3), FAN_RPM1 (P7.5), FAN_RPM2 (P7.7) ONLY.

Q63 USE OF P7.2 IS PWM FAN

SMU USES P1.1, P1.2, P1.3, P9.5, P9.6 FOR PWRSEQ ON PG 7.

SMU USES P1.1, P1.2, P1.3, P9.5, P9.6 FOR PWRSEQ ON PG 7.

Q63 USE OF P9.1 IS TACH 8.

M23/M33 HAS NO SLOTS.

M23/M33 DOESN’T HAVE FAN TACHS P2.5, P2.6, P2.7.

CPU_VID_LE0 FOR Q82. NOT M23/M33 FEATURE.

CPU_VID_LE1 FOR Q82. NOT M23/M33 FEATURE.

M23/M33 DOESN’T HAVE THIS FAN.

CONSIDER DOOR_AJAR FOR M23/M33 DIMM ACCESS DOOR?

SMU ALIASESALIASES ARE ONLY NECESSARY WHERE USE DIFFERS FROM Q63.

Q63 NC’S THESE AS IT USES A SAT.

PP3V3_RUN

MF-LF402

10K5%1/16W

2

1R310410K1/16WMF-LF402

5%

2

1R310910K

402MF-LF1/16W5%

2

1R3108

MF-LF1/16W5%20K

4022

1R3111NOSTUFF

5%1/16WMF-LF

1K

4022

1R3127

1/16W

NOSTUFF

1K5%

MF-LF4022

1R3129NOSTUFF

1/16W

1K5%

MF-LF4022

1R3130

10K5%1/16WMF-LF4022

1R3117

1/16W

10K5%

MF-LF4022

1R3116

402MF-LF1/16W5%10K

2

1R3114

NOSTUFF

1K5%1/16WMF-LF4022

1R31311K

NOSTUFF

5%1/16WMF-LF4022

1R3132

NOSTUFF

F-ST-SM

BM12B-SRSS-TB

98765432 12

11

10

1 13

14

J3108

1/16W5%

0

402MF-LF

21

R3120

0

5%1/16WMF-LF402

21

R3122

402MF-LF

0

5%1/16W

21

R3119

402

5%

MF-LF

0

1/16W

21

R3121

402

5%

MF-LF1/16W

021

R3124402

5%

MF-LF1/16W

021

R3123

31 154

07051-6863

SYNC_DATE=05/19/2005SYNC_MASTER=FINO-MS


MAKE_BASE=TRUE

SMU_JTAG_TDO I2C_SMU_CPU_SCL_OUT_L

MAKE_BASE=TRUE

NC_SLOT_TOTAL_PWR SYS_SLOT_PWR


MAKE_BASE=TRUE

CPU_HRESET SMU_FAN_TACH8

MAKE_BASE=TRUE

SB_VDNAP0 SB_CPU_VDNAP0_OR_QREQ_OR_SPDIF

MAKE_BASE=TRUE

NC_I2C_SMU_CPU_SCL_IN I2C_SMU_CPU_SCL_IN

I2C_SMU_CPU_SDA_IN

MAKE_BASE=TRUE

SMU_JTAG_TCK I2C_SMU_A_SCL_OUT_LMAKE_BASE=TRUE

SMU_JTAG_TDI I2C_SMU_A_SCL_IN

MAKE_BASE=TRUE

NC_SMU_FAN_TACH5 SMU_FAN_TACH5

MAKE_BASE=TRUE

NC_SMU_FAN_TACH7 SMU_FAN_TACH7MAKE_BASE=TRUE

NC_SMU_CPU_VID_LE1 SMU_FAN_TACH6MAKE_BASE=TRUE

NC_SYS_DOOR_AJAR_L SYS_DOOR_AJAR_LMAKE_BASE=TRUE

NC_SMU_CPU_VID_LE0 SMU_FAN_TACH9

MAKE_BASE=TRUE

NC_SMU_SER_SEL SMU_SER_SELMAKE_BASE=TRUE

NC_SMU_FAN_RPM5 SMU_FAN_RPM5

MAKE_BASE=TRUE


MAKE_BASE=TRUE


CPU_VID_R<2>

CPU_VID_R<3>

CPU_VID_R<0>

CPU_VID_R<1>

CPU_VID_R<5>

CPU_VID_R<4>

MAKE_BASE=TRUE

NC_SMU_FAN_TACH3SMU_FAN_TACH4SMU_FAN_TACH3

MAKE_BASE=TRUE

NC_SMU_FAN_TACH4

MAKE_BASE=TRUE

I2C_SMU_A_SCLI2C_SMU_A_SDA_INI2C_SMU_A_SDA_OUT_LMAKE_BASE=TRUE

I2C_SMU_A_SDA

MAKE_BASE=TRUE

SMU_JTAG_TMS

MAKE_BASE=TRUE

SMU_CPU_NB_SEL

NC_J3108_8

NC_J3108_9

NC_J3108_10

NC_J3108_11

NC_J3108_12

CPU_VID<1>MAKE_BASE=TRUE






39

39

30 28

9 28

28

29 28

24 28

9 28

28

30 28

30 28

9 28

9 28

9 28

9 28

9 28

9 28

9 28

9 28

9 28

50

50

50

50

50

50

9

28

28

9

28

28

28

28

30

30

9

9 9

9

9

28

28

28

28

28

28

Preliminary

G

D

S

G

D

S

G

D

S

G

D

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

12V DC

GND

TACH

GND

FAN 0

FAN 1

12V DC

TACH

MOTOR CONTROL

518S0083

MOTOR CONTROL

518S0193

M23: ODD FAN

M33: ODD FAN

M23: HD FANM33: CPU FAN

PP3V3_RUN

10K

402

1/16WMF-LF

5%

2

1R3210

PP3V3_RUN

5%

402MF-LF1/16W

10K

2

1R3259

NOSTUFF

603

0.1UF20%25VCERM2

1 C3202

1206MF-LF1/4W5%1.5K

2

1R3205

1206A-03NTHS5443T1

5

4

876321

Q3203

805MF-LF

5%1.5K1/8W

2

1R3207

MMBD914XXGSOT23

3

1

D3202805

0

5%1/8WMF-LF

21

R320816VX7R805

0.47UF10%

2

1 C3204

805MF-LF1/8W5%

3.9KR3206

PP12V_RUN

SOT-3632N7002DW-X-F

4

5

3

Q3201

MF-LF1/8W5%1.0K

8052

1R3202

SOT-3632N7002DW-X-F

1

2

6

Q3201

NTHS5443T11206A-03

5

4

876321

Q3253

CERM

20%0.1UF

603

NOSTUFF

25V2

1 C3252

805MF-LF

5%1.5K1/8W

2

1R3257

805

5%

0

1/8WMF-LF

21

R325816VX7R

0.47UF

805

10%2

1 C3254MF-LF805

1/8W5%

3.9KR3256

MMBD914XXGSOT23

3

1

D3252

1206

1.5K5%1/4WMF-LF

2

1R3255

SOT-3632N7002DW-X-F

4

5

3

Q3251

PP12V_RUN

1.0K

MF-LF1/8W5%

8052

1R3252

SOT-3632N7002DW-X-F

1

2

6

Q3251

ELEC16V20%

6.3X11-TH-LF

120UF2

1C3203

120UF

6.3X11-TH-LFELEC

20%16V2

1C3253

805

1.0K5%1/8WMF-LF

NOSTUFF

2

1R3215

805MF-LF1/8W5%1.0K

NOSTUFF

2

1R3265

805

0

5%1/8WMF-LF

21

R3266

1/8WMF-LF

5%

0

805

21

R3216B130LBT01XF

NOSTUFF

SMB21

D3203

NOSTUFF

B130LBT01XF

SMB21

D3253

CRITICAL

M-RT-SM53261-0498

4

3

2

1

6

5

J3200

53261-0571M-RT-SM

CRITICAL

5

4

3

2

1

7

6

J3201


Fan 0, 1 & System Temp

07051-686315432

F1_DRV

SMU_FAN_RPM1

F0_VOLTAGE8R5F0_DRV

SMU_FAN_RPM0


FAN_1_OUT

F1_GATESLOWDN

F0_RCFEEDBK



FAN_0_PWRMIN_LINE_WIDTH=0.5MM

SMU_FAN_TACH0

SMU_FAN_TACH1


FAN_1_PWR


FAN_0_OUT

F0_GATESLOWDN

F1_RCFEEDBKMIN_LINE_WIDTH=0.5MM


F1_VOLTAGE8R5

28

28

28

28 Preliminary

G

D

S

G

D

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

518S0193

ODD TEMP SENSOR

518S0193

12V DC

TACH

GND

FAN 2

I2C ADDR:0X92(1001001)I2C ADDR:0X90(1001000)

M33: HD FAN

HD TEMP SENSOR

MOTOR CONTROL

M23: CPU FAN

518S0193

PP3V3_RUN

5%

402MF-LF1/16W

10K

2

1R3309

PP3V3_RUN

CRITICAL

53261-0498M-RT-SM

4

3

2

1

6

5

J3301

1206A-03NTHS5443T1

5

4

876321

Q3303

SOT23MMBD914XXG

3

1

D3302

25V

603

0.1UF20%

CERM

NOSTUFF

2

1 C3302

805MF-LF

1.5K1/8W

5%

2

1R3307

5%

MF-LF805

1/8W

021

R330816VX7R805

10%0.47UF

2

1 C3304805

MF-LF1/8W5%

3.9KR3306

MF-LF1/4W5%1.5K

12062

1R3305

SOT-3632N7002DW-X-F

4

5

3

Q3301

PP12V_RUN

805

1.0K5%1/8WMF-LF

2

1R3302

SOT-3632N7002DW-X-F

1

2

6

Q3301

6.3X11-TH-LFELEC16V20%120UF

2

1 C3303

MF-LF

5%1.0K

805

NOSTUFF

1/8W

2

1R3315

MF-LF1/8W5%

0

805

21

R3316

B130LBT01XF

SMB

NOSTUFF

21

D3303

CRITICAL

53261-0498M-RT-SM

4

3

2

1

6

5

J3302

PP3V3_RUN

CRITICAL

SM53398-0471

4

3

2

1

6

5

J3300


Fan 2 & HD Temp

15433

07051-6863

I2C_ODD_TEMP_SDA

SMU_FAN_TACH2


FAN_2_PWR

I2C_HD_TEMP_SDA

I2C_HD_TEMP_SCL


FAN_2_OUT

F2_GATESLOWDN


F2_RCFEEDBK

I2C_ODD_TEMP_SCL

SMU_FAN_RPM2

F2_DRV

F2_VOLTAGE8R5

39

28

39

39 39

28

Preliminary

S

G

D

S

G

D

SD

G

SD

G

S

G

D

S

G

D

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

KODIAK I2C C

ALS HEADER

I2C ADDR:52

ODD TEMP SENSOR HEADER

I2C ADDR:90

I2C ADDR:92

HD TEMP SENSOR HEADER

GPU TEMP SENSOR

J3302

J3301

U9390

I2C ADDR:9C

I2C ADDR:98

KODIAK TEMP SENSORU2080

J2901

NB I2C B BUS

SMU I2C E BUS

PINS 34,35

MASTERRTC

VDIV=2.9V

U2600

U1300

MASTER

SMU

KODIAKSMUMASTER

AUDIO

SHASTA

U2300

MASTER

PINS Y9, AB7

MASTER

U1900

KODIAK I2C B

PINS AG04, AK03

PULSAR2

SB I2C BUSSMU I2C B BUS

PINS 5, 6

U9500 / AU300

SMU AND NB I2C A BUS

I2C ADDR:0XD5PINS 18, 19

NB I2C C BUS

PINS 26, 27

DDR2 DIMMS

SMU ’E’

U2800 U2801

PP3V3_RUN

1K5%1/16W

402MF-LF

2

1R3914

MF-LF

1K5%

402

1/16W

2

1R3915

5%

0

MF-LF1/16W

402

2 1

R3965

0

5%1/16WMF-LF402

2 1

R3964

0

MF-LF402

5%1/16W

21

R3960

5%1/16W

402MF-LF

2.0K

2

1R3959

5%1/16W

402MF-LF

2.0K

2

1R3958

0

MF-LF402

5%1/16W

21

R3961

0

MF-LF402

5%1/16W

21

R3962

1/16W

402

5%

0

MF-LF

21

R3963

NOSTUFF

0

MF-LF402

5%1/16W

21

R3956

MF-LF

5%1/16W

402

2.0K

2

1R3969

5%1/16W

402

2.0K

MF-LF

2

1R3953

0

MF-LF402

5%1/16W

21

R3950

NOSTUFF

MF-LF402

1/16W

0

5%

21

R3957

SOT23-3SI2302ADSE3

2

1

3

Q3902

NOSTUFF

15K

MF-LF402

1/16W5%

2

1R3955

SOT23-3SI2302ADSE3

2

1

3

Q3901

NOSTUFF

15K

MF-LF402

5%1/16W

2

1R3954

0

MF-LF402

5%1/16W

21

R3951

5%2.0K

MF-LF402

1/16W

2

1R3931

MF-LF

0

402

5%1/16W

21

R3932

5%2.0K

MF-LF402

1/16W

2

1R3938

5%

402MF-LF

0

1/16W

21

R3939

5%

MF-LF402

0

1/16W

21

R3924

5%

MF-LF

2.0K

402

1/16W

2

1R3925

402

1/16W

0

5%

MF-LF

21

R3937

SI2302ADSE3SOT23-3

2

1

3

Q3903

SI2302ADSE3SOT23-3

2

1

3

Q3904

5%2.0K

MF-LF1/16W

4022

1R3936

MF-LF402

1/16W5%

2.0K

2

1R3970

5%1/16W

402MF-LF

2.0K

2

1R3971

1/16W5%

402MF-LF

3321

R3908

402

5%

33

1/16WMF-LF

21

R3904

0

MF-LF402

5%1/16W

21

R3974

1/16W

402

5%

0

MF-LF

21

R3975

SI2302ADSE3SOT23-3

2

1

3

Q3970

SOT23-3SI2302ADSE3

2

1

3

Q3971

33

MF-LF402

5%1/16W

21

R3976

402

1/16W5%

33

MF-LF

21

R3977

402MF-LF1/16W

33

5%

21

R3978

33

MF-LF402

5%1/16W

21

R3979

MF-LF402

1/16W5%

2.0K

2

1R3972

5%1/16W

402MF-LF

2.0K

2

1R3973

402MF-LF1/16W5%2.0K

2

1R39022.0K

5%1/16WMF-LF

4022

1R3903

PP3V3_PWRON

PP3V3_ALL

2.0K5%

402MF-LF1/16W

2

1R39065%

1/16WMF-LF

2.0K

4022

1R3907

07

39 154

051-6863


I2C Connections

I2C_SMU_E_SCL I2C

I2C_GPU_DIODE_SDA

I2C_CLOCK_B_SCLNET_SPACING_TYPE=I2C

I2C_CLOCK_B_SDA

NET_SPACING_TYPE=I2C

I2C_NB_RAM_SDA

NET_SPACING_TYPE=AUDIOI2C_SB_SCLMAKE_BASE=TRUE

=PP2V5_RUN_I2C=PP3V3_RUN_I2C

=PP1V8_PWRON_NBMEM

Q3904_G

NB_IIC_B_CLK_1V8



I2C_NB_B_SDA

NET_SPACING_TYPE=I2CI2C_SMU_A_SCL I2C_NB_A_SCL


I2C_NB_A_SDANET_SPACING_TYPE=I2C

NET_SPACING_TYPE=I2CI2C_NB_RAM_SCL

Q3903_G


NB_IIC_B_DAT_1V8

NET_SPACING_TYPE=I2CI2C_SMU_A_SDA


I2C_NB_B_SCL


I2CI2C_SMU_E_SDAI2C_RTC_SDAI2C

I2C I2C_RTC_SCL


I2C_NB_SMU_SCL

I2C_NB_SMU_SDANET_SPACING_TYPE=I2C

MAKE_BASE=TRUE

NET_SPACING_TYPE=AUDIOI2C_SB_SDA

I2C_AUDIO_SDA

I2C_AUDIO_SCL

Q3901_1

NET_SPACING_TYPE=I2CI2C_NB_NB_SCL


I2C_NB_NB_SDA

I2C_SMU_B_SDAMAKE_BASE=TRUE


I2C_ALS_SDA

MAKE_BASE=TRUEI2C_SMU_B_SCL


I2C_NB_TEMP_SDA

I2C_HD_TEMP_SDA

I2C_ODD_TEMP_SDA

NET_SPACING_TYPE=I2CI2C_ODD_TEMP_SCL

NET_SPACING_TYPE=I2CI2C_GPU_DIODE_SCL

NET_SPACING_TYPE=I2CI2C_NB_TEMP_SCL

=PP2V5_RUN_I2C

Q3970_G

Q3971_G

I2C_NB_C_SCL


Q3902_1 =PP2V5_RUN_I2C

=PP2V5_RUN_I2C

NET_SPACING_TYPE=I2CI2C_HD_TEMP_SCL

NET_SPACING_TYPE=I2CI2C_ALS_SCL

=PP3V3_RUN_I2C

MAKE_BASE=TRUENET_SPACING_TYPE=I2C

I2C_NB_C_3V3_SCL

I2C_NB_C_SDA

NET_SPACING_TYPE=I2C I2C_NB_C_3V3_SDANET_SPACING_TYPE=I2C

MAKE_BASE=TRUE

59

30

58

28

39 39

20

31

31

20

39

39

39 39

28

93

26

26

67

24

7 7

7

20

28 20

20

67

28

20

7

28 28

28

24

147

147

28

29

28

20

33

33

33

93

20

7

20

7

7

33

29

7

20

Preliminary

VD2_0

VD2_6

VD2_7

GND_6

GND_22

GND_59

GND_2

VD2_74

VD2_75

VD2_76

VD2_77

GND_83

VD2_80

VD2_81

GND_84

GND_82

GND_81

GND_79

GND_80

GND_57

GND_58

GND_60

GND_61

GND_62

GND_63

GND_56

GND_55

GND_54

GND_41

GND_47

GND_46

GND_44

GND_43

GND_42

GND_40

GND_39

GND_37

GND_36

GND_35

GND_34

GND_33

GND_32

GND_31

GND_30

GND_29

GND_28

GND_27

GND_26

GND_25

GND_24

GND_23

GND_21

GND_20

GND_19

GND_18

GND_17

GND_16

GND_15

GND_14

GND_13

GND_12

GND_11

GND_10

GND_9

GND_8

GND_7

GND_5

GND_3

GND_1

GND_0

VD2_8

VD2_2

VD2_57

VD2_59

VD2_72

VD2_79

VD2_78

VD2_71

VD2_70

VD2_69

VD2_68

VD2_67

VD2_66

VD2_65

VD2_64

VD2_63

VD2_62

VD2_61

VD2_60

VD2_53

VD2_52

VD2_51

VD2_50

VD2_49

VD2_48

VD2_47

VD2_45

VD2_44

VD2_43

VD2_41

VD2_40

VD2_39

VD2_38

VD2_37

VD2_36

VD2_35

VD2_31

VD2_29

VD2_25

VD2_24

VD2_23

VD2_22

VD2_21

VD2_20

VD2_19

VD2_18

VD2_17

VD2_16

VD2_15

VD2_14

VD2_13

VD2_12

VD2_9

VD2_3

VD2_46

GND_49

GND_48

GND_50

GND_52

GND_53

VD2_73

GND_64

GND_65

GND_67

GND_68

GND_69

GND_70

GND_71

GND_73

GND_74

GND_75

GND_76

GND_77

GND_78

VD2_4

VD2_5

VD2_34

VD2_32

VD2_28

VD2_27

VD2_26

VD2_30

GND_45

GND_4

VD2_1

VD2_58

VD2_56

VD2_55

VD2_54

VD2_11

GND_72

GND_38

VD2_33

VD2_42

GND_66

GND_51

VD2_10

(7 OF 10)

PART 0

PWR/GND

PP

DRAWING

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

Q63 APPLICATION IS PP1V5 PWRON


20%

402X5R

0.22UF

6.3V2

1 C4100

20%

402X5R

0.22UF

6.3V2

1 C4101

20%

402X5R

0.22UF

6.3V2

1 C4102

20%

402X5R

0.22UF

6.3V2

1 C4103

20%

402X5R

0.22UF

6.3V2

1 C4104

20%

402X5R

0.22UF

6.3V2

1 C4105

20%

402X5R

0.22UF

6.3V2

1 C4106

20%

402X5R

0.22UF

6.3V2

1 C4107

20%

402X5R

0.22UF

6.3V2

1 C4108

20%

402X5R

0.22UF

6.3V2

1 C4109

20%

402X5R

0.22UF

6.3V2

1 C4110

20%

402X5R

0.22UF

6.3V2

1 C4111

20%

402X5R

0.22UF

6.3V2

1 C4112

20%

402X5R

0.22UF

6.3V2

1 C4113

0.22UF20%

402X5R6.3V

2

1 C4114

0.22UF20%

402X5R6.3V

2

1 C4115

20%

402X5R

0.22UF

6.3V2

1 C4116

20%

402X5R

0.22UF

6.3V2

1 C4117

20%

402X5R

0.22UF

6.3V2

1 C4118

20%

402X5R

0.22UF

6.3V2

1 C4120

20%

402X5R

0.22UF

6.3V2

1 C4121

20%

402X5R

0.22UF

6.3V2

1 C4122

20%

402X5R

0.22UF

6.3V2

1 C4123

402

20%

X5R

0.22UF

6.3V2

1 C4124

20%

402X5R

0.22UF

6.3V2

1 C4125

20%

402X5R

0.22UF

6.3V2

1 C4126

20%

402X5R

0.22UF

6.3V2

1 C4127

20%

402X5R

0.22UF

6.3V2

1 C4128

20%

402X5R

0.22UF

6.3V2

1 C4129

20%

402X5R

0.22UF

6.3V2

1 C4130

20%

402X5R

0.22UF

6.3V2

1 C4131

20%

402X5R

0.22UF

6.3V2

1 C4132

20%

402X5R

0.22UF

6.3V2

1 C4133

20%

402X5R

0.22UF

6.3V2

1 C4134

20%

402X5R

0.22UF

6.3V2

1 C4135

20%

402X5R

0.22UF

6.3V2

1 C4136

20%

402X5R

0.22UF

6.3V2

1 C4137

20%

402X5R

0.22UF

6.3V2

1 C4138

20%

402X5R

0.22UF

6.3V2

1 C4139

20%

402X5R

0.22UF

6.3V2

1 C4140

20%

402X5R

0.22UF

6.3V2

1 C4141

20%

402X5R

0.22UF

6.3V2

1 C4142

20%

402X5R

0.22UF

6.3V2

1 C4143

20%

402X5R

0.22UF

6.3V2

1 C4144

20%

402X5R

0.22UF

6.3V2

1 C4145

20%

402X5R

0.22UF

6.3V2

1 C4146

20%

402X5R

0.22UF

6.3V2

1 C4147

0.22UF20%

402X5R6.3V

2

1 C4148

20%

402X5R

0.22UF

6.3V2

1 C4149

20%

402X5R

0.22UF

6.3V2

1 C4150

6.3V20%

402X5R

0.22UF

2

1 C4151

20%

402X5R

0.22UF

6.3V2

1 C4152

0.22UF20%

402X5R6.3V

2

1 C4153

20%

402X5R

0.22UF

6.3V2

1 C4154

20%

402X5R

0.22UF

6.3V2

1 C4155

20%

402X5R

0.22UF

6.3V2

1 C4156

20%

402X5R

0.22UF

6.3V2

1 C4157

20%

402X5R

0.22UF

6.3V2

1 C4158

20%

402X5R

0.22UF

6.3V2

1 C4159

0.22UF20%

402X5R6.3V

2

1 C4160

0.22UF20%

402X5R6.3V

2

1 C4161

20%

402X5R

0.22UF

6.3V2

1 C4162

20%

402X5R

0.22UF

6.3V2

1 C4163

20%

402X5R

0.22UF

6.3V2

1 C4164

20%

402X5R

0.22UF

6.3V2

1 C4165

20%

402X5R

0.22UF

6.3V2

1 C4166

20%

402X5R

0.22UF

6.3V2

1 C4167

20%

402X5R

0.22UF

6.3V2

1 C4168

20%

402X5R

0.22UF

6.3V2

1 C4169

20%

402X5R

0.22UF

6.3V2

1 C4170

20%

402X5R

0.22UF

6.3V2

1 C4171

20%

402X5R

0.22UF

6.3V2

1 C4172

20%

402X5R

0.22UF

6.3V2

1 C4173

20%

402X5R

0.22UF

6.3V2

1 C4174

20%

402X5R

0.22UF

6.3V2

1 C4175

20%

402X5R

0.22UF

6.3V2

1 C4176

20%

402X5R

0.22UF

6.3V2

1 C4177

20%

402X5R

0.22UF

6.3V2

1 C4178

20%

402X5R

0.22UF

6.3V2

1 C4179

20%

402X5R

0.22UF

6.3V2

1 C4180

BGA

KODIAK-ASIC-040812

AD12

Y12

Y10

AD10

Y07

Y04

Y01

V13

V11

V08

V05

V02

T12

T10

AD07

T07

T04

T01

P13

P11

P08

P05

P02

M10

M07

AD04

M04

M01

K08

K05

K02

AT21

AT17

AT13

AT09

AT05

AD01

AR19

AR15

AR11

AR07

AR03

AP02

AN21

AN17

AN13

AN09

AB13

AN05

AM19

AM15

AM11

AM07

AM04

AM01

AK21

AK17

AK13

AB11

AK09

AK05

AK02

AJ19

AJ15

AJ11

AH09

AH07

AH04

AG21

AB08

AG17

AG13

AF19

AF15

AF11

AF08

AE18

AE14

AD20

AD16

AB05

AB02

AD13

AJ09

AJ08

AF21

AF04

AF01

AD11

Y13

Y11

Y08

Y05

Y02

V12

V10

V07

V04

V01

AD08

T13

T11

T08

T05

T02

P12

P10

P07

P04

P01

AD05

M08

M05

M02

K04

K01

AT19

AT15

AT11

AT07

AT03

AD02

AR21

AR17

AR13

AR09

AR05

AP01

AN19

AN15

AN11

AN07

AB12

AN04

AM21

AM17

AM13

AM09

AM05

AM02

AK19

AK15

AK11

AB10

AK07

AK04

AK01

AJ21

AJ17

AJ13

AH08

AH05

AH02

AG19

AB07

AG15

AG11

AF17

AF13

AF10

AF07

AE19

AE15

AD21

AD17

AB04

AB01

U1900

SM

2 1

XW4100 P4MMSM

1 PP4100

20%

402X5R

0.22UF

6.3V2

1 C4181

ABBREV=DRAWING

TITLE=KILOHANA


KODIAK EI PWR & CAPSSYNC_MASTER=Q63

41 154

07051-6863

NO_TEST=YES

PP_VEINB

=PPV_EI_NB

=PPV_EI_NB

<XR_PAGE_TITLE>


42B4

42B4

41D4

41D6

20B8

20B8

3A3

3A3

Preliminary

API0_ADI21

API0_ADO43

API0_SE

IRQ0

API0_SRIP0

API0_SRIP1

API_QACK0

API0_SRIN0

API0_SRIN1

API0_ADI32

API0_ADI24

API0_ADI17

API0_ADI15

API0_ADO18

API0_SRON0

API0_SROP1

API_REFCLK_AGND

API0_ADO23

API_REFCLK_N

API0_BCLKIN

API0_BCLKIP

API0_ADI27

API0_ADI26

API0_ADI2

API0_ADI3

API0_ADI4

API0_ADI1

API0_ADI0

API0_ADI5

API0_ADI7

API0_ADO2

API0_ADO24

API0_SRON1

API0_ADI33

API0_ADI34

API0_ADO3

API0_ADO1

API0_ADI36

API0_ADO28

API0_ADI31

API0_ADI30

API0_ADI29

API0_ADI25

API0_ADI20

API0_ADI19

API0_ADI16

API0_ADI18

API0_ADI14

API0_ADI11

API0_ADI12

API0_ADI13

API0_ADI10

API0_ADI6

API0_SROP0

API0_ADO15

API0_ADO30

API0_ADO31

API0_ADO26

API0_ADO25

API0_ADO22

API0_ADO21

API0_ADO19

API0_ADO20

API0_ADO16

API0_ADO17

API0_ADO14

API0_ADO13

API0_ADO10

API0_ADO8

API0_ADO7

API0_ADO6

API0_ADO5

API0_ADO9

API0_ADO11

API0_ADO12

API0_ADI9

API0_ADI8

API0_ADI35

API0_ADO34

API0_ADI37

API0_ADI28

API0_ADI23

API0_ADI22

API0_ADO33

API0_ADO37

API0_ADO41

API0_ADO40

API0_ADO32

API0_ADO29

API0_ADO27

API0_ADO4

API_REFCLK_P

API0_ADO0

API0_BCLKON

API0_ADO42

API_CSTP

API_QREQ0

API_REFCLK_AVDD

API0_ADO35

API0_ADO36

API0_ADI43

API0_ADI42

API0_ADI41

API0_ADI40

API0_ADI39

API0_ADI38

API0_APSYNC

API_QACK1

API0_ADO39

API0_ADO38

IRQ1

API_QREQ1

API0_BCLKOP

API-PROC A

(1 OF 10)

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

DRAWING

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE


PULL DOWN QREQS TO NB

EI_BUS SYS_CLK CONSTRAINTS MOVED TO PAGE 56 TO SUPPORT M23/M33

NAMED APPROPRIATELY.

OF SIGNALS. BUSSES ARE NAMED FROM THE PERSPECTIVE OF THE CPU

EI INPUT FROM CPU A

PLEASE FOLLOW THE NAMING CONVENTION OF BUSSES FOR DIRECTION

CPU_CHKSTOP_L IS SHARED BY BOTH CPUS

AS AN OUTPUT. NETS

EI OUTPUT TO CPU A

PLEASE HAVE THE KODIAK TEAM REVIEW

KODIAK DEFINES ADO

AS AN INPUT AND ADI

NET_SPACING_TYPE

KODIAK-ASIC-040812

BGA

R11

W11

AJ07AJ06

AG09

AG10

AF18

AA11

AF12

AH10

AD09

AE08

AC01

AE07

AB03

W09

V09

U09

W10

AL07

AA06

AA07

L04

L05

AC10

AC05

AC03

AC04

AE05

AD03

W01

V03

V06

U05

AD06

U04

U03

U01

U02

Y09

AA09

AA10

AC09

AB09

W02

AE01

W03

W04

Y06

Y03

W08

W07

W05

W06

AE06

AA08

AE02

AA01

AA02

AA03

AB06

AA05

AA04

AC02

AC08

AC07

AC06

AE04

AE03

T09

R05

R04

R03

U07

K03

L07

N09

N10

U08

M09

L06

R06

R07

L08

L10

K09

K06

L09

L03

T03

L02

L01

N05

N06

N07

N08

M06

M03

U06

R08

T06

N04

N03

N02

N01

P03

P06

U10

P09

R10

R09

R02

R01

U1900

402CERM16V10%0.01UF

2

1 C4200

CERM

20%10V

2.2UF

805

2

1 C4201

4.99

MF-LF805

1%1/8W

21

R4200

402

4.7K

MF-LF

1%1/16W

2

1R4205

402

10K

MF-LF

5%1/16W

21

R4207

402

10K

MF-LF

5%1/16W

21

R4206

SMP4MM1 PP4201

P4MMSM

1 PP4203

SMP4MM1 PP4202

SMP4MM1 PP4204

SMP4MM1 PP4206

P4MMSM

1 PP4207

SMP4MM1 PP4208

P4MMSM

1 PP4209

SMP4MM1 PP4210

SMP4MM1 PP4211

P4MMSM

1PP4212

SMP4MM

1PP4213

P4MMSM

1PP4214

P4MMSM

1PP4215

P4MMSM

1 PP4216

I290

I291

ABBREV=DRAWING

TITLE=KILOHANA

42

051-6863 07

154


KODIAK EI A

EI_REFCLK_AVDD

MIN_LINE_WIDTH=0.20 MM

NB_CHKSTOP_L

NB_CPU_A0_INT_L

P3MM SPACINGNB_CPU_A0_INT_L

NB_CPU_A1_INT_L P3MM SPACING

NB_CPU_A1_INT_L

NB_APSYNC

EI_NB_SYSCLK_P

EI_NB_SYSCLK_N

EI_CPU_A_TO_NB_AD<5>







EI_NB_TO_CPU_A_AD<40>






EI_NB_TO_CPU_A_SR_P<0>

EI_NB_TO_CPU_A_SR_P<1>

EI_NB_TO_CPU_A_SR_N<0>

EI_NB_TO_CPU_A_SR_N<1>





EI_NB_TO_CPU_A_CLK_N

EI_NB_TO_CPU_A_CLK_P















































EI_CPU_A_TO_NB_AD<42>EI_NB_TO_CPU_A_AD<43>



CPU_A1_QACK_L










CPU_A0_QACK_L

CPU_A0_TO_NB_QREQ_L

CPU_A1_TO_NB_QREQ_L







EI_CPU_A_TO_NB_CLK_N

CPU_A0_TO_NB_QREQ_L

EI_CPU_A_TO_NB_SR_P<1>

EI_CPU_A_TO_NB_SR_P<0>

EI_CPU_A_TO_NB_SR_N<1>

EI_CPU_A_TO_NB_SR_N<0>

CPU_A1_TO_NB_QREQ_L

NB_A_TRIGGER_OUT



EI_CPU_A_TO_NB_CLK_P



=PPVCORE_PWRON_NB


=PPV_EI_NB


<XR_PAGE_TITLE>


45B6 43B6

59A6

41D6

29D4

20A8

41D4

8A5

42A7

42A8

42A8

42A7

56C8

56B8

56B8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8 56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

56C8

42A5

42A5

56C8

56C8

56C8

56C8

56C8

56C8

56C8

42A4

56C8

56C8

56C8

56C8

42A4

56C8

56C8

56C8

56C8

56C8

19C7

56C8

20B8

56C8

6D7

24B8

24B8

24B8

24B8

26C2

26D2

26D2

43D5

43D5

43D5

43D5

43D5

43D5

43D5

43C8

43B8

43C8

43C8

43C8

43B5

43B8

43B8

43B8

43B8

43C8

43C8

43C8

43C5

43D8

43D8

43D8

43D8

43D8

43D8

43D8

43D8

43D8

43D5

43C5

43C8

43C8

43D5

43C5

43C8

43C8

43C8

43C8

43C8

43D8

43D8

43D8

43D8

43D8

43D8

43C5

43C5

43C5

43C5

43C5

43C5

43D5

43D5

43D8

43D8

43C8

43C8

43C8

43C8

43C5

43C5

43B5

43C5

43C5

43C5

43C5

43D5

43B5

43B8

43B8

43C8

43B8

43C5

43C5

43C8

43C8

43C8

43C8

43C8

43C8

43C8

43B8

30A5

30A5

43D5

43D5

43C5

43C5

43C5

43C5

43D5

30A5

43B5

43B5

43B5

43B5

30A5

43A6

43C5

43C5

43D5

43D5

43C5

3A4

43C5

3A3

43C5

Preliminary

(1 OF 3)

PLLTESTOUT

PLLRANGE1

SPARE

PLLTEST

PLLRANGE0

JTAGMODEGPUL_DBG

EI_DISABLE

ATTENTION

TMSTRST*

TCK

TDOTDI

PLLMULT

BYPASS*PLLLOCK

BUSCFG0BUSCFG1BUSCFG2

EI_SRO1*

EI_SRO0*

CKTERMDIS

APSYNCIN

IIC_SDAIIC_SCL

I2CGO

INT*

EI_SRO1

EI_SRO0

QREQ*

EI_ADO33EI_ADO34

EI_ADO39EI_ADO40EI_ADO41EI_ADO42


EI_ADO43

EI_ADO32

EI_ADO26EI_ADO27


EI_ADO25

SYSCLK

EI_ADO24

EI_ADO22EI_ADO23


EI_ADO16EI_ADO17


EI_ADO10EI_ADO11

EI_ADO9EI_ADO8EI_ADO7

EI_ADO4

EI_ADO6EI_ADO5

EI_CLKO*


EI_CLKO

PSRO1PSRO2

RI*SYNCENABLE*

RAMSTOPENABLEPULSESEL2PULSESEL1PULSESEL0

MCP*

DI2*

AFN

BIMODE*

LSSDSTOPENABLELSSDSTOPC2STARENABLELSSDSTOPC2ENABLELSSDSCANENABLELSSDMODE

C2UNDGLOBALC1UNDGLOBAL

AVPRESET*

PROCID1PROCID2

TRIGGER_INTRIGGER_OUT

PROCID0

TBEN

QACK*

SRESET*

HRESET*

THERM_INT*

APSYNCOUT

EI_SRI0

EI_SRI1

CHKSTOP*

EI_SRI1*

EI_SRI0*

EI_ADI43

EI_ADI33

EI_ADI36EI_ADI37

EI_ADI34

EI_ADI40EI_ADI41

EI_ADI39

EI_ADI35

EI_ADI38

EI_ADI42

EI_ADI32

EI_ADI27EI_ADI26EI_ADI25

EI_ADI30EI_ADI31

EI_ADI29EI_ADI28



EI_ADI17EI_ADI16

EI_ADI19EI_ADI20

EI_ADI18

EI_ADI21

EI_ADI12


EI_ADI9

EI_ADI4

EI_ADI8

EI_ADI10EI_ADI11

EI_ADI3EI_ADI2

EI_ADI0

EI_CLKI

EI_ADI1

EI_CLKI*

SYSCLK*

VCC

GND

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_ALT_ITEM


TABLE_ALT_HEAD

OPTIONS TO OPTIMIZE ROUTING.REMOVED BACKUP TERMINATION

TI

QREQ_L AND SUSPENDREQ_L AND HACKSAME AS Q45

PCB: MATCH APSYNC LENGTH TO SYSCLK

PCB: PLACE R4303 AND R4301 AT PROCESSOR PINS

PSRO_ENABLE

SPARE2 UNDEFINED

PG 49 & 52 HAVE MORE CAPS

1UF

CERM6.3V10%

4022

1 C4300

1UF

CERM6.3V10%

4022

1C43021UF

CERM6.3V10%

4022

1 C43031UF

CERM6.3V10%

4022

1 C43041UF

CERM6.3V10%

4022

1 C43051UF

CERM6.3V10%

4022

1 C43061UF

CERM6.3V10%

4022

1 C43071UF

CERM6.3V10%

4022

1 C43081UF

CERM6.3V10%

4022

1 C43091UF

CERM6.3V10%

4022

1 C43101UF

CERM6.3V10%

4022

1 C4311

CRITICAL

OMIT

NEO-10S-REV2

1.8GHZ-76C

CBGA

W20

N19

N21

AD22

V22

AD13

AB21

AD21

AD17

T22R22

AB24

AB4

AA13

AA5

AB6

AB12V21

AC10

AB11

AC9

V5

V23

M18

M19

L19

T19

W22

AA9

AB7

AA8

T20

AD18

AD11

AD7

AD8

U19

AB5

W4

AB19

Y21

AA20

N22

V20

AA22

F1

G1

L2

L3

L22

L21

K24

L24

P20

E3

D3

D24E24

G4

H1

H3

K2

K4

A6

A8

C10

A10

M3

C9

A9

A4

C6

C8

A7

C7

C4

B4

B6

L1

A12

C12

D8

D2

A2

A5

D6

B2

C5

C1

K3

C11

B10

A11

E12

D11

B8

G3

E2

F4

F2

H2

N3

G20

J24

H23

K22

A13

A19

C16

A17

A15

C13

A18

A20

A23

A21

C18

C19

A22

D20

B21

D18

J22

C17

C14

B19

B17

F21

B24

B23

E21

E20

C22

H22

A16

D15

C15

A14

B15

G19

G24

D22

G21

F23

J21

H21

U24

AA14

R20

AC15

AC16

V24

AB16

AC19

AA19

AC24

W23

AD12

AD14 AA10

AA12

U4300

74LVC1G66DBVG4SOT23-5

CRITICAL

21

5

3

4

U4310

402

NOSTUFF

05%

1/16WMF-LF

21

R4310

CERM10V20%

0.1UF

4022

1C4372

1UF

CERM6.3V10%

4022

1 C4312

1UF

CERM6.3V10%

4022

1 C4313

1UF

CERM6.3V10%

4022

1 C4314

1UF

CERM6.3V10%

4022

1 C4315

1UF

CERM6.3V10%

4022

1 C4316

1UF

CERM6.3V10%

4022

1 C4317

1UF

CERM6.3V10%

4022

1 C4318

1UF

CERM6.3V10%

4022

1 C4319

1UF

CERM6.3V10%

4022

1 C4320

1UF

CERM6.3V10%

4022

1 C4321

1UF

CERM6.3V10%

4022

1 C4322

1UF

CERM6.3V10%

4022

1 C4323

1UF

CERM6.3V10%

4022

1 C4324

1UF

CERM6.3V10%

4022

1 C4325

1UF

CERM6.3V10%

4022

1 C4326

1UF

CERM6.3V10%

4022

1 C4327

1UF

CERM6.3V10%

4022

1 C4328

1UF

CERM6.3V10%

4022

1 C4329

1UF

CERM6.3V10%

4022

1 C4330

1UF

CERM6.3V10%

4022

1 C4331

1UF

CERM6.3V10%

4022

1 C43321UF

CERM6.3V10%

4022

1 C43331UF

CERM6.3V10%

4022

1 C43341UF

CERM6.3V10%

4022

1 C43351UF

CERM6.3V10%

4022

1 C4336

1UF

CERM6.3V10%

4022

1 C4337

1UF

CERM6.3V10%

4022

1 C4338

1UF

CERM6.3V10%

4022

1 C4339

1UF

CERM6.3V10%

4022

1 C4340

1UF

CERM6.3V10%

4022

1 C4341

1UF

CERM6.3V10%

4022

1 C4342

1UF

CERM6.3V10%

4022

1 C4343

1UF

CERM6.3V10%

4022

1 C4344

1UF

CERM6.3V10%

4022

1 C4345

1UF

CERM6.3V10%

4022

1 C4346

1UF

CERM6.3V10%

4022

1 C4347

1UF

CERM6.3V10%

4022

1 C4348

1UF

CERM6.3V10%

4022

1 C4349

1UF

CERM6.3V10%

4022

1 C4350

1UF

CERM6.3V10%

4022

1 C4351

1UF

CERM6.3V10%

4022

1 C4352

1UF

CERM6.3V10%

4022

1 C4353

1UF

CERM6.3V10%

4022

1 C4354

1UF

CERM6.3V10%

4022

1 C4355

1UF

CERM6.3V10%

4022

1 C4356

1UF

CERM6.3V10%

4022

1 C43571UF

CERM6.3V10%

4022

1 C43581UF

CERM6.3V10%

4022

1 C43591UF

CERM6.3V10%

4022

1 C4360


07051-6863

43 154

CPU EI AND IO

U4310

CRITICAL

353S0867353S0920 PERICOM ANALOG SWITCH

CPU_TO_NB_QREQ_L

=PP3V3_PWRON_SMU

=PPVCORE_CPUEI_CPU_SYSCLK_P

EI_CPU_SYSCLK_N

EI_NB_TO_CPU_CLK_PEI_NB_TO_CPU_CLK_N

EI_NB_TO_CPU_AD<0>

EI_NB_TO_CPU_AD<2>EI_NB_TO_CPU_AD<1>

EI_NB_TO_CPU_AD<3>

EI_NB_TO_CPU_AD<7>EI_NB_TO_CPU_AD<6>EI_NB_TO_CPU_AD<5>EI_NB_TO_CPU_AD<4>

EI_NB_TO_CPU_AD<8>EI_NB_TO_CPU_AD<9>EI_NB_TO_CPU_AD<10>EI_NB_TO_CPU_AD<11>EI_NB_TO_CPU_AD<12>EI_NB_TO_CPU_AD<13>

EI_NB_TO_CPU_AD<18>EI_NB_TO_CPU_AD<17>EI_NB_TO_CPU_AD<16>EI_NB_TO_CPU_AD<15>EI_NB_TO_CPU_AD<14>

EI_NB_TO_CPU_AD<19>EI_NB_TO_CPU_AD<20>EI_NB_TO_CPU_AD<21>








EI_NB_TO_CPU_SR_P<1>EI_NB_TO_CPU_SR_N<1>

EI_NB_TO_CPU_SR_P<0>EI_NB_TO_CPU_SR_N<0>

CPU_QACK_L

CPU_CHKSTOP_L

EI_CPU_TBEN_CLK

CPU_HRESET_L

PROC_THERM_INT_L

CPU_SRESET_L

PROCID2

PROCID0PROCID1

AVPRESET_LBIMODE_L

LSSDMODE

C2UNDGLOBALDI2_L

C1UNDGLOBAL

LSSDSCANENABLELSSDSTOPC2ENABLE

LSSDSTOPENABLECPU_MCP_L

LSSDSTOPC2STARENABLE

PULSESEL1PULSESEL0

PULSESEL2

SYNCENABLE

RAMSTOPENABLERI_L

EI_CPU_APSYNCCPU_APSYNCOUT

CPU_AFN

CPU_PSROCPU_PSRO_ENABLE

EI_CPU_TO_NB_CLK_PEI_CPU_TO_NB_CLK_N

EI_CPU_TO_NB_AD<0>

EI_CPU_TO_NB_AD<2>EI_CPU_TO_NB_AD<1>

EI_CPU_TO_NB_AD<3>

EI_CPU_TO_NB_AD<6>

EI_CPU_TO_NB_AD<4>

EI_CPU_TO_NB_AD<7>

EI_CPU_TO_NB_AD<5>


EI_CPU_TO_NB_AD<13>EI_CPU_TO_NB_AD<12>EI_CPU_TO_NB_AD<11>EI_CPU_TO_NB_AD<10>

EI_CPU_TO_NB_AD<15>EI_CPU_TO_NB_AD<16>EI_CPU_TO_NB_AD<17>EI_CPU_TO_NB_AD<18>

EI_CPU_TO_NB_AD<14>



EI_CPU_TO_NB_AD<21>

EI_CPU_TO_NB_AD<24>

EI_CPU_TO_NB_AD<26>


EI_CPU_TO_NB_AD<25>

EI_CPU_TO_NB_AD<29>

EI_CPU_TO_NB_AD<31>


EI_CPU_TO_NB_AD<30>

EI_CPU_TO_NB_AD<36>EI_CPU_TO_NB_AD<37>EI_CPU_TO_NB_AD<38>


EI_CPU_TO_NB_AD<39>



EI_CPU_TO_NB_SR_P<0>EI_CPU_TO_NB_SR_N<0>EI_CPU_TO_NB_SR_P<1>EI_CPU_TO_NB_SR_N<1>

CPU_INT_L

CPU_QREQ_L

I2C_CPU_SCLI2C_CPU_SDA

CKTERMDIS_L

I2CGO

EI_DISABLE

BUSCFG1BUSCFG0

BUSCFG2

CPU_ATTENTION

CPU_SPARE2GPUL_DBG

JTAG_CPU_TCK

JTAG_CPU_TDOJTAG_CPU_TMS

JTAG_CPU_TDI

CPU_BYPASS_LPLLLOCKPLLMULT

PLLTESTOUTPLLTESTPLLRANGE1PLLRANGE0

CPU_SPARE

JTAG_CPU_TRST_L

CPU_TRIGGER_OUTCPU_TRIGGER_IN

SMU_SUSPENDREQ_L

CPU_QREQ_L

56 55 52

30

50

30

28

49

56

47

9

56

28

56

7

48 56

56

56 56

56

56 56

56

56 56 56 56

56 56 56 56 56 56

56 56 56 56 56

56 56 56

56 56

56 56

56 56 56

56 56 56

56 56

56 56 56 56 56

56 56 56 56 56

56 56

56 56

56

8

56

29

47

56

47

47 47

47 47

47

47 47

47

47 47

47 56

47

47 47

47

47

47 47

56 56

56

56 56

56 56

56

56 56

56

56

56

56

56

56 56

56 56 56 56

56 56 56 56

56

56 56

56 56

56

56

56

56 56

56

56

56

56 56

56

56 56 56

56 56

56

56 56

56 56

56 56 56 56

56

43

47 47

47

47

47

47 47

47

56

47 47

30

30 30

30

29 8 47

47 47 47 47

47

47

56 47

24

43

Preliminary

API1_ADO26

API1_ADO27

API1_ADO28

API_QACK2

API1_ADI41

API1_ADI42

API1_ADI43

API1_SRIN0

API1_SRIP1

API1_SRIN1

API_QACK3

IRQ2

API1_APSYNC

API1_ADI32

API1_ADI31

API1_SRIP0

API1_ADI39

API1_ADI40

API1_ADI38

API1_ADI37

API1_ADI36

API1_ADI35

API1_ADO40

API1_ADO43

API1_ADO42

API1_ADO39

API1_SRON0

API1_SROP0

API1_ADO4

API1_ADO3

API1_ADO1

API1_ADO0

API1_ADO9

API1_ADO10

API_QREQ3

API_QREQ2

API1_SRON1

API1_SROP1

API1_ADO41

IRQ3

API1_ADO22

API1_ADO20

API1_ADO25

API1_ADO17

API1_ADO16

API1_ADO15

API1_ADI2 API1_ADO2

API1_ADO11

API1_ADO12

API1_ADO13

API1_ADO14

API1_ADO8

API1_ADO21

API1_ADO23

API1_ADO24

API1_ADO18

API1_ADO19

API1_ADO30

API1_ADO31

API1_ADO32

API1_ADO34

API1_ADO33

API1_ADO36

API1_ADO35

API1_ADO29

API1_ADO38

API1_ADO37

API1_ADI30

API1_ADI33

API1_ADI34

API1_ADI21

API1_ADI23

API1_ADI25

API1_ADI27

API1_ADI29

API1_ADI28

API1_ADI26

API1_ADI24

API1_ADI22

API1_ADI20

API1_ADI10

API1_ADI12

API1_ADI11

API1_ADI13

API1_ADI14

API1_ADI15

API1_ADI17

API1_ADI16

API1_ADI18

API1_ADI19

API1_ADI9

API1_ADI8

API1_ADI7

API1_ADI6

API1_ADI1

API1_ADI0

API1_BCLKIP

API1_BCLKIN

API1_SE

API1_ADO5

API1_ADO7

API1_ADO6

API1_BCLKOP

API1_ADI3

API1_ADI4

API1_ADI5

API1_BCLKON

API-PROC B

(2 OF 10)

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

DRAWING

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NET_SPACING_TYPE

EI_BUS SYS_CLK CONSTRAINTS MOVED TO PAGE 56 TO SUPPORT M23/M33


NAMED APPROPRIATELY.

PLEASE HAVE THE KODIAK TEAM REVIEW

EI OUTPUT TO CPU B

PLEASE FOLLOW THE NAMING CONVENTION OF BUSSES FOR DIRECTION

OF SIGNALS. BUSSES ARE NAMED FROM THE PERSPECTIVE OF THE CPU

KODIAK DEFINES ADO

AS AN OUTPUT. NETS

WE MAY NEED A DIFFERENT

FOR CPU_A AND CPU_B.

WIRE TP_NB_APSYNC TO A TEST POINT

PULL DOWN QREQS TO NB

AS AN INPUT AND ADI

EI INPUT FROM CPU B

KODIAK-ASIC-040812

BGA

U11

N11

AF20

AF16

AC11

AF14

AJ18

AG18

AH18

AJ16

AR02

AP09

AP03

AL09

AK08

AT16

AR16

AT08

AR08

AH11

AN18

AL18

AM18

AM20

AP19

AH17

AH16

AH14

AJ14

AL19

AH15

AG16

AL13

AP13

AK14

AT14

AR14

AP14

AN14

AL14

AT20

AM14

AP16

AL15

AP15

AK16

AL16

AN16

AM16

AL20

AG20

AR20

AH19

AK20

AJ20

AH20

AL17

AP17

AK18

AT18

AR18

AP18

AN20

AP20

AH12

AT12

AR12

AP12

AL11

AN03

AN02

AL03

AL04

AP11

AL05

AL06

AN01

AM03

AP04

AP06

AN06

AM06

AP05

AR04

AK12

AT04

AP08

AR06

AT06

AP07

AL08

AN08

AM08

AJ10

AK10

AL12

AT10

AR10

AP10

AN10

AL10

AM10

AG14

AJ12

AH13

AG12

AN12

AM12U1900

10K

MF-LF402

5%1/16W

21

R4407

10K

MF-LF402

5%1/16W

21

R4406

SMP4MM1 PP4400

P4MMSM

1 PP4401

SMP4MM1 PP4402

SMP4MM1 PP4403

SMP4MM1 PP4404

P4MMSM

1 PP4405

P4MMSM

1PP4406

SMP4MM

1PP4407

SMP4MM

1PP4408

I48

I49

P4MMSM

1 PP4410

SMP4MM1 PP4411

SMP4MM1 PP4413

ABBREV=DRAWING

TITLE=KILOHANA

KODIAK EI BSYNC_DATE=05/19/2005SYNC_MASTER=Q63

051-6863 07

44 154

EI_CPU_B_TO_NB_CLK_N

EI_CPU_B_TO_NB_CLK_P

CPU_B0_TO_NB_QREQ_L

EI_CPU_B_TO_NB_AD<13>



EI_CPU_B_TO_NB_SR_P<0>

NB_CPU_B1_INT_L

NB_B_TRIGGER_OUT

EI_CPU_B_TO_NB_SR_N<0>

EI_CPU_B_TO_NB_SR_N<1>

EI_CPU_B_TO_NB_SR_P<1>

CPU_B1_TO_NB_QREQ_L


EI_NB_TO_CPU_B_AD<40>

EI_NB_TO_CPU_B_AD<41> EI_CPU_B_TO_NB_AD<41>






CPU_B0_QACK_L

EI_NB_TO_CPU_B_SR_N<0>

EI_NB_TO_CPU_B_SR_P<1>

EI_NB_TO_CPU_B_SR_N<1>

CPU_B1_QACK_L

TP_NB_APSYNC



EI_NB_TO_CPU_B_SR_P<0>



















EI_NB_TO_CPU_B_AD<2> EI_CPU_B_TO_NB_AD<2>
















































EI_NB_TO_CPU_B_CLK_P







CPU_B0_TO_NB_QREQ_L

CPU_B1_TO_NB_QREQ_L

EI_NB_TO_CPU_B_CLK_N

NB_CPU_B0_INT_L

NB_CPU_B0_INT_L P3MM SPACINGNB_CPU_B1_INT_L P3MM SPACING


<XR_PAGE_TITLE>


56B8

56B8

44A5

56B8

56B8

56B8

56B8

44A7

56B8

56B8

56B8

44A5

56B8

56B8

56B8 56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8 56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

56B8

44B5

44B5

56B8

44A7

44B8

44B8

56B8

45D6

45D6

30A3

45D6

45C6

45C6

45B6

24A8

45A6

45B6

45B6

45B6

30A3

45B6

45B8

45B8 45B6

45B8

45B8

45C6

45C6

45C6

45B8

45B8

45B8

45B8

45B8

45C8

45C8

45B8

45C8

45C8

45C8

45C8

45C8

45B6

45B6

45D6

45D6

45D6

45D6

45D6

45D6

45C6

45C6

45C6

45C6

45C6

45D8 45D6

45D6

45D6

45C6

45D6

45C6

45C6

45C6

45C6

45C6

45C6

45C6

45C6

45C6

45C6

45C6

45C6

45C6

45C6

45C8

45C8

45C8

45C8

45C8

45C8

45C8

45C8

45C8

45C8

45C8

45C8

45C8

45D8

45D8

45D8

45D8

45C8

45C8

45C8

45C8

45C8

45C8

45D8

45D8

45D8

45D8

45D8

45D8

45D8

45D6

45D6

45D6

45D8

45D8

45D8

30A3

30A3

45D8

24B8

24B8

24A8

45C6

Preliminary

TABLE_5_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM





TABLE_5_ITEM





TABLE_5_ITEM



TABLE_5_ITEM

JTAG DRIVEN ON SMU PG 30

SRESET DRIVEN ON PG 56INT DRIVEN BY KODIAK

1K RESISTORS FOR IMPORTANT USE OR STRAPPING OPTIONS.

4.7K RESISTORS FOR MANUFACTURING-TEST-TYPE PULLUPS OR PULLDOWNS.

NOTES

QREQ PULLDOWNS ON Q63 SHARED PAGE

SEE STUFFING OPTIONS ABOVE

PROCESSOR BUS CONFIGURATION

PULLDOWNSPULLUPS

* STUFF THESE ON M23.

SELECT PROCESSOR CLOCK MULTIPLIER. PROCESSOR CLOCK(MHZ)= SYSTCLOCK * PLLMULT.

SELECT EI BUS DIVIDER. BUS DATA RATE(BPS)= (PROCESSOR CLOCK) / BUSCFG.

SELECT ELASTIC MODE OR BYPASS.

SELECT PLL FREQUENCY RANGE.

SYSCLK * 12

SYSCLK * 8

PROC / 2

PROC / 3

PROC / 4

PROC / 6

PROC / 8

PROC / 12

PROC / 16

RESERVED

BYPASS MODE

*

AVPRESET OFF

*

AVPRESET ON

>= 1.8 GHZ *

*

M23/M33 IS JTAG ONLY, NO I2C

402MF-LF1/16W5%

4.7K21

R4703

402

5%1/16WMF-LF

4.7K21

R4705

402MF-LF1/16W5%

4.7K21

R4707

5%1/16WMF-LF402

4.7K2 1

R4709

402MF-LF1/16W5%

4.7K21

R4702

402MF-LF1/16W5%

4.7K21

R4704

402MF-LF1/16W5%

4.7K21

R4706

5%1/16WMF-LF402

OMIT

1K

2

1R4708

5%1/16WMF-LF402

OMIT

1K

2

1R4724

5%1/16WMF-LF402

OMIT

1K

2

1R4726

5%1/16WMF-LF402

OMIT

1K

2

1R4728

402

5%1/16WMF-LF

OMIT

1K

2

1R4730

402MF-LF1/16W5%

OMIT

1K

2

1R4732

5%1/16WMF-LF

OMIT

402

1K

2

1R4734

1K

OMIT

5%1/16WMF-LF4022

1R4712

402MF-LF1/16W5%

OMIT

1K

2

1R4718

5%1/16WMF-LF402

OMIT

1K

2

1R4716

1/16W

402MF-LF

5%

OMIT

1K

2

1R4714

402MF-LF1/16W5%

OMIT

1K

2

1R4710

5%1/16WMF-LF402

OMIT

1K

2

1R4720

MF-LF1/16W5%

402

OMIT

1K

2

1R4722

1/16W5%

402MF-LF

4.7K21

R4740

1/16W

402

5%

MF-LF

NOSTUFF

4.7K21

R4742

MF-LF1/16W5%

402

OMIT

1K

2

1R4736

5%1/16WMF-LF402

OMIT

1K

2

1R4738

10K5%1/16WMF-LF4022

1R4768

1/16W

402

5%

MF-LF

NOSTUFF

4.7K21

R4771

MF-LF402

1/16W5%

4.7K21

R4788

4.7K

1/16W5%

MF-LF402

21

R4789

402MF-LF

5%1/16W

4.7K21

R4790

MF-LF1/16W5%

402

4.7K21

R4731

5%1/16WMF-LF402

4.7K21

R4733

5%1/16WMF-LF402

4.7K21

R4735

402MF-LF1/16W5%

4.7K21

R4737

402MF-LF1/16W5%

0

NOSTUFF

21

R4739

5%1/16WMF-LF402

4.7K21

R4741402MF-LF

5%1/16W

4.7K21

R47435%

1/16WMF-LF402

4.7K21

R4745

402

1/16W5%

MF-LF

4.7K21

R4747

5%

MF-LF402

1/16W

4.7K21

R4749

1/16WMF-LF

5%

402

4.7K21

R4751

402MF-LF1/16W5%

4.7K21

R4755

MF-LF

5%

402

1/16W

4.7K21

R4761

MF-LF1/16W5%

402

NOSTUFF

4.7K21

R4763

MF-LF402

1/16W5%

4.7K21

R4765

MF-LF

5%

402

1/16W

NOSTUFF

4.7K21

R4767

MF-LF402

5%1/16W

4.7K21

R4769

1/16W5%

402MF-LF

4.7K21

R4773

MF-LF

5%

402

1/16W

NOSTUFF

4.7K21

R4775

402MF-LF1/16W5%

NOSTUFF

4.7K21

R4777

MF-LF

5%

402

1/16W

NOSTUFF

4.7K21

R4779

MF-LF

5%

402

1/16W

4.7K21

R4781

402MF-LF

5%1/16W

4.7K21

R4787 NOSTUFFRES,1K OHM,1/16W,5%,04022 R4714,R4716116S0066

1 RES,1K OHM,1/16W,5%,0402 R4722116S0066

NOSTUFFRES,1K OHM,1/16W,5%,04021 R4720116S0066

EI_2TO1RES,1K OHM,1/16W,5%,04023 R4724,R4726,R4728116S0066

NOSTUFF3 RES,1K OHM,1/16W,5%,0402 R4708,R4726,R4728116S0066



NOSTUFFRES,1K OHM,1/16W,5%,04023 R4724,R4710,R4728116S0066

EI_3TO1RES,1K OHM,1/16W,5%,04023 R4724,R4726,R4712116S0066

RES,1K OHM,1/16W,5%,04021 R4736116S0066


2 RES,1K OHM,1/16W,5%,0402 CPU_PLL_LOWR4730,R4732116S0066

NOSTUFF1 RES,1K OHM,1/16W,5%,0402 R4738116S0066

RES,1K OHM,1/16W,5%,04022 CPU_PLL_HIGHR4730,R4716116S0066

EI_3TO11 RES,1K OHM,1/16W,5%,0402 R4734116S0066

EI_2TO1RES,1K OHM,1/16W,5%,04021 R4718116S0066

RES,1K OHM,1/16W,5%,04022 CPU_PLL_MEDIUMR4714,R4732116S0066

CPU STRAPSSYNC_DATE=05/19/2005SYNC_MASTER=FINO-MS

47 154

051-6863 07

NOSTUFFRES,1K OHM,1/16W,5%,04023 R4708,R4710,R4712116S0066

JTAG_CPU_TDO

=PPV_EI_CPU

I2C_CPU_SDA

LSSDSTOPC2ENABLE

LSSDSCANENABLE

CPU_SPARE2

LSSDMODE

LSSDSTOPENABLE

LSSDSTOPC2STARENABLE

SYNCENABLE

RAMSTOPENABLE

CPU_TRIGGER_IN

PULSESEL0

PULSESEL1

PULSESEL2

PROCID0

PROCID1

PROCID2

CKTERMDIS_L

PLLTEST

C1UNDGLOBAL

EI_DISABLEPLLMULTPLLRANGE1PLLRANGE0

AVPRESET_L

=PPV_EI_CPU

GPUL_DBG

C2UNDGLOBAL

BUSCFG0BUSCFG1BUSCFG2

=PPV_EI_CPU

JTAG_CPU_TRST_L

PLLTESTOUT

CPU_SPARE

BIMODE_L

DI2_L

RI_L

PROC_THERM_INT_L

I2CGO

I2C_CPU_SCL

56

56

56

48

48

48

47

47

47

30

30

30

43

29

56

29

29

30

7

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43

43

7

43

43

43

43

43

7

43

43

43

43

43

43

43

43

43

Preliminary

KPVDD2

(2 OF 3)

KPVDD1AVDD

GNDX105

VCOREX105

KPGND2KPGND1AGND

GNDX99

VCOREX100

(3 OF 3)

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

SPARE_GND

Z_SENSE

Z_OUT

0805

DIODENEG

DIODEPOS

REMEMBER TO CHANGE KPVDD TO NO_TEST ON PG 6.PCB:PUT R4810 AS CLOSE TO RESPECTIVE PINS AS POSSIBLE.

PROCESSOR KELVIN POINT PROBE POINT

402

10%0.1UF

X5R16V

2

1 C4800

60-OHM-EMI

SM

21

L4801

402CERM10V20%0.1UF

2

1 C4803

402CERM10V20%0.1UF

2

1 C4804

402CERM10V20%0.1UF

2

1 C4805

402CERM10V20%0.1UF

2

1 C4806

402CERM10V20%0.1UF

2

1 C4807

402CERM10V20%0.1UF

2

1 C4808

402CERM10V20%0.1UF

2

1 C4809

402CERM10V20%0.1UF

2

1 C4810

402CERM

0.1UF20%10V

2

1 C4811

402CERM10V20%0.1UF

2

1 C4812

402CERM10V20%0.1UF

2

1 C4813

805

10UF6.3V10%

X5R2

1 C4814

805

10UF6.3V10%

X5R2

1 C4815

805

10UF6.3V10%

X5R2

1 C4816

X5R

10%6.3V

10UF

8052

1 C4817

402CERM10V20%0.1UF

2

1 C4818

402CERM10V20%0.1UF

2

1 C4819

402CERM10V20%0.1UF

2

1 C4820

402CERM10V20%0.1UF

2

1 C4821

402CERM10V20%0.1UF

2

1 C4822

402CERM10V20%0.1UF

2

1 C4823

402CERM10V20%0.1UF

2

1 C4824

402CERM10V20%0.1UF

2

1 C4825

402CERM10V20%0.1UF

2

1 C4826

402CERM10V20%0.1UF

2

1 C4827

402CERM10V20%0.1UF

2

1 C4828

402CERM10V20%0.1UF

2

1 C4829

402CERM10V20%0.1UF

2

1 C4830

402CERM10V20%0.1UF

2

1 C4831

402CERM10V20%0.1UF

2

1 C4832

402CERM10V20%0.1UF

2

1 C4833

402CERM10V20%0.1UF

2

1 C4834

402CERM10V20%0.1UF

2

1 C4835

402CERM10V20%0.1UF

2

1 C4836

402CERM10V20%0.1UF

2

1 C4837

402CERM10V20%0.1UF

2

1 C4838

402CERM10V20%0.1UF

2

1 C4839

402CERM10V20%0.1UF

2

1 C4840

402CERM10V20%0.1UF

2

1 C4841

402CERM10V20%0.1UF

2

1 C4842

402CERM10V20%0.1UF

2

1 C4843

402CERM10V20%0.1UF

2

1 C4844

402CERM10V20%0.1UF

2

1 C4845

402CERM10V20%0.1UF

2

1 C4846

402CERM10V20%0.1UF

2

1 C4847

1/10WMF-LF603

5%

2.221

R4832

SM

OMIT2

1

XW4800

NEO-10S-REV2

CBGA

1.8GHZ-76C

CRITICAL

OMIT

N18N16N14N12N10M9M7M5

M23M21

C2

M17M15M13M11M1L8L6L4

L20L18

B7

L16L14L12L10K9K7K5

K23K21K19

B3

K17K15K13K11J8J6J4

J20J2

J18

B20

J16J14J12J10J1H9H7H5

H24H19

B16

H17H15H13H11G8G6

G22G18G16G14

B13

G12G10F9F7F5F3

F19F17F15F13

B11

F11E8E6E4

E22E18E16E14E10E1

A24

D9D7D5

D23D21D19D17D13C24

N8N6N4

N24N20N2

C20

A1

R2Y1

T2AA1

N5N23N17N15N13N11N1M8M6M4

C21

M24M22M20M2M16M14M12M10L9L7

B9

L5L23L17L15L13L11K8K6K20K18

B5

K16K14K12K10K1J9J7J5J3J23

B22

J19J17J15J13J11H8H6H4H20H18

B18

H16H14H12H10G9G7G5G23G2G17

B14

G15G13G11F8F6F24F22F20F18F16

B12

F14F12F10E9E7E5E23E19E17E15

B1

E13E11D4D16D14D12D10D1C3

P16P14P12P10N9N7

C23

A3

P24

R24

U4300

NEO-10S-REV2

CBGA

1.8GHZ-76C

CRITICALOMIT

AD9AD5AD3

AD23AD19AD15AD1AC8AC6AC4

AC22AC20AC2

AC18AC14AC12AB9AB3

AB23AB17AB15AB13AB1AA6AA4

AA24AA2

AA18AA16

Y9Y7Y5Y3

Y23Y22Y19Y17Y15Y13Y11W8W6

W24W2

W18W16W14W12W10V9V7V3

V19V17V15V13V11V1U8U6U4

U22U20U2

U18U16U14U12U10T9T7T5T3

T23T21T17T15T13T11T1R8R6R4

R18R16R14R12R10P9P7P5P3

P23P21P19P17P15P13P11P1

AD6AD4AD24AD20AD2AD16AD10AC7AC5AC3AC23AC21AC17AC13AC11AC1AB8AB22AB20AB2AB18AB14AB10AA7AA3AA23AA21AA17AA15AA11Y8Y6Y4Y24Y20Y2Y18Y16Y14Y12Y10W9W7W5W3W21W19W17W15W13W11W1V8V6V4V2V18V16V14V12V10U9U7U5U3U23U21U17U15U13U11U1T8T6T4T24T18T16T14T12T10R9R7R5R3R23R21R19R17R15R13R11R1P8P6P4P22P2P18U4300

NOSTUFF

100K

5%

603MF-LF1/10W

21

R4810

805

10UF6.3V10%

X5R2

1 C4802

CPU POWER AND BYPASSSYNC_DATE=05/19/2005SYNC_MASTER=FINO-MS

48 154

07051-6863

PPV_RUN_AVDD_CPU

GND_CPU_AVDD

VOLTAGE=2.8V

PPV_RUN_CPU_AVDD_R


CPU_DIODE_POS

NET_SPACING_TYPE=PROC_DIFFDIFFERENTIAL_PAIR=P_TDD

NET_PHYSICAL_TYPE=PROC_DIFF


DIFFERENTIAL_PAIR=P_TDDMIN_LINE_WIDTH=0.25MMMIN_NECK_WIDTH=0.2MM

CPU_DIODE_NEG

NET_SPACING_TYPE=PROC_DIFFNET_PHYSICAL_TYPE=PROC_DIFF

KPGND2MIN_LINE_WIDTH=0.25MMDIFFERENTIAL_PAIR=P_KP2

MIN_NECK_WIDTH=0.20MMNET_SPACING_TYPE=PROC_DIFFNET_PHYSICAL_TYPE=PROC_DIFF

KPVDD2

MIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.25MMDIFFERENTIAL_PAIR=P_KP2

NET_SPACING_TYPE=PROC_DIFFNET_PHYSICAL_TYPE=PROC_DIFF

VOLTAGE=2.8V

PPV_RUN_CPU_AVDD_R_L


=PPV_EI_CPU=PPVCORE_CPUVOLTAGE=1.3V


56 56

55 47

52

55

55

30 50

55

55 50

50

29 49

54

6

6

6 6

6

6

7 43

Preliminary

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

6.3V

402CERM

10%1UF

2

1 C4900

6.3V

402CERM

10%1UF

2

1 C4901

6.3V

402CERM

10%1UF

2

1 C4902

6.3VCERM

10%1UF

4022

1 C4903

6.3V

402CERM

10%1UF

2

1 C4904

6.3V

402CERM

10%1UF

2

1 C4905

6.3V

402CERM

10%1UF

2

1 C4906

6.3V

402CERM

10%1UF

2

1 C4907

6.3V

402CERM

10%1UF

2

1 C4908

6.3V

402CERM

10%1UF

2

1 C4909

6.3V

402CERM

10%1UF

2

1 C4910

6.3V

402CERM

10%1UF

2

1 C4911

6.3V

402CERM

10%1UF

2

1 C4912

6.3VCERM

10%1UF

4022

1 C4913

6.3VCERM

10%1UF

4022

1 C4914

6.3V

402CERM

10%1UF

2

1 C4915

6.3V

402CERM

10%1UF

2

1 C4916

6.3V

402CERM

10%1UF

2

1 C4917

6.3V

402CERM

10%1UF

2

1 C4918

6.3V

402CERM

10%1UF

2

1 C4919

6.3V

402CERM

10%1UF

2

1 C4920

6.3V

402CERM

10%1UF

2

1 C4921

6.3V

402CERM

10%1UF

2

1 C4922

6.3V

402CERM

10%1UF

2

1 C4923

6.3V

402CERM

10%1UF

2

1 C4924

6.3V

402CERM

10%1UF

2

1 C4925

6.3V

402CERM

10%1UF

2

1 C4926

6.3V

402CERM

10%1UF

2

1 C4927

6.3V

402CERM

10%1UF

2

1 C4928

6.3V

402CERM

10%1UF

2

1 C4929

6.3V

402CERM

10%1UF

2

1 C4930

6.3V

402CERM

10%1UF

2

1 C4931

6.3V

402CERM

10%1UF

2

1 C4932

6.3V

402CERM

10%1UF

2

1 C4933

6.3V

402CERM

10%1UF

2

1 C4934

6.3V

402CERM

10%1UF

2

1 C4935

6.3V

402CERM

10%1UF

2

1 C4936

6.3V

402CERM

10%1UF

2

1 C4937

6.3V

402CERM

10%1UF

2

1 C4938

6.3V

402CERM

10%1UF

2

1 C4939

6.3V

402CERM

10%1UF

2

1 C4940

6.3V

402CERM

10%1UF

2

1 C4941

6.3V

402CERM

10%1UF

2

1 C4942

6.3V

402CERM

10%1UF

2

1 C4943

6.3V

402CERM

10%1UF

2

1 C4944

6.3V

402CERM

10%1UF

2

1 C4945

6.3V

402CERM

10%1UF

2

1 C4946

6.3V

402CERM

10%1UF

2

1 C4947

6.3V

402CERM

10%1UF

2

1 C4948

6.3V

402CERM

10%1UF

2

1 C4949

6.3V

402CERM

10%1UF

2

1 C4950

6.3V

402CERM

10%1UF

2

1 C4951

6.3V

402CERM

10%1UF

2

1 C4952

6.3V

402CERM

10%1UF

2

1 C4953

6.3V

402CERM

10%1UF

2

1 C4954

6.3V

402CERM

10%1UF

2

1 C4955

6.3V

402CERM

10%1UF

2

1 C4956

6.3V

402CERM

10%1UF

2

1 C4957

6.3V

402CERM

10%1UF

2

1 C4958

6.3V

402CERM

10%1UF

2

1 C4959

6.3V

402CERM

10%1UF

2

1 C4960

6.3V

402CERM

10%1UF

2

1 C4961

6.3V

402CERM

10%1UF

2

1 C4962

6.3V

402CERM

10%1UF

2

1 C4963

6.3V

402CERM

10%1UF

2

1 C4964

6.3V

402CERM

10%1UF

2

1 C4965

6.3V

402CERM

10%1UF

2

1 C4966

6.3V

402CERM

10%1UF

2

1 C4967

6.3V

402CERM

10%1UF

2

1 C4968

6.3V

402CERM

10%1UF

2

1 C4969

6.3V

402CERM

10%1UF

2

1 C4970

6.3V

402CERM

10%1UF

2

1 C4971

6.3V

402CERM

10%1UF

2

1 C4972

6.3V

402CERM

10%1UF

2

1 C4973

6.3V

402CERM

10%1UF

2

1 C4974

6.3V

402CERM

10%1UF

2

1 C4975

6.3V

402CERM

10%1UF

2

1 C4976

6.3V

402CERM

10%1UF

2

1 C4977

6.3V

402CERM

10%1UF

2

1 C4978

6.3V

402CERM

10%1UF

2

1 C4979

6.3V

402CERM

10%1UF

2

1 C4980

6.3V

402CERM

10%1UF

2

1 C4981

6.3V

402CERM

10%1UF

2

1 C4982

6.3V

402CERM

10%1UF

2

1 C4983

6.3V

402CERM

10%1UF

2

1 C4984

6.3VCERM

10%1UF

4022

1 C4985

6.3VCERM

10%1UF

4022

1 C4986

6.3VCERM

10%1UF

4022

1 C4987

6.3VCERM

10%1UF

4022

1 C4988

6.3V

402CERM

10%1UF

2

1 C4989

6.3VCERM

10%1UF

4022

1 C4990

6.3VCERM

10%1UF

4022

1 C4991

6.3VCERM

10%1UF

4022

1 C4992

6.3V

402CERM

10%1UF

2

1 C4993

6.3V

402CERM

10%1UF

2

1 C4994

6.3V

402CERM

10%1UF

2

1 C4995

6.3V

402CERM

10%1UF

2

1 C4996

6.3V

402CERM

10%1UF

2

1 C4997

6.3V

402CERM

10%1UF

2

1 C4998

6.3V

402CERM

10%1UF

2

1 C4999

PROC DECOUPLINGSYNC_DATE=05/19/2005SYNC_MASTER=FINO-MS

07

49 154

051-6863

=PPVCORE_CPU56 55 52 50 48 43

Preliminary

TG

VREG

VIN

CO

BST

DRN

BG

VPNTHMPAD

TG

VREG

VIN

CO

BST

DRN

BG

VPNTHMPAD

G

D

S

D

G

S

G

D

S

D

G

S

D

G

S

D

G

S

OUT2

OUT1

PGOOD

ERROUT

FB

GSENSE

OS1

OS2

OUTSEN

OSCREF

VID1

VID0

VID2

VID4

VID5

DACSTEP

VID3

BGOUT

AGND

VCC

G

D

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NEED TO CHANGE TO 10MOHM CAPS - 8 PCSPHYSICAL CONSTRAINTS

NEED TO CHANGE TO 10MOHM CAPS - 8 PCS

MIN_NECK_WIDTHMIN_LINE_WIDTHPCB:CONNECT BETWEEN THE INDUCTOR & BULK CAPS.

MIN_NECK_WIDTH

PGOOD IS OC

M23/M33: PP12V_CPU IS AN ALL RAIL

DIFFERENTIAL PAIRFOR REMOTE SENSE

AVP ADJUSTMENT

MIN_LINE_WIDTH

PCB:PLACE R5025 CLOSE TO INDUCTOR OUTPUT LEAD.

MIN_NECK_WIDTH

VC PROCESSOR VOLTAGE SENSING

MIN_LINE_WIDTH

UNDER PROCESSOR

1) VCORE PLANE SENSING2) KELVIN POINT SENSING

CHOICE OF:

CPU SENSE SIDE

VCORE SUPPLY PHASE 1 (GD1)

VCORE SUPPLY PHASE 2 (GD2)

VCORE VOLTAGE CONTROLLER (VC)

NOSTUFF

50V

402CERM

10%0.0022UF

2

1 C5015

SC1211SOIC

7

5

6

2

9

1

4

3

8

U5020

1000UF20%

ELECTH-KZJ-LF

16V2

1 C5021

1

5%1/16WMF-LF402

21

R5020

NOSTUFF

0.0022UF10%

CERM402

50V2

1 C5025

16V

1206CERM

20%1UF

2

1 C5013

16V

1206

20%1UF

CERM2

1 C5029

16V

1206CERM

20%

1UF21

C5010

1UF20%

CERM1206

16V2

1 C5023

1UF

20%

CERM1206

16V

21

C5020

603MF-LF1/10W5%

2.221

R5007

CERM

10UF16V

1210

10%

2

1 C5022

1210

10UF10%

CERM16V

CRITICAL

2

1 C5012

20%

ELECTH-KZJ-LF

6.3V

1800UF2

1 C5028

SOICSC1211

7

5

6

2

9

1

4

3

8

U5010

SOT23BAS16

3

1

D5010

BAS16SOT23

3

1

D5020

0.0047UF10%

CERM402

25V2

1 C5026

15%1/8WMF-LF8052

1R5021

805MF-LF1/8W5%1

2

1R5011

25V

402CERM

10%0.0047UF

2

1 C5016

1UF20%

CERM1206

16V2

1 C5030

50V

402CERM

10%470PF

2

1 C5014

402MF-LF1/16W5%200

2

1R5012

470PF10%

CERM402

50V2

1 C5024

2005%1/16WMF-LF4022

1R5022

402MF-LF1/16W5%10K

2

1R5050

10K5%1/16WMF-LF4022

1R50512.2

5%1/10WMF-LF603

21

R5006

TH-KZJ-LF

1800UF20%

ELEC6.3V2

1 C5033

NTD60N02R

CRITICAL

CASE369

3

1

4

Q5010

NTD70N03R

CRITICAL

CASE369

3

1

4

Q5011

NTD60N02RCASE369

CRITICAL

3

1

4

Q5020

NTD70N03RCASE369

CRITICAL

3

1

4

Q5021

CRITICAL

CASE369NTD70N03R

3

1

4

Q5013

CASE369NTD70N03R

CRITICAL

3

1

4

Q5023

330UF

SM-3

16V20%

ELEC2

1 C5035

SM

0.36UH-30A-0.80MOHM21

L5010

0.36UH-30A-0.80MOHM

SM

21

L5020

16V

330UF20%

ELECSM-3

2

1 C5011

CASE-D2E-LFPOLY

20%330UF2.5V-ESR9V2

1 C5042

POLYCASE-D2E-LF

2.5V-ESR9V20%330UF

2

1 C5038

20%2.5V-ESR9VPOLYCASE-D2E-LF

330UF2

1 C501720%6.3VELECTH-MCZ

1500UF2

1 C5032

2.5V-ESR9V

330UF20%

POLYCASE-D2E-LF

2

1 C5041

330UF20%

POLYCASE-D2E-LF

2.5V-ESR9V2

1 C5018

1500UF

TH-MCZELEC6.3V20%

2

1 C5040

0

5%1/16WMF-LF402

21

R5030

I375

I376

I377

I378

I379

I380

I381

I382

I383

I384

I385

I386

I387

I388

I389

I390

I391

I392

I393

I396

I397

OMIT

SM

21

XW5000

I400

I401

I402

I403

I404

I405

I406

I407

I408

NOSTUFF

2.7M

5%1/10WMF-LF603

21

R5003

TSSOP

SC2642

13

8

9

10

11

12

7

14

19

18

1715

20

1

4

5

3

6

2

16

U5000

20K

402MF-LF1/16W5%

2

1R5001

105%1/16WMF-LF4022

1R5029

1UF20%

CERM1206

16V2

1 C5019

6.3V

402CERM

1UF10%

2

1 C5001

1.5K

5%1/16WMF-LF402

21

R5000

2N7002SOT23-LF

2

1

3Q5012

NOSTUFF

05%1/16WMF-LF4022

1R5002

470PF50V

402CERM

10%2

1 C5002

261

1%1/16WMF-LF402

21

R5004

NOSTUFF

402MF-LF1/16W5%330

2

1R5024402MF-LF1/16W1%

30121

R5026

1%1/16WMF-LF402

221K

2

1R5028

10V

402CERM

10%

0.068UF21

C5008

NOSTUFF

402MF-LF1/16W5%

1K21

R5025

402MF-LF1/16W1%

4.99K21

R5005

SM

OMIT

21

XW5002

NOSTUFF

0.015UF

10%X7R 402

16V

21

C5009

1.5K

1%1/16WMF-LF402

21

R5027

0

5%1/16WMF-LF402

21

R5035

0

5%1/16WMF-LF402

21

R5036

I432

I433

I434

I435

I436

I437

I438

I439

I440

NOSTUFF

0

5%1/16WMF-LF402

21

R5041

NOSTUFF

0

5%1/16WMF-LF402

21

R5042

20%0.1UF

CERM402

10V2

1 C5000

20.5K1%1/16WMF-LF4022

1R5016

NOSTUFF

20.5K1%1/16WMF-LF4022

1R50150.0082UF10%

X7R402

25V2

1 C5005

20.5K1%1/16WMF-LF4022

1R5013

NOSTUFF

20.5K1%1/16WMF-LF4022

1R501410%0.0082UF

X7R402

25V2

1 C5004

402MF-LF1/16W5%

121

R5010

15450

07051-6863

CPU VCORE VREGSYNC_MASTER=M33-MS SYNC_DATE=05/19/2005

0.08 MMEI_REFCLK_AVDD 0.20 MM

KPVDD2

VCORE_SENSE_GND

VCORE_SENSE_VOUT

VC_VCC

VC_OUTSEN

VC_OUTSEN

KPGND2

VC_OS1

VC_VCC VC_OS_HUB

VC_AUX1

VC_OS2

VC_AUX2

0.25 MM0.25 MMGD1_BST_R0.60 MMGD1_PN 0.25 MM

GD1_FET_RC 0.25 MM0.25 MMGD1_BG 0.25 MM0.25 MMGD1_TG 0.25 MM0.25 MMGD1_VPN 0.25 MM 0.25 MMGD1_VREG 0.25 MM 0.25 MMGD1_BST 0.25 MM0.25 MMGD1_DRN 0.25 MM0.25 MM

VC_AGND


PPVCORE_CPU

VCORE_SENSE_GND

VC_OUTSEN_R

VC_OS_HUB_RC

VCORE_SENSE_VOUT

VC_ERROUT_RC

SYS_POWERUP_L

VRM_EN

VC_AGND

VC_DACSTEP

CPU_VID_R<3>CPU_VID_R<4>CPU_VID_R<5>

CPU_VID_R<2>

CPU_VID_R<0>CPU_VID_R<1>

VC_BGOUT

VC_OSCREF

VC_AGND

=PP12V_CPU

VC_ERROUT

VC_PGOOD

VC_OUT1VC_OUT2

0.60 MMGD2_PN 0.25 MM0.25 MMGD2_BST_R 0.25 MM

0.25 MMGD2_DRN 0.25 MM

0.25 MM 0.25 MMGD2_FET_RC0.25 MM 0.25 MMGD2_BG0.25 MM 0.25 MMGD2_TG

0.25 MM0.25 MMGD2_VPN0.25 MM0.25 MMGD2_VREG

0.25 MM 0.25 MMGD2_BST

VC_VCC

=PPVCORE_CPU

VC_OSCREF 0.25 MM 0.20 MMCPU_VID_R<0..5> 0.25 MM 0.20 MM

0.25 MM 0.20 MMVC_DACSTEP

VC_OS1 0.25 MM 0.20 MMVC_OS2 0.20 MM0.25 MM

0.25 MM0.25 MMVC_VCC0.20 MM0.25 MMVC_OS_HUB

0.20 MM0.25 MMVC_OUTSEN_R0.20 MM0.25 MMVC_OUTSEN

VC_AUX1 0.25 MM 0.25 MM

0.45 MMVC_OUT1 0.25 MMVC_AUX2 0.25 MM0.25 MM

0.45 MMVC_OUT2 0.25 MM

0.50 MM 0.20 MMVC_AGND0.20 MMVC_BGOUT 0.25 MM

0.20 MM0.25 MMVCORE_SENSE_GNDVCORE_SENSE_VOUT 0.20 MM0.25 MM

VC_ERROUT 0.20 MM0.25 MMVC_ERROUT_RC 0.20 MM0.25 MM

0.25 MM 0.20 MMVC_OS_HUB_RC

SYS_SLEWING_L

PPVCORE_CPU

GD1_PNMAKE_BASE=TRUE

PPVCORE_CPU

PP12V_CPU_R_L

PP12V_CPU_R_L

GD2_BST

VC_OUT2

GD2_VREG

GD2_BST_R

VC_AUX2

GD2_BG

GD2_PN

GD2_FET_RC

GD1_PN

GD1_FET_RC

VC_OUT1

GD1_TG

GD1_VPN

GD2_TG

VC_AUX1

GD1_BG

GD1_BST

GD1_VREG

PP12V_CPU_R_L

GD2_PN

PP12V_CPU_R_L

GD1_DRN

GD1_BST_R

GD2_VPN

GD2_DRN

=PPVCORE_CPU

56

56

55

55

85

52

52

28

50

50

55

55

12

49

28

49

48

48

50

50

50

7

50

50

50

50

50

50

50

50

55

48

50

50

50

26

50

50

55

55

55

55

48

42

6

50

50

50

50

50

6

50

50 50

50

50

50

50

50

50

50

50

50

50

50

50

6

6

50

6

50

50

50

6

6

50

31

31

31

31

31

31

50

50

6

7

50

50

50

50

50

50

50

50

50

50

50

50

50

43

50

31

50

50

50

50

50

6

50

50

50

50

50

6

50

50

50

50

50

50

24

6

50 6

50

50

50

50

50

50

50

50

50

50

50

50

50

50

50

50

50

50

50

50

50

50

50

50

50

50

50

43

Preliminary

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

805

6.3V

10UF10%

X5R

CRITICAL

2

1 C5200

805X5R6.3V10%10UF

2

1 C5201

805X5R6.3V10%10UF

2

1 C5202

805X5R6.3V10%10UF

2

1 C5203

805X5R6.3V10%10UF

2

1 C5204

805X5R6.3V10%10UF

2

1 C5205

805X5R6.3V10%10UF

2

1 C5206

805X5R6.3V10%10UF

2

1 C5207

805X5R6.3V10%10UF

2

1 C5208

805X5R6.3V10%10UF

2

1 C5209

805X5R6.3V10%10UF

2

1 C5210

805X5R6.3V10%10UF

2

1 C5211

805X5R6.3V10%10UF

2

1 C5212

805X5R6.3V10%10UF

2

1 C5213

805X5R6.3V10%10UF

2

1 C5214

805X5R6.3V10%10UF

2

1 C5215

805X5R6.3V10%10UF

2

1 C5216

805X5R6.3V10%10UF

2

1 C5217

805X5R6.3V10%10UF

2

1 C5218

805X5R6.3V10%10UF

2

1 C5219

805X5R6.3V10%10UF

2

1 C5220

805X5R6.3V10%10UF

2

1 C5221

805X5R6.3V10%10UF

2

1 C5222

805X5R6.3V10%10UF

2

1 C5223

805X5R6.3V10%10UF

2

1 C5224

805X5R6.3V10%10UF

2

1 C5225

805X5R6.3V10%10UF

2

1 C5226

805X5R6.3V10%10UF

2

1 C5227

805X5R6.3V10%10UF

2

1 C5228

805X5R6.3V10%10UF

2

1 C5229

805X5R6.3V10%10UF

2

1 C5230

805X5R6.3V10%10UF

2

1 C5231

805X5R6.3V10%10UF

2

1 C5232

805X5R6.3V10%10UF

2

1 C5233

805X5R6.3V10%10UF

2

1 C5234

805X5R6.3V10%10UF

2

1 C5235

805X5R6.3V10%10UF

2

1 C5236

805X5R6.3V10%10UF

2

1 C5237

805X5R6.3V10%10UF

2

1 C5238

805X5R6.3V10%10UF

2

1 C5239

805X5R6.3V10%10UF

2

1 C5240

805X5R6.3V10%10UF

2

1 C5241

805X5R6.3V10%10UF

2

1 C5242

805X5R6.3V10%10UF

2

1 C5243

805X5R6.3V10%10UF

2

1 C5244

805X5R6.3V10%10UF

2

1 C5245

805X5R6.3V10%10UF

2

1 C5246

805X5R6.3V10%10UF

2

1 C5247

805X5R6.3V10%10UF

2

1 C5248

805X5R6.3V10%10UF

2

1 C5249

805X5R6.3V10%10UF

2

1 C5250

805X5R6.3V10%10UF

2

1 C5251

805X5R6.3V10%10UF

2

1 C5252

805X5R6.3V10%10UF

2

1 C5253

805X5R6.3V10%10UF

2

1 C5254

805X5R6.3V10%10UF

2

1 C5255

805X5R6.3V10%10UF

2

1 C5256

805X5R6.3V10%10UF

2

1 C5257

805X5R6.3V10%10UF

2

1 C5258

805X5R6.3V10%10UF

2

1 C5259

805X5R6.3V10%10UF

2

1 C5260

805X5R6.3V10%10UF

2

1 C5261

805X5R6.3V10%10UF

2

1 C5262

805X5R6.3V10%10UF

2

1 C5263

805X5R6.3V10%10UF

2

1 C5264

805X5R6.3V10%10UF

2

1 C5265

805X5R6.3V10%10UF

2

1 C5266

805X5R6.3V10%10UF

2

1 C5267

805X5R6.3V10%10UF

2

1 C5268

805X5R6.3V10%10UF

2

1 C5269

805X5R6.3V10%10UF

2

1 C5270

805X5R6.3V10%10UF

2

1 C5271

805X5R6.3V10%10UF

2

1 C5272

805X5R6.3V10%10UF

2

1 C5273

805X5R6.3V10%10UF

2

1 C5274

805X5R6.3V10%10UF

2

1 C5275

805X5R6.3V10%10UF

2

1 C5276

805X5R6.3V10%10UF

2

1 C5277

805X5R6.3V10%10UF

2

1 C5278

805X5R6.3V10%10UF

2

1 C5279

805X5R6.3V10%10UF

2

1 C5280

805X5R6.3V10%10UF

2

1 C5281

805X5R6.3V10%10UF

2

1 C5282

805X5R6.3V10%10UF

2

1 C5283

805X5R6.3V10%10UF

2

1 C5284

805X5R6.3V10%10UF

2

1 C5285

805X5R6.3V10%10UF

2

1 C5286

805X5R6.3V10%10UF

2

1 C5287

805X5R6.3V10%10UF

2

1 C5288

805X5R6.3V10%10UF

2

1 C5289

805X5R6.3V10%10UF

2

1 C5290

805X5R6.3V10%10UF

2

1 C5291

805X5R6.3V10%10UF

2

1 C5292

805X5R6.3V10%10UF

2

1 C5293

805X5R6.3V10%10UF

2

1 C5294

805X5R6.3V10%10UF

2

1 C5295

805X5R6.3V10%10UF

2

1 C5296

805X5R6.3V10%10UF

2

1 C5297

805X5R6.3V10%10UF

2

1 C5298

805X5R6.3V10%10UF

2

1 C5299

15452

07051-6863

SYNC_DATE=05/19/2005SYNC_MASTER=FINO-MS

CPU VCORE MORE BYPASS

=PPVCORE_CPU56 55 50 49 48 43

Preliminary

GND

VOUTVIN

NOISECONT

G

D

S



TABLE_5_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

SEE TABLE

PROCESSOR AVDD VREG

805

6.3VCERM

20%10UF

2

1 C547210%6.3VCERM

1UF

4022

1 C5470

HOLE-VIA1

ZH5436

HOLE-VIA1

ZH5437

HOLE-VIA1

ZH5438

HOLE-VIA1

ZH5439

HOLE-VIA1

ZH5440

HOLE-VIA1

ZH5441

HOLE-VIA1

ZH5442

HOLE-VIA1

ZH5443

HOLE-VIA1

ZH5444

HOLE-VIA1

ZH5418

HOLE-VIA1

ZH5419

HOLE-VIA1

ZH5420

HOLE-VIA1

ZH5400

HOLE-VIA1

ZH5401

HOLE-VIA1

ZH5402

HOLE-VIA1

ZH5421

HOLE-VIA1

ZH5422

HOLE-VIA1

ZH5423

HOLE-VIA1

ZH5424

HOLE-VIA1

ZH5425

HOLE-VIA1

ZH5426

HOLE-VIA1

ZH5403

HOLE-VIA1

ZH5404

HOLE-VIA1

ZH5405

HOLE-VIA1

ZH5406

HOLE-VIA1

ZH5407

HOLE-VIA1

ZH5408

HOLE-VIA1

ZH5445

402

0.01UF20%16V

CERM 2

1C5471

HOLE-VIA1

ZH5446

HOLE-VIA1

ZH5447

HOLE-VIA1

ZH5448

HOLE-VIA1

ZH5449

HOLE-VIA1

ZH5450

HOLE-VIA1

ZH5451

HOLE-VIA1

ZH5452

HOLE-VIA1

ZH5453

HOLE-VIA1

ZH5427

OMIT

SOT-25AMM1572FN

51

4

2

3

U5470

HOLE-VIA1

ZH5428

HOLE-VIA1

ZH5429

HOLE-VIA1

ZH5430

HOLE-VIA1

ZH5431

HOLE-VIA1

ZH5409

HOLE-VIA1

ZH5410

HOLE-VIA1

ZH5411

HOLE-VIA1

ZH5412

HOLE-VIA1

ZH5413

HOLE-VIA1

ZH5432

HOLE-VIA1

ZH5433

HOLE-VIA1

ZH5434

HOLE-VIA1

ZH5435

HOLE-VIA1

ZH5414

HOLE-VIA1

ZH5415

HOLE-VIA1

ZH5416

HOLE-VIA1

ZH5417

HOLE-VIA1

ZH5454

402MF-LF1/16W

10K5%

2

1R5470

HOLE-VIA1

ZH5455

HOLE-VIA1

ZH5456

HOLE-VIA1

ZH5457

HOLE-VIA1

ZH5458

HOLE-VIA1

ZH5459

HOLE-VIA1

ZH5460

HOLE-VIA1

ZH5461

HOLE-VIA1

ZH5462

HOLE-VIA1

ZH5463

HOLE-VIA1

ZH5464

HOLE-VIA1

ZH5465

HOLE-VIA1

ZH5466

HOLE-VIA1

ZH5467

HOLE-VIA1

ZH5468

HOLE-VIA1

ZH5469

HOLE-VIA1

ZH5470

HOLE-VIA1

ZH5471

SOT23-LF2N7002

2

1

3

Q5470

U5470IIC,MM1572FN,2.5V,150MA,REG,5P SOT-25A AVDD_2V5353S0671 1

U54701353S0807 IIC,MM1572,2.8V,150MA,REG,5P SOT-25A AVDD_2V8

15454

07051-6863

CPU AVDD VREGSYNC_DATE=05/19/2005SYNC_MASTER=FINO-MS


PPV_RUN_AVDD_CPU

MAKE_BASE=TRUE


VOLTAGE=2.8V

=PP3V3_RUN_CPU

SYS_SLEEP

AVDDVC_NOISE

AVDDVB_CONT

30 26 16 15 13

55

12

48 7

11

55

55

Preliminary

ADJ

NC1

NC2

NC3

NC5

NC4

VREF

GND

GND

OUT

VIN+ VIN-

V+

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

SCALE (12V)

PCB:PLACE D5570,R5572,C5570 BY SMU

WORKS WELL.

SO SMU ADC SAMPLING

3.3 MS TIME CONSTANT

WORKS WELL.

3.3 MS TIME CONSTANTSO SMU ADC SAMPLING

WORKS WELL.

3.3 MS TIME CONSTANTSO SMU ADC SAMPLING

TO ASSIST DIODECALTDIODE CIRCUIT ALWAYS POWERED

OPTION 2

OPTION 1

OPTION 33) 12V RAIL2) PROC KELVIN POINT1) VCORE PLANECHOICE OF SMU SENSING

PROCESSOR. PLACE C5502 NEAR OPAMPPCB: PLACE R5510, C5501 NEAR

MIN_NECK_WIDTHMIN_LINE_WIDTH

PHYSICAL CONSTRAINTS

TO U4300

(USING 12V INPUT CURRENT TO DERIVE CPU CURRENT)

PROCESSOR TEMP SENSE (TDIODE EXCITATION CIRCUIT AND OPAMP)

FROM CPU

6 V/V .01464 V/COUNT

ADC IS 10BIT 0 TO 1023

PROCESSOR VCORE VOLTAGE SENSE

0 TO 2.5V

COUNT

TO SMU

FMAX CONNECTORPLACE CLOSE

2.5V PRECISION VOLTAGE REFERENCE SOURCE

TO SMU

PCB:KEEP SHORTS NEXT TO U55700

PROCESSOR VCORE CURRENT SENSE

ADC IS 10BIT 0 TO 10230 TO 2.5V

.00675 A/COUNTCOUNT

2.73224 A/VSCALE

PCB: PLACE R5560,C5561 NEAR U5500 PIN 4

TO SMU

100UA CURRENT SOURCE

TDIODE_PAIR FROM PROCESSORMAKE A GROUND LOOP AROUND

PCB: PLACE R5530 AND C5530NEXT TO SMU.

PCB: PLACE C5540 NEXT TO SMU

2.2UF20%10VCERM805

2

1 C5551

63.4

603MF-LF1/10W1%

2

1R5551

NOSTUFF

F-ST-SMBM12B-SRSS-TB

9

8

7

6

5

4

3

2

12

11

10

1

13

14

J5500

SOD-123

NOSTUFF

B0530WXF2

1DS5550

1/10WMF-LF

5%0

6032

1R5550

SO-8NCV1009D

6

8

7

3

2

1

4

5U5550

402

0.01uF

10%16VCERM

21

C5505

100K

603

1/16W0.1%

MF-LF

21

R5506

CRITICAL

LVM2014MTXTSSOP-LF

11

4

8

9

10 U5500

CERM402

16V10%

0.01uF21

C5500

MF-LF603

1/16W

10.0K0.1%

2

1R5504

1/16W

603

20.0K0.1%

MF-LF2

1R5512

LVM2014MTXTSSOP-LF

11

4

7

6

5 U55001/10WMF-LF

12.7K

603

1%

21

R5502

1/10W

2

5%

MF-LF603

21

R5560

CRITICAL

LVM2014MTXTSSOP-LF

11

4

1

2

3 U5500

1/16W0.1%

603MF-LF

10.0K21

R5500

603MF-LF1/16W0.1%

20.0K21

R5511

MF-LF603

10.0K

0.1%1/16W

21

R5501

MF-LF603

1/16W

100K0.1%

2

1R5526

603

1/16WMF-LF

0.1%40.2K

2

1R5509

1/16W0.1%

40.2K

MF-LF603

21

R55070.1%

MF-LF

10.0K

1/16W

603

21

R5505

0.1%

MF-LF1/16W

10.0K

603

21

R5503

CERM50V

402

10%0.0022UF

2

1 C5501

0

402MF-LF

5%1/16W

2

1R5510

CERM402

50V10%0.0022UF

2

1 C5502I321

I323

I325

TSSOP-LFLVM2014MTX

11

4

14

13

12 U5500

MF-LF1/16W

3.3K

5%

402

21

R5530

10%

CERM

1UF6.3V

4022

1 C5530

10.0K

0.1%

603MF-LF1/16W

DEVELOPMENT

21

R5545

DEVELOPMENT

15PF

5%50VCERM402

21

C5541

1/16WMF-LF603

0.1%

10.0K

DEVELOPMENT

21

R5546

1/16WMF-LF603

0.1%

10.0K21

R5544

10.0K

0.1%

603MF-LF1/16W

21

R5547

15PF

5%50VCERM402

DEVELOPMENT

21

C5542

10K1/16WMF-LF402

1%

2

1R5540

2.0K1/16WMF-LF402

1%

2

1R5542

NOSTUFF

100K

5%1/16WMF-LF402

21

R5541

NOSTUFF

BAS16SOT23

3

1

D5570

402CERM

1UF10%6.3V

2

1 C5570402MF-LF1/16W5%

3.3K21

R5572

OMIT

SM

21

XW5570

OMIT

SM

21

XW5571

SM

OMIT

21

XW5572

TH-VERT-LF

CRITICAL

1UH-20A-4.5MOHM21

L5570

73.2K1/16WMF-LF402

1%

2

1R5571

INA138SOT23-5

43

5 1

2

U5570

NOSTUFF

3.3K

MF-LF1/16W

402

5%

2

1R5543

I355

I356

I357

I359

I360

I361

I362

SM

OMIT

21

XW55602.2UF20%10VCERM805

2

1 C5561

I370

402

1/16W

0

5%

MF-LF

NOSTUFF21

R5522

402MF-LF1/16W5%

0 NOSTUFF21

R5523

5%1/16WMF-LF402

0 NOSTUFF21

R5524

402MF-LF1/16W5%

0 NOSTUFF21

R5525

I375

I376

NOSTUFF

402MF-LF1/16W5%

5121

R5520

NOSTUFF

MF-LF402

1/16W5%

5121

R5521

402

10%1UF6.3VCERM2

1 C5540

I380

I381

I382

I385

1W

0.025

1%

MF2512-1

21

R5570

T,V,I SENSORS

15455

051-6863 07


INA138_OUT

0.25 MMINA138_OUT 0.25 MM

0.20 MM0.25 MMAVDDVC_NOISE

0.20 MM0.25 MMCPU_TEMP0.20 MMCPU_TEMP_R 0.25 MM

GND_SMU_AVSS

CPU_SENSE_V

NET_PHYSICAL_TYPE=PROC_DIFFNET_SPACING_TYPE=PROC_DIFFMIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.25MMDIFFERENTIAL_PAIR=KP2_FMAX

KPVDD2_FMAX

NET_PHYSICAL_TYPE=PROC_DIFFNET_SPACING_TYPE=PROC_DIFFMIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.25MMDIFFERENTIAL_PAIR=CORE_ISNS

CORE_ISNS_M

NET_PHYSICAL_TYPE=PROC_DIFFNET_SPACING_TYPE=PROC_DIFFMIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.25MMDIFFERENTIAL_PAIR=CORE_ISNS

CORE_ISNS_P

NET_PHYSICAL_TYPE=PROC_DIFFNET_SPACING_TYPE=PROC_DIFFMIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.25MMDIFFERENTIAL_PAIR=TDIODE

TDIODE_NEG_FMAX

NET_PHYSICAL_TYPE=PROC_DIFFNET_SPACING_TYPE=PROC_DIFFMIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.25MMDIFFERENTIAL_PAIR=TDIODE

TDIODE_POS_FMAX

NET_PHYSICAL_TYPE=PROC_DIFFNET_SPACING_TYPE=PROC_DIFFMIN_NECK_WIDTH=0.20MMMIN_LINE_WIDTH=0.25MMDIFFERENTIAL_PAIR=KP2_FMAX

KPGND2_FMAX

0.60 MMPP12V_CPU_R 0.25 MM0.25 MM0.25 MMTD0_CURRENT

0.60 MMPP3V3_OPAMP 0.25 MM0.25 MM 0.25 MMCPU_SENSE_KP_V

CPU_DIODE_NEG

CPU_DIODE_POS

KPGND2

KPVDD2

=PPVREF_SMU

CPU_DIODE_POS

TD0_<3>

TD0_<2>

TD0_<1>

TD0_CURRENT

TD0_BUFFERED

DAGND

PP3V3_CPU_DIODE

CORE_ISNS_M

CPU_SENSE_I_R

CORE_ISNS_P

=PP12V_CPU

CPU_SENSE_I

=PP3V3_RUN_CPU

NC_NCV1009_4

NC_NCV1009_5

NC_NCV1009_3

NC_NCV1009_2

NC_NCV1009_1

NC_NCV1009_ADJ

=PP3V3_ALL_CPU =PP3V3_PWRON_CPU

=PP12V_CPU

KP_V<1>

DAGND

CPU_SENSE_KP_V

KP_V<2>

KPGND2

KPVDD2

=PPVCORE_CPU

TD0_<4>

DAGND

PP2V5_VREF

PP2V5_VREF

DAGND

DAGND

PP3V3_OPAMP

TD0_<1..4> 0.25 MM0.25 MM

TD0_BUFFERED 0.25 MM 0.25 MMKP_V<1..2> 0.25 MM0.25 MM

CPU_SENSE_I_R 0.25 MM0.25 MMCPU_SENSE_I 0.25 MM0.25 MMCPU_SENSE_V 0.25 MM0.25 MM

CPU_DIODE_NEG

CPU_TEMP_R

GND_SMU_AVSS

CPU_TEMP

DAGND

CPU_TEMP_R

NET_PHYSICAL_TYPE=PROC_DIFFNET_SPACING_TYPE=PROC_DIFFDIFFERENTIAL_PAIR=P_FMAXT

MIN_LINE_WIDTH=0.20 MMMIN_NECK_WIDTH=0.20 MM

FMAXT_M

MIN_NECK_WIDTH=0.20 MM

NET_PHYSICAL_TYPE=PROC_DIFFNET_SPACING_TYPE=PROC_DIFFDIFFERENTIAL_PAIR=P_FMAXT

MIN_LINE_WIDTH=0.20 MM

FMAXT_P

MAKE_BASE=TRUEVOLTAGE=2.5VMIN_NECK_WIDTH=0.20MM


PP2V5_VREF

AVDDVB_CONT 0.25 MM 0.20 MM

DAGND

VOLTAGE=3.3V

PP3V3_OPAMP

VOLTAGE=0V

DAGND

0.25 MM0.60 MMPP12V_CPU_RDAGND 0.60 MM 0.25 MM

VOLTAGE=3.3VMIN_NECK_WIDTH=0.25MM

PP3V3_CPU_DIODEMIN_LINE_WIDTH=0.60MM

PP12V_CPU_RVOLTAGE=12V

PP12V_CPU_R_L


VOLTAGE=12V

GND_SMU_AVSS

56 52

55

55

55

55

50

55

55

55

50

50

55

55

55

50

50

49

55

55

55

55

55

55

28

55

55

55

55

48

48

48

48

48

55

55

55

50

55

54

50

55

55

55

48

48

48

55

55 55

55

55

55

48

28

55

55

55

55

55

28

6

6

54

28

55

6

28

6

6

6

6

6

6

55

55

55

9

6

6

6

6

28

6

55

55

55

55

55

6

55

6

55

6

7

28

7

6

6

6

6

6

6

7 7

7

9

6

55

9

6

6

43

55

6

55

55

6 6

55

55

55

9

55

28

28

6

55

6

28

6

55

6

6

55

54

6

55

6

55

6

55

55

50

6

Preliminary

LM339A

V+

GND

YA

GND

VCC

125

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PULL-UP PROVIDED

TURN-ON VCORE > 0.80 VTURN-OFF VCORE < 0.77 V

VCC CAN BE 0.8V TO 2.7V3.3V INPUT TOLERANT

DAMPEN OUTPUT

IS STARTING UP.HAVE A PULL-UP WHEN SHASTAALL SHASTA GPIOS MUST

OVDD-LEVEL OUTPUT FROM CPU SRESET PIN.WHEN PROC VCORE NOT POWERED BUT OVDD IS, TO PROTECTSIGNAL TO CPU FOR FAST RISE/FALL TRANSITIONS. BUFFER HIGH-Z’S OUTPUTBUFFER LEVEL-SHIFTS SHASTA’S 3.3V PUSH-PULL

SRESET LEVEL-TRANSLATOR AND TWO-WAY GLITCH PROTECT

PULLUPS FOR SRESET’S FROM SHASTA

R5640 IS OPTIONALREMEMBER TO UPDATE NO_TEST PROPERTIES ON PG 6

CONNECT PULSAR CLKS TO CPU/NB

CONNECT KODIAK EI A TO/FROM CPU

TO CPU

TO/FROM CPU

WIRE OUT KODIAK AND CPU SIGNALS FOR TP’S

CONNECT CPU TO SHASTA SRESET A0, NC OTHERWISE

CONNECT CPU TO KODIAK/SHASTA INT A0, NC OTHERWISE

CONNECT CPU TO KODIAK QACK A0, NC OTHERWISE

CONNECT CPU TO KODIAK QREQ A0

CPU CHKSTOP OR MCP TO NB

TO/FROM NB


EI BUS AND SYSCLK CONSTRAINT LABELSNET_SPACING_TYPE NET_PHYSICAL_TYPE DIFFERENTIAL_PAIR

NC KODIAK EI B INPUT PORTNC KODIAK EI B OUTPUT PORT

INT PULLUP IS SO INT PIN IS NOT FLOATING

KODIAK TO DRIVE PUSH-PULL STRONGLYTO PROCESSOR BUT WEAK TO ALLOW

ITS OUTPUTS ARE TEMPORARILY INPUTS

NOTE, NB UNUSED INTS DO NOT REQUIREPULLUPS, ONLY SHASTA (SINCE

ON BOOTUP).

IF SHASTA SHOULD DRIVE ODWITH EI LEVEL PULLUP, STUFFR5612, NOSTUFF R5608, STUFF R5646

NB_STOP_IS_CHKSTOP

1/16W

402MF-LF

0

5%

21

R5601

402

1/16W

NB_STOP_IS_MCP

MF-LF

5%

021

R5603

5%1/16W

402MF-LF

4.7K21

R5600

402

1/16WMF-LF

5%

4.7K21

R5602

I195

I196

10K

5%

MF-LF402

1/16W

2 1

R5604

10K2 1

R5609

10K2 1

R5610

MF-LF1/16W5%

10K

402

2 1

R5611

SOI-LF

3

13

11

10

12

U400

SRCOM_VCORE_R

402

5%1/16WMF-LF

1002 1

R56401/16WMF-LF

402

1%22.1K

2

1R5641

PP2V5_ALL

10K1%

1/16WMF-LF

4022

1R5642

4.7K5%

1/16WMF-LF

402 2

1R56430.1UF

CERM10V20%

4022

1C5640402

5%1/16WMF-LF

1002 1

R5644

402

5%1/16WMF-LF

470K2 1

R5645

10K2 1

R5608

CRITICAL

SN74AUC2G125VSSOP

3

8

74

5

U5640

1K

5%

MF-LF402

1/16W

NOSTUFF

2 1

R5612

402

5%1/16WMF-LF

0

NOSTUFF

2 1

R5646

I27

I28

I29

I30

I31

I32

I33

I34

I35

I36

I37

I38

I39

I40

I41

I42

SYNC_MASTER=FINO-MS

15456

051-6863 07


CPU ALIASES & MISC

CPU_SRESET_L=PPV_EI_CPU

SRCOM_SRESET

CPU_A0_INT_R_L

=PPV_EI_NB

=PPV_EI_CPU

EICNCAD EI_CPU_TO_NB_AD EI_CPU_TO_NB_ADEI_CPU_TO_NB_AD<0..21>

EICNCSR EI_CPU_TO_NB_ADEI_CPU_TO_NB_ADEI_CPU_TO_NB_SR_N<0..1>EICNCSR EI_CPU_TO_NB_ADEI_CPU_TO_NB_ADEI_CPU_TO_NB_SR_P<0..1>

EICNCAD EI_CPU_TO_NB_AD EI_CPU_TO_NB_ADEI_CPU_TO_NB_AD<23..43>

EICNCAD_PP EI_CPU_TO_NB_AD EI_CPU_TO_NB_ADEI_CPU_TO_NB_AD<22>

MAKE_BASE=TRUE

NC_EI_NB_TO_CPU_B_SR_N<0..1> EI_NB_TO_CPU_B_SR_N<0..1>

MAKE_BASE=TRUE

NC_EI_NB_TO_CPU_B_AD<0..43> EI_NB_TO_CPU_B_AD<0..43>

MAKE_BASE=TRUE

NC_EI_NB_TO_CPU_B_SR_P<0..1> EI_NB_TO_CPU_B_SR_P<0..1>

MAKE_BASE=TRUE

NC_EI_NB_TO_CPU_B_CLK_N EI_NB_TO_CPU_B_CLK_NMAKE_BASE=TRUE

NC_EI_NB_TO_CPU_B_CLK_P EI_NB_TO_CPU_B_CLK_P

MAKE_BASE=TRUE

NC_EI_CPU_B_TO_NB_SR_N<0..1> EI_CPU_B_TO_NB_SR_N<0..1>

MAKE_BASE=TRUE

NC_EI_CPU_B_TO_NB_CLK_N EI_CPU_B_TO_NB_CLK_N

MAKE_BASE=TRUE

NC_EI_CPU_B_TO_NB_SR_P<0..1> EI_CPU_B_TO_NB_SR_P<0..1>MAKE_BASE=TRUE

NC_EI_CPU_B_TO_NB_AD<0..43> EI_CPU_B_TO_NB_AD<0..43>MAKE_BASE=TRUE

NC_EI_CPU_B_TO_NB_CLK_P EI_CPU_B_TO_NB_CLK_P

EI_NB_TO_CPU_ADEI_NB_TO_CPU_ADEIPCAPSYNCEI_CPU_APSYNC

EI_NB_TO_CPU_ADEI_NB_APSYNC EIPNAPSYNC EI_NB_TO_CPU_AD

NB_APSYNCMAKE_BASE=TRUE

EI_NB_APSYNC

CPU_A_TBEN_CLK_USMAKE_BASE=TRUE

EI_CPU_TBEN_CLK

NB_CHKSTOP_L

CPU_CHKSTOP_L

=PPV_EI_CPU

CPU_MCP_L

EI_NB_TO_CPU_A_CLK_PEI_NB_TO_CPU_CLK_PMAKE_BASE=TRUE EI_NB_TO_CPU_A_CLK_NEI_NB_TO_CPU_CLK_NMAKE_BASE=TRUE

EI_NB_TO_CPU_A_SR_P<0..1>EI_NB_TO_CPU_SR_P<0..1>MAKE_BASE=TRUE

EI_NB_TO_CPU_A_AD<0..43>EI_NB_TO_CPU_AD<0..43>MAKE_BASE=TRUE

EI_NB_TO_CPU_A_SR_N<0..1>EI_NB_TO_CPU_SR_N<0..1>MAKE_BASE=TRUE

EI_CPU_A_TO_NB_CLK_PEI_CPU_TO_NB_CLK_PMAKE_BASE=TRUE EI_CPU_A_TO_NB_CLK_NEI_CPU_TO_NB_CLK_NMAKE_BASE=TRUE EI_CPU_A_TO_NB_AD<0..43>EI_CPU_TO_NB_AD<0..43>MAKE_BASE=TRUE EI_CPU_A_TO_NB_SR_P<0..1>EI_CPU_TO_NB_SR_P<0..1>MAKE_BASE=TRUE EI_CPU_A_TO_NB_SR_N<0..1>EI_CPU_TO_NB_SR_N<0..1>MAKE_BASE=TRUE

CPU_A0_TO_NB_QREQ_LMAKE_BASE=TRUE

CPU_TO_NB_QREQ_L

CPU_A1_QACK_LNC_CPU_A1_QACK_LMAKE_BASE=TRUE

CPU_A0_QACK_LCPU_QACK_LMAKE_BASE=TRUE

CPU_B1_QACK_LNC_CPU_B1_QACK_LMAKE_BASE=TRUE

CPU_B0_QACK_LNC_CPU_B0_QACK_LMAKE_BASE=TRUE

NB_CPU_A1_INT_LNC_NB_CPU_A1_INT_LMAKE_BASE=TRUE

CPU_A0_INT_R_LCPU_INT_LMAKE_BASE=TRUE

NB_CPU_B0_INT_LNC_NB_CPU_B0_INT_LMAKE_BASE=TRUE NB_CPU_B1_INT_LNC_NB_CPU_B1_INT_LMAKE_BASE=TRUE

SB_CPU_A0_SRESET_LCPU_SRESET_L_RMAKE_BASE=TRUE

SB_CPU_B1_SRESET_LNOTUSED_CPU_B1_SRESET_LMAKE_BASE=TRUE

SB_CPU_B0_SRESET_LNOTUSED_CPU_B0_SRESET_LMAKE_BASE=TRUE

SB_CPU_A1_SRESET_LNOTUSED_CPU_A1_SRESET_LMAKE_BASE=TRUE

NB_B_TRIGGER_OUTTP_NB_B_TRIGGER_OUTMAKE_BASE=TRUE NB_A_TRIGGER_OUTTP_NB_A_TRIGGER_OUTMAKE_BASE=TRUE CPU_APSYNCOUTTP_CPU_APSYNCOUTMAKE_BASE=TRUE CPU_TRIGGER_INTP_CPU_TRIGGER_INMAKE_BASE=TRUE CPU_TRIGGER_OUTTP_CPU_TRIGGER_OUTMAKE_BASE=TRUE

CPU_PSRO_ENABLEMAKE_BASE=TRUE

NC_PSRO_ENABLECPU_PSRO

MAKE_BASE=TRUE

NC_PSRO

CPU_ATTENTIONTP_CPU_ATTENTIONMAKE_BASE=TRUE

EI_CPU_A_SYSCLK_PMAKE_BASE=TRUE

EI_CPU_SYSCLK_P

EI_CPU_A_SYSCLK_NMAKE_BASE=TRUE

EI_CPU_SYSCLK_N

MAKE_BASE=TRUEEI_CPU_APSYNC CPU_A_APSYNC

MAKE_BASE=TRUE

NC_CPU_AFN CPU_AFN

EI_CPU_TO_NB_CLKEI_CPU_TO_NB_CLKEI_CPU_TO_NB_CLKEICNCLKEI_CPU_TO_NB_CLK_N

EI_NB_TO_CPU_CLKEI_NB_TO_CPU_CLKEI_NB_TO_CPU_CLKEINCCLKEI_NB_TO_CPU_CLK_N

EI_CPU_TO_NB_CLKEI_CPU_TO_NB_CLKEI_CPU_TO_NB_CLKEICNCLKEI_CPU_TO_NB_CLK_P

EI_NB_TO_CPU_CLKEI_NB_TO_CPU_CLKEI_NB_TO_CPU_CLKEINCCLKEI_NB_TO_CPU_CLK_P

EI_NB_TO_CPU_ADEI_NB_TO_CPU_ADEI_NB_TO_CPU_SR_P<0..1> EINCCAD

EI_NB_TO_CPU_ADEI_NB_TO_CPU_ADEI_NB_TO_CPU_SR_N<0..1> EINCCAD

EI_NB_TO_CPU_ADEI_NB_TO_CPU_ADEINCCADEI_NB_TO_CPU_AD<0..43>

EIPCSYSCLK EI_NB_TO_CPU_CLKEI_NB_TO_CPU_CLK EI_CPU_SYSCLKEI_CPU_SYSCLK_PEI_NB_TO_CPU_CLKEI_NB_TO_CPU_CLK EI_CPU_SYSCLKEIPCSYSCLKEI_CPU_SYSCLK_N

EIPNSYSCLK_N EI_NB_TO_CPU_CLKEI_NB_TO_CPU_CLK EI_NB_SYSCLKEI_NB_SYSCLK_NEIPNSYSCLK_P EI_NB_TO_CPU_CLKEI_NB_TO_CPU_CLK EI_NB_SYSCLKEI_NB_SYSCLK_P

=PPVCORE_CPU

SB_CPU_B0_SRESET_L

=PP3V3_PWRON_SB

SB_CPU_A1_SRESET_L

SB_CPU_A0_SRESET_L

SB_CPU_B1_SRESET_L

MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.20 MM

SRCOM_SRESET_EN_L

SRCOM_0V8_REF

MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.20 MM

SRCOM_SRESETSB_CPU_A0_SRESET_L56

56

56

55

48

48

48

52

119

47

47

47

50

24

30

42

30

30

49

23

29

56

41

29

56

56

56

56

56

56

42

43

29

56

56

56

56

56

56

56

56

56

56

56

56

56

56

56

47

56

56

56

56

56

56

56

56

56

56

56

56

42

42

48

56

20

56

56

56

56 43

7

56

24

7

7

43

43

43

43

43

6 44

6 44

6 44

6 44

6 44

6 44

6 44

6 44

6 44

6 44

43

56

26 56

26 43

42

8

7

43

42 43

42 43

42 43

42 43

42 43

42 43

42 43

42 43

42 43

42 43

42 43

42 6

42 43

44 6

44 6

42 6

24 43

44 6

44 6

24

24

24

24

44

42

43

43

43

43 9

43 9

43

26 43

26 43

43 26

9 43

43

43

43

43

43

43

43

43

43

26

26

43

24

7

24

24

24

56 24

Preliminary

VD3_44

GND_167

GND_166

GND_165

GND_158

GND_159

GND_160

GND_162

GND_163

GND_173

GND_172

GND_171

GND_169

GND_170

GND_168

GND_164

GND_161

GND_157

GND_156

GND_155

GND_154

GND_153

GND_152

GND_151

GND_150

GND_149

GND_148

GND_146

GND_147

GND_145

GND_144

GND_143

GND_141

GND_142

GND_140

GND_139

GND_138

GND_137

GND_136

GND_135

GND_134

GND_132

GND_133

GND_131

GND_130

GND_129

GND_128

GND_127

GND_126

GND_125

GND_123

GND_124

GND_122

GND_121

GND_120

GND_118

GND_119

GND_117

GND_116

GND_115

GND_114

GND_113

GND_112

GND_111

GND_110

GND_109

GND_108

GND_107

GND_106

GND_105

GND_104

GND_103

GND_102

GND_101

GND_100

GND_99

GND_98

GND_97

GND_95

GND_96

GND_94

GND_93

GND_92

GND_91

GND_90

GND_89

GND_86

GND_88

GND_87

GND_85

VD3_1

VD3_83

VD3_81

VD3_36

VD3_38

VD3_28

VD3_29

VD3_35

VD3_72

VD3_73

VD3_3

VD3_87

VD3_86

VD3_85

VD3_84

VD3_82

VD3_80

VD3_79

VD3_78

VD3_77

VD3_76

VD3_75

VD3_74

VD3_71

VD3_70

VD3_69

VD3_68

VD3_67

VD3_66

VD3_65

VD3_64

VD3_63

VD3_62

VD3_61

VD3_60

VD3_59

VD3_58

VD3_57

VD3_56

VD3_55

VD3_54

VD3_53

VD3_52

VD3_51

VD3_50

VD3_49

VD3_48

VD3_47

VD3_46

VD3_45

VD3_43

VD3_42

VD3_41

VD3_40

VD3_39

VD3_37

VD3_34

VD3_33

VD3_32

VD3_31

VD3_30

VD3_27

VD3_26

VD3_25

VD3_24

VD3_23

VD3_22

VD3_21

VD3_20

VD3_19

VD3_18

VD3_17

VD3_16

VD3_15

VD3_14

VD3_13

VD3_12

VD3_11

VD3_10

VD3_9

VD3_8

VD3_7

VD3_6

VD3_5

VD3_4

VD3_2

VD3_0

(8 OF 10)

PWR/GND

PART 1

DRAWING

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

Q63: SEE P.20 FOR MORE DECOUPLING CAPS FOR THESE PINS.

10%

402CERM

1UF

6.3V2

1 C5800

10%

402CERM

1UF

6.3V2

1 C5801

10%

402CERM

1UF

6.3V2

1 C5802

10%

402CERM

1UF

6.3V2

1 C5803

10%

402CERM

1UF

6.3V2

1 C5804

10%

402CERM

1UF

6.3V2

1 C5805

10%

402CERM

1UF

6.3V2

1 C5806

10%

402CERM

1UF

6.3V2

1 C5807

10%

402CERM

1UF

6.3V2

1 C5808

10%

402CERM

1UF

6.3V2

1 C5809

10%

402CERM

1UF

6.3V2

1 C5810

10%

402CERM

1UF

6.3V2

1 C5811

10%

402CERM

1UF

6.3V2

1 C5812

10%

402CERM

1UF

6.3V2

1 C5813

10%

402CERM

1UF

6.3V2

1 C5814

10%

402CERM

1UF

6.3V2

1 C5815

10%

402CERM

1UF

6.3V2

1 C5816

10%

402CERM

1UF

6.3V2

1 C5817

10%

402CERM

1UF

6.3V2

1 C5818

10%

402CERM

1UF

6.3V2

1 C5819

10%

402CERM

1UF

6.3V2

1 C5820

10%

402CERM

1UF

6.3V2

1 C5821

10%

402CERM

1UF

6.3V2

1 C5822

10%

402CERM

1UF

6.3V2

1 C5823

10%

402CERM

1UF

6.3V2

1 C5824

10%

402CERM

1UF

6.3V2

1 C5825

10%

402CERM

1UF

6.3V2

1 C5826

10%

402CERM

1UF

6.3V2

1 C5827

10%

402CERM

1UF

6.3V2

1 C5828

10%

402CERM

1UF

6.3V2

1 C5829

10%

402CERM

1UF

6.3V2

1 C5830

10%

402CERM

1UF

6.3V2

1 C5831

10%

402CERM

1UF

6.3V2

1 C5832

10%

402CERM

1UF

6.3V2

1 C5833

10%

402CERM

1UF

6.3V2

1 C5834

10%

402CERM

1UF

6.3V2

1 C5835

10%

402CERM

1UF

6.3V2

1 C5836

10%

402CERM

1UF

6.3V2

1 C5837

10%

402CERM

1UF

6.3V2

1 C5838

10%

402CERM

1UF

6.3V2

1 C5839

10%

402CERM

1UF

6.3V2

1 C5840

10%

402CERM

1UF

6.3V2

1 C5841

10%

402CERM

1UF

6.3V2

1 C5842

10%

402CERM

1UF

6.3V2

1 C5843

10%

402CERM

1UF

6.3V2

1 C5844

10%

402CERM

1UF

6.3V2

1 C5845

10%

402CERM

1UF

6.3V2

1 C5846

10%

402CERM

1UF

6.3V2

1 C5847

10%

402CERM

1UF

6.3V2

1 C5848

10%

402CERM

1UF

6.3V2

1 C5849

10%

402CERM

1UF

6.3V2

1 C5850

10%

402CERM

1UF

6.3V2

1 C5851

10%

402CERM

1UF

6.3V2

1 C5852

10%

402CERM

1UF

6.3V2

1 C5853

10%

402CERM

1UF

6.3V2

1 C5854

10%

402CERM

1UF

6.3V2

1 C5855

10%

402CERM

1UF

6.3V2

1 C5856

10%

402CERM

1UF

6.3V2

1 C5857

10%

402CERM

1UF

6.3V2

1 C5858

402

10%

CERM

1UF

6.3V2

1 C5859

10%

402CERM

1UF

6.3V2

1 C5860

10%

402CERM

1UF

6.3V2

1 C5861

10%

402CERM

1UF

6.3V2

1 C5862

10%

402CERM

1UF

6.3V2

1 C5863

1UF10%

402CERM6.3V

2

1 C5864

10%

402CERM

1UF

6.3V2

1 C5865

10%

402CERM

1UF

6.3V2

1 C5866

10%

402CERM

1UF

6.3V2

1 C5867

10%

402CERM

1UF

6.3V2

1 C5868

10%

402CERM

1UF

6.3V2

1 C5869

10%

402CERM

1UF

6.3V2

1 C5870

1UF10%

402CERM6.3V

2

1 C5871

10%

402CERM

1UF

6.3V2

1 C5872

10%

402CERM

1UF

6.3V2

1 C5873

10%

402CERM

1UF

6.3V2

1 C5874

10%

402CERM

1UF

6.3V2

1 C5875

10%

402CERM

1UF

6.3V2

1 C5876

10%

402CERM

1UF

6.3V2

1 C5877

10%

402CERM

1UF

6.3V2

1 C5878

10%

402CERM

1UF

6.3V2

1 C5879

10%

402CERM

1UF

6.3V2

1 C5880

10%

402CERM

1UF

6.3V2

1 C5881

402

10%

CERM

1UF

6.3V2

1 C5882

10%

402CERM

1UF

6.3V2

1 C5883

10%

402CERM

1UF

6.3V2

1 C5884

10%

402CERM

1UF

6.3V2

1 C5885

402

10%

CERM

1UF

6.3V2

1 C5886

10%

402CERM

1UF

6.3V2

1 C5887

BGA

KODIAK-ASIC-040812

AC32

Y24

W35

W32

W29

W26

V25

U36

U33

AC29

U30

U27

U23

T24

R35

R32

R29

R26

P25

N36

AC26

N33

N30

N27

N23

M24

L35

L32

L29

L26

J36

AB25

J33

J30

J28

G35

G32

G28

E36

E33

E30

D32

AA36

D28

C35

B34

B30

AT33

AT29

AT25

AR31

AR27

AR23

AA33

AP34

AN36

AN33

AN29

AN25

AM31

AM27

AM23

AL35

AL32

AA30

AK29

AK25

AJ36

AJ33

AJ30

AJ27

AJ23

AG35

AG32

AG29

AA27

AG25

AF26

AF23

AE36

AE33

AE30

AE27

AE22

AD24

AC35

A32

A28

AE29

AE26

AE23

AD25

AC36

AC33

AC30

AC27

AB24

AA35

AA32

AA29

AA26

A34

A30

Y25

W36

W33

W30

W27

V24

U35

U32

U29

U26

U22

T25

R36

R33

R30

R27

P24

N35

N32

N29

N26

N22

M25

L36

L33

L30

L27

K26

J35

J32

J29

H29

H28

G36

G33

G30

E35

E32

E28

D33

D30

C36

B32

B28

AT31

AT27

AT23

AR35

AR33

AR29

AR25

AN35

AN31

AN27

AN23

AM29

AM25

AL36

AL33

AL31

AK27

AK23

AJ35

AJ32

AJ29

AJ25

AG36

AG33

AG30

AG27

AG23

AF25

AE35

AE32

U1900

TITLE=KILOHANA

ABBREV=DRAWING

KODIAC NBMEM PWR & CAPSSYNC_DATE=05/19/2005SYNC_MASTER=Q63

051-6863 07

15458

=PP1V8_PWRON_NBMEM

=PP1V8_PWRON_NBMEM

<XR_PAGE_TITLE>


59B1

59B1

58D4

58D6

39D3

39D3

20D8

20D8

20D4

20D4

3B2

3B2

Preliminary

DDR_ODT6_QDM16

DDR_ODT7_QDM17

DDR_REFCLK_P

DDR_REFCLK_N

CHP_FAULT_N

DDR_ODT4

DDR_ODT5

DDR_VREF_12_13

DDR_VREF_14_15

DDR_VREF_11_17

DDR_VREF_9_10

DDR_VREF_7_8

DDR_VREF_5_6

DDR_VREF_4_16

DDR_VREF_2_3

DDR_VREF_0_1

OBSV

DDR_STOP

DDR_CS11_QDM11

DDR_CK_AN

DDR_CK_B

DDR_CK_BN

DDR_CAS

DDR_WE

DDR_CKE5_QCS0

DDR_DQSP10

DDR_DQSP17

DDR_DQSN17

DDR_CS3_QDM3

DDR_CS2_QDM2

DDR_CS4_QDM4

DDR_CS5_QDM5

DDR_CS6_QDM6

DDR_MUXEN6

DDR_MUXEN5

DDR_MUXEN4

DDR_MUXEN3

DDR_ODT0_QODT_EN

DDR_ODT1_QODT0

DDR_ODT2_QODT1

DDR_DQSP3

DDR_RAS

DDR_DQSN4

DDR_CS0_QDM0

DDR_CS1_QDM1

DDR_BA2

DDR_CS14_QDM14

DDR_CS15_QDM15

DDR_CS12_QDM12

DDR_CS10_QDM10

DDR_CS9_QDM9

DDR_CS8_QDM8

DDR_CKE0_QCKE0

DDR_CKE1_QCKE1

DDR_CKE2_QCKE2

DDR_CKE7_QCS2

DDR_DQSP14

DDR_CKE4_QCS_EN

DDR_CKE3_QCKE3

DDR_MUXEN0

DDR_MUXEN1

DDR_MAD1

DDR_DQSP2

DDR_DQSP6

DDR_DQSN5

DDR_DQSP16

DDR_DQSN16

DDR_DQSN15

DDR_DQSP15

DDR_REFCLK_AGND

DDR_REFCLK_AVDD

DDR_DQSN14

DDR_DQSN13

DDR_DQSP13

DDR_DQSN11

DDR_DQSN10

DDR_DQSN9

DDR_DQSN8

DDR_DQSN7

DDR_DQSP12

DDR_DQSP11

DDR_DQSP5

DDR_DQSN3

DDR_MAD4

DDR_ARB_ADDR

DDR_MAD15

DDR_MAD14

DDR_MAD13

DDR_MAD12

DDR_MAD11

DDR_MAD10

DDR_MAD8

DDR_MAD9

DDR_MAD6

DDR_MAD7

DDR_MAD5

DDR_MAD3

DDR_MAD2

DDR_MAD0

DDR_BA1

DDR_CK_A

DDR_BA0

DDR_DQSN12

DDR_DQSP9

DDR_DQSP8

DDR_DQSP7

DDR_DQSN6

DDR_DQSP4

DDR_DQSP0

DDR_DQSP1

DDR_DQSN1

DDR_DQSN2

DDR_DQSN0

DDR_ODT3_QODT2

DDR_CS7_QDM7

DDR_MUXEN2

DDR_CKE6_QCS1

DDR_CS13_QDM13

DDR_MUXEN7

INTERFACE - CONTROL

MEMORY

(3 OF 10)

DDR_DQ2

DDR_DQ3

DDR_DQ4

DDR_DQ78

DDR_DQ79

DDR_DQ74 DDR_DQ10

DDR_DQ9DDR_DQ73

DDR_DQ76

DDR_DQ81

DDR_DQ82

DDR_DQ83

DDR_DQ101

DDR_DQ102

DDR_DQ32

DDR_DQ0

DDR_DQ36

DDR_DQ35

DDR_DQ34

DDR_DQ33

DDR_DQ31

DDR_DQ30

DDR_DQ29

DDR_DQ28

DDR_DQ27

DDR_DQ26

DDR_DQ25

DDR_DQ24

DDR_DQ22

DDR_DQ23

DDR_DQ19

DDR_DQ21

DDR_DQ20

DDR_DQ18

DDR_DQ17

DDR_DQ15

DDR_DQ16

DDR_DQ14

DDR_DQ13

DDR_DQ7

DDR_DQ8

DDR_DQ5

DDR_DQ6

DDR_DQ1

DDR_DQ37

DDR_DQ38

DDR_DQ39

DDR_DQ40

DDR_DQ41

DDR_DQ42

DDR_DQ44

DDR_DQ47

DDR_DQ49

DDR_DQ48

DDR_DQ52

DDR_DQ50

DDR_DQ51

DDR_DQ53

DDR_DQ54

DDR_DQ57

DDR_DQ55

DDR_DQ56

DDR_DQ59

DDR_DQ58

DDR_DQ61

DDR_DQ60

DDR_DQ62

DDR_DQ63

DDR_DQ125

DDR_DQ127

DDR_DQ126

DDR_DQ124

DDR_DQ120

DDR_DQ121

DDR_DQ122

DDR_DQ123

DDR_DQ119

DDR_DQ115

DDR_DQ114

DDR_DQ118

DDR_DQ117

DDR_DQ116

DDR_DQ110

DDR_DQ111

DDR_DQ112

DDR_DQ113

DDR_DQ109

DDR_DQ107

DDR_DQ106

DDR_DQ105

DDR_DQ104

DDR_DQ108

DDR_DQ100

DDR_DQ99

DDR_DQ103

DDR_DQ95

DDR_DQ96

DDR_DQ97

DDR_DQ98

DDR_DQ94

DDR_DQ89

DDR_DQ90

DDR_DQ91

DDR_DQ92

DDR_DQ93

DDR_DQ87

DDR_DQ85

DDR_DQ86

DDR_DQ84

DDR_DQ88

DDR_DQ80

DDR_DQ75

DDR_DQ77

DDR_DQ69

DDR_DQ68

DDR_DQ70

DDR_DQ72

DDR_DQ71

DDR_DQ67

DDR_DQ65

DDR_DQ66

DDR_DQ64

DDR_DQ128

DDR_DQ129

DDR_DQ130

DDR_DQ132

DDR_DQ131

DDR_DQ133

DDR_DQ135

DDR_DQ134

DDR_DQ137

DDR_DQ136

DDR_DQ138

DDR_DQ139

DDR_DQ140

DDR_DQ141

DDR_DQ142

DDR_DQ143

DDR_DQ12

DDR_DQ11

DDR_DQ46

DDR_DQ45

DDR_DQ43

MEMORY

INTERFACE - DATA

(4 OF 10)

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PLACE NEAR KODIAK

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

KODIAK MEMORY INTERFACE

DQ/DQS OKAY TO TIE TO GROUND FOR THERMALS

CHECK VREF CONNECTION

CHECK CAP SIZE (0603 OR 0402)

Q63 APPLICATION IS PP1V6

Kodiak 128bit CS/CKE/ODT mapping (Q63 style)+-----------+-----+-----+-----+--------------+--------+| DIMM RANK | CS* | CKE | ODT | M23 Function | D bits |+-----------+-----+-----+-----+--------------+--------+| A0 | 0 | 0 | 0 | onboard DRAM | 0:63 || A1 | 1 | 1 | - | *unused* | 0:63 |+-----------+-----+-----+-----+--------------+--------+| B2 | 8 | 0 | 4 | J6700 rank 1 | 64:127 || B3 | 9 | 1 | - | J6700 rank 2 | 64:127 |+===========+=====+=====+=====+==============+========+| C4 | 2 | 2 | 1 | *unused* | 0:63 || C5 | 3 | 3 | - | *unused* | 0:63 |+-----------+-----+-----+-----+--------------+--------+| D6 | 10 | 2 | 5 | *unused* | 64:127 || D7 | 11 | 3 | - | *unused* | 64:127 |+===========+=====+=====+=====+==============+========+| E8 | 4 | 4 | 2 | *unused* | 0:63 || E9 | 5 | 5 | - | *unused* | 0:63 |+-----------+-----+-----+-----+--------------+--------+| F10 | 12 | 4 | 6 | *unused* | 64:127 || F11 | 13 | 5 | - | *unused* | 64:127 |+===========+=====+=====+=====+==============+========+| G12 | 6 | 6 | 3 | *unused* | 0:63 || G13 | 7 | 7 | - | *unused* | 0:63 |+-----------+-----+-----+-----+--------------+--------+| H14 | 14 | 6 | 7 | *unused* | 64:127 || H15 | 15 | 7 | - | *unused* | 64:127 |+===========+=====+=====+=====+==============+========+

Kodiak 128bit CS/CKE/ODT mapping (v1.1 only)+-----------+-----+-----+-----+--------------+--------+| DIMM RANK | CS* | CKE | ODT | M23 Function | D bits |+-----------+-----+-----+-----+--------------+--------+| A0 | 0 | 0 | 0 | onboard DRAM | 0:63 || A1 | 1 | 1 | - | *unused* | 0:63 |

| B2 | 4 | 4 | 2 | J6700 rank 1 | 64:127 || B3 | 5 | 5 | - | J6700 rank 2 | 64:127 |+===========+=====+=====+=====+==============+========+| C4 | 2 | 2 | 1 | *unused* | 0:63 || C5 | 3 | 3 | - | *unused* | 0:63 |+-----------+-----+-----+-----+--------------+--------+| D6 | 6 | 6 | 3 | *unused* | 64:127 || D7 | 7 | 7 | - | *unused* | 64:127 |+===========+=====+=====+=====+==============+========+

+-----------+-----+-----+-----+--------------+--------+

PLACE CLOSE TO KODIAK PINWITHIN 20MIL FROM VIA FOR EACH VREF

NOSTUFF

49.9

21R5912

1%

56.2

1/16W

MF-LF

4022

1R5910

402

X5R

6.3V20%

0.22UF

2

1 C5901

402

CERM

6.3V10%

1UF

2

1 C5900402

MF-LF

1/16W

5%

4.7

21R5914

1UF10%6.3VCERM402

2

1 C5906

402CERM6.3V10%1UF

2

1 C5907

402CERM6.3V10%1UF

2

1 C5908

402CERM6.3V10%1UF

2

1 C5909

402CERM6.3V10%1UF

2

1 C5910

402CERM6.3V10%1UF

2

1 C5911

402CERM6.3V10%1UF

2

1 C5912

402CERM6.3V10%1UF

2

1 C5913

402CERM6.3V10%1UF

2

1 C5905

402

MF-LF

1/16W

5%

2.221

R5927

BGA

KODIAK-ASIC-040812

AG22

AP23

T26

V26

Y26

AB26

AD26

F28

M26

P26

AG26

AJ22

AF24

AG24

AH23

AH21

AL24

M29

AF28

AK22

AP24

AN24

AR24

AT24

AL23

AP29

AL29

AT30

AK30

AK28

AL28

AM28

AP27

AR22

AL30

AH28

AP25

AL25

AM26

AT26

AR26

AK24

AJ26

AH25

AH26

AH27

AJ28

AP26

AN26

T33

V28

Y27

Y31

AB30

AD33

AF33

AK35

K32

AD27

B27

A31

F33

H33

P27

M36

AP35

AR32

T32

V27

Y28

Y30

AB31

AD32

AF32

AK36

K33

AD28

A27

B31

F32

H32

P28

M35

AP36

AT32

R34

V29

W31

V36

AB32

AH33

AF31

AJ31

AP33

E27

G29

D36

H35

M28

M32

AL27

AM22

AN22

AP22

AT22

AP21

AL21

AH24

AJ24

AK26

AL26

AT28

AR28

AM24

AN28

AP28

AL22

AF22

AH22

U1900

56.21%

1/16WMF-LF402

2

1R5911

10%1UF

6.3VCERM402

2

1 C5904

1K21

R5913

49.9

NOSTUFF

21R5928

NOSTUFF

49.9

21R5929

KODIAK-ASIC-040812

BGA

J34

G31

J31

G34

N34

P30

P29

N28

T27

U28

AK31

R28

M27

M33

M31

L34

L31

N31

K35

M34

K36

AM36

T31

R31

P36

P35

T35

P33

T34

P34

W28

T28

AM32

T29

T30

P31

U31

T36

P32

AA28

W34

AB27

AB28

AR30

U34

Y35

Y34

V30

Y29

V35

V34

V33

Y33

V31

AP30

Y32

V32

AC31

AB33

AB34

AB35

AD36

AA31

AC34

AB36

AN30

AH34

AH35

AD35

AD34

AG28

AD31

AF30

AF29

AG31

AF34

AM30

AF35

AF36

AH36

AE34

AG34

AE31

AK32

AJ34

AH29

AH30

AN32

AK33

AH32

AK34

AH31

AM34

K30

K29

L28

M30

AM33

F35

K34

K31

F36

AA34

Y36

AD30

AD29

AE28

AF27

AN34

AC28

AB29

C28

A29

B29

C29

D29

E29

F29

D27

AR34

C30

C32

B33

A33

F30

C31

E31

D31

E34

D35

AT34

D34

C34

F34

C33

F31

B35

H34

H31

H36

H30

AL34

AP32

AP31

U1900

051-6863 07

15459

Kodiak Memory Dq/CtlSYNC_MASTER=FINO-RT SYNC_DATE=05/19/2005

DDR_VREF1_9MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM

=PP1V8_PWRON_NBMEM

RAM_ODT<0>

NB_CHP_FLT_N

RAM_A<15>

RAM_A<11>

NB_DDR_STOP_OUT

RAM_DQS_N<12>

RAM_CLKA_N

NB_PLL_OUT_TRG

RAM_CAS_L

RAM_WE_L

RAM_CS_L<0>

RAM_BA<2>

RAM_A<1>


U1900_RFCK_AVDD


RAM_A<4>

RAM_A<14>

RAM_A<13>

RAM_A<12>

RAM_A<10>

RAM_A<8>

RAM_A<9>

RAM_A<6>

RAM_A<7>

RAM_A<5>

RAM_A<3>

RAM_A<2>

RAM_A<0>

RAM_BA<1>

RAM_BA<0>

=PPVCORE_PWRON_NB PPVCORE_PWRON_NB_PLL_R


RAM_DQS_P<3>

RAM_DQS_N<4>

RAM_DQS_P<2>

RAM_DQS_P<6>

RAM_DQS_N<5>

RAM_DQS_N<7>

RAM_DQS_P<5>

RAM_DQS_N<3>

RAM_DQS_P<7>

RAM_DQS_N<6>

RAM_DQS_P<4>

RAM_DQS_P<0>

RAM_DQS_P<1>

RAM_DQS_N<1>

RAM_DQS_N<2>

RAM_DQS_N<0>

RAM_DQS_N<8>

RAM_DQS_N<10>

RAM_DQS_N<9>

RAM_DQS_P<9>

RAM_DQS_P<8>

RAM_DQS_N<14>

RAM_DQS_P<15>

RAM_DQS_N<11>

RAM_DQS_P<13>

RAM_DQS_N<15>

RAM_DQS_N<13>

RAM_DQS_P<14>

RAM_DQS_P<10>

RAM_DQS_P<11>

RAM_CS_L<4>

RAM_CS_L<8>

RAM_CS_L<9>

RAM_CKE<0>

RAM_CKE<5>

RAM_CKE<1>

RAM_ODT<2>

RAM_CS_L<5>

RAM_DQS_P<12>

RAM_DQ<43>

RAM_DQ<45>

RAM_DQ<46>

RAM_DQ<11>

RAM_DQ<12>

RAM_DQ<63>

RAM_DQ<62>

RAM_DQ<60>

RAM_DQ<61>

RAM_DQ<58>

RAM_DQ<59>

RAM_DQ<56>

RAM_DQ<55>

RAM_DQ<57>

RAM_DQ<54>

RAM_DQ<53>

RAM_DQ<51>

RAM_DQ<50>

RAM_DQ<52>

RAM_DQ<48>

RAM_DQ<49>

RAM_DQ<47>

RAM_DQ<44>

RAM_DQ<42>

RAM_DQ<41>

RAM_DQ<40>

RAM_DQ<39>

RAM_DQ<38>

RAM_DQ<37>

RAM_DQ<1>

RAM_DQ<6>

RAM_DQ<5>

RAM_DQ<8>

RAM_DQ<7>

RAM_DQ<13>

RAM_DQ<14>

RAM_DQ<16>

RAM_DQ<15>

RAM_DQ<17>

RAM_DQ<18>

RAM_DQ<20>

RAM_DQ<21>

RAM_DQ<19>

RAM_DQ<23>

RAM_DQ<22>

RAM_DQ<24>

RAM_DQ<25>

RAM_DQ<26>

RAM_DQ<27>

RAM_DQ<28>

RAM_DQ<29>

RAM_DQ<30>

RAM_DQ<31>

RAM_DQ<33>

RAM_DQ<34>

RAM_DQ<35>

RAM_DQ<36>

RAM_DQ<0>

RAM_DQ<32>

RAM_DQ<9>

RAM_DQ<10>

RAM_DQ<4>

RAM_DQ<3>

RAM_DQ<2>RAM_DQ<66>

RAM_DQ<67>

RAM_DQ<68>

RAM_DQ<74>

RAM_DQ<73>

RAM_DQ<83>

RAM_DQ<85>

RAM_DQ<84>

RAM_DQ<82>

RAM_DQ<81>

RAM_DQ<79>

RAM_DQ<80>

RAM_DQ<78>

RAM_DQ<77>

RAM_DQ<71>

RAM_DQ<72>

RAM_DQ<69>

RAM_DQ<70>

RAM_DQ<76>

RAM_DQ<75>

RAM_DQ<64>

RAM_DQ<65>

RAM_DQ<127>

RAM_DQ<108>

RAM_DQ<111>

RAM_DQ<113>

RAM_DQ<112>

RAM_DQ<116>

RAM_DQ<114>

RAM_DQ<115>

RAM_DQ<117>

RAM_DQ<118>

RAM_DQ<121>

RAM_DQ<119>

RAM_DQ<120>

RAM_DQ<123>

RAM_DQ<122>

RAM_DQ<125>

RAM_DQ<124>

RAM_DQ<126>

RAM_DQ<110>

RAM_DQ<109>

RAM_DQ<107>

RAM_DQ<96>

RAM_DQ<100>

RAM_DQ<99>

RAM_DQ<98>

RAM_DQ<97>

RAM_DQ<95>

RAM_DQ<94>

RAM_DQ<93>

RAM_DQ<92>

RAM_DQ<91>

RAM_DQ<90>

RAM_DQ<89>

RAM_DQ<88>

RAM_DQ<86>

RAM_DQ<87>

RAM_DQ<101>

RAM_DQ<102>

RAM_DQ<103>

RAM_DQ<104>

RAM_DQ<105>

RAM_DQ<106>

NB_DDR_REFCLK_NDIFFERENTIAL_PAIR=RAM_NB_DDR_REFCLK_DP NET_PHYSICAL_TYPE=RAM_NB_DDR_80 NET_SPACING_TYPE=RAM_NB_DDR_80

RAM_ODT<4>

RAM_CKE<4>

RAM_RAS_L

RAM_CLKA_P

NB_DDR_REFCLK_PDIFFERENTIAL_PAIR=RAM_NB_DDR_REFCLK_DP NET_PHYSICAL_TYPE=RAM_NB_DDR_80 NET_SPACING_TYPE=RAM_NB_DDR_80

58 39

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

42

68

20

67

67

67

62

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

19

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68 67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

67

62

7

61

61

61

61

61

9

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

7

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61 61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

26

61

61

61

61

26

Preliminary

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

DIFFERENTIAL_PAIR

CS/CKE/ODT TERMINATIONFOR DIMM STICK

RPACK/RES NEAR/UNDER CONNECTOR

ALL R PACKS ARE 1/16W 5%

RAM_CAD SPACING IS 10MIL

TOTAL LENGTH TOLERENCE = 20PS = 2.82MM

RAM_CLK LINE-LINE SPACING SET TO 15MIL

RAM_CLK PRIMARY SPACING SET BASED ON DIFF IMPEDANCE

NET_PHYSICAL_TYPE NET_SPACING_TYPE

CS/CKE/ODT TERMINATIONFOR ONBOARD DRAM

SERIES R NEAR KODIAK

SHARE PIN 2 PADS

SHARE PIN 2 PADS

SHARE PIN 2 PADS

SHARE PIN 2 PADS

SHARE PIN 2 PADS

RES NEAR BRANCH POINT

SERIES R NEAR KODIAK






I206

I207

I210

I211

I212

I213

I214

I215

I216

I217

I218

I219

I220

I221

I222

I223

I224

I225

I226

I227

I230

I232

I234

I235

I236

I237

I238

I241

I242

I243

I244

I245

I246

I248

I251

I252

I253

I254

I255

I256

I257

I258

I259

I260

I261

I262

I263

I264

I265

I266

I267

I268

I269

I270

I271

I272

I273

I274

I275

I276

I277

I278

I279

I280

I294

I295

I296

I297

I298

I299

I300

I301

I302

I303

I304

I305

0.1UF20%

402CERM10V

2

1 C6102

402CERM10V20%0.1UF

2

1 C6100

402CERM10V

0.1UF20%

2

1 C61040.1UF20%10VCERM402

2

1 C6103

402CERM

20%0.1UF10V

2

1 C61060.1UF10V20%

CERM402

2

1 C6105

402CERM10V20%0.1UF

2

1 C6108

20%0.1UF10VCERM402

2

1 C6109

402

1021

R6172

402

1021

R6175

MF-LF1/16W5%240

4022

1R6173

402

2405%1/16WMF-LF

2

1R6174402

1021

R6178

402CERM10V

0.1UF20%

2

1 C6107402

RAM_M23_1281021

R6121

402

RAM_Q63_1281021

R6161

402

RAM_M23_1281021

R6122

402

RAM_Q63_1281021

R6162

402

RAM_M23_1281021

R6123

402

RAM_Q63_1281021

R6163

402

RAM_M23_1281021

R6124

402

RAM_Q63_1281021

R6164

402

RAM_M23_1281021

R6125

402

RAM_Q63_1281021

R6165

I470

I471

I472

I473

I474

I475

I476

I477

I478

I479

I480

I481

I482

I483

I484

I485

I486

I487

SM-LF1/16W5%240

5

4

RP6107

SM-LF

2405%1/16W

8

1

RP6106

SM-LF1/16W5%240

5

4

RP6106

SM-LF

2405%1/16W

5

4

RP6105

SM-LF1/16W5%240

8

1

RP6105

SM-LF

2405%1/16W

5

4

RP6104

SM-LF1/16W5%240

8

1

RP6104

SM-LF

2405%1/16W

8

1

RP6103

SM-LF

2405%1/16W

7

2

RP6103

SM-LF1/16W5%240

7

2

RP6104

SM-LF

2405%1/16W

6

3

RP6104

SM-LF1/16W5%240

7

2

RP6105

SM-LF

2405%1/16W

6

3

RP6105

SM-LF1/16W5%240

6

3

RP6106

SM-LF

2405%1/16W

7

2

RP6106

SM-LF1/16W5%240

6

3

RP6107

SM-LF

2405%1/16W

8

1

RP6100

1/16WSM-LF

5%240

5

4

RP6100

SM-LF

2405%1/16W

8

1

RP6110

SM-LF1/16W5%240

8

1

RP6101

SM-LF

2405%1/16W

8

1

RP6102

SM-LF1/16W5%240

5

4

RP6108

SM-LF

2405%1/16W

5

4

RP6102

SM-LF1/16W5%240

5

4

RP6103

SM-LF1/16W5%240

7

2

RP6100

SM-LF1/16W5%240

6

3

RP6100

SM-LF

2405%1/16W

7

2

RP6110

SM-LF1/16W5%240

7

2

RP6101

SM-LF

2405%1/16W

7

2

RP6102

SM-LF1/16W5%240

6

3

RP6108

SM-LF

2405%1/16W

6

3

RP6102

SM-LF

2405%1/16W

6

3

RP6103

SM-LF

2405%1/16W

8

1

RP6108

SM-LF1/16W5%240

8

1

RP6107

SM-LF

2405%1/16W

5

4

RP6101

SM-LF

5%2401/16W

6

3

RP6101

SM-LF

2405%1/16W

7

2

RP6107

SM-LF1/16W5%240

7

2

RP6108

2405%1/16WSM-LF

5

4

RP6109

1/16W5%240

SM-LF

5

4

RP6110

2405%1/16WSM-LF

8

1

RP6109

1/16W5%240

SM-LF

6

3

RP6110

2405%1/16WSM-LF

7

2

RP6109

2405%1/16WSM-LF

6

3

RP6109

I572

I573

I574

I575

I576

I577

SM-LF1/16W5%240

6

3

RP6150

1/16W5%240

SM-LF

8

1

RP6151

SM-LF1/16W5%240

7

2

RP6150

SM-LF

2405%1/16W

5

4

RP6150

SM-LF

5%2401/16W

8

1

RP6150

SM-LF

2405%1/16W

5

4

RP6151

SM-LF1/16W5%240

6

3

RP6151

SM-LF

2405%1/16W

7

2

RP6151

SM-LF1/16W5%240

7

2

RP6152

1/16W5%240

SM-LF

8

1

RP6152

SM-LF1/16W5%240

5

4

RP6170

SM-LF1/16W5%240

8

1

RP6170

SM-LF1/16W5%240

6

3

RP6170

SM-LF1/16W5%240

7

2

RP6170

I592

I593

I594

07

15461

051-6863

SYNC_MASTER=FINO-RT SYNC_DATE=05/19/2005

Parallel Term

NET_SPACING_TYPE=POWERVOLTAGE=1.8VMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.6MM

1V8_RUN_RAM_CKE1V8_RUN_RAM_CKE

RAM_A<14>

RAM_A<5>

=PP1V8_RUN_RAM

RAM_CKE_DIMM_B

RAM_CKE_DIMM_A

RAM_CKE_R<0>

=PP1V8_RUN_RAM

RAM_CSCKEODT RAM_CSCKEODTRAM_ODT_DIMM_A

RAM_DIMM_CLK_EC RAM_CLKRAM_CLK RAM_DIMM_CLK0_DPRAM_DIMM_A_CLK_P0

RAM_CLK RAM_CLK RAM_KODIAK_CLK_DPRAM_KODIAK_CLK_ECRAM_CLKA_P

RAM_BA<1>

RAM_BA<0>

=PP1V8_RUN_RAM

RAM_BA<2>

RAM_RAS_L

RAM_CAS_L

RAM_WE_L

=PP1V8_RUN_RAM

RAM_A<7>

RAM_A<4>

RAM_A<6>

RAM_A<3>

RAM_A<2>

RAM_A<1>

RAM_A<0>

=PP1V8_RUN_RAM

RAM_A<15>

RAM_A<13>

RAM_A<12>

RAM_A<11>

RAM_A<10>

RAM_A<9>

RAM_A<8>

RAM_CSCKEODT RAM_CSCKEODTRAM_ODT_R<0>RAM_CSCKEODT RAM_CSCKEODTRAM_ODT<4>

RAM_ODT_DIMM_EC RAM_CSCKEODT RAM_CSCKEODTRAM_ODT<2>RAM_ODT_ONBOARD_EC RAM_CSCKEODT RAM_CSCKEODTRAM_ODT<0>

RAM_CSCKEODT RAM_CSCKEODTRAM_CKE_DIMM_ARAM_CSCKEODT RAM_CSCKEODTRAM_CKE_DIMM_BRAM_CSCKEODT RAM_CSCKEODTRAM_CKE_R<0>RAM_CSCKEODT RAM_CSCKEODTRAM_CKE<5>RAM_CSCKEODT RAM_CSCKEODTRAM_CKE<4>

RAM_CKE_DIMM_EC RAM_CSCKEODT RAM_CSCKEODTRAM_CKE<1>RAM_CKE_DIMM_ONBOARD_EC RAM_CSCKEODT RAM_CSCKEODTRAM_CKE<0>

RAM_CSCKEODT RAM_CSCKEODTRAM_CS_DIMM_BRAM_CSCKEODT RAM_CSCKEODTRAM_CS_DIMM_ARAM_CSCKEODT RAM_CSCKEODTRAM_CS_L_R<0>RAM_CSCKEODT RAM_CSCKEODTRAM_CS_L<9>RAM_CSCKEODT RAM_CSCKEODTRAM_CS_L<8>

RAM_CS_DIMM_EC RAM_CSCKEODT RAM_CSCKEODTRAM_CS_L<5>RAM_CSCKEODT RAM_CSCKEODTRAM_CS_L<4> RAM_CS_DIMM_EC

RAM_CS_ONBOARD_EC RAM_CSCKEODT RAM_CSCKEODTRAM_CS_L<0>

RAM_ODT_DIMM_A

RAM_CADRAM_CADRAM_DQS9_ECRAM_DQ<79..72>

=PP1V8_RUN_RAM

RAM_DQSRAM_DQSRAM_DQS0_EC RAM_DQS_0_DPRAM_DQS_P<0>

RAM_CS_L_R<0>

RAM_CLKRAM_CLK RAM_FBIN_CLK_DPRAM_CLK_FBIN_N

RAM_CLKRAM_CLK RAM_FBOUT_CLK_DPRAM_CLK_FBOUT_P


RAM_DQSRAM_DQSRAM_DQS1_EC RAM_DQS_1_DPRAM_DQS_N<1>

RAM_CAD RAM_CADRAM_CAS_L_R

RAM_CADRAM_CADRAM_WE_L_R

RAM_CAD RAM_CADRAM_RAS_L_R

RAM_ONBOARD_CLK_EC RAM_CLK RAM_CLK RAM_ONBOARD_CLK0_DPRAM_ONBOARD_CLK_N0_1RAM_ONBOARD_CLK_EC RAM_CLK RAM_CLK RAM_ONBOARD_CLK0_DPRAM_ONBOARD_CLK_P0_1RAM_DIMM_CLK_EC RAM_CLKRAM_CLK RAM_DIMM_CLK2_DPRAM_DIMM_A_CLK_N2RAM_DIMM_CLK_EC RAM_CLKRAM_CLK RAM_DIMM_CLK2_DPRAM_DIMM_A_CLK_P2RAM_DIMM_CLK_EC RAM_CLKRAM_CLK RAM_DIMM_CLK1_DPRAM_DIMM_A_CLK_N1RAM_DIMM_CLK_EC RAM_CLKRAM_CLK RAM_DIMM_CLK1_DPRAM_DIMM_A_CLK_P1RAM_DIMM_CLK_EC RAM_CLKRAM_CLK RAM_DIMM_CLK0_DPRAM_DIMM_A_CLK_N0

RAM_ONBOARD_CLK_EC RAM_CLKRAM_CLK RAM_ONBOARD_CLK6_DPRAM_ONBOARD_CLK_N6_7





RAM_ODT<4>

RAM_CKE<1>

RAM_ODT<2>

RAM_CKE<0>

RAM_CS_L<9>

RAM_CKE<5>

RAM_CKE<4>

RAM_CS_L<5>

RAM_CS_L<8>

RAM_CS_L<4>

RAM_ODT<0>

RAM_CS_L<0>

RAM_CKE<0>

RAM_CLK RAM_CLK RAM_KODIAK_CLK_DPRAM_CLKA_N

RAM_ONBOARD_CLK_EC RAM_CLKRAM_CLK RAM_ONBOARD_CLK2_DPRAM_ONBOARD_CLK_N2_3RAM_ONBOARD_CLK_EC RAM_CLK RAM_CLK RAM_ONBOARD_CLK2_DPRAM_ONBOARD_CLK_P2_3

RAM_ONBOARD_CLK_EC RAM_CLK RAM_CLK RAM_ONBOARD_CLK4_DPRAM_ONBOARD_CLK_P4_5

RAM_FB_CLK_EC RAM_CLKRAM_CLK RAM_FBIN_CLK_DPRAM_CLK_FBIN_P




RAM_DQSRAM_DQS RAM_DQS_3_DPRAM_DQS3_ECRAM_DQS_N<3>










RAM_CLK RAM_FBOUT_CLK_DPRAM_CLKRAM_CLK_FBOUT_N

















RAM_CLK RAM_CLKRAM_ONBOARD_CLK_EC RAM_ONBOARD_CLK6_DPRAM_ONBOARD_CLK_P6_7





RAM_CADRAM_CADRAM_DQ_R<127..0>

RAM_DQS RAM_DQSRAM_DQS_P_R<15..0>

RAM_DQS RAM_DQSRAM_DQS_N_R<15..0>




RAM_CAD RAM_CADRAM_BA_R<2..0>RAM_CAD RAM_CADRAM_A_R<15..0>

RAM_A_CTL_EC RAM_CAD RAM_CADRAM_WE_LRAM_A_CTL_EC RAM_CAD RAM_CADRAM_CAS_LRAM_A_CTL_EC RAM_CADRAM_CADRAM_RAS_L

RAM_A_CTL_1_EC RAM_CAD RAM_CADRAM_BA<2>RAM_CADRAM_CADRAM_A_CTL_ECRAM_BA<1..0>

RAM_A_CTL_EC RAM_CADRAM_CADRAM_A<13..0>RAM_CAD RAM_CADRAM_A_CTL_ECRAM_A<15..14>

RAM_CS_DIMM_BRAM_DQSRAM_DQSRAM_DQS14_EC RAM_DQS_14_DPRAM_DQS_N<14>




RAM_ONBOARD_CLK_EC RAM_CLKRAM_CLK RAM_ONBOARD_CLK4_DPRAM_ONBOARD_CLK_N4_5

RAM_ODT_R<0>

RAM_CS_DIMM_A

70

70

69

70

69

70

70

70

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

69

68

69

69

70

70

70

70

70

70

68

68

68

68

68

68

68

69

67

67

62

67

67

63

62

67

67

62

67

67

67

67

62

67

67

67

67

67

67

67

62

67

67

67

67

67

67

67

68

67

67

63

68

62

68

69

69

69

69

70

70

69

69

67

67

67

67

67

67

67

68

62 62

61

61

61

62

62

62

61

67

67

62

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

63

61

61

61

62

62

62

61

61

61

61

67

67

63

61

61

61

61

61

67

67

61

68

63

68

68

68

68

68

69

69

67

67

67

67

67

70

68

68

67

67

61

61

61

61

61

61

61

61

61

61

61

61

61

62

69

69

70

68

68

68

68

68

68

68

68

68

68

68

68

68

67

67

67

67

67

67

67

67

67

67

67

67

67

67

68

67

70

68

67

67

67

68

69

69

68

68

68

68

68

61

61

61

61

61

61

61

67

67

67

67

68

70

63

67

61 61

59

59

7

61

61

61

7

61

62

59

59

59

7

59

59

59

59

7

59

59

59

59

59

59

59

7

59

59

59

59

59

59

59

61

59

59

59

61

61

61

59

59

59

59

61

61

61

59

59

59

59

59

61

59

7

59

61

62

62

59

59

63

63

63

62

62

62

62

62

62

62

62

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

62

62

62

62

59

59

59

59

59

59

59

59

59

59

59

59

59

62

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

62

59

59

59

59

6

68

68

59

59

59

63

63

59

59

59

59

59

59

59

61

59

59

59

59

62

61

61

Preliminary

Y0

Y0*

Y1

Y1*

Y2*

Y2

Y3

Y3*

Y4*

Y4

Y5

Y5*

Y6*

Y6

Y7

Y7*

Y8*

Y8

Y9*

Y9

FBOUT*

FBOUT

OE

OS

CK

CK*

FBIN

FBIN*

VDDAVDD

GNDAGND

G

D

S

D S

G

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

CDCU877

BGA

K5

K4

K6

J6

C6

D6

B6

A6

A4

A5

K2

K3

K1

J1

C1

D1

B1

A1

A3

A2

G4G3G2F2E5E2D4D3 G5D2

D5

F5

J2H5H2C5C2B5B4B3 J5J4J3B2

G6

H6

F6

E6

F1

E1

H1

G1

U6200

0.1UF10V20%

402CERM2

1 C62110.1UF

402

10V20%

CERM2

1 C62120.1UF10V20%

402CERM2

1 C6213

021

R6210

021

R6211

100 1%

21R6220

402MF-LF1/16W5%10K

2

1R6230603

4.7UF20%6.3VCERM2

1 C6200

SM

600-OHM-EMI21

L6200

603MF-LF1/10W5%

121

R6200

100 1%

21R6221

SI2302ADSE3SOT23-3

2

1

3

Q62432N3904LFSOT23

2

3

1 Q6200

402MF-LF1/16W5%

10K21

R6240SOT-3632N7002DW-X-F

1

2

6

Q6201

1K5%1/16WMF-LF4022

1R6241

0.1UF10V20%

CERM402

2

1 C6201

1K5%1/16WMF-LF4022

1R6242

SOT23-3SI2302ADSE3

2

1

3

Q6244SOT23-3SI2302ADSE3

2

1

3

Q6245

402MF-LF1/16W5%0

2

1R6243

402MF-LF1/16W5%0

2

1R6245

402MF-LF1/16W5%0

2

1R6244

5%2200PF50V

603CERM2

1 C6202

SOT-3632N7002DW-X-F

4

5

3

Q6201

NOSTUFF

402MF-LF1/16W

0

5%

21

R6201

SM

21

XW6200

20%

CERM

0.1UF

402

10V2

1 C6210

051-6863

62 154

Main Memory Clock BufferSYNC_DATE=05/19/2005

07

SYNC_MASTER=FINO-RT

RAM_CLK_FBIN_P

RAM_CLK_FBIN_N

NB_SUSPENDACK_L_5V

1V8_RUN_RAM_CKE=PP1V8_RUN_RAM

NB_SUSPEND_ACK_L

NB_SUSPEND_ACK_L_R_5V

NB_SUSPENDACK_5V

PP5V_PWRON

RAM_CKE_DIMM_A

RAM_CKE_DIMM_B

RAM_CKE_R<0>

RAM_DIMM_A_CLK_P2

RAM_DIMM_A_CLK_N2

=PP1V8_PWRON_RAM

RAM_CLKA_N

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MMVOLTAGE=1.8V

RAMCLK_AVDD

MIN_LINE_WIDTH=0.5MMVOLTAGE=0V

RAMCLK_AVSS


RAM_ONBOARD_CLK_P6_7

RAM_ONBOARD_CLK_N6_7






RAM_DIMM_A_CLK_N1

RAM_DIMM_A_CLK_P1

RAM_DIMM_A_CLK_N0

RAM_DIMM_A_CLK_P0

RAM_CLKA_P

RAM_CLK_OE

RAM_CLK_FBOUT_N


RAMCLK_AVDD_R

RAM_CLK_FBOUT_P


70 69 68

61

30

67

67

63

67

67

61

70

70

70

70

69

69

69

67

67

67

67

61 69

61

61

61 7

20

7

61

61

61

61

61

7

59

6

61

61

61

61

61

61

61

61

61

61

61

59

61

61

61

Preliminary

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

1 ZTA15_LL

1 ZTA15_LR

1 ZTA15_RL

1 ZTA15_RR

1 ZTA15_R

1 ZTA15

1 ZTA14_L

1 ZTA14_LL

1 ZTA14_LR

1 ZTA14_RL

1 ZTA14_RR

1 ZTA14_R

1 ZTA14

1 ZTA13_L

1 ZTA13_LL

1 ZTA13_LR

1 ZTA13_RL

1 ZTA13_RR

1 ZTA13_R

1 ZTA13

1 ZTA12_L

1 ZTA12_LL

1 ZTA12_LR

1 ZTA12_RL

1 ZTA12_RR

1 ZTA12_R

1 ZTA12

1 ZTA11_L

1 ZTA11_LL

1 ZTA11_LR

1 ZTA11_RL

1 ZTA11_RR

1 ZTA11_R

1 ZTA11

1 ZTA10_L

1 ZTA10_LL

1 ZTA10_LR

1 ZTA10_RL

1 ZTA10_RR

1 ZTA10_R

1 ZTA10

1 ZTA9_L

1 ZTA9_LL

1 ZTA9_LR

1 ZTA9_RL

1 ZTA9_RR

1 ZTA9_R

1 ZTA9

1 ZTA8_L

1 ZTA8_LL

1 ZTA8_LR

1 ZTA8_RL

1 ZTA8_RR

1 ZTA8_R

1 ZTA8

1 ZTA7_L

1 ZTA7_LL

1 ZTA7_LR

1 ZTA7_RL

1 ZTA7_RR

1 ZTA7_R

1 ZTA7

1 ZTA6_L

1 ZTA6_LL

1 ZTA6_LR

1 ZTA6_RL

1 ZTA6_RR

1 ZTA6_R

1 ZTA6

1 ZTA5_L

1 ZTA5_LL

1 ZTA5_LR

1 ZTA5_RL

1 ZTA5_RR

1 ZTA5_R

1 ZTA5

1 ZTA4_L

1 ZTA4_LL

1 ZTA4_LR

1 ZTA4_RL

1 ZTA4_RR

1 ZTA4_R

1 ZTA4

1 ZTA3_L

1 ZTA3_LL

1 ZTA3_LR

1 ZTA3_RL

1 ZTA3_RR

1 ZTA3_R

1 ZTA3

1 ZTA2_L

1 ZTA2_LL

1 ZTA2_LR

1 ZTA2_RL

1 ZTA2_RR

1 ZTA2_R

1 ZTA2

1 ZTA1_L

1 ZTA1_LL

1 ZTA1_LR

1 ZTA1_RL

1 ZTA1_RR

1 ZTA1_R

1 ZTA1

1 ZTA0_L

1 ZTA0_LL

1 ZTA0_LR

1 ZTA0_RL

1 ZTA0_RR

1 ZTA0_R

1 ZTA0

1 ZTODT_L

1 ZTODT_LL

1 ZTODT_LR

1 ZTODT_RL

1 ZTODT_RR

1 ZTODT_R

1 ZTODT

1 ZTCKE_L

1 ZTCKE_LL

1 ZTCKE_LR

1 ZTCKE_RL

1 ZTCKE_RR

1 ZTCKE_R

1 ZTCKE

1 ZTCS_L

1 ZTCS_LL

1 ZTCS_LR

1 ZTCS_RR

1 ZTCS_R

1 ZTCS

1 ZTWE_L

1 ZTWE_LL

1 ZTWE_LR

1 ZTWE_RL

1 ZTWE_RR

1 ZTWE_R

1 ZTWE

1 ZTCAS_L

1 ZTCAS_LL

1 ZTCAS_LR

1 ZTCAS_RL

1 ZTCAS_RR

1 ZTCAS_R

1 ZTCAS

1 ZTRAS_L

1 ZTRAS_LL

1 ZTRAS_LR

1 ZTRAS_RL

1 ZTRAS_RR

1 ZTRAS_R

1 ZTRAS

1 ZTBA2_L

1 ZTBA2_LL

1 ZTBA2_LR

1 ZTBA2_RL

1 ZTBA2_RR

1 ZTBA2_R

1 ZTBA2

1 ZTBA1_L

1 ZTBA1_LL

1 ZTCS_RL

1 ZTBA1_LR

1 ZTBA1_RL

1 ZTBA1_RR

1 ZTBA1_R

1 ZTBA1

1 ZTBA0_L

1 ZTBA0_LL

1 ZTBA0_LR

1 ZTBA0_RL

1 ZTBA0_RR

1 ZTBA0_R

1 ZTBA0

1 ZTA15_L

SYNC_DATE=05/19/2005SYNC_MASTER=FINO-EG

051-6863 07

63 154

MEMORY ADDR BRANCHING

RAM_A_R<4>

RAM_A_R<3>

RAM_A_R<2>

RAM_A_R<10>

RAM_A_R<9>

RAM_A_R<1>

RAM_A_R<8>

RAM_A_R<7>

RAM_A_R<0> RAM_A_R<6>

RAM_A_R<15>

RAM_A_R<14>

RAM_A_R<13>

RAM_CAS_L_R

RAM_RAS_L_R

RAM_BA_R<2>

RAM_BA_R<1>

RAM_ODT_R<0>

RAM_CKE_R<0>

RAM_A_R<12> RAM_BA_R<0> RAM_CS_L_R<0>

RAM_A_R<5> RAM_A_R<11> RAM_WE_L_R

70C5

70D8

70D5

70D8

70D8

70D8

70D8

70D8

70D8

70D8

70D8

70D8 70D8

70C8

70C8

70C8

70C5

70D5

70C8

70C8

70C2

70D4

70C8 70C8 70D2

70D8 70D8 70C5

70D4

70D4

70D4

70D4

70D4

70D4

70D4

70D4

70D4 70D4

70C4

70C4

70C4

70C2

70D2

70C4

70C4

70A5

70B8

70C4 70C4 70B5

70D4 70D4 70C2

70B8

70B8

70B8

70B8

70B8

70B8

70B8

70B8

70B8 70B8

70A8

70A8

70A8

70A5

70A5

70A8

70A8

70A2

70B4

70A8 70A8 70B2

70B8 70A8 70A5

70B4

70B4

70B4

70B4

70B4

70B4

70B4

70B4

70B4 70B4

70A4

70A4

70A4

70A2

70A2

70A4

70A4

69C5

69D8

70A4 70A4 69D5

70B4 70A4 70A2

69D8

69D8

69D8

69D8

69D8

69D8

69D8

69D8

69D8 69D8

69C8

69C8

69C8

69C5

69D5

69C8

69C8

69C2

69D4

69C8 69C8 69D2

69D8 69D8 69C5

69D4

69D4

69D4

69D4

69D4

69D4

69D4

69D4

69D4 69D4

69C4

69C4

69C4

69C2

69D2

69C4

69C4

69A5

69B8

69C4 69C4 69B5

69D4 69D4 69C2

69B8

69B8

69B8

69B8

69B8

69B8

69B8

69B8

69B8 69B8

69A8

69A8

69A8

69A5

69A5

69A8

69A8

69A2

69B4

69A8 69A8 69B2

69B8 69A8 69A5

69B4

69B4

69B4

69B4

69B4

69B4

69B4

69B4

69B4 69B4

69A4

69A4

69A4

69A2

69A2

69A4

69A4

68A4

68A4

69A4 69A4 68A4

69B4 69A4 69A2

68D4

68D4

68D4

68D4

68D4

68D4

68D4

68D4

68D4 68D4

68D4

68D4

68D4

68B4

68C4

68C4

68C4

61B4

61B4

68D4 68C4 61B4

68D4 68D4 68B4

61A3

61A3

61A3

61A3

61A3

61A3

61A3

61A3

61A3 61A3

61A3

61A3

61A3

61A3

61A3

61A3

61A3

61A6

61A6

61A3 61A3 61A6

61A3 61A3 61A3 Preliminary

G

D

S

VREF

NC/CB1

NC/CB0

DQ17

VDD

A2

VDDQ

A5

A4

VDD

A7

A11

NC/ERR_L

NC/BA2

VDD

CKE0

VDDQ

VSS

NC/CB3

NC/CB2

VSS

DQS8_L

DQS8

VSS

VSS

DQ27

DQ26

VSS

DQS3_L

DQS3

VSS

DQ25

DQ24

VSS

DQ19

DQ18

DQS2

VSS

VSS

DQ11

DQ10

NC1

NC/RST_L

VSS

DQS1

DQS1_L

VSS

VSS

DQ3

DQ2

VSS

DQS0

DQS0_L

VSS

DQ1

DQ0

VSS

DQS2_L

VSS

DQ16

DQ8

DQ9

VDDQ

VSS

VSS

DQ4

VSS

DQ5

DM0/DQS9

VSS

NC/DQS9_L

DQ6

DQ7

VSS

DQ12

DQ13

DM1/DQS10

NC/DQS10_L

VSS

CK1/RFU

VSS

VSS

DQ14

CK1_L/RFU

DQ15

VSS

DQ20

VSS

DQ21

VSS

NC/DQS11_L

DM2/DQS11

DQ22

DQ23

DQ29

DQ28

VSS

DM3/DQS12

VSS

VSS

NC/DQS12_L

DQ30

DQ31

VSS

VSS

CB5

CB4

DM8/DQS17

NC/DQS17_L

VSS

NC/CB7

NC/CB6

VDDQ

VSS

CKE1

VDD

NC2

A12

NC3

VDDQ

A9

VDD

VDDQ

A6

A8

A1

A3

VDD

(1 OF 2)

KEY

CK0_L

SA1

SA0

VDDSPD

VSS

DQ63

VSS

DQ62

NC/DQS16_L

VSS

DM7/DQS16

DQ61

DQ60

VSS

DQ55

VSS

DQ54

NC/DQS15_L

DM6/DQS15

CK2/RFU

CK2_L/RFU

VSS

DQ53

VSS

DQ47

DQ52

VSS

VSS

DQ46

VSS

NC/DQS14_L

DM5/DQS14

DQ44

DQ45

VSS

DQ39

DQ38

DM4/DQS13

NC/DQS13_L

VSS

VSS

DQ37

VDD

VSS

DQ36

ODT0

NC/A13

S0_L

VDDQ

RAS_L

BA1

VDDQ

VDD

A0

VDD

CK0VSS

VSS

VDD

VDD

A10/AP

BA0

VDDQ

CAS_L

WE_L

VDDQ

S1_L

ODT1

VDDQ

VSS

DQ32

DQ33

DQS4

VSS

DQ34

DQ35

VSS

DQ40

DQ41

VSS

DQS5

DQS5_L

VSS

DQ42

DQ43

VSS

DQ48

VSS

SA2

NCTEST

VSS

DQS6

DQS6_L

DQ50

DQ51

VSS

DQ56

DQ57

VSS

DQS7

DQS7_L

VSS

DQ58

DQ59

VSS

SDA

SCL

VSS

NC/PAR_IN

DQ49

DQS4_L

VSS

KEY

(2 OF 2)

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

ODT

SA2

VDDQ=1.8V

VDDQ=1.8V

VDD=1.8V

VDD=1.8V

VDDQ=1.8V

VDD=1.8V

SA1

NC

DM7

NC

DM6

NC

NC

DM5

DM4

NC

NC

NC

ECC

ECC

ECC

ECC

ECC

ECC

NC

ECC

ECC

DM8

NC

ECC

ECC

DM3

NC

DM2

DM1

NC

VDD=1.8V

DM0

FOR REG DIMMS ONLY

ADDR=2 (A4/A5)

VDDQ=1.8V

516-0116

NC

PLACE CAPS CLOSE TO VDD/VDDQ PINS OF DIMM SOCKET

MF-LF

1%56.2

402

1/16W

2

1R6701

1%

MF-LF

56.2

402

1/16W

2

1R6702

6.3V

CERM

1UF10%

402

2

1 C6720

6.3V

0.22UF

X5R402

20%

2

1 C6722

6.3V

0.22UF

X5R402

20%

2

1 C6721

6.3V

0.22UF

X5R402

20%

2

1 C6719

MF-LF402

1%1/16W

4.7K

NOSTUFF

2

1R6700

NOSTUFF

SOT23-LF2N7002

2

1

3

Q6700

DDR2-DIMM

F-RT-TH

CRITICAL

26

23

20

17

14

11

169

166

163

160

157

8

154

151

148

145

142

139

136

133

130

127

5

124

121

50

47

44

41

38

35

32

29

2

1

181

175

170

62

56

51

184

178

172

64

59

53

174

173

19

18

55

126

45

46

165

156

147

135

168

167

49

48

43

42

54

36

37

27

28

15

16

6

7

13

12

129

128

123

122

159

158

10

153

152

40

39

34

33

150

149

144

143

9

31

30

25

24

141

140

132

131

22

21

4

3

164

155

146

134

125

171

52

138

137

162

161

177

179

58

18060

61

182

63

176

57

183

J6700

DDR2-DIMM

F-RT-TH

73

237

234

231

228

225

222

219

216

213

210

207

204

201

198

118

115

112

109

106

103

100

97

94

91

88

85

82

79

66

65

238

194

191

72

78

75

187

69

67

197

189

119

120

101

240

239

76

193

192

77

195

102

68

233

224

212

203

196

113

114

104

105

92

93

83

84

236

235

230

229

117

116

111

110

227

226

218

217

108

107

99

98

215

214

209

208

96

95

90

89

206

205

200

199

87

86

81

80

232

223

211

202

221

220

186

185

74

190

71

70

188

J6700

6.3V

0.22UF

X5R402

20%

2

1 C6713

6.3V

0.22UF

X5R402

20%

2

1 C6712

6.3V

0.22UF

X5R402

20%

2

1 C6711

20%6.3V

0.22UF

X5R402

2

1 C6710

6.3V

0.22UF

X5R402

20%

2

1 C6709

6.3V

0.22UF

X5R402

20%

2

1 C6708

6.3V

0.22UF

X5R402

20%

2

1 C6707

6.3V

0.22UF

X5R402

20%

2

1 C6706

6.3V

0.22UF

X5R402

20%

2

1 C6705

6.3V

0.22UF

X5R402

20%

2

1 C6704

6.3V

0.22UF

X5R402

20%

2

1 C6703

6.3V

0.22UF

X5R402

20%

2

1 C6702

6.3V

2.2UF

CERM1603

20%

2

1 C6714

6.3V

2.2UF

CERM1603

20%

2

1 C6701

6.3V

0.22UF

X5R

20%

402

2

1 C671510K

MF-LF402

5%1/16W

21

R6704

SYNC_DATE=05/19/2005SYNC_MASTER=FINO-RT

Memory Dimm A

67 154

07051-6863

RAM_DQ<77>

RAM_A<11>

RAM_A<4>RAM_DQ<127>

RAM_DQ<91>

RAM_DQS_P<11>

=PP1V8_PWRON_DIMM

RAM_DIMM_A_SA0

RAM_DIMM_A_CLK_N0

RAM_DQ<123>

RAM_DQ<121>

RAM_DQ<126>

RAM_DQ<125>

RAM_DQ<119>

RAM_DIMM_A_CLK_P2

RAM_DIMM_A_CLK_N2

RAM_DQ<116>

RAM_DQ<115>

RAM_DQ<110>

RAM_DQ<107>

RAM_DQ<108>

RAM_DQ<98>

RAM_DQ<97>

RAM_ODT_DIMM_A

RAM_A<0>

RAM_DIMM_A_CLK_P0

RAM_A<10>

RAM_BA<0>

RAM_CAS_L

RAM_WE_L

RAM_CS_DIMM_B

RAM_DQ<100>

RAM_DQ<102>

RAM_DQS_P<12>

RAM_DQ<96>

RAM_DQ<111>

RAM_DQ<105>

RAM_DQS_P<13>

RAM_DQS_N<13>

RAM_DQ<109>

RAM_DQ<104>

RAM_DQ<117>

RAM_DQS_P<14>

RAM_DQS_N<14>

RAM_DQ<118>

RAM_DQ<122>

RAM_DQS_P<15>

RAM_DQS_N<15>

RAM_DQ<124>

RAM_DQ<120>

RAM_DQ<114>

RAM_DQS_N<12>

RAM_DQ<113>

RAM_CS_DIMM_A

RAM_A<2>

RAM_A<5>

RAM_BA<2>

RAM_CKE_DIMM_A

RAM_DQ<82>

RAM_DQ<80>

RAM_DQS_N<10>

RAM_DQS_P<10>

RAM_DQ<81>

RAM_DQ<87>

RAM_DQ<76>

RAM_DQ<66>

RAM_DQS_P<8>

RAM_DQS_N<8>

RAM_DQ<90>

RAM_DQS_N<11>

RAM_DQS_N<9>

RAM_DQ<67>

RAM_DQ<71>

RAM_DQ<88>

RAM_DQ<95>

RAM_DQ<89>

RAM_DQ<94>

RAM_DQ<70>

RAM_DQ<69>

RAM_DIMM_A_CLK_P1

RAM_DQ<68>

RAM_DIMM_A_CLK_N1

RAM_DQ<64>

RAM_DQ<79>

RAM_DQ<72>

RAM_DQ<83>

RAM_DQ<86>

RAM_DQ<84>

RAM_DQ<85>

RAM_A<15>

RAM_A<12>

RAM_A<9>

RAM_A<6>

RAM_A<8>

RAM_A<1>

RAM_A<3>

SMU_IO_RESET

I2C_NB_RAM_SCL

RAM_DQ<74>

=PP1V8_PWRON_RAM_I2C_VDD

RAM_DQ<106>

RAM_DQ<101>

RAM_A<7>

RAM_A<13>

RAM_DIMM_RST_L

RAM_DQ<65>

RAM_CKE_DIMM_B

RAM_A<14>

RAM_DQ<73>

RAM_DQ<75>

RAM_DQ<99>

RAM_RAS_L

RAM_BA<1>

RAM_DQ<103>

RAM_DQ<112>

I2C_NB_RAM_SDA

RAM_DQS_P<9>

RAM_DQ<93>

=PP1V8_PWRON_DIMM

RAM_DQ<78>

RAM_DQ<92>MIN_NECK_WIDTH=0.25MM

MIN_LINE_WIDTH=1MMRAM_DIMM_VREF

70

70

68

68

69

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

69

61

61

61 61

61

61

67

62

61

61

61

61

61

62

62

61

61

61

61

61

61

61

61

62

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

62

61

62

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

67

61

61

59

59

59 59

59

59

7

61

59

59

59

59

59

61

61

59

59

59

59

59

59

59

61

59

61

59

59

59

59

61

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

61

59

59

59

61

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

59

61

59

61

59

59

59

59

59

59

59

59

59

59

59

59

59

59

30

39

59

7

59

59

59

59

59

61

59

59

59

59

59

59

59

59

39

59

59

7

59

59

Preliminary

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TO SIMULATE ECCPRIOR TO BRANCHPLACE NEAR KODIAK

ONBOARD MEMORY SHOULD FOLLOW SPEC FOR RAW CARD VERSION A

VIAS FOR ECC STUB

VIAS FOR ECC STUB

PLACE AT END POINT

24PF

50V

402C0G

5%

21

C6870

50VC0G402

24PF

5%

21

C6880

50VC0G402

24PF

5%

21

C6890

402-1

2PF

C0G50V

+/-0.25PF

21

C6871

+/-0.25PF50VC0G

2PF

402-1

21

C6881

402-1

2PF

C0G50V

+/-0.25PF

21

C6891

1 ZT6800

1 ZT6801

1 ZT6815

1 ZT6814

1 ZT6813

1 ZT6812

1 ZT6811

1 ZT6810

1 ZT6809

1 ZT6808

1 ZT6807

1 ZT6806

1 ZT6805

1 ZT6804

1 ZT6803

1 ZT6802

1 ZT6820

1 ZT6821

1 ZT6822

1 ZT6825

1 ZT6827

1 ZT6826

5.1 81 RP6820

5.1 72 RP6820

5.1 63 RP6820

5.1 54 RP6820

5.1 81 RP6821

5.1 72 RP6821

5.1 63 RP6821

5.1 54 RP6821

5.1 81 RP6822

5.1 72 RP6822

5.1 63 RP6822

5.1 54 RP6822

5.1 81 RP6823

5.1 72 RP6823

5.1 81 RP6824

5.1 72 RP6824

5.1 63 RP6824

5.1 54 RP6824

5.1 81 RP6825

5.1 63 RP6825

5.1 72 RP6825

5.1 54 RP6825

22 63 RP6800

22 72 RP6801

22 72 RP6814

22 54 RP6815

22 81 RP6814

22 63 RP6815

22 81 RP6815

22 54 RP6814

22 72 RP6815

22 63 RP6814

22 72 RP6812

22 63 RP6813

22 81 RP6812

22 54 RP6813

22 81 RP6813

22 54 RP6812

22 72 RP6813

22 63 RP6812

22 81 RP6810

22 63 RP6811

22 72 RP6810

22 54 RP6811

22 81 RP6811

22 54 RP6810

22 72 RP6811

22 63 RP6810

22 81 RP6808

22 63 RP6809

22 63 RP6808

22 54 RP6809

22 81 RP6809

22 54 RP6808

22 72 RP6809

22 72 RP6808

22 81 RP6806

22 63 RP6807

22 72 RP6806

22 54 RP6807

22 81 RP6807

22 54 RP6806

22 72 RP6807

22 63 RP6806

22 72 RP6804

22 63 RP6805

22 81 RP6804

22 54 RP6805

22 81 RP6805

22 54 RP6804

22 72 RP6805

22 63 RP6804

22 81 RP6802

22 63 RP6803

22 72 RP6802

22 54 RP6803

22 81 RP6803

22 54 RP6802

22 72 RP6803

22 63 RP6802

22 81 RP6800

22 63 RP6801

22 72 RP6800

22 54 RP6801

22 81 RP6801

22 54 RP6800

22 21 R681022 21 R6800

22 21 R680122 21 R681122 21 R680222 21 R681222 21 R680322 21 R681322 21 R6804

22 21 R680622 21 R681522 21 R680522 21 R6814

22 21 R6816

22 21 R681722 21 R6807

MLB Mem Series TermSYNC_MASTER=FINO-RT

07

15468

051-6863


RAM_WE_L

RAM_DQ_R<38>

RAM_DQ_R<27>

RAM_DQ_R<0>

RAM_A<13> RAM_A_R<13>

RAM_WE_L_R

RAM_CAS_L RAM_CAS_L_R

RAM_RAS_L RAM_RAS_L_R

RAM_BA<0> RAM_BA_R<0>



RAM_A<0> RAM_A_R<0>

RAM_A<2> RAM_A_R<2>

RAM_A<1> RAM_A_R<1>

RAM_A<3> RAM_A_R<3>

RAM_A<4> RAM_A_R<4>

RAM_A<5> RAM_A_R<5>

RAM_A<6> RAM_A_R<6>

RAM_A<8> RAM_A_R<8>

RAM_A<7> RAM_A_R<7>


RAM_A<9> RAM_A_R<9>





RAM_DQS_N_R<0>

RAM_DQS_P<2>

RAM_DQS_P_R<0>RAM_DQS_P<0>

RAM_DQS_N<0>


RAM_DQS_N_R<1>RAM_DQS_N<1>

RAM_DQS_P_R<2>












RAM_DQ_R<9>RAM_DQ<9>















































RAM_DQ<0>







RAM_DQ<27>




RAM_DQ<38>






RAM_CKE_R<0>

RAM_CS_L_R<0>

RAM_ODT_R<0>

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

69

70

70

67

70

67 69

69

67 69

67 69

67 69

67 69

67 69

67 69

67 69

67 69

67 69

67 69

67 69

67 69

67 69

67 69

67 69

67 69

67 69

67 69

67 69

67 69

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

70

70

63

69

69

61

61

69

69

61 63

63

61 63

61 63

61 63

61 63

61 63

61 63

61 63

61 63

61 63

61 63

61 63

61 63

61 63

61 63

61 63

61 63

61 63

61 63

61 63

61 63

69

61

69 61

61

69 61

69 61

69

69 61

69 61

69 61

70 61

70 61

70 61

70 61

70 61

70 61

70 61

70 61

69 61

61 61

70 61

61 61

61 61

61 61

61 61

70 61

61 61

61 61

61 61

61 61

61 61

61 61

61 61

61 61

61 61

70 61

61 61

61 61

61 61

70 61

61 61

61 61

61 61

61 61

61 61

61 61

61 61

61 61

61 61

69 61

61 61

61 61

61 61

61 61

69 61

61 61

61 61

61 61

61 61

61 61

61 61

61 61

61 61

61 61

61 61

61

69 61

61 61

61 61

61 61

61 61

69 61

61

61 61

69 61

70 61

61

61 61

70 61

70 61

61 61

70 61

61

63

63

59

6

61

61

59 61

61

59 61

59 61

59 61

59 61

59 61

59 61

59 61

59 61

59 61

59 61

59 61

59 61

59 61

59 61

59 61

59 61

59 61

59 61

59 61

59 61

61

59

61 59

59

61 59

61 59

61

61 59

61 59

61 59

61 59

61 59

61 59

61 59

61 59

61 59

61 59

61 59

61 59

6 59

61 59

6 59

6 59

6 59

6 59

61 59

6 59

6 59

6 59

6 59

6 59

6 59

6 59

6 59

6 59

61 59

6 59

6 59

6 59

61 59

6 59

6 59

6 59

6 59

6 59

6 59

6 59

6 59

6 59

61 59

6 59

6 59

6 59

6 59

61 59

6 59

6 59

6 59

6 59

6 59

6 59

6 59

6 59

6 59

6 59

59

61 59

6 59

6 59

6 59

6 59

61 59

59

6 59

61 59

61 59

59

6 59

61 59

61 59

6 59

61 59

70

61

61 Prelim

inary

DQS

VSSQVSSVSSDL

NC/BA2BA1

A2

NC/A15NC/A14NC/A13 WE*

CAS*RAS*

CS*

VDDQVDDL

A12

A1

A3A4A5A6A7A8A9A10A11

BA0

DQ6DQ7

ODT

VREF

DQ0DQ1DQ2DQ3DQ4DQ5

VDD

DQS*

DM/RDQSNU/RDQS*

CKCK*

CKE

A0

DQS

VSSQVSSVSSDL

NC/BA2BA1

A2


CAS*RAS*

CS*

VDDQVDDL

A12

A1


BA0

DQ6DQ7

ODT

VREF

DQ0DQ1DQ2DQ3DQ4DQ5

VDD

DQS*

DM/RDQSNU/RDQS*

CKCK*

CKE

A0

DQS

VSSQVSSVSSDL

NC/BA2BA1

A2


CAS*RAS*

CS*

VDDQVDDL

A12

A1


BA0

DQ6DQ7

ODT

VREF

DQ0DQ1DQ2DQ3DQ4DQ5

VDD

DQS*

DM/RDQSNU/RDQS*

CKCK*

CKE

A0

DQS

VSSQVSSVSSDL

NC/BA2BA1

A2


CAS*RAS*

CS*

VDDQVDDL

A12

A1


BA0

DQ6DQ7

ODT

VREF

DQ0DQ1DQ2DQ3DQ4DQ5

VDD

DQS*

DM/RDQSNU/RDQS*

CKCK*

CKE

A0

TABLE_5_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_5_ITEM



OTHERWISE 1PFINCREASE TO 2PF FOR NON-ECC

TERM RESISTOR FOR ECC STUB

CHECK DECOUPLING - TRY TO MATCH SINGLE RANK DIMM

TERM RESISTOR FOR DRAM

VIAS TO SIMULATE ECC STUB

DOES VDDL NEED A SPECIAL FILTER?

402CERM

1UF10%6.3V

2

1 C6900

805

20%10VCERM

2.2UF

2

1 C6901

805

2.2UF20%10VCERM2

1 C6911

CERM402

10%1UF6.3V2

1 C6910

805

2.2UF20%10VCERM2

1 C6921

CERM402

1UF10%6.3V2

1 C6920

805

2.2UF20%10VCERM2

1 C6931

CERM402

1UF10%6.3V2

1 C6930

200

21R6909

2PF21

C6909

200

21

R6919

2PF21

C6919

200

21

R6939

2PF21

C6939200

21

R6929

2PF21

C6929 402MF-LF

1%56.21/16W

2

1R6926

56.21%1/16WMF-LF4022

1R6925

200

21

R6914

200

21

R6934

1 ZT6900

1ZT6910

1ZT6930

1 ZT6920

CSP

SDRAM-64MX8-DDR2-533

OMIT

NT5TU64M8AE-37B

F3

D8

D2

B8

B2

A7

E7

K9

J1

E3

A3

E2

C9

C7

C3

C1

A9

E1

L1

H9

E9

A1

F7

F9

A2

G1

L7

L3

L8

A8

B7

B9

B1

D9

D1

D3

D7

C2

C8

B3

G8

F2

F8

E8

G7

G3

G2

K3

K8

K2

J7

J3

J8

J2

H7

L2

K7

H2

H3

H8 U6900

CSPNT5TU64M8AE-37B


OMIT

F3

D8

D2

B8

B2

A7

E7

K9

J1

E3

A3

E2

C9

C7

C3

C1

A9

E1

L1

H9

E9

A1

F7

F9

A2

G1

L7

L3

L8

A8

B7

B9

B1

D9

D1

D3

D7

C2

C8

B3

G8

F2

F8

E8

G7

G3

G2

K3

K8

K2

J7

J3

J8

J2

H7

L2

K7

H2

H3

H8 U6920

CSPNT5TU64M8AE-37B


OMIT

F3

D8

D2

B8

B2

A7

E7

K9

J1

E3

A3

E2

C9

C7

C3

C1

A9

E1

L1

H9

E9

A1

F7

F9

A2

G1

L7

L3

L8

A8

B7

B9

B1

D9

D1

D3

D7

C2

C8

B3

G8

F2

F8

E8

G7

G3

G2

K3

K8

K2

J7

J3

J8

J2

H7

L2

K7

H2

H3

H8 U6910

CSP

SDRAM-64MX8-DDR2-533NT5TU64M8AE-37B

OMIT

F3

D8

D2

B8

B2

A7

E7

K9

J1

E3

A3

E2

C9

C7

C3

C1

A9

E1

L1

H9

E9

A1

F7

F9

A2

G1

L7

L3

L8

A8

B7

B9

B1

D9

D1

D3

D7

C2

C8

B3

G8

F2

F8

E8

G7

G3

G2

K3

K8

K2

J7

J3

J8

J2

H7

L2

K7

H2

H3

H8 U6930

402X5R6.3V20%0.22UF

2

1 C69020.22UF20%6.3VX5R402

2

1 C6903

402X5R6.3V20%0.22UF

2

1 C6904

402X5R6.3V20%0.22UF

2

1 C69140.22UF20%6.3VX5R402

2

1 C6913

402X5R6.3V20%0.22UF

2

1 C6912

402X5R6.3V20%0.22UF

2

1 C69220.22UF20%6.3VX5R402

2

1 C6923

402X5R6.3V20%0.22UF

2

1 C69240.22UF20%6.3VX5R402

2

1 C6932

402X5R6.3V20%0.22UF

2

1 C69330.22UF20%6.3VX5R402

2

1 C6934

1ZTCLK0_R_P

1ZTCLK0_P

1ZTCLK0_N

1ZTCLK0_L_P

1 ZTCLK0_R_N

1ZTCLK0_M_P

1 ZTCLK0_L_N

1 ZTCLK0_M_N

1ZTCLK2_N

1ZTCLK2_P

1ZTCLK2_R_P 1 ZTCLK2_R_N

1 ZTCLK2_M_N

1 ZTCLK2_L_N

1ZTCLK2_M_P

1ZTCLK2_L_P

4 U7040,U7050,U7060,U7070IC,SDRAM,DDR2,512MBIT,X8333T0032

051-6863 07

15469

SYNC_MASTER=FINO-RT

On-Board DDR SDRAMSYNC_DATE=05/19/2005

U6900,U6910,U6920,U69304 IC,SDRAM,DDR2,512MBIT,X8333T0032

=PP1V8_PWRON_DIMM

=PP1V8_PWRON_DIMM=PP1V8_PWRON_DIMM

RAM_RAS_L_R

RAM_BA_R<2>

RAM_DQ_R<5>

PPVREF_RAM_ONBOARD_0123

PPVREF_RAM_ONBOARD_0123PPVREF_RAM_ONBOARD_0123

RAM_DQ_R<0>

RAM_DQ_R<1>

RAM_DQ_R<3>

RAM_DQ_R<6>

RAM_DQS_N_R<0>

RAM_DQS_P_R<0>

RAM_A_R<2>

RAM_WE_L_R

RAM_CAS_L_R

RAM_A_R<0>

RAM_A_R<4>

RAM_A_R<6>

RAM_A_R<7>

RAM_A_R<8>

RAM_A_R<9>

RAM_DQ_R<7>

RAM_DQ_R<2>

RAM_DQS_N_R<2>

RAM_DQS_P_R<2>

RAM_BA_R<2>

RAM_BA_R<1>

RAM_A_R<2>

RAM_A_R<15>

RAM_A_R<14>

RAM_A_R<13>

RAM_CS_L_R<0>

RAM_CKE_R<0>

RAM_A_R<12>

RAM_A_R<1>

RAM_A_R<3>

RAM_A_R<4>

RAM_A_R<5>

RAM_A_R<6>

RAM_A_R<8>

RAM_A_R<9>

RAM_A_R<11>

RAM_BA_R<0>

RAM_DQ_R<21>

RAM_ODT_R<0>

MIN_LINE_WIDTH=1MMPPVREF_RAM_ONBOARD_0123

RAM_DQ_R<22>

RAM_DQ_R<16>

RAM_DQ_R<20>

RAM_DQ_R<19>

RAM_DQ_R<18>

RAM_DQS_N_R<1>

RAM_DQS_P_R<1>

RAM_BA_R<2>

RAM_BA_R<1>

RAM_A_R<2>

RAM_A_R<15>

RAM_A_R<14>

RAM_WE_L_R

RAM_CAS_L_R

RAM_RAS_L_R

RAM_CS_L_R<0>

RAM_CKE_R<0>

RAM_A_R<12>

RAM_A_R<0>

RAM_A_R<1>

RAM_A_R<3>

RAM_A_R<4>

RAM_A_R<5>

RAM_A_R<6>

RAM_A_R<7>

RAM_A_R<8>

RAM_A_R<10>

RAM_A_R<11>

RAM_BA_R<0>

RAM_DQ_R<11>

RAM_DQ_R<9>

RAM_ODT_R<0>

RAM_DQ_R<12>

RAM_DQ_R<8>

RAM_DQ_R<14>

RAM_DQ_R<15>

RAM_DQ_R<13>

RAM_DQ_R<10>

RAM_DQS_N_R<3>

RAM_DQS_P_R<3>

RAM_BA_R<1>

RAM_A_R<2>

RAM_A_R<15>

RAM_A_R<14>

RAM_A_R<13> RAM_WE_L_R

RAM_CAS_L_R

RAM_RAS_L_R

RAM_CS_L_R<0>

RAM_CKE_R<0>

RAM_A_R<12>

RAM_A_R<0>

RAM_A_R<4>

RAM_A_R<5>

RAM_A_R<6>

RAM_A_R<7>

RAM_A_R<8>

RAM_A_R<9>

RAM_A_R<10>

RAM_A_R<11>

RAM_BA_R<0>

RAM_DQ_R<26>

RAM_DQ_R<24>

RAM_ODT_R<0>

RAM_DQ_R<28>

RAM_DQ_R<29>

RAM_DQ_R<31>

RAM_DQ_R<25>

RAM_DQ_R<27>

RAM_A_R<3> RAM_DQ_R<30>

RAM_DQ_R<23>

RAM_A_R<13>

RAM_DQ_R<17>

RAM_A_R<1>

RAM_A_R<9>RAM_DQ_R<4>

RAM_CS_L_R<0>

RAM_RAS_L_R

=PP1V8_PWRON_DIMM

RAM_CKE_R<0>

RAM_A_R<1>

RAM_A_R<3>

RAM_A_R<5>

RAM_A_R<13>

RAM_A_R<10>

RAM_A_R<11>

RAM_A_R<12>

RAM_A_R<15>

RAM_A_R<14>

RAM_BA_R<0>

RAM_BA_R<1>

RAM_ODT_R<0>



RAM_A_R<7>



RAM_A_R<0>

RAM_A_R<10>



RAM_BA_R<2>



RAM_CAS_L_R

RAM_WE_L_R

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70 70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70 70

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69 69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

70

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69 69

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68 68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68 68

68

68

68

68

68

68

69

68

68

68

68

68

68

68

68

68

68

68

68

68

69

69

68

69

69

68

68

69

69

68

69

69

68

68

67

67 67

63

63

61

68

61

61

61

68

68

63

63

63

63

63

63

63

63

63

61

61

68

68

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

61

63

61

61

61

61

68

68

68

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

61

68

63

61

61

61

68

61

61

68

68

63

63

63

63

63 63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

61

61

63

61

61

68

61

68

63 61

68

63

61

63

63 68

63

63

67

63

63

63

63

63

63

63

63

63

63

63

63

63

62

62

63

62

62

63

63

62

62

63

62

62

63

63

7

7 7

61

61

6

69

69 69

61

6

6

6

61

61

61

61

61

61

61

61

61

61

61

6

6

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

6

61

69

6

6

6

6

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

6

61

61

6

6

6

61

6

6

61

61

61

61

61

61

61 61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

6

6

61

6

6

61

6

61

61 6

61

61

6

61

61 61

61

61

7

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61 Preliminary

DQS

VSSQVSSVSSDL

NC/BA2BA1

A2


CAS*RAS*

CS*

VDDQVDDL

A12

A1


BA0

DQ6DQ7

ODT

VREF

DQ0DQ1DQ2DQ3DQ4DQ5

VDD

DQS*

DM/RDQSNU/RDQS*

CKCK*

CKE

A0

DQS

VSSQVSSVSSDL

NC/BA2BA1

A2


CAS*RAS*

CS*

VDDQVDDL

A12

A1


BA0

DQ6DQ7

ODT

VREF

DQ0DQ1DQ2DQ3DQ4DQ5

VDD

DQS*

DM/RDQSNU/RDQS*

CKCK*

CKE

A0

DQS

VSSQVSSVSSDL

NC/BA2BA1

A2


CAS*RAS*

CS*

VDDQVDDL

A12

A1


BA0

DQ6DQ7

ODT

VREF

DQ0DQ1DQ2DQ3DQ4DQ5

VDD

DQS*

DM/RDQSNU/RDQS*

CKCK*

CKE

A0

DQS

VSSQVSSVSSDL

NC/BA2BA1

A2


CAS*RAS*

CS*

VDDQVDDL

A12

A1


BA0

DQ6DQ7

ODT

VREF

DQ0DQ1DQ2DQ3DQ4DQ5

VDD

DQS*

DM/RDQSNU/RDQS*

CKCK*

CKE

A0

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

CHECK DECOUPLING - TRY TO MATCH SINGLE RANK DIMM

DOES VDDL NEED A SPECIAL FILTER?

1 ZTCLK4_L_N1ZTCLK4_L_P

1ZTCLK4_N

1ZTCLK4_P

1ZTCLK6_N

1ZTCLK6_P

CERM402

1UF10%6.3V

2

1 C7050

CERM10V20%2.2UF

8052

1 C7071

402CERM

1UF10%6.3V2

1 C7070

805CERM

2.2UF20%10V

2

1 C7041

CERM

10%1UF

402

6.3V2

1 C7040

805

20%10VCERM

2.2UF

2

1 C7061

402CERM

1UF10%6.3V2

1 C7060

200

21

R7049

2PF21

C7049

200

21

R7069

2PF21

C7069

200

21

R7059

2PF21

C7059

200

21

R7079

2PF21

C7079

200

21

R7074

1ZT7070

1 ZT7060

CSP


OMIT

F3

D8

D2

B8

B2

A7

E7

K9

J1

E3

A3

E2

C9

C7

C3

C1

A9

E1

L1

H9

E9

A1

F7

F9

A2

G1

L7

L3

L8

A8

B7

B9

B1

D9

D1

D3

D7

C2

C8

B3

G8

F2

F8

E8

G7

G3

G2

K3

K8

K2

J7

J3

J8

J2

H7

L2

K7

H2

H3

H8 U7060

CSPNT5TU64M8AE-37B

OMIT


F3

D8

D2

B8

B2

A7

E7

K9

J1

E3

A3

E2

C9

C7

C3

C1

A9

E1

L1

H9

E9

A1

F7

F9

A2

G1

L7

L3

L8

A8

B7

B9

B1

D9

D1

D3

D7

C2

C8

B3

G8

F2

F8

E8

G7

G3

G2

K3

K8

K2

J7

J3

J8

J2

H7

L2

K7

H2

H3

H8 U7040

CSPNT5TU64M8AE-37B


OMIT

F3

D8

D2

B8

B2

A7

E7

K9

J1

E3

A3

E2

C9

C7

C3

C1

A9

E1

L1

H9

E9

A1

F7

F9

A2

G1

L7

L3

L8

A8

B7

B9

B1

D9

D1

D3

D7

C2

C8

B3

G8

F2

F8

E8

G7

G3

G2

K3

K8

K2

J7

J3

J8

J2

H7

L2

K7

H2

H3

H8 U7050

CSP


OMIT

F3

D8

D2

B8

B2

A7

E7

K9

J1

E3

A3

E2

C9

C7

C3

C1

A9

E1

L1

H9

E9

A1

F7

F9

A2

G1

L7

L3

L8

A8

B7

B9

B1

D9

D1

D3

D7

C2

C8

B3

G8

F2

F8

E8

G7

G3

G2

K3

K8

K2

J7

J3

J8

J2

H7

L2

K7

H2

H3

H8 U7070

402MF-LF1/16W1%56.2

2

1R7055

56.21%1/16WMF-LF4022

1R7056

1ZT7050

200

21

R7054

1 ZT7040

402X5R6.3V20%0.22UF

2

1 C7042

402X5R6.3V20%0.22UF

2

1 C7043

CERM10V20%2.2UF

8052

1 C7051

402X5R6.3V20%0.22UF

2

1 C7044

402X5R6.3V20%0.22UF

2

1 C7054

402X5R6.3V20%0.22UF

2

1 C7053

402X5R6.3V20%0.22UF

2

1 C7052

402X5R6.3V20%0.22UF

2

1 C7062

402X5R6.3V20%0.22UF

2

1 C7063

402X5R6.3V20%0.22UF

2

1 C70640.22UF20%6.3VX5R402

2

1 C70720.22UF20%6.3VX5R402

2

1 C70730.22UF20%6.3VX5R402

2

1 C7074

1 ZTCLK4_M_N

1 ZTCLK4_R_N

1ZTCLK4_M_P

1ZTCLK4_R_P

1 ZTCLK6_M_N

1 ZTCLK6_L_N

1ZTCLK6_M_P

1ZTCLK6_L_P

1 ZTCLK6_R_N1ZTCLK6_R_P

051-6863 07

15470

SYNC_MASTER=FINO-RT

On-Board DDR SDRAMSYNC_DATE=05/19/2005





=PP1V8_PWRON_DIMM





RAM_A_R<9>

RAM_A_R<12>

RAM_BA_R<2>

RAM_BA_R<1>

RAM_DQ_R<39>

RAM_RAS_L_R

RAM_DQS_P_R<6>

RAM_DQ_R<38>

RAM_DQ_R<62>

RAM_DQ_R<60>

RAM_DQ_R<61>

RAM_DQ_R<58>

RAM_DQ_R<56>

RAM_DQ_R<59>

RAM_ODT_R<0>

RAM_DQ_R<57>

RAM_DQ_R<63>

RAM_BA_R<0>

RAM_A_R<11>

RAM_A_R<10>

RAM_A_R<9>

RAM_A_R<8>

RAM_A_R<7>

RAM_A_R<6>

RAM_A_R<5>

RAM_A_R<4>

RAM_A_R<3>

RAM_A_R<1>

RAM_A_R<0>

RAM_A_R<12>

RAM_CKE_R<0>

RAM_CS_L_R<0>

RAM_RAS_L_R

RAM_CAS_L_R

RAM_WE_L_RRAM_A_R<13>

RAM_A_R<14>

RAM_A_R<15>

RAM_A_R<2>

RAM_BA_R<2>

RAM_DQS_P_R<7>

RAM_DQS_N_R<7>

RAM_DQ_R<42>

RAM_DQ_R<43>

RAM_DQ_R<47>

RAM_DQ_R<46>

RAM_DQ_R<45>

RAM_DQ_R<41>

RAM_ODT_R<0>

RAM_DQ_R<44>

RAM_DQ_R<40>

RAM_BA_R<0>

RAM_A_R<11>

RAM_A_R<10>

RAM_A_R<9>

RAM_A_R<8>

RAM_A_R<7>

RAM_A_R<6>

RAM_A_R<5>

RAM_A_R<4>

RAM_A_R<3>

RAM_A_R<1>

RAM_A_R<0>

RAM_A_R<12>

RAM_CKE_R<0>

RAM_CS_L_R<0>

RAM_RAS_L_R

RAM_CAS_L_R


RAM_A_R<14>

RAM_A_R<15>

RAM_BA_R<1>

RAM_BA_R<2>

RAM_DQS_P_R<5>

RAM_DQS_N_R<5>

RAM_DQ_R<35>

RAM_DQ_R<37>

RAM_DQ_R<36>

RAM_DQ_R<34>

RAM_ODT_R<0>

RAM_DQ_R<32>

RAM_BA_R<0>

RAM_A_R<11>

RAM_A_R<10>

RAM_A_R<8>

RAM_A_R<7>

RAM_A_R<6>

RAM_A_R<5>

RAM_A_R<4>

RAM_A_R<3>

RAM_A_R<1>

RAM_A_R<0>

RAM_CKE_R<0>

RAM_CS_L_R<0>

RAM_CAS_L_R

RAM_WE_L_R

RAM_A_R<14>

RAM_A_R<15>

RAM_A_R<2>

RAM_DQS_P_R<4>

RAM_DQ_R<51>

RAM_DQ_R<54>

RAM_DQ_R<55>

RAM_DQ_R<50>

RAM_DQ_R<48>

RAM_DQ_R<52>

RAM_ODT_R<0>

RAM_DQ_R<53>

RAM_DQ_R<49>

RAM_BA_R<0>

RAM_A_R<11>

RAM_A_R<10>

RAM_A_R<9>

RAM_A_R<8>

RAM_A_R<7>

RAM_A_R<6>

RAM_A_R<5>

RAM_A_R<4>

RAM_A_R<3>

RAM_A_R<1>

RAM_A_R<0>

RAM_A_R<12>

RAM_CKE_R<0>

RAM_CS_L_R<0>

RAM_RAS_L_R

RAM_CAS_L_R


RAM_A_R<14>

RAM_A_R<15>

RAM_A_R<2>

RAM_BA_R<1>

RAM_BA_R<2>

RAM_DQS_N_R<6>

PPVREF_RAM_ONBOARD_4567MIN_LINE_WIDTH=1MM


RAM_DQ_R<33>

RAM_A_R<2>



RAM_BA_R<1>

RAM_A_R<13>

RAM_DQS_N_R<4>

=PP1V8_PWRON_DIMM

=PP1V8_PWRON_DIMM =PP1V8_PWRON_DIMM

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70 70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70 70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70

70 70

70

70

70

70

70

70

70

70

70

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69 69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69 69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69

69 69

69

69

69

69

69

69

69

69

70

70 70

70

70

70

70

69

70

70

70

70

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68 68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68 68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68

68 68

68

68

68

68

68

68

68

68

68

69

69 69

62

62

62

62

67

62

62

62

62

63

63

63

63

61

63

68

61

68

61

68

61

61

61

63

61

61

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63 63

63

63

63

63

68

68

68

61

68

61

61

61

63

61

61

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63 63

63

63

63

63

68

68

68

68

61

61

63

61

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

68

68

61

68

61

61

61

63

61

61

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63

63 63

63

63

63

63

63

68

61

63

63

63

68

67

67 67

61

61

61

61

7

61

61

61

61

61

61

61

61

6

61

61

6

61

6

61

6

6

6

61

6

6

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61 61

61

61

61

61

61

61

61

6

61

6

6

6

61

6

6

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61 61

61

61

61

61

61

61

61

61

6

6

61

6

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

6

61

6

6

6

61

6

6

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61

61 61

61

61

61

61

61

61

70

70

6

61

70

70

61

61

61

7

7 7

Preliminary

PCIE_AVDD_0 PCIE_REFCLK_AVDDA PCIE_REFCLK_AVDDB

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_GND

PCIE_UCAL_RES0

PCIE_UCAL_RES1

PCIE_PRESENTN

PCIE_HSIP14

PCIE_HSIN15

PCIE_HSIP15

PCIE_HSIP13

PCIE_HSIN14

PCIE_HSIN12

PCIE_HSIP12

PCIE_HSIN13

PCIE_HSIN11

PCIE_HSIP11

PCIE_HSIP9

PCIE_HSIN10

PCIE_HSIP10

PCIE_HSIP8

PCIE_HSIN9

PCIE_HSIN8

PCIE_HSIP7

PCIE_HSIN7

PCIE_HSIN6

PCIE_HSIP5

PCIE_HSIP6

PCIE_HSIN5

PCIE_HSIP4

PCIE_HSIP3

PCIE_HSIN3

PCIE_HSIN4

PCIE_HSIP2

PCIE_HSIN2

PCIE_HSIN1

PCIE_REFCLK_N

PCIE_HSIN0

PCIE_VDD

PCIE_VDD

PCIE_REFCLK_P

PCIE_VDD

PCIE_VDD

PCIE_VDD

PCIE_VDD

PCIE_VDD

PCIE_VDD

PCIE_VDD

PCIE_VDD

PCIE_VDD

PCIE_VDD

PCIE_VDD

PCIE_AVREG_0

PCIE_AVREG_1

PCIE_AVREG_2

PCIE_HSOP14

PCIE_HSON15

PCIE_HSOP15

PCIE_HSON14

PCIE_HSOP13

PCIE_HSON12

PCIE_HSOP12

PCIE_HSON13

PCIE_HSOP11

PCIE_HSON11

PCIE_HSOP9

PCIE_HSON10

PCIE_HSOP10

PCIE_HSOP8

PCIE_HSON9

PCIE_HSON8

PCIE_HSON7

PCIE_HSOP7

PCIE_HSON6

PCIE_HSOP5

PCIE_HSOP6

PCIE_HSON5

PCIE_HSOP4

PCIE_HSON3

PCIE_HSOP3

PCIE_HSON4

PCIE_HSON2

PCIE_HSOP2

PCIE_HSON1

PCIE_HSOP0

PCIE_HSOP1

PCIE_HSON0

PCIE_VDD

PCIE_VDD

PCIE_VDD

PCIE_VDD

PCIE_VDD

PCIE_VDD

PCIE_VDD

PCIE_VDD

PCIE_VDD

PCIE_VDD

PCIE_VDD

PCIE_VDD

PCIE_VDD

PCIE_HSIP1

PCIE_AVDD_1

PCIE_HSIP0

AVDD_0_GND AVDD_1_GND AVDD_2_GND REFCLK_AGNDA REFCLK_AGNDB REFCLK_AGND2

PCIE_REFCLK_AVDD2PCIE_AVDD_2

PCI-E X16 INTERFACE

(5 OF 10)

SERDES

(1.65V-2.75V) (1.65V-2.75V)

SERDES

(1.65V-2.75V)

PLL

(1.65V-2.75V)(1.65V-2.75V)

PLL

(1.65V-2.75V)

PLL

(DNU)

SERDES

(1.6V-1.2V) (1.6V-1.2V)

PP

PP

DRAWING

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

KODIAK PCI-E100MHZ REFCLK

100+100-

(LOCATE CLOSE TO INPUT PINS)

KODIAK PCIE REFCLKTERMINATION

KODIAK PCI-E DECOUPLING

KODIAK PCI-E DECOUPLING

(THIS PAGE)

(THIS PAGE)

(THIS PAGE)

PAGE 82

(THIS PAGE)

(THIS PAGE, X3)

(100MHZ)

(THIS PAGE, X3)

(THIS PAGE)

(THIS PAGE)

5

KODIAK AVDD FILTERING

(LOCATE CLOSE TO POWER AND GROUND PINS)



KODIAK PCI-E AC COUPLERS(LOCATE NEAR SOURCE PINS)

BGA

KODIAK-ASIC-040812

SEE_TABLE

L13J13 H08

D08

D04

D01

C03

B10

B06

A12

M12

L14

L11

K12

H14

H10

H07

A08

H04

H01

G12

G08

F05

F02

E14

E10

E06

D12

A04

J14

F14

J11

J10

K13J12 J09

AJ02

A11

C10

B05

B03

J03

G03

B07

C02

C09

E09

A13

E13

A09

F10

J02

E03

B11

C11

A05

A03

H03

F03

A07

C01

C08

D09

B13

D13

B09

F11

J01

D03

F13

E11

D05

G06

J04

E02

C06

C05

F07

E07

C12

H13

F08

G09

G02

G04

F12

D11

E05

H06

J05

E01

C07

C04

G07

D07

C13

G13

F09

H09

G01

G05

D10

D06

D02

B12

B08

B04

B02

M13

M11

L12

K14

A10

K10

H12

H02

G14

F06

F04

F01

E12

E08

D14

A06

G11

J08

E04

H11J07J06

G10K07H05

U1900

SM

2

1

XW8200

402CERM16V10%0.01UF

2

1 C8230

0805-1

0.22UH

21

L8200

0805-1

0.22UH

21

L8201

0805-1

0.22UH

21

L8202

0805-1

0.22UH

21

L8203

0805-1

0.22UH

21

L8205

SM

2

1

XW8202

402

1/16W1%

MF-LF

29.4

2

1R8203

402

1/16W1%

MF-LF

29.4

2

1R8204

0.01UF

10%16VCERM402

21

C8246

0.01UF

10%16VCERM402

21

C8245

NOSTUFF

0.01UF

10%16VCERM402

21

C8244

SMP4MM

1

PP8200

SMP4MM

1

PP8201

0.1UF 21 C82470.1UF 21 C8248

0.1UF 21 C82500.1UF 21 C8249

0.1UF 21 C82510.1UF 21 C82520.1UF 21 C82530.1UF 21 C8254

SM

2

1

XW8203

0.1UF 21 C82550.1UF 21 C8256

0.1UF 21 C82580.1UF 21 C8257

0.1UF 21 C82590.1UF 21 C82600.1UF 21 C8261

0.1UF 21 C82630.1UF 21 C8262

0.1UF 21 C8264

SM

2

1

XW8204

0.1UF 21 C82650.1UF 21 C82660.1UF 21 C82670.1UF 21 C82680.1UF 21 C82690.1UF 21 C82700.1UF 21 C8271

0.1UF 21 C82730.1UF 21 C8272

0.1UF 21 C8274

SM

2

1

XW8205

0.1UF 21 C82750.1UF 21 C8276

0.1UF 21 C82780.1UF 21 C8277

402CERM

10%1UF

6.3V2

1 C8217

402CERM

10%1UF

6.3V2

1 C8209

402CERM

10%1UF

6.3V2

1 C8210

402CERM

10%1UF

6.3V2

1 C8211

402CERM

10%1UF

6.3V2

1 C8212

402CERM

10%1UF

6.3V2

1 C8213

402CERM

10%1UF

6.3V2

1 C8214

402CERM

10%1UF

6.3V2

1 C8215

402CERM

10%1UF

6.3V2

1 C8216

402CERM

10%1UF

6.3V2

1 C8218

402CERM

10%1UF

6.3V2

1 C8219

402CERM

10%1UF

6.3V2

1 C8220

402CERM

10%1UF

6.3V2

1 C8221

402CERM

10%1UF

6.3V2

1 C8231

402CERM

10%1UF

6.3V2

1 C8232

402CERM

10%1UF

6.3V2

1 C8233

402CERM

10%1UF

6.3V2

1 C8234

402CERM

10%1UF

6.3V2

1 C8235

402CERM

10%1UF

6.3V2

1 C8236

402CERM

10%1UF

6.3V2

1 C8241

402CERM

10%1UF

6.3V2

1 C8242

402CERM

10%1UF

6.3V2

1 C8243

402CERM

10%1UF

6.3V2

1 C8237

402CERM

10%1UF

6.3V2

1 C8238

402CERM

10%1UF

6.3V2

1 C8239

10%

805X5R

10UF

6.3V2

1 C8223

402CERM

10%1UF

6.3V2

1 C8240

402CERM

10%1UF

6.3V2

1C8202

402CERM

10%1UF

6.3V2

1C8205

402CERM

10%1UF

6.3V2

1C8208

402CERM

10%1UF

6.3V2

1 C8222

402CERM

10%1UF

6.3V2

1 C8225

402CERM

10%1UF

6.3V2

1 C8228

20.5

1%1/16WMF-LF402

21

R8202

402

20.5

1%1/16WMF-LF

2 1

R8205

402

1/16W5%

MF-LF

8.2K

NOSTUFF

2

1R8206

402

1/16W5%

MF-LF

8.2K

NOSTUFF

2

1R8207

10%

805X5R

10UF

6.3V2

1C8201

10%

805X5R

10UF

6.3V2

1C8204

10%

805X5R

10UF

6.3V2

1C8207

10%

805X5R

10UF

6.3V2

1 C8229

8.2K

MF-LF

5%1/16W

402 2

1R8200

402

1/16W1%

MF-LF

200

2

1R8201

SM

2

1

XW8201

402CERM16V10%

0.01UF

2

1C8200

402CERM16V10%

0.01UF

2

1C8203

402CERM16V10%

0.01UF

2

1C8206

402CERM16V10%0.01UF

2

1 C8224

07051-6863

15482


KODIAK PCI-E X16SYNC_MASTER=Q63

PWR_PCIE_A_AVDD_B

CLK_KOD_100M_P<0> 100M_P<0>

100M_N<0>CLK_KOD_100M_N<0>

PCIE_SLOTA_PRSNT_L







PCIE_VCAL_RES0

PCIE_VCAL_RES1

PCIE_SLOTA_TO_NB_P<14>

PCIE_SLOTA_TO_NB_N<15>





























NC_A_AVREG_0

NC_A_AVREG_1

NC_A_AVREG_2



KOD_H05_GND

KOD_K07_GND

KOD_G10_GND KOD_J13_GND

KOD_L13_GND

KOD_H08_GND

PWR_PCIE_A_AVDD_2

PWR_PCIE_A_AVDD_1

PWR_PCIE_A_AVDD_0

PWR_PCIE_A_AVDD_2

KOD_G10_GND

PWR_PCIE_A_AVDD_1

KOD_K07_GND

PWR_PCIE_A_AVDD_0

KOD_H05_GND

PWR_PCIE_A_AVDD_A

KOD_J13_GND

KOD_L13_GND

PWR_PCIE_A_AVDD_C

KOD_H08_GND






PWR_PCIE_A_AVDD

100M_G

CLK_KOD_100M_NF<0>

CLK_KOD_100M_PF<0>

PCIE_NB_TO_SLOTA_NF<0> PCIE_NB_TO_SLOTA_N<0>

PCIE_NB_TO_SLOTA_PF<0> PCIE_NB_TO_SLOTA_P<0>































<XR_PAGE_TITLE>


82C6

82C8

82C8

82C8

82C8

82D8

82D8

82D8

82D8

82C2

82C6

82C6

82C2

82C6

82D1

82D1

82D1

82D8

82D1

82D8

82B2

82B2

82C2

82B2

82C2

82C8

97B4

97B4

97B4

97B4

97B4

97B4

97B4

97B4

97B4

97B4

97B4

97B4

97B4

97B4 97B4

97B4

97B4

97B4

97B4

97B4

97B4

97B4

97B4

97C4

97C4

97B4

97C4

97C4

97C4

97C4

97C4

97C4

97D4

97D4

97D4 97D4

97D4

97D4

97D4

97D4

97D4

97D4

97D4

97D4

97D4

97D4

97D4

97D4

82C8

82C8

82D1

82C8

82D1

97D8

97D8

113C7

82A8

82A8

82A8

82A8

82B2

82B7

84A3

84A3

84A3

84A3

84A3

84A3

84A3

84A3

84A3

84A3

84B3

84A3

84A3

84B3

84B3

84B3

84B3

84B3

84B3

84B3

84B3

84B3

84B3

84C3

84C3

84B3

84C3

84C3

84C3

84C3

84C3

84C3

82C7

82D7

82D7 82D2

82D2

82C2

97C4

97D4

97C4

97C4

82A6

97D4

82A6

97C4

82A6

82A3

82A3

82A3

82B7

82B7

82B7

82B7

82C8

97B8

97B8

97B8

97B8

97B8

97B8

97B8

97B8

97B8

97B8

97B8

97B8

97B8

97B8

97B8

97B8

97B8

97B8

97B8

97B8

97B8

97B8

97B8

97A8

97A8

97A8

97A8

97A8

97A8

97A8

97A8

97A8

97D4

26C2 97D8

97D8 26B2

84C7

3A4

3A4

3A4

3A4

3A4

3C1

6A5

83B8

83B8

83B8

83B8

83B8

83B8

83B8

83B8

83C8

83B8

83C8

83C8

83C8

83C8

83C8

83C8

83C8

83C8

83C8

83C8

83C8

83C8

83C8

83C8

83C8

83C8

83C8

83C8

83C8

83C8

83C8

83C8

6A3

6A3

6A3 6A3

6A3

6A3

82D6

82D6

82C6

82D6

6A3

82D6

6A3

82D6

6A3

97D4

6A3

6A3

97C4

6A3

3C1

3C1

3C1

3C1

3C1

97D4

97D8

97D8

97D8 84C6

97D8 84C6

97D8 84C6

97D8 84C6

97C8 84C6

97C8 84C6

97C8 84C6

97C8 84C6

97C8 84B6

97C8 84B6

97C8 84C6

97C8 84B6

97C8 84B6

97C8 84B6

97C8 84B6

97C8 84B6

97C8 84B6

97C8 84B6

97C8 84B6

97C8 84B6

97C8 84B6

97C8 84B6

97C8 84A6

97C8 84A6

97C8 84A6

97C8 84A6

97C8 84A6

97C8 84A6

97C8 84A6

97B8 84A6

97C8 84A6

97B8 84A6

Preliminary

PCIE_REFCLKN

PCIE_REFCLKP

PCIE_TX3N

PCIE_TX4N

PCIE_TX6P

PCIE_TX7P

PCIE_RX14N

PCIE_RX0P

PCIE_RX2N

PCIE_RX4N

PCIE_RX5P

PCIE_RX5N

PCIE_RX3P

PCIE_TX0P

PCIE_RX9P

PCIE_TX15N

PCIE_TEST

PCIE_CALI

PCIE_TX15P

PCIE_TX13N

PCIE_TX14N

PCIE_TX14P

PCIE_TX12N

PCIE_TX13P

PCIE_TX11P

PCIE_TX11N

PCIE_TX12P

PCIE_TX10P

PCIE_TX10N

PCIE_TX9N

PCIE_TX8N

PCIE_TX9P

PCIE_TX7N

PCIE_TX8P

PCIE_TX6N

PCIE_TX5P

PCIE_TX5N

PCIE_TX4P

PCIE_TX2P

PCIE_TX2N

PCIE_TX3P

PCIE_TX1P

PCIE_TX1N

PCIE_TX0N

PERST*

PCIE_CALRP

PCIE_CALRN

PCIE_RX6N

PCIE_RX15N

PCIE_RX15P

PCIE_RX14P

PCIE_RX13N

PCIE_RX13P

PCIE_RX12N

PCIE_RX12P

PCIE_RX11N

PCIE_RX11P

PCIE_RX10N

PCIE_RX10P

PCIE_RX9N

PCIE_RX8N

PCIE_RX8P

PCIE_RX7N

PCIE_RX7P

PCIE_RX6P

PCIE_RX4P

PCIE_RX3N

PCIE_RX2P

PCIE_RX1N

PCIE_RX1P

PCIE_RX0N

PCIE_VSS PCIE_VSS

PCIE_VSS

PCIE_PVDD_18

PCI-E

PCIE_VDDR_12

PCIE_PVDD_12

(1 OF 5)

125

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_5_ITEM

TABLE_5_ITEM



SYS_POWERUP_L SHOULD CONTROL THE FET ON PP1V2_RUN

PCI-E SLOTA 100MHZ

PLACE R8470 CLOSE TO U9670

PPVCORE_GPU WITH RV370 AND

GROUND VIAS FOR LAYER TRANSITIONS

CAP PAD CAN BE USED FOR COMPLIANCE TEST

(LOCATE CLOSE TO GPU)

PP1V2_RUN WITH RV380

REFCLK TERMINATION

THIS SHOULD BE ALIASED TO

REMOVED COMPLIANCE TEST POINTS

FINO WILL PLACE COUPLING CAPACITORS ON RECEIVING SIDE

(THIS IS ALLOWED FOR CHIP TO CHIP PCIE)

GPU PCI-E AC COUPLERS (PLACE NEAR GPU)

OMIT

BGARV370XT

AD25

R23

P28

N28

M28

M27

AH29

M26

AF28

AE28

AD28

AD27

AD26

AD24

AC28

AB28

AA28

AA27

M25

AA26

AA25

AA24

AA23

Y28

W28

W24

V28

V27

V26

M24

V25

V24

U28

T28

T24

R28

R27

R26

R25

R24

L28

K28

AK29

AJ30

AG28

AG27

AG26

U26

T26

U27

T27

U25

T25

Y26

W26

Y27

W27

Y25

W25

AC26

AB26

AC27

AB27

AC25

AB25

L26

K26

L27

K27

L25

K25

P26

N26

P27

N27

P25

N25

AF26

AE26

AE25

U29

T29

V30

V29

W29

W30

AA29

Y29

AB30

AA30

AC29

AB29

AD30

AD29

AE29

AE30

AG29

AF29

K30

J30

L29

K29

M30

M29

N29

N30

R29

P29

T30

R30

AH30

AG30

AF27

AE27

W23

V23

U23

T23

P23

N24

N23

AC23

AB24 AB23

U8400

0.1UF 21 C84000.1UF 21 C84010.1UF 21 C84020.1UF 21 C84030.1UF 21 C84040.1UF 21 C84050.1UF 21 C84060.1UF 21 C84070.1UF 21 C84080.1UF 21 C84090.1UF 21 C84100.1UF 21 C84110.1UF 21 C84120.1UF 21 C8413

0.1UF 21 C84150.1UF 21 C8414

0.1UF 21 C84160.1UF 21 C84170.1UF 21 C84180.1UF 21 C84190.1UF 21 C84200.1UF 21 C84210.1UF 21 C84220.1UF 21 C8423

0.1UF 21 C84250.1UF 21 C8424

0.1UF 21 C84260.1UF 21 C84270.1UF 21 C84280.1UF 21 C84290.1UF 21 C84300.1UF 21 C8431

MF-LF

1%

100

402

1/16W

21

R8400

402

150

MF-LF1/16W1%

2

1R8401

402

5%10K

MF-LF1/16W

2

1R8402

402

10K1%1/16WMF-LF

2

1R8403

CERM

1UF10%6.3V

4022

1 C84410805

1.8UH21

L8440

1UF10%

CERM6.3V

4022

1 C8440

CERM402

10V20%0.1UF

2

1 C8443

CERM10V20%0.1UF

4022

1 C84420.1UF20%10V

402CERM2

1 C8445

CERM

20%0.1UF10V

4022

1 C8444

402CERM10V20%0.1UF

2

1 C8455

CERM402

10V20%0.1UF

2

1 C84540.1UF

CERM402

10V20%

2

1 C84530.1UF

402

20%10VCERM2

1 C8452

CERM

1UF10%

402

6.3V2

1 C84511UF10%

CERM6.3V

4022

1 C8450

0.1UF20%10VCERM402

2

1 C84650.1UF20%

CERM402

10V2

1 C846420%0.1UF10VCERM402

2

1 C84631UF10%

CERM6.3V

4022

1 C8461

402

1UF6.3VCERM

10%2

1 C84600.1UF20%10VCERM402

2

1 C84661UF

402

10%

CERM6.3V

2

1 C8462

21

MF-LF

1%1/16W

402

21

R8473

+/-0.25PF5PF

50VCERM402

2

1 C8472

301

1/16W1%

MF-LF4022

1R8471

60.4

1/16W1%

MF-LF4022

1R8474402

21

MF-LF

1%1/16W

21

R8472

402

21

MF-LF

1%1/16W

21

R8477

+/-0.25PF5PF

50VCERM402

2

1 C847360.4

1/16W1%

MF-LF4022

1R8476

402

21

MF-LF

1%1/16W

21

R8475

301

1/16W1%

MF-LF4022

1R8478

1.8UH

0805

21

L8460

0805

1.8UH21

L8461

SM

21

XW8405

TSSOP

74LCX12511

14

137

12

U9670

HOLE-VIA1

ZH8400

HOLE-VIA1

ZH8401

HOLE-VIA1

ZH8402

HOLE-VIA1

ZH8403

HOLE-VIA1

ZH8404

HOLE-VIA1

ZH8405

HOLE-VIA1

ZH8406

HOLE-VIA1

ZH8407

HOLE-VIA1

ZH8408

HOLE-VIA1

ZH8409

HOLE-VIA1

ZH8410

HOLE-VIA1

ZH8411

HOLE-VIA1

ZH8412

HOLE-VIA1

ZH8413

HOLE-VIA1

ZH8414

HOLE-VIA1

ZH8415

HOLE-VIA1

ZH8416

HOLE-VIA1

ZH8417

HOLE-VIA1

ZH8418

HOLE-VIA1

ZH8419

MF-LF1/16W5%

33

402

21

R8470

402

8.2K5%

1/16WMF-LF

2

1R8469


051-6863

154

07

84

GPU PCIe

RV370XTU8400338S0239 1 IC,RV370 XT, GRAPHICS CTLR

RV380XT338S0244 U84001 IC,RV380 XT, GRAPHICS CTLR

PCIE_SLOTA_TO_NB_NF<0>



PCIE_SLOTA_TO_NB_PF<9>



CLK_PCIE_SLOTA_PF<0>

PP1V2_GPU_PCIE_VDDR

=PP1V2_GPU_PCIE

PCIE_SLOTA_PRSNT_L

PCIE_NB_TO_SLOTA_N<14>




PCIE_NB_TO_SLOTA_P<15>























GPU_PCIE_CALRN

=PP1V8_GPU
























GPU_PCIE_CALI

GPU_PCIE_TEST




















GPU_PCIE_CALRP















CKA_P<0>

CKA_N<0>


CLK_PCIE_SLOTA_P<0>

CLK_PCIE_SLOTA_N<0>

PP1V2_GPU_PCIE_PVDD

PP1V2_GPU_PCIE_PVDD


ATI_RESET_L_R

ATI_RESET_L


PP1V2_GPU_PCIE_VDDRVOLTAGE=1.2V




PP1V8_GPU_PCIE_PVDDVOLTAGE=1.8V

PP1V2_GPU_PCIE_PVDD

CLK_PCIE_SLOTA_NF<0>




=GPU_RESET_L93

97

97

97

97

97

87

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

82

82

82

97

97

97

97

97

97

97

97

97

97

97

97

82

97

97

97

97

97

97

82

82

97

97

97

97

97

97

86

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

97

97

82

97

97

85

85

82

97

97

85

97

97

97

97

9

97

97

9

97

84

7

6

82

82

82

82

82

82

82

82

82

82

82

82

9

82

82

82

82

82

82

9

9

82

82

82

82

82

82

85

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

9

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

97

9

9

9

97

97

97

97

97

97

97

97

9

9

9

9

9

9

26

26

84

84

9

84

82

82

84

97

82

82

97

20

Preliminary

FB

LD

HD

GND

COMP

SS

VCC VC

GND

VOUTVIN

NOISECONT

ENGND

IN OUTADJ

PG

EN

VIN

ADJ

VOUT

GND

PG

EN

VIN

ADJ

VOUT

GND

LM339A

V+

GNDG

D

S

G

D

S

G

D

S

G

D

SG

D

S

PG

EN

VIN

ADJ

VOUT

GND

G

D

S

125

TABLE_5_ITEM



TABLE_5_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

VOUT = 1.691V

VOUT = 0.59V * [1 + R8590 / R8591]

M33=1.295V

M23=1.250V

7.2A WITH RV370 XT8.3A WITH RV380 XT

NOTE:

1.30V +/- 2% FOR RV380 XT

PEAK CURRENT OF PPVCORE_GPU

IRU3037ACS VREF = 0.8 VDCVOUT=VREF*(R8503+R8505)/R8505

GPU 2.5V A2VDD

POWER SEQUENCING FOR RV370/80: =PP3V3_GPU > =PPV_GPU_MEM > VDDC_CT > PPVCORE_GPU

THE ENTIRE SEQUENCE SHOULD TAKE LESS THAN 40 MS (T1+T3 IN DATABOOK)

HOWEVER IDEALLY ALL POWER RAILS SHOULD RAMP TOGETHERPOWER DOWN SEQUENCE SHOULD BE IN REVERSE ORDER

PP2V5_GPU_A2VDD > PP1V8_GPU > PCIE_PVDD

GPU 1.80V TPVDD

U5000_FEEDBACK

PLACE LED8500 NEAR VREG

SET OUTPUT = 1.25V +/- 2% FOR RV370 XT

VOUT = 0.59V * [1 + R8540 / R8541]

VOUT = 1.209V

VOUT = 0.59V * [1 + R8560 / R8561]

VOUT = 1.802V

GPU VCORE VREG

GPU 1.20V PCIE PVDD

GPU 1.8V VREG

GPU 1.7V VDDC_CT

1%10K1/16WMF-LF4022

1R8505

50V

603CERM

3300PF10%

NOSTUFF

2

1 C8507

0.515%1/4W

1206-LFFF

2

1R8504

CERM

20%50V

0.1UF

12062

1 C8512CERM

2200PF5%

603

50V2

1 C8505

5%

MF-LF1/8W

0

805

21

R8502

20%

805

1UF25V

CERM 2

1C8504

1.53UH

SM

3

2

1

L8501805CERM25V20%1UF

2

1 C8516

402CERM25V5%220PF

2

1 C8506

SOIIRU3037ACS

2 6

8

3

5

4

1

7

U8500

OMIT

1/16WMF-LF

1%

402

5.62K

2

1R8503

25V

0.0082UF

402X7R

10%2

1 C8523CERM603

100PF50V5%

2

1 C8513402

8.2K5%1/16WMF-LF

2

1R8501

4.7

805

1/8W5%

MF-LF2

1R8500

20%

CERM6.3V

805

10UF

2

1 C8572

SOT-25AMM1572FN

51

4

2

3

U8570

16VCERM

20%0.01UF

4022

1C8571

402MF-LF1/16W

10K5%

2

1R8570

805

20%

CERM10V

1UF

2

1 C8570

SOP-8

CRITICAL

MIC39102

32

8765

1 4

U8580

MF-LF1/16W

1%453

402 2

1R8581

402

5%3.3K

MF-LF1/16W

2

1R858020%330UF6.3VELECCASE-C1

2

1 C858320%

1206CERM6.3V

10UF

2

1 C8580

MF-LF1/16W

1%

402

1K

2

1R8582

CERM6.3V10%1uF

4022

1 C8592

5.36K

402

1/16WMF-LF

1%

2

1R8591

0.001UF

402

10%50VCERM2

1 C8591CRITICAL

FAN2558SOT23-6

61

4

2

3 5

U8590805

CERM6.3V20%

4.7UF

2

1C8590

IRF7807ZPBFSO-8

321

4

8765

Q8501

SO-8IRF7807ZPBF

321

4

8765

Q8502

10BQ040PBF

NOSTUFF

SMB

2

1

D8500

402

10K1%1/16WMF-LF

2

1R8590

20%

TH-KZJ-LF

6.3VELEC

1800UF2

1 C8509

805

10UF20%6.3VCERM2

1 C8508

ELECSM-3

330UF20%16V2

1 C8502

CERM16V10%10UF

12102

1 C8510

402

10%1uF

CERM6.3V2

1 C8562

402

4.87K1%

MF-LF1/16W

2

1R8561

50V10%0.001UF

CERM402

2

1 C8561SOT23-6

CRITICAL

FAN2558

61

4

2

3 5

U85604.7UF6.3VCERM805

20%2

1C8560

DEVELOPMENT

5%1/16WMF-LF

330

4022

1R8519

GREEN2.0X1.25A

DEVELOPMENT

2

1

LED8500DEVELOPMENT

SOI-LF

3

13

11

10

12

U1201

0

1/16W

402MF-LF

5%

DEVELOPMENT

21

R8520

SOT23-LF2N7002

2

1

3

Q8500

3.3K

402MF-LF1/16W5%

2

1R8597

SOT23-LF2N7002

NOSTUFF

2

1

3

Q8580

2N7002SOT23-LF

2

1

3

Q8590

402MF-LF1/16W

3.3K5%

2

1R8562

NOSTUFF

2N7002SOT23-LF

2

1

3

Q85602N7002SOT23-LF

NOSTUFF

2

1

3

Q8570

MBR0520LXXGSOD-123

2 1

D8501

SOD-123MBR0520LXXG

2 1

D8503MBR0520LXXGSOD-123

2

1D8502

CERM

1UF20%25V

8052

1 C8515

20%6.3VCERM805

10UF

2

1 C8517

402

10%1uF

CERM6.3V2

1 C8542

9.53K1%1/16WMF-LF4022

1R8541

50V10%0.001UF

CERM402

2

1 C8541SOT23-6FAN2558

CRITICAL

61

4

2

3 5

U85404.7UF6.3VCERM805

20%2

1C8540

402MF-LF1/16W

3.3K5%

2

1R8542

SOT23-LF2N7002

2

1

3

Q8540

MF-LF1/16W5%

100K

402

21

R8511

0.01UF16VCERM

20%

4022

1 C8511

0.01UF16VCERM

20%

4022

1 C8594

402

100K

5%1/16WMF-LF

21

R8594

CERM

0.01UF16V20%

4022

1 C8544

402

47K

5%1/16WMF-LF

21

R8544

TSSOP

74LCX12511

14

137

12

U700

MMBD914XXG

SOT23

31

D8511SM

21

XW8500

402

10K1%1/16WMF-LF

2

1R8540

402

10K1%1/16WMF-LF

2

1R8560

10V

1UF20%

CERM603

2

1 C8514

RES,5.62K OHM,1/16W,1%,0402114S0291 R8503 RV370XT1

114S0295 RES,6.19K OHM,1/16W,1%,0402 R85031 RV380XT

SYNC_MASTER=M33-DD

Graphics VregsSYNC_DATE=MASTER

07051-6863

15485

=PP3V3_GPU

=PP12V_ALL_GPU

GPU_VCORE_VC_DMIN_LINE_WIDTH=0.45MMMIN_NECK_WIDTH=0.25MM


PPVCORE_GPU


U8590_EN_L

U8500_FEEDBACK


PP1V8_GPU_TPVDDVOLTAGE=1.8VMIN_LINE_WIDTH=0.5MM

U8560_ADJ

PP1V2_GPU_PCIE_PVDD


U8540_ADJ

U8590_EN

VOLTAGE=1.8V


MAKE_BASE=TRUE

PP1V8_GPU

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.6MMQ8502_DRAIN

U8500_VCMIN_LINE_WIDTH=0.45MMMIN_NECK_WIDTH=0.25MM


GPU_VCORE_VREG_VC

=PP3V3_GPU

=PP3V3_ALL_GPU

U8500_SS_L

SYS_POWERUP_L GPU_POWERUP_L

=PP3V3_GPU

LED_GPU_CORE_P

LED_GPU_CORE_N

1V1_REF

GPU_CORE_FOR_LED

R8501_2

=PP3V3_GPU

U8540_EN

U8540_EN_LGPU_POWERUP_L

=PP3V3_ALL_GPU

FAN2558_ADJ

GPU_POWERUP_L

=PP3V3_GPU

U8560_EN

GPU_POWERUP_L

PP2V5_GPU_A2VDDVOLTAGE=2.5VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM

=PP3V3_GPU

U8570_CONT

U8570_NOISE

GPU_POWERUP_L

U8580_ADJ

=PP3V3_GPU

U8580_EN

=PP1V8_GPU

GPU_POWERUP_L

=PP3V3_ALL_GPU

GPU_POWERUP_L

U8500_GND

U8500_GND

MIN_LINE_WIDTH=0.6MMR8504_P2


=PP5V_ALL_GPU

Q8501_GATE


U8500_GATE_HMIN_LINE_WIDTH=0.45MMMIN_NECK_WIDTH=0.25MM

PP1V7_GPU_VDDC_CTVOLTAGE=1.7V


U8500_COMP MIN_NECK_WIDTH=0.25MM

U8500_GATE_LMIN_LINE_WIDTH=0.45MM

U8500_SS


U8500_GNDVOLTAGE=0V

96

96

96

96

96 96

96

93

93

50

93

93

93 93

93

92

92

28

92

92

92 92

92

93

91

91

12

91

13

91

91 91

91

87

85

85

85

7 85

85

12

85

85

85

85

85

85

85

85

85

86

85

85

85

85

85

85

7

7

86

93

84

7

7

6 13

7

11

7

13

7

13

7

13

93

7

13

7

84

13

7

13

6

6

7

86

6

Preliminary

PVSS

PVDD

CORE POWER

(2 OF 5)

VDD15

VSS

VSS

VDDC

VDDCI

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

THERE ARE 45 CORE POWER PINS BETWEEN VDDC & VDDCI

CERM6.3V10%1UF

4022

1 C8667

CERM6.3V10%1UF

4022

1 C8663

402CERM6.3V10%1UF

2

1 C8662

CERM6.3V10%1UF

4022

1 C8661

402

10%6.3VCERM

1UF

2

1 C8660

CERM10V20%0.1UF

4022

1 C865120%6.3VCERM

4.7UF

8052

1 C86500805

1.8UH21

L8650

SM

21

XW8650

OMIT

BGA

RV370XT

AK2

AJ1

D4

AG11

AG9

AG5

AD18

AD16

AD12

AC18

AC16

AC14

AC12

C30

AC4

AB8

AB7

AB1

Y4

W15

W8

W7

V16

V15

C28

U16

U15

U8

U4

T19

T18

T17

T16

T15

T14

C3

T13

T1

R18

R17

R16

R15

R14

R13

R12

R8

C1

R7

P16

P15

P4

N16

N15

M16

M8

M7

L4

A29

K8

K7

K1

J24

J23

H27

H23

H21

H18

H16

A22

H14

H12

H9

H8

H4

G24

G21

G18

G16

G12

A16

G9

F27

D27

D24

D21

D18

D15

D12

D10

D6

A10

A2

W16

T12

R19

M15

N17

N14

N13

N12

M19

AD15

M18

AD13

AC17

AC15

AC13

W19

W18

W17

W14

W13

W12

M17

V19

V18

V17

V14

V13

V12

U19

U18

U17

U14

M14

U13

U12

P19

P18

P17

P14

P13

P12

N19

N18

M13

M12

AC20

AC11

Y23

Y8

P8

M23

H20

H11

AJ28

AK28

U84000.1UF20%

CERM402

10V2

1 C86040.1UF10V

402

20%

CERM2

1 C86030.1UF10V

402CERM

20%2

1 C86020.1UF10VCERM

20%

4022

1 C86010.1UF10V20%

CERM402

2

1 C86100.1UF10V20%

CERM402

2

1 C86090.1UF10V20%

CERM402

2

1 C86080.1UF10V

402

20%

CERM2

1 C86070.1UF10V

402CERM

20%2

1 C86060.1UF10V

402CERM

20%2

1 C8605

20%

CERM402

10V

0.1UF

2

1 C861220%

CERM402

10V

0.1UF

2

1 C8611

402CERM

20%10V

0.1UF

2

1 C8620

402CERM

20%10V

0.1UF

2

1 C861920%

CERM402

10V

0.1UF

2

1 C861820%

CERM402

10V

0.1UF

2

1 C861720%

CERM402

10V

0.1UF

2

1 C8616

402

20%

CERM10V

0.1UF

2

1 C8615

402CERM

20%10V

0.1UF

2

1 C8614

402CERM

20%10V

0.1UF

2

1 C8613

0.1UF10V20%

CERM402

2

1 C86300.1UF10V20%

CERM402

2

1 C86290.1UF10V

402CERM

20%2

1 C8628

CERM6.3V

10UF

805

20%2

1 C8600

0.1UF10V

402CERM

20%2

1 C86270.1UF10V

402CERM

20%2

1 C86260.1UF10VCERM

20%

4022

1 C86250.1UF10V20%

CERM402

2

1 C86240.1UF10V20%

CERM402

2

1 C86230.1UF10V

402CERM

20%2

1 C86220.1UF10V

402CERM

20%2

1 C8621

402

1UF10%6.3VCERM2

1 C86661UF10%6.3VCERM402

2

1 C8665

402

1UF10%6.3VCERM2

1 C8664

GPU Core Power

07

86


154

051-6863

SYNC_MASTER=FINO-DD

PPVCORE_GPU

GND_GPU_PVSSVOLTAGE=0VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM

PPVCORE_GPU

PP1V8_GPU_PVDD



=PP1V8_GPU

PP1V7_GPU_VDDC_CT

93

86

86

87

85

85

85

7

6

7

84

85

Preliminary

VDDRH1

VDDRH0

DQA5DQA6DQA7

DQA4

DQA0DQA1DQA2

DQA23

DQA21DQA20

DQA18

DQA22

DQA52

DQA25DQA24

DQA8DQA9DQA10DQA11DQA12DQA13DQA14DQA15DQA16DQA17

DQA19

DQA26DQA27DQA28DQA29DQA30DQA31DQA32DQA33DQA34DQA35DQA36DQA37DQA38DQA39DQA40DQA41DQA42DQA43DQA44DQA45DQA46DQA47DQA48DQA49DQA50DQA51

DQA53DQA54DQA55DQA56DQA57DQA58DQA59DQA60

DQA62

DQA3 MAA1MAA0

MAA2

MAA4MAA3

MAA5

MAA8

MAA14

DQMA1*DQMA0*

DQMA2*

DQMA6*DQMA5*

QSA0

DQMA7*

QSA1QSA2QSA3

QSA5QSA4

RASA*

CASA*

WEA*

CSA1*

CSA0*

CKEA

CLKA0*CLKA0

CLKA1*CLKA1

MVREFS

MVREFD

DIMA_1DIMA_0

VDDR1

DQA63

DQA61

QSA6QSA7

MAA6MAA7

MAA9MAA10MAA11MAA12MAA13

DQMA4*DQMA3*

VSSRH1VSSRH0

(3 OF 5)

MEMORY INTERFACE A

DQMB1*

VDDR1

DQB63

DQB61DQB60

DQB62

DQB58DQB59

DQB55

DQB57DQB56

DQB54DQB53DQB52DQB51DQB50DQB49DQB48DQB47DQB46DQB45DQB44DQB43DQB42

DQB40DQB41

DQB38DQB37

DQB39

DQB35DQB36

DQB32DQB33DQB34

DQB31DQB30

DQB28DQB27

DQB29

DQB25DQB26

DQB23DQB22

DQB24

DQB20DQB21

DQB19DQB18DQB17

DQB15DQB14

DQB16

DQB12DQB13

DQB11DQB10DQB9DQB8DQB7DQB6

DQB4DQB5

DQB3DQB2DQB1DQB0

MPVSSMPVDD

DIMB_1

MEMTEST

DIMB_0

MEMVMODE1

MEMVMODE0

CLKB1

CLKB0*

CLKB1*

CSB1*

CKEB

CLKB0

CASB*

WEB*

CSB0*

QSB7

QSB5QSB6

RASB*

QSB0QSB1QSB2

QSB4QSB3

DQMB6*

DQMB4*DQMB5*

DQMB7*

DQMB2*

DQMB0*

DQMB3*

MAB11

MAB13MAB14

MAB12

MAB5MAB6MAB7MAB8

MAB4

MAB0MAB1

MAB3MAB2

MAB9MAB10

MEMORY INTERFACE B

(4 OF 5)

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

MEMVMODE

*

112.8V

2.5V

1.8V

01

10

01

402CERM

0.1UF10V20%

2

1 C8712

CERM402

0.1UF10V20%

2

1 C8711

CERM402

0.1UF10V20%

2

1 C8710

CERM10V20%

402

0.1UF

2

1 C8709

CERM402

0.1UF10V20%

2

1 C870820%10V

0.1UF

CERM402

2

1 C8707

CERM6.3V

805

20%10UF

2

1 C8701

1.8UH

0805

21

L8730

SM

21

XW8730

MF-LF1/16W5%10K

4022

1R8700MF-LF1/16W5%10K

4022

1R8701

402

100

MF-LF1/16W1%

2

1R8720

402CERM10V20%

0.1UF

2

1C8721

0.1UF

CERM10V20%

4022

1C8723

402MF-LF1/16W1%100

2

1R8721

4.7K5%

MF-LF1/16W

4022

1R8726

4.7K5%1/16WMF-LF402

NOSTUFF

2

1R8727

MF-LF1/16W1%47

4022

1R8728

402MF-LF1/16W

5%4.7K

NOSTUFF

2

1R8724

402MF-LF1/16W

5%4.7K

2

1R8725

OMIT

BGARV370XT

E19

M6

F19

N6

F18

D11

D8

D5

B30

B1

A28

A21

H17

H15

H13

H10

G27

G22

G19

G15

A15

G13

G10

G7

F4

E27

D26

D23

D20

D17

D14

A9

A3

A19

F10

B11

B16

E16

B27

F24

F30

J27

B8

B7

A24

C21

F21

F22

C22

C23

B24

B23

C19

B20

E21

A25

C24

B22

E22

E11

C11

C15

F15

A27

E25

F29

J25

D29

G30

G26

F8

F9

E9

F11

H26

F12

E10

E12

E13

B10

B9

C9

C10

B12

C12

H25

A12

A13

C16

C14

B14

C13

B15

B17

B18

C17

J26

F13

E14

F14

E15

F16

D16

E17

F17

B26

C26

J29

B25

B28

C27

C25

C29

B29

D22

E23

F23

E24

J28

F25

E26

F26

G25

F28

G28

G29

E29

E28

D28

H29

H28

B13

D30

F20

E20

A18

C18

C20

B21

B19

E18

U8400RV370XT

BGA

OMIT

T6

AD4

AA8

AA7

AA4

AA1

V8

V7

V4

T8

T7

R4

R1

N8

N7

N4

M4

L23

L8

K24

K23

J8

J7

J4

J1

H22

H19

R2

AD1

AC5

W1

V5

G1

K6

B3

F6

A6

A7

C7

C6

C8

K2

N3

P6

M5

M2

L2

L3

M3

P2

P3

P5

J2

K3

M1

N5

AD2

AC6

W2

W6

G3

J5

B2

E6

C5

B5

C4

AE3

AE2

AE1

AD3

E5

AC3

AC2

AB3

AB2

AE4

AE5

AD5

AD6

AB5

AB6

F5

AA5

AA6

AA2

Y3

Y2

W3

V3

V1

V2

U2

G5

Y5

Y6

W4

W5

V6

U3

U5

U6

H3

F1

G6

J3

F2

E2

H2

F3

G2

L5

L6

K4

K5

E7

J6

H5

H6

G4

D2

D1

D3

C2

B4

A4

F7

D7

AA3

E3

R6

R5

T3

T2

N2

N1

R3

T5

U8400

1001%1/16WMF-LF4022

1R8722

402MF-LF1/16W1%100

2

1R8723

20%6.3V

4.7UF

805CERM2

1 C8730

CERM10V20%0.1UF

4022

1 C8731

CERM6.3V

805

20%10UF

2

1 C8700

CERM

0.1UF10V20%

4022

1 C8719

402CERM

0.1UF10V20%

2

1 C8718

CERM402

0.1UF10V20%

2

1 C8717

CERM402

0.1UF10V20%

2

1 C8716

CERM402

0.1UF10V20%

2

1 C8715

CERM402

0.1UF10V20%

2

1 C8713

402CERM

0.1UF10V20%

2

1 C8714

402CERM

0.1UF10V20%

2

1 C870320%10V

0.1UF

CERM402

2

1 C8704

402CERM

0.1UF10V20%

2

1 C8705

402CERM

0.1UF10V20%

2

1 C8706

402CERM

0.1UF10V20%

2

1 C8702

051-6863

87 154

07

GPU Frame BufferSYNC_DATE=05/19/2005SYNC_MASTER=FINO-DD

=PPV_GPU_MEM

FBD<2>

FBDQM<4>

FBD<115>

FBD<114>

FBD<126>

FBD<112>

FBD<113>

FBD<111>

FBD<107>

FBD<105>

FBD<104>

FBD<108>

FBD<109>

FBD<110>

FBD<118>

FBD<116>

FBD<95>

FBD<93>

FBD<92>

FBD<94>

FBD<89>

FBD<91>

FBD<82>

FBD<87>

FBD<85>

FBD<84>

FBD<86>

FBD<77>

FBD<76>

FBD<79>

FBD<78>

FBD<74>

FBD<75>

FBD<72>

FBD<73>

FBD<64>

FBD<71>

FBD<69>

FBD<117>

FBD<119>

FBD<121>

FBD<124>

FBD<101>

FBD<98>

FBD<97>

FBD<103>

FBD<35>

FBD<63>

FBD<40>

FBD<34>

FBD<38>

=PPV_GPU_MEM

=PPV_GPU_MEM

FBBCLK0

GPU_MEMVMODE1

=PP1V8_GPU

FBDQM<6>

FBDQM<0>

FBA<13>

FBA<12>

FBA<11>

FBA<10>

FBA<9>

FBA<7>

FBA<6>

FBDQS<2>

FBDQS<3>

FBD<16>

FBD<19>

TP_GPU_DIMA_0

TP_GPU_DIMA_1

FBACLK0

FBACLK0_L

FBACLK1

FBACLK1_L

FBACKE

FBACS0_L

TP_FBACS1_L

FBAWE_L

FBACAS_L

FBARAS_L

FBDQS<0>

FBDQS<1>

FBDQS<6>

FBDQS<7>

FBDQS<4>

FBDQM<2>

FBDQS<5>

FBDQM<1>

FBDQM<3>

FBDQM<7>

FBDQM<5>

TP_FBA<14>

FBA<8>

FBA<5>

FBA<3>

FBA<4>

FBA<2>

FBA<1>FBD<45>

FBD<18>

FBD<20>

FBD<21>

FBD<17>

FBD<22>

FBD<23>

FBD<29>

FBD<30>

FBD<31>

FBD<27>

FBD<25>

FBD<26>

FBD<24>

FBD<12>

FBD<10>

FBD<8>

FBD<11>

FBD<9>

FBD<14>

FBD<15>

FBD<13>

FBD<0>

FBD<3>

FBD<1>

FBD<6>

FBD<7>

FBD<4>

FBD<5>

FBD<53>

FBD<52>

FBD<54>

FBD<49>

FBD<51>

FBD<55>

FBD<60>

FBD<62>

FBD<33>

FBD<32>

FBD<36>

FBD<37>

FBD<39>

FBD<48>

FBD<50>

FBD<28>

FBD<57>

FBD<61>

FBD<56>

FBD<59>

FBD<58>

FBD<44>

FBD<46>

FBD<43>

FBD<42>

FBD<41>

FBBA<10>

FBBA<9>

FBBA<2>

FBBA<3>

FBBA<1>

FBBA<0>

FBBA<4>

FBBA<8>

FBBA<7>

FBBA<6>

FBBA<5>

FBBA<12>

TP_FBBA<14>

FBBA<13>

FBBA<11>

FBDQM<12>

FBDQM<15>

FBDQM<13>

FBDQM<11>

FBDQM<10>

FBDQM<8>

FBDQS<12>

FBDQS<10>

FBDQS<13>

FBDQS<14>

FBDQS<15>

FBBRAS_L

FBDQS<8>

FBDQS<11>

FBDQS<9>

FBBCS0_L

FBBWE_L

FBBCAS_L

FBBCLK1

FBBCKE

TP_FBBCS1_L

FBBCLK0_L

FBBCLK1_L

GPU_MEMVMODE0

TP_GPU_DIMB_0

MIN_LINE_WIDTH=0.5MMGPU_MEMTEST


TP_GPU_DIMB_1

FBDQM<14>

=PPV_GPU_MEM

GPU_MVREFSMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM

VOLTAGE=1.8V


PP1V8_GPU_MPVDD

FBDQM<9>

VOLTAGE=0V


GND_GPU_MPVSS

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MMGPU_MVREFD

FBD<47>

FBA<0>

FBD<127>

FBD<125>

FBD<120>

FBD<123>

FBD<122>

FBD<102>

FBD<99>

FBD<106>

FBD<66>

FBD<70>

FBD<90>

FBD<81>

FBD<68>

FBD<96>

FBD<100>

FBD<83>

FBD<80>

FBD<88>

FBD<67>

FBD<65>

90

90

90

93

90

89

89

89

86

89

87

87

87

90

85

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

87

89

7

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

7

7

88

84

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88 88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

6

88

88

88

7

88

6

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

Preliminary

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE


PLACE CLOCK TERMINATION AFTER MEMORY

GPU -> MEMORY -> TERMINATION

FRAME BUFFER A TERMINATIONPLACE R’S CLOSE TO MEMORY

FRAME BUFFER B TERMINATION

DIFFERENTIAL_PAIRNET_SPACING_TYPENET_PHYSICAL_TYPE

DIFFERENTIAL_PAIRNET_SPACING_TYPENET_PHYSICAL_TYPEELECTRICAL_CONSTRAINT_SET

22 54 RP8800

22 72 RP880122 81 RP880122 63 RP880122 54 RP8801

22 54 RP8802

22 81 RP880222 63 RP880222 72 RP8802

22 72 RP880322 81 RP880322 54 RP880322 63 RP8803

22 81 RP8804

22 54 RP8805

22 81 RP880522 63 RP880522 72 RP8805

22 72 RP880422 54 RP880422 63 RP880422 81 RP880622 72 RP880622 54 RP8806

22 54 RP880722 63 RP880722 72 RP880722 81 RP880722 54 RP880822 63 RP8808

22 81 RP8808

22 72 RP8808

22 63 RP8809

22 54 RP8809

22 81 RP8809

22 72 RP8809

22 54 RP8810

22 72 RP8810

22 63 RP8810

22 81 RP8810

22 81 RP881122 72 RP881122 54 RP881122 63 RP8811

22 63 RP8806

22 81 RP8812

22 54 RP8813

22 81 RP881322 72 RP881322 63 RP8813

22 81 RP881422 72 RP8814

22 72 RP881222 63 RP881222 54 RP8812

22 54 RP8814

22 63 RP8814

22 63 RP8815

22 72 RP8815

22 81 RP8815

22 54 RP8815

22 54 RP8816

22 81 RP8816

22 63 RP8816

22 72 RP8816

22 63 RP8817

22 72 RP8817

22 54 RP881722 81 RP8817

22 81 RP8818

22 72 RP8818

22 63 RP8818

22 54 RP8818

22 81 RP8819

22 54 RP8819

22 63 RP8819

22 72 RP8819

402

56.21%

1/16WMF-LF

2

1R8820

MF-LF1/16W

1%56.2

4022

1R8821

402

0.01UF20%16V

CERM 2

1C8821

56.2

402

1%1/16WMF-LF

2

1R8823

MF-LF1/16W

1%56.2

4022

1R8822

402

0.01UF20%16V

CERM 2

1C8823

0.01UF16V

CERM

20%

4022

1C8825

MF-LF1/16W

1%56.2

4022

1R8824

402

56.21%

1/16WMF-LF

2

1R8825

402

56.21%

1/16WMF-LF

2

1R8826

402

0.01UF20%16V

CERM 2

1C8827MF-LF1/16W

1%56.2

4022

1R8827

I421

I425

I426

I427

I428

I429

22 21 R8800

22 21 R8801

22 21 R8802

22 21 R8803

22 21 R8804

22 21 R8805

22 21 R8806

22 21 R8807

22 21 R8808

22 21 R8809

22 21 R8810

22 21 R8811

22 21 R8813

22 63 RP8820

22 21 R8812

22 21 R881522 21 R8814

22 21 R8830

22 21 R8831

22 21 R8832

22 21 R8833

22 21 R8834

22 21 R8835

22 21 R8837

22 54 RP8820

22 21 R8836

22 21 R8838

22 21 R8839

22 21 R8840

22 21 R8841

22 21 R8842

22 21 R8843

22 21 R8844

22 21 R8845

I469

22 81 RP8820

I470

I471

I472

I473

22 72 RP8820

I483

I484

I487

I488

I489

22 63 RP8821

I490

I491

I492

I493

I494

I495

I496

I497

22 54 RP8821

22 72 RP8821

22 81 RP8821

22 63 RP882222 54 RP882222 72 RP882222 81 RP8822

22 81 RP8823

22 54 RP882322 63 RP882322 72 RP8823

22 81 RP882422 72 RP882422 63 RP882422 54 RP8824

22 63 RP8825

22 72 RP882522 81 RP882522 54 RP8825

22 54 RP882622 81 RP882622 63 RP882622 72 RP8826

22 81 RP8827

22 54 RP882722 63 RP882722 72 RP8827

22 81 RP882822 72 RP882822 54 RP882822 63 RP8828

22 81 RP882922 72 RP882922 54 RP882922 63 RP8829

22 54 RP8830

22 72 RP883022 81 RP883022 63 RP8830

22 81 RP883122 63 RP883122 72 RP883122 54 RP8831

22 63 RP8800

22 81 RP880022 72 RP8800

88 154

051-6863

FB Series TerminationSYNC_DATE=05/19/2005

07

SYNC_MASTER=FINO-DD

RFBDQS<2>

RFBDQM<0>

RFBDQM<3>FBD<52>

FBD<53>

RFBD<22>

RFBD<21>

FBBCLK1 GPU_FBCLK FBBCLK1GPU_FBCLKFBBCLK1_L GPU_FBCLK FBBCLK1GPU_FBCLK

FBACLK0_L GPU_FBCLK FBACLK0GPU_FBCLKFBACLK1 GPU_FBCLK FBACLK1GPU_FBCLKFBACLK1_L GPU_FBCLK FBACLK1GPU_FBCLKFBBCLK0 GPU_FBCLK FBBCLK0GPU_FBCLKFBBCLK0_L GPU_FBCLK FBBCLK0GPU_FBCLK

FBACLK0 GPU_FBCLK FBACLK0GPU_FBCLK

GPU_FBGPU_FBFBBCS0_L

GPU_FBGPU_FBFBBCKE

GPU_FB GPU_FBFBACKEGPU_FB GPU_FBFBACS0_L

GPU_FBGPU_FBFBBCAS_L

GPU_FBGPU_FBFBBWE_L

GPU_FB GPU_FBFBAWE_L

GPU_FBFBBA<13..0> GPU_FB

RFBD<127..0> GPU_FB GPU_FB

FBD<115>

FBD<116>

FBD<119>

FBD<120>

FBD<121>

FBD<91>

FBD<67>

FBD<64>

RFBD<79>

RFBD<91>

RFBD<15>

FBD<35>

FBD<33>

RFBD<38>

FBD<34>

FBD<32>

FBD<36>

FBD<37>

FBD<38>

RFBD<27>FBD<27>

FBD<17>

FBD<16>

FBD<18>

RFBD<72>

RFBD<86>

FBD<30>

FBD<21>

FBD<20>

RFBD<18>

RFBD<17>

RFBDQM<12>

FBDQM<15>

FBDQM<14>

FBDQM<11>

FBDQM<13>

FBDQM<12>

FBDQM<10>

FBDQM<8>

FBDQM<9>

RFBDQM<15>

RFBDQM<14>

RFBDQM<11>

RFBDQM<13>

RFBDQM<10>

RFBDQM<9>

RFBDQM<8>

RFBDQS<8>

RFBDQS<9>

RFBDQS<10>

RFBDQS<12>

RFBDQS<13>

RFBDQS<11>

RFBDQS<14>

RFBDQS<15>

FBDQS<9>

FBDQS<8>

FBDQS<10>

FBDQS<12>

FBDQS<13>

FBDQS<11>

FBDQS<14>

FBDQS<15>

FBDQM<6>

RFBDQM<5>

FBDQM<7>

FBDQM<4>

FBDQM<5>

FBDQM<3>

FBDQM<2>

FBDQM<1>

FBDQM<0>

RFBDQM<6>

RFBDQM<7>

RFBDQM<4>

RFBDQM<2>

RFBDQM<1>

RFBDQS<1>

RFBDQS<0>

RFBDQS<3>

RFBDQS<5>

RFBDQS<4>

RFBDQS<7>

RFBDQS<6>

FBDQS<0>

FBDQS<1>

FBDQS<2>

FBDQS<3>

FBDQS<5>

FBDQS<4>

FBDQS<7>

FBDQS<6>

RFBD<102>

RFBD<101>

RFBD<36>

RFBD<64>

FBD<105>

FBD<28>

FBD<19>

FBD<24>

FBD<26>

RFBD<34>

RFBD<33>

RFBD<114>

RFBD<93>

FBACLK1_TERMMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MMFBBCLK0_TERM

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MMFBBCLK1_TERM

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MMFBACLK0_TERM

FBACLK0_L

FBD<63>

FBD<87>

FBD<73>

FBD<68>

FBD<69>

RFBD<95>FBD<95>

RFBD<92>

RFBD<94>

FBACLK0

FBACLK1

FBACLK1_L

RFBD<32>

RFBD<35>

RFBD<37>

FBD<39> RFBD<39>

RFBD<40>

FBD<41> RFBD<41>

FBD<44> RFBD<44>

FBD<42> RFBD<42>

FBD<43> RFBD<43>

FBD<45> RFBD<45>

FBD<46> RFBD<46>

FBD<48> RFBD<48>

FBD<49> RFBD<49>

FBD<47> RFBD<47>

FBD<50> RFBD<50>

FBD<51> RFBD<51>

RFBD<53>

FBD<54> RFBD<54>

RFBD<52>

FBD<56> RFBD<56>

FBD<55> RFBD<55>

FBD<29> RFBD<29>

RFBD<30>

FBD<31> RFBD<31>

RFBD<28>

RFBD<24>

FBD<25>

FBD<0> RFBD<0>

FBD<1> RFBD<1>

FBD<2> RFBD<2>

FBD<3> RFBD<3>

RFBD<16>

FBD<15>

FBD<14> RFBD<14>

RFBD<19>

FBD<13>

RFBD<12>

FBD<11> RFBD<11>

FBD<9> RFBD<9>

FBD<10> RFBD<10>

RFBD<5>

FBD<8>

FBD<57> RFBD<57>FBD<6> RFBD<6>

FBD<58> RFBD<58>

FBD<59> RFBD<59>

FBD<61> RFBD<61>

FBD<60> RFBD<60>

FBD<62> RFBD<62>

RFBD<63>

FBD<4> RFBD<4>

FBD<7> RFBD<7>

RFBD<20>

FBD<22>

FBD<23>

FBBCLK0

FBBCLK0_L

FBBCLK1

FBBCLK1_L

FBD<99> RFBD<99>

FBD<97> RFBD<97>

FBD<96> RFBD<96>

FBD<98> RFBD<98>

FBD<102>

FBD<100> RFBD<100>

FBD<101>

FBD<103> RFBD<103>

FBD<104> RFBD<104>

RFBD<105>

FBD<106> RFBD<106>

FBD<107> RFBD<107>

FBD<109> RFBD<109>

FBD<108> RFBD<108>

FBD<110> RFBD<110>

FBD<112> RFBD<112>

FBD<111> RFBD<111>

FBD<113> RFBD<113>

FBD<114>

RFBD<115>

FBD<117> RFBD<117>

RFBD<116>

FBD<118> RFBD<118>

RFBD<119>

RFBD<120>

RFBD<121>

FBD<122> RFBD<122>

FBD<123> RFBD<123>

FBD<124> RFBD<124>

FBD<125> RFBD<125>

FBD<127> RFBD<127>

FBD<126> RFBD<126>

FBD<66> RFBD<66>

FBD<65> RFBD<65>

RFBD<67>

FBD<85> RFBD<85>

FBD<84> RFBD<84>

FBD<86>

RFBD<73>

RFBD<87>

FBD<72>

FBD<75>

FBD<74> RFBD<74>

FBD<70> RFBD<70>

RFBD<68>

RFBD<69>

FBD<71> RFBD<71>

FBD<80> RFBD<80>

FBD<81> RFBD<81>

FBD<82> RFBD<82>

FBD<83> RFBD<83>

FBD<76> RFBD<76>

FBD<77> RFBD<77>

RFBD<78>

FBD<79>

FBD<90>

RFBD<89>

FBD<94>

RFBD<88>

FBD<93>

RFBD<8>

FBD<12>

FBD<5>

FBD<92>

RFBD<26>

RFBD<25>

FBD<40>

RFBD<13>

RFBD<23>

RFBD<75>

RFBD<90>

FBD<89>

FBD<88>

GPU_FB GPU_FBFBBRAS_L

GPU_FB GPU_FBFBACAS_LGPU_FBGPU_FBFBARAS_LGPU_FBDQSFBDQS<15..0> GPU_FB

GPU_FBFBD<127..0> GPU_FB

FBD<78>

FBA<13..0> GPU_FB GPU_FB

FBDQM<15..0> GPU_FB GPU_FB

90

89

89

90

90

89

89

89

90

90

89

89

90

90

89

89

89

90

90

89

90

90

89

89

89

90

89

90

90

90

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89 89

89

89

89

89

89

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

89

89

89

89

89

90

90

88

88

88

88

88

88

88

88

88

88

88

88

90

90

89

89

90

90

89

90

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88 88

88

88

88

88

88

88

88

88

88

89

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

90

88

88

88

88

88

88

88

88

90

88

88

88

88

88

88

88 88

88

88

88

88

88

88

89

88

88 89

88

88 88

88 88

88 88

88 89

88 88

88 89

88 88

88 88

88 88

88 88

88 89

88

88 88

88

88 88

88 89

88 89

88

88 88

88

89

88

88 89

88 88

88 88

88 88

88

88

88 88

88

88

89

88 88

88 89

88 88

88

88

88 88 88 88

88 89

88 88

88 88

88 88

88 88

89

88 89

88 88

89

88

88

88

88

88

88

88 90

88 88

88 88

88 88

88

88 88

88

88 90

88 88

88

88 88

88 90

88 88

88 88

88 88

88 88

88 90

88 88

88

90

88 88

88

88 88

90

88

88

88 88

88 90

88 88

88 88

88 90

88 88

88 88

88 88

88

88 88

88 90

88

90

88

88

88

88 88

88 88

90

88

88 88

88 90

88 88

88 88

88 88

88 88

88 90

88

88

88

90

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

90

89

89

88

88

88

89

88

89

89

89 87

87

6

6

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

6

87

87

87

87

87

87

87

87

6

6

6

87

87

6

87

87

87

87

87

6 87

87

87

87

6

6

87

87

87

6

88

90

87

87

87

87

87

87

87

87

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

87

87

87

87

87

87

87

87

87

89

87

87

87

87

87

87

87

89

89

89

89

89

89

89

89

89

89

89

89

87

87

87

87

87

87

87

87

6

6

6

88

87

87

87

87

87

6

6

6

88

87

87

87

87

87

87

6 87

6

6

87

87

87

6

88

6

87 88

6

87 6

87 6

87 6

87 88

87 6

87 88

87 6

87 6

87 6

87 6

87 88

6

87 6

6

87 6

87 88

87 88

6

87 6

6

88

87

87 88

87 6

87 6

87 6

6

87

87 6

6

87

88

87 6

87 88

87 6

6

87

87 6 87 6

87 88

87 6

87 6

87 6

87 6

88

87 88

87 6

88

87

87

87

87

87

87

87 88

87 6

87 6

87 6

87

87 6

87

87 88

87 6

6

87 6

87 88

87 6

87 6

87 6

87 6

87 88

87 6

87

88

87 6

6

87 6

88

6

6

87 6

87 88

87 6

87 6

87 88

87 6

87 6

87 6

6

87 6

87 88

87

88

6

87

87

87 6

87 6

88

6

87 6

87 88

87 6

87 6

87 6

87 6

87 88

6

87

87

88

87

6

87

6

87

87

87

6

6

87

6

6

6

6

87

87

87

87

87

87

87

87

87

87

Preliminary

A3

A1(1 OF 2)

A8/AP

DQS0DQS1

WECAS

NC

RASCSCKE

DQ30DQ29

DQ27DQ26DQ25

DQ23DQ24

DQ22

DQ18

DQ20DQ19

DQ21

DQ17

DQ14

DQ16DQ15

DQ12DQ13

CKCK

DM2DM3

BA0BA1

DQS3DQS2

DM0

A11A10A9

A7

A4A5A6

A2

A0

DQ7DQ8

DQ10DQ9

DQ11

DQ0DQ1DQ2DQ3

DQ5DQ6

DQ4

MCL/NC

DQ31

DQ28

DM1

RFU1/NCRFU2/NC

VSS

(2 OF 2)

VDD

VSS_THERM

VDDQ

VSSQ

VREF

VSS

(2 OF 2)

VDD

VSS_THERM

VDDQ

VSSQ

VREF

A3

A1(1 OF 2)

A8/AP

DQS0DQS1

WECAS

NC

RASCSCKE

DQ30DQ29

DQ27DQ26DQ25

DQ23DQ24

DQ22

DQ18

DQ20DQ19

DQ21

DQ17

DQ14

DQ16DQ15

DQ12DQ13

CKCK

DM2DM3

BA0BA1

DQS3DQS2

DM0

A11A10A9

A7

A4A5A6

A2

A0

DQ7DQ8

DQ10DQ9

DQ11

DQ0DQ1DQ2DQ3

DQ5DQ6

DQ4

MCL/NC

DQ31

DQ28

DM1

RFU1/NCRFU2/NC

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL

HYNIX

SAMSUNG

NC

NCNC

NC

GROUND VIAS FOR SIGNAL LAYER TRANSITIONS

8MX32-300MHZ-1.8VFBGA

OMIT

L3

M10

L9

M2

N3

M4

M3

L13

L12

H11

H4

C11

C4

M13

B13

H2

H13

B2

K12

K13

E2

D2

D3

C2

B8

C9

B5

B9

B10

C13

D12

D13

E13

K3

K2

J2

J3

B6

G2

G3

F2

F3

F12

F13

G12

G13

J12

J13

C6

B7

B12

H3

H12

B3

N2

N12

M12

M11

L2

M5

N4

M8

N11

N10

N9

M9

N8

N7

M6

M7

L6

N6

N5

U8900


OMIT

E9

E6

D11

D10

D9

D6

D5

D4

K10

K5

J10

J5

H10

H5

G10

G5

F10

F5

B11

B4

H7

H6

G9

G8

G7

G6

F9

F8

J9

J8

J7

J6

H9

H8

F7

F6

L10

L5

K9

K8

K7

K6

E10

E8

E7

E5

N13

F11

F4

E12

E3

C12

C10

C8

C7

K11

K4

J11

J4

G11

G4

C5

C3

L11

L8

L7

L4

E11

E4

D8

D7

U8900

805

10UF20%6.3VCERM2

1 C890110UF6.3V20%

805CERM2

1 C890020%10V

0.1UF

402CERM2

1 C890920%10V

0.1UF

402CERM2

1 C890820%10V

0.1UF

CERM402

2

1 C89070.1UF20%10VCERM402

2

1 C890620%10V

0.1UF

CERM402

2

1 C890520%10V

0.1UF

402CERM2

1 C890420%10V

0.1UF

CERM402

2

1 C890320%10V

0.1UF

CERM402

2

1 C8902

20%10V

0.1UF

CERM402

2

1 C891820%10V

0.1UF

402CERM2

1 C891720%10V

0.1UF

402CERM2

1 C891620%10V

0.1UF

402CERM2

1 C891520%10V

0.1UF

CERM402

2

1 C891420%10V

0.1UF

402CERM2

1 C89130.1UF20%

CERM10V

4022

1 C891220%10V

0.1UF

402CERM2

1 C8910

10V

0.1UF

CERM402

20%2

1 C8911

10V

0.1UF

CERM

20%

4022

1 C8929

10V

0.1UF

402CERM

20%2

1 C8928

10V

0.1UF

CERM

20%

4022

1 C8927

10V

0.1UF20%

CERM402

2

1 C8926

10V

0.1UF20%

CERM402

2

1 C8925

10V

0.1UF

402CERM

20%2

1 C8924

10V

0.1UF

CERM402

20%2

1 C8923

10V

0.1UF20%

CERM402

2

1 C8922

805

10UF20%6.3VCERM2

1 C8921

805

10UF6.3VCERM

20%2

1 C8920

20%10V

0.1UF

402CERM2

1 C893820%10V

0.1UF

CERM402

2

1 C893720%10V

0.1UF

CERM402

2

1 C893620%10V

0.1UF

CERM402

2

1 C893520%10V

0.1UF

402CERM2

1 C893420%10V

0.1UF

CERM402

2

1 C893320%10V

0.1UF

CERM402

2

1 C893220%10V

0.1UF

402CERM2

1 C893120%10V

0.1UF

CERM402

2

1 C8930


OMIT

E9

E6

D11

D10

D9

D6

D5

D4

K10

K5

J10

J5

H10

H5

G10

G5

F10

F5

B11

B4

H7

H6

G9

G8

G7

G6

F9

F8

J9

J8

J7

J6

H9

H8

F7

F6

L10

L5

K9

K8

K7

K6

E10

E8

E7

E5

N13

F11

F4

E12

E3

C12

C10

C8

C7

K11

K4

J11

J4

G11

G4

C5

C3

L11

L8

L7

L4

E11

E4

D8

D7

U8901

FBGA

OMIT

8MX32-300MHZ-1.8V

L3

M10

L9

M2

N3

M4

M3

L13

L12

H11

H4

C11

C4

M13

B13

H2

H13

B2

K12

K13

E2

D2

D3

C2

B8

C9

B5

B9

B10

C13

D12

D13

E13

K3

K2

J2

J3

B6

G2

G3

F2

F3

F12

F13

G12

G13

J12

J13

C6

B7

B12

H3

H12

B3

N2

N12

M12

M11

L2

M5

N4

M8

N11

N10

N9

M9

N8

N7

M6

M7

L6

N6

N5

U8901

1%

402

4.7K1/16WMF-LF

2

1R8900

402

4.7K1%

1/16WMF-LF

2

1R8950

16V20%0.01UF

CERM402

2

1 C8950

402

4.7K1%

1/16WMF-LF

2

1R8901

0.01UF16V20%

402CERM2

1 C89514.7K

MF-LF402

1%1/16W

2

1R8951

20%10V

0.1UF

402CERM2

1 C891920%10V

0.1UF

CERM402

2

1 C8939

HOLE-VIA1

ZH8900

HOLE-VIA1

ZH8901

HOLE-VIA1

ZH8903

HOLE-VIA1

ZH8902

HOLE-VIA1

ZH8904

HOLE-VIA1

ZH8905

HOLE-VIA1

ZH8906

HOLE-VIA1

ZH8907

HOLE-VIA1

ZH8908

HOLE-VIA1

ZH8909

HOLE-VIA1

ZH8910

HOLE-VIA1

ZH8911

HOLE-VIA1

ZH8912

HOLE-VIA1

ZH8913

HOLE-VIA1

ZH8914

HOLE-VIA1

ZH8915

HOLE-VIA1

ZH8916

HOLE-VIA1

ZH8917

HOLE-VIA1

ZH8918

HOLE-VIA1

ZH8919

HOLE-VIA1

ZH8920

HOLE-VIA1

ZH8921

HOLE-VIA1

ZH8922

HOLE-VIA1

ZH8923

SYNC_MASTER=FINO-DD

GPU GDDR SDRAM A

89 154

07051-6863


SDRAM,8MX32,GDDR,300MHZ,1.8V,SAM FB128MB_300MHZ_SAMCRITICAL2 U8900,U8901333S0311

SDRAM,4MX32,GDDR,300MHZ,1.8V,SAM FB64MB_300MHZ_SAM333S0319 CRITICAL2 U8900,U8901

SDRAM,8MX32,GDDR,350MHZ,1.8V,SAM FB128MB_350MHZ_SAMU8900,U89012 CRITICAL333S0312

333S0314 SDRAM,8MX32,GDDR,300MHZ,1.8V,HYN FB128MB_300MHZ_HYNU8900,U89012 CRITICAL

333S0320 SDRAM,4MX32,GDDR,300MHZ,1.8V,HYN FB64MB_300MHZ_HYNU8900,U89012 CRITICAL

333S0315 SDRAM,8MX32,GDDR,350MHZ,1.8V,HYN FB128MB_350MHZ_HYNCRITICAL2 U8900,U8901

=PPV_GPU_MEM

FBA<9>

FBA<7>

FBA<6>

RFBD<44>

FBACLK1

RFBD<59>

RFBD<39>

RFBD<38>

RFBD<36>

RFBD<56>

RFBD<57>

RFBD<58>

RFBD<61>

RFBD<60>

RFBD<62>

RFBD<63>

RFBD<32>

RFBD<33>

RFBD<35>

RFBD<34>

RFBD<37>

RFBD<48>

RFBD<50>

RFBD<51>

RFBD<49>

RFBD<52>

RFBD<53>

RFBD<54>

RFBD<55>

RFBD<41>

RFBD<40>

RFBD<42>

RFBD<43>

RFBD<45>

RFBD<46>

RFBD<47>

RFBD<1>

RFBD<2>

RFBD<3>

RFBD<0>

RFBD<6>

RFBD<7>

RFBD<5>

RFBD<4>

RFBD<30>

RFBD<31>

RFBD<28>

RFBD<29>

RFBD<27>

RFBD<26>

RFBD<25>

RFBD<24>

RFBD<14>

RFBD<12>

RFBD<15>

RFBD<13>

RFBD<11>

RFBD<10>

RFBD<9>

RFBD<8>

RFBD<23>

RFBD<22>

RFBD<21>

RFBD<20>

RFBD<19>

RFBD<18>

RFBD<17>

RFBD<16>

RFBDQM<3>

RFBDQM<2>

FBACS0_L

FBACLK0

FBACLK0_L

FBA<1>

FBA1_VREF



=PPV_GPU_MEM=PPV_GPU_MEM

FBAWE_L

FBARAS_L

FBACAS_L

FBACKE

FBA<13>

FBA<12>

RFBDQM<0>

RFBDQM<1>

RFBDQS<0>

RFBDQS<2>

RFBDQS<1>

FBA<11>

FBA<10>

FBA<9>

FBA<8>

FBA<6>

FBA<5>

FBA<7>

FBA<4>

FBA<3>

FBA<0>

FBA<2>

RFBDQS<3>

=PPV_GPU_MEM

FBAWE_L

FBARAS_L

FBACAS_L

FBACKE

FBACS0_L

FBACLK1_L

FBA<13>

FBA<12>

RFBDQM<7>

RFBDQM<6>

RFBDQM<4>

RFBDQS<7>

RFBDQM<5>

RFBDQS<5>

RFBDQS<6>

FBA<11>

FBA<10>

FBA<8>

FBA<5>

FBA<4>

FBA<3>

FBA<0>

FBA<1>

FBA<2>

RFBDQS<4>

FBA0_VREFVOLTAGE=0.9V


=PPV_GPU_MEM =PPV_GPU_MEM

90

90 90

90

90 90

89

89

89

89

89

89

89 89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89 89

87

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

87 87

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

87

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

87 87

7

87

87

87

6

87

6

88

6

6

6

6

88

6

6

6

88

6

6

88

6

6

6

6

88

6

6

6

6

88

6

6

6

88

6

88

6

6

6

6

88

6

6

6

88

6

6

6

88

6

6

6

88

6

88

6

6

6

6

88

6

6

6

6

88

6

6

88

6

88

88

87

87

87

87

7 7

87

87

87

87

87

87

88

88

88

88

88

87

87

87

87

87

87

87

87

87

87

87

88

7

87

87

87

87

87

87

87

87

88

88

88

88

88

88

88

87

87

87

87

87

87

87

87

87

88

7 7

Preliminary

A3

A1(1 OF 2)

A8/AP

DQS0DQS1

WECAS

NC

RASCSCKE

DQ30DQ29

DQ27DQ26DQ25

DQ23DQ24

DQ22

DQ18

DQ20DQ19

DQ21

DQ17

DQ14

DQ16DQ15

DQ12DQ13

CKCK

DM2DM3

BA0BA1

DQS3DQS2

DM0

A11A10A9

A7

A4A5A6

A2

A0

DQ7DQ8

DQ10DQ9

DQ11

DQ0DQ1DQ2DQ3

DQ5DQ6

DQ4

MCL/NC

DQ31

DQ28

DM1

RFU1/NCRFU2/NC

VSS

(2 OF 2)

VDD

VSS_THERM

VDDQ

VSSQ

VREF

VSS

(2 OF 2)

VDD

VSS_THERM

VDDQ

VSSQ

VREF

A3

A1(1 OF 2)

A8/AP

DQS0DQS1

WECAS

NC

RASCSCKE

DQ30DQ29

DQ27DQ26DQ25

DQ23DQ24

DQ22

DQ18

DQ20DQ19

DQ21

DQ17

DQ14

DQ16DQ15

DQ12DQ13

CKCK

DM2DM3

BA0BA1

DQS3DQS2

DM0

A11A10A9

A7

A4A5A6

A2

A0

DQ7DQ8

DQ10DQ9

DQ11

DQ0DQ1DQ2DQ3

DQ5DQ6

DQ4

MCL/NC

DQ31

DQ28

DM1

RFU1/NCRFU2/NC

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE


HYNIX

SAMSUNG

GROUND VIAS FOR SIGNAL LAYER TRANSITIONS

NC

NCNC

NC

FBGA8MX32-300MHZ-1.8V

OMIT

L3

M10

L9

M2

N3

M4

M3

L13

L12

H11

H4

C11

C4

M13

B13

H2

H13

B2

K12

K13

E2

D2

D3

C2

B8

C9

B5

B9

B10

C13

D12

D13

E13

K3

K2

J2

J3

B6

G2

G3

F2

F3

F12

F13

G12

G13

J12

J13

C6

B7

B12

H3

H12

B3

N2

N12

M12

M11

L2

M5

N4

M8

N11

N10

N9

M9

N8

N7

M6

M7

L6

N6

N5

U9000


OMIT

E9

E6

D11

D10

D9

D6

D5

D4

K10

K5

J10

J5

H10

H5

G10

G5

F10

F5

B11

B4

H7

H6

G9

G8

G7

G6

F9

F8

J9

J8

J7

J6

H9

H8

F7

F6

L10

L5

K9

K8

K7

K6

E10

E8

E7

E5

N13

F11

F4

E12

E3

C12

C10

C8

C7

K11

K4

J11

J4

G11

G4

C5

C3

L11

L8

L7

L4

E11

E4

D8

D7

U9000

805

10UF20%6.3VCERM2

1 C9001

805

10UF6.3V20%

CERM2

1 C9000

10V

0.1UF20%

CERM402

2

1 C9009

10V

0.1UF20%

CERM402

2

1 C9008

10V

0.1UF

402

20%

CERM2

1 C9007

10V

0.1UF

402CERM

20%2

1 C9006

10V

0.1UF

402

20%

CERM2

1 C900520%

CERM402

10V

0.1UF

2

1 C9004

10V

0.1UF

402

20%

CERM2

1 C9003

10V

0.1UF

402CERM

20%2

1 C9002

0.1UF10V

402CERM

20%2

1 C901820%10V

0.1UF

CERM402

2

1 C901720%10V

0.1UF

CERM402

2

1 C901620%10V

0.1UF

CERM402

2

1 C901520%10V

0.1UF

402CERM2

1 C901420%10V

0.1UF

CERM402

2

1 C9013

CERM

20%10V

0.1UF

4022

1 C901220%10V

0.1UF

CERM402

2

1 C901020%10V

0.1UF

402CERM2

1 C9011

10V

0.1UF

402

20%

CERM2

1 C9029

10V

0.1UF20%

CERM402

2

1 C9028

10V

0.1UF

402

20%

CERM2

1 C9027

10V

0.1UF

402CERM

20%2

1 C9026

10V

0.1UF

402CERM

20%2

1 C9025

10V

0.1UF20%

CERM402

2

1 C9024

10V

0.1UF20%

402CERM2

1 C9023

10V

0.1UF

402CERM

20%2

1 C9022

805

10UF20%6.3VCERM2

1 C9021

805

10UF6.3VCERM

20%2

1 C9020

402

0.1UF10V20%

CERM2

1 C9038

402

20%10V

0.1UF

CERM2

1 C9037

10V20%0.1UF

402CERM2

1 C90360.1UF20%10V

402CERM2

1 C903520%10V

0.1UF

CERM402

2

1 C903420%10V

0.1UF

402CERM2

1 C903320%10V

0.1UF

402CERM2

1 C903220%10V

0.1UF

CERM402

2

1 C903120%10V

0.1UF

402CERM2

1 C9030


OMIT

E9

E6

D11

D10

D9

D6

D5

D4

K10

K5

J10

J5

H10

H5

G10

G5

F10

F5

B11

B4

H7

H6

G9

G8

G7

G6

F9

F8

J9

J8

J7

J6

H9

H8

F7

F6

L10

L5

K9

K8

K7

K6

E10

E8

E7

E5

N13

F11

F4

E12

E3

C12

C10

C8

C7

K11

K4

J11

J4

G11

G4

C5

C3

L11

L8

L7

L4

E11

E4

D8

D7

U9001

FBGA

OMIT

8MX32-300MHZ-1.8V

L3

M10

L9

M2

N3

M4

M3

L13

L12

H11

H4

C11

C4

M13

B13

H2

H13

B2

K12

K13

E2

D2

D3

C2

B8

C9

B5

B9

B10

C13

D12

D13

E13

K3

K2

J2

J3

B6

G2

G3

F2

F3

F12

F13

G12

G13

J12

J13

C6

B7

B12

H3

H12

B3

N2

N12

M12

M11

L2

M5

N4

M8

N11

N10

N9

M9

N8

N7

M6

M7

L6

N6

N5

U9001

MF-LF1/16W

1%4.7K

4022

1R9000

MF-LF1/16W

1%4.7K

4022

1R9050

402CERM

0.01UF20%16V

2

1 C9050

402

4.7K1%

1/16WMF-LF

2

1R9001

16V20%0.01UF

CERM402

2

1 C9051

402

4.7K1%

1/16WMF-LF

2

1R9051

0.1UF10V

402CERM

20%2

1 C90190.1UF10V20%

CERM402

2

1 C9039

HOLE-VIA1

ZH9018

HOLE-VIA1

ZH9019

HOLE-VIA1

ZH9021

HOLE-VIA1

ZH9020

HOLE-VIA1

ZH9022

HOLE-VIA1

ZH9023

HOLE-VIA1

ZH9012

HOLE-VIA1

ZH9013

HOLE-VIA1

ZH9014

HOLE-VIA1

ZH9015

HOLE-VIA1

ZH9016

HOLE-VIA1

ZH9006

HOLE-VIA1

ZH9007

HOLE-VIA1

ZH9009

HOLE-VIA1

ZH9008

HOLE-VIA1

ZH9010

HOLE-VIA1

ZH9017HOLE-VIA

1

ZH9011

HOLE-VIA1

ZH9000

HOLE-VIA1

ZH9001

HOLE-VIA1

ZH9002

HOLE-VIA1

ZH9003

HOLE-VIA1

ZH9004

HOLE-VIA1

ZH9005

SYNC_MASTER=FINO-DD

GPU GDDR SDRAM B

90 154

07051-6863


U9000,U9001333S0314 SDRAM,8MX32,GDDR,300MHZ,1.8V,HYN FB128MB_300MHZ_HYN2 CRITICAL

U9000,U9001333S0320 SDRAM,4MX32,GDDR,300MHZ,1.8V,HYN FB64MB_300MHZ_HYN2 CRITICAL

U9000,U9001SDRAM,8MX32,GDDR,350MHZ,1.8V,SAM FB128MB_350MHZ_SAM2 CRITICAL333S0312

U9000,U9001SDRAM,8MX32,GDDR,300MHZ,1.8V,SAM FB128MB_300MHZ_SAMCRITICAL2333S0311

U9000,U9001SDRAM,4MX32,GDDR,300MHZ,1.8V,SAM FB64MB_300MHZ_SAM333S0319 CRITICAL2

U9000,U9001333S0315 SDRAM,8MX32,GDDR,350MHZ,1.8V,HYN FB128MB_350MHZ_HYNCRITICAL2

=PPV_GPU_MEM

RFBD<90>

RFBD<91>

RFBDQM<8>

RFBDQS<10>

RFBDQS<9>

RFBDQS<11>

RFBDQS<8>

=PPV_GPU_MEM

RFBD<72>

RFBD<73>

RFBD<75>

RFBDQM<10>

RFBD<74>

RFBD<86>

RFBD<83>

RFBD<84>

FBBA<6>

FBBA<7>

RFBD<101>

RFBD<104>

RFBD<105>

RFBD<107>

RFBD<108>

RFBD<106>

RFBD<110>

RFBD<109>

RFBD<111>

RFBD<102>

RFBD<97>

RFBD<96>

RFBD<99>

RFBD<100>

RFBD<98>

FBBCLK1

FBBCLK1_L

FBBCS0_L

FBBRAS_L

FBBWE_L

FBBA<13>

RFBDQS<14>

RFBDQM<12>

RFBDQM<15>

RFBDQM<14>

FBBA<12>

FBBA<3>

FBBA<4>

FBBA<5>

FBBA<8>

FBBA<11>

FBBA<10>

FBBA<9>

RFBDQS<15>

RFBDQS<12>

FBBA<1>

FBBA<0>

=PPV_GPU_MEM

RFBD<89>

RFBD<79>

RFBD<82>

RFBD<78>

RFBD<88>

RFBD<85>

RFBD<87>

RFBD<80>

RFBD<81>

RFBD<76>

RFBD<77>

RFBD<92>

RFBD<95>

RFBD<66>

RFBD<70>

RFBD<68>

RFBD<69>

RFBD<67>

RFBD<93>

FBBCLK0_L

FBBCAS_L

FBBCKE

FBBCS0_L

FBBRAS_L

FBBWE_L

FBBCLK0

FBBA<12>

RFBDQM<11>

FBBA<13>

FBBA<7>

FBBA<11>

FBBA<10>

FBBA<9>

FBBA<8>

FBBA<3>

FBBA<0>

FBBA<2>

FBBA<1>

=PPV_GPU_MEM

VOLTAGE=0.9VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM

FBB0_VREF


FBB1_VREF

=PPV_GPU_MEM

FBBCAS_L

FBBCKE

FBBA<2>

RFBD<126>

RFBD<123>

RFBD<121>

RFBD<122>

RFBD<127>

RFBD<125>

RFBD<120>

RFBD<113>

RFBD<112>

RFBD<118>

RFBD<119>

RFBD<116>

RFBD<117>

RFBD<115>

RFBD<71>

RFBD<124>

RFBD<103>

RFBDQM<13>

RFBDQS<13>

RFBD<114>

RFBD<65>

FBBA<4>

FBBA<5>

FBBA<6>

RFBDQM<9>

=PPV_GPU_MEM

RFBD<64>

RFBD<94>

90

90

90

90

90

90

89

89

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

89

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

89

89

90

90

90

90

90

90

89

87

88

88

87

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

87

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

87

87

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

87

88

7

6

6

88

88

88

88

88

7

6

88

6

88

6

6

6

88

87

87

6

6

6

88

6

6

6

6

88

6

6

6

88

6

6

87

87

87

87

87

87

88

88

88

88

87

87

87

87

87

87

87

87

88

88

87

87

7

88

6

6

6

6

6

6

88

6

6

88

6

6

6

6

88

6

6

88

87

87

87

87

87

87

87

87

88

87

87

87

87

87

87

87

87

87

87

7

7

87

87

87

6

88

6

6

88

6

6

6

6

6

88

6

6

88

6

6

88

88

88

6

6

87

87

87

88

7

88

6

Preliminary

VREF

VTT

GND

VTT_IN

ENVTTS

VDDQ VCC

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

GPU VTT VREG

353S1122

FRAME BUFFER B TERMINATIONFRAME BUFFER A TERMINATION

56 81 RP9100

402CERM10V20%0.1UF

2

1 C9101

56 81 RP9116

56 54 RP9116

20%0.1UF

402

10VCERM2

1 C9117

0.1UF10V

402CERM

20%2

1 C9119

56 72 RP9116

56 63 RP9116

56 63 RP911756 81 RP9117

56 72 RP9117

56 54 RP9117

56 72 RP9118

56 63 RP911856 81 RP9118

56 54 RP9118

56 72 RP9119

56 81 RP9119

56 63 RP911956 54 RP9119

402

0.1UF20%10VCERM2

1 C9121

402CERM10V20%0.1UF

2

1 C9123

0.1UF20%10VCERM402

2

1 C9103

0.1UF10V20%

CERM402

2

1 C9125

56 81 RP9120

56 72 RP9120

56 54 RP912056 63 RP9120

56 72 RP912156 81 RP9121

56 63 RP9121

56 72 RP912256 54 RP9121

56 81 RP9122

56 54 RP9122

56 63 RP9122

56 81 RP912356 72 RP9123

56 54 RP9123

56 81 RP912456 63 RP9123

56 72 RP9102

56 72 RP9124

56 63 RP9124

56 54 RP9124

56 81 RP9125

56 72 RP9125

56 63 RP9125

56 54 RP9125

56 81 RP9126

56 81 RP9102

402

10V

0.1UF20%

CERM2

1 C9127

10V

402CERM

20%0.1UF

2

1 C9129

0.1UF20%10VCERM402

2

1 C9131

56 63 RP912656 72 RP9126

56 54 RP9126

56 54 RP9102

56 81 RP9127

56 72 RP9127

56 63 RP9127

56 54 RP9127

56 72 RP9128

56 81 RP9128

56 63 RP9128

56 72 RP912956 54 RP9128

56 81 RP9129

56 63 RP9102

56 63 RP9129

56 54 RP9129

56 81 RP9130

56 72 RP9130

56 54 RP9130

56 81 RP913156 63 RP9130

56 63 RP9131

56 72 RP9131

56 54 RP9131

56 54 RP9100

56 72 RP9103

0.1UF20%10VCERM402

2

1 C9141

20%10VCERM402

0.1UF

2

1 C9149

56 81 RP9103

56 63 RP9103

402CERM10V20%0.1UF

2

1 C9157

56 54 RP9103

402CERM10V20%0.1UF

2

1 C9161

402CERM10V20%0.1UF

2

1 C9169

0.1UF20%10VCERM402

2

1 C9177

0.1UF20%

402CERM10V

2

1 C9105

56

402

21

R9100

402

5621

R9101

402

5621

R9102

56

402

21

R9103

402

5621

R9104

56

402

21

R9105

402

5621

R9106

56

402

21

R9107

402

5621

R9108

56

402

21

R9109

402

5621

R9110

56

402

21

R9111

56 72 RP9104

402

5621

R9112

56

402

21

R9113

56

402

21

R9114

56

402

21

R9115

56

402

21

R9116

402

5621

R9118

402

5621

R9117

56

402

21

R9119

56

402

21

R9121402

5621

R912056 81 RP9104

56

402

21

R9123402

5621

R9122

402

5621

R9126

56

402

21

R9125402

5621

R9124

402

5621

R9129402

5621

R9128

56

402

21

R9127

56

402

21

R9131402

5621

R9130

56 63 RP9104

CASE-C1

20%

ELEC

220UF16V2

1 C9182

402CERM6.3V10%1UF

2

1 C9181

402MF-LF1/16W5%1K

2

1R9180

402

1UF10%6.3VCERM2

1 C9183

56 63 RP9100

56 54 RP9104

56 21 R914056 21 R914156 21 R914256 21 R914356 21 R914456 21 R914556 21 R9146

56 72 RP9105

56 21 R914756 21 R914856 21 R9149

56 21 R915156 21 R9150

56 21 R915256 21 R9153

56 21 R915656 21 R915556 21 R9154

56 81 RP9105

56 21 R915756 21 R9158

56 21 R916156 21 R9160

56 21 R9162

56 21 R916656 21 R916556 21 R916456 21 R9163

56 21 R9167

56 63 RP9105

56 21 R9172

56 21 R917056 21 R9171

56 21 R916956 21 R9168

56 21 R917456 21 R917556 21 R9176

56 21 R9173

56 21 R9178

56 54 RP9105

56 21 R9177

BD3533FVMMSOP-8

3

7

8

4

5 6

1

2

U9180

0

5%1/16WMF-LF402

21

R9181

NOSTUFF

MF-LF1/16W5%

0

402

21

R9182

CERM

20%6.3V

10UF

8052

1C9180

402CERM

20%0.1UF10V

2

1 C9107

56 81 RP9106

56 72 RP9106

56 72 RP9100

56 54 RP9106

56 63 RP9106

56 81 RP910756 72 RP9107

56 54 RP9107

56 63 RP9107

56 72 RP9108

402

0.1UF20%10VCERM2

1 C9109

56 81 RP9101

56 81 RP910956 54 RP910856 63 RP910856 81 RP9108

56 72 RP9109

56 63 RP9109

56 54 RP9109

56 72 RP9101

402CERM10V20%0.1UF

2

1 C9111

CERM402

0.1UF20%10V

2

1 C9113

10VCERM

20%0.1UF

4022

1 C9115

56 72 RP9110

56 81 RP9110

56 54 RP911056 63 RP9110

56 54 RP9101

56 72 RP911156 81 RP9111

56 54 RP9111

56 81 RP911256 63 RP9111

56 63 RP9112

56 72 RP9112

56 54 RP9112

56 81 RP911356 72 RP9113

56 63 RP9113

56 81 RP911456 54 RP9113

56 72 RP9114

56 54 RP9114

56 63 RP9114

56 81 RP9115

56 63 RP9115

56 72 RP9115

56 54 RP9115

56 63 RP9101

SYNC_MASTER=M33-DD

07

15491

051-6863

FB Parallel TerminationSYNC_DATE=MASTER

=PPV_GPU_VTT

FBD<78>

=PPV_GPU_VTT

FBD<86>

FBD<88>

FBD<79>

FBDQM<10>

FBD<116>

FBD<110>

FBD<109>

FBD<108>

FBD<28>

FBD<27>

FBD<15>

FBBCKE

FBBCS0_L

FBBWE_L

FBBCAS_L

FBBRAS_L

FBBA<11>

FBBA<13>

FBBA<12>

FBBA<9>

FBBA<10>

FBBA<7>

FBBA<8>

FBBA<6>

FBBA<5>

FBBA<4>

FBBA<1>

FBBA<2>

FBBA<3>

FBBA<0>

FBD<124>

FBD<125>

FBD<127>

FBA<2>

FBA<0>

FBA<1>

FBA<3>

FBA<7>

FBA<4>

FBA<5>

FBA<6>

FBA<8>

FBA<13>

FBA<12>

FBA<10>

FBA<11>

FBA<9>

FBACS0_L

FBAWE_L

FBACAS_L

FBARAS_L

FBACKE

FBD<63>

FBD<57>

FBD<58>FBDQS<7>

FBDQM<7>

FBDQM<6>

FBDQS<6>

FBDQM<5>

FBDQS<5>

FBDQM<4>

FBDQS<4>

FBDQS<3>

FBDQM<3>

FBD<61>

FBD<62>

FBD<60>

FBD<55>

FBD<56>

FBD<59>

FBD<54>

FBD<52>

FBD<51>

FBD<53>

FBD<49>

FBD<45>

FBD<46>

FBD<47>

FBD<48>

FBD<44>

FBD<43>

FBD<42>

FBD<39>

FBD<41>

FBD<40>

FBD<34>

FBD<35>

FBD<36>

FBD<37>

FBD<38>

FBD<32>

FBD<30>

FBD<31>

FBD<33>

FBD<25>

FBDQS<2>

FBDQM<2>

FBDQS<1>

FBDQM<0>

FBDQM<1>

FBDQS<0>

FBD<23>

FBD<14>

FBD<13>

FBD<11>

FBD<10>

FBD<9>

FBD<12>

FBD<8>

FBD<4>

FBD<5>

FBD<6>

FBD<3>

FBD<0>

FBD<1>

FBD<2>

=PPV_GPU_VTT

FBD<64>

FBD<65>

FBD<66>

FBD<67>

FBDQS<8>

FBD<68>

FBD<69>

FBD<71>

FBD<72>

FBD<70>

FBD<81>

FBD<80>

FBD<85>

FBD<84>

FBD<87>

FBDQM<8>

FBDQS<9>

FBDQM<9>

FBDQS<10>

FBD<90>

FBD<100>

FBD<99>

FBD<102>

FBD<101>

FBD<105>

FBD<106>

FBD<107>

FBDQM<11>

FBDQM<12>

FBDQS<12>

FBDQS<13>

FBD<112>

FBD<113>

FBD<111>

FBD<114>

FBD<115>

FBD<117>

FBD<118>

FBD<120>

FBD<121>

FBD<122>

FBD<126>

FBDQM<13>

FBDQS<14>

FBDQM<14>

FBDQS<15>

FBDQM<15>

FBDQS<11>

FBD<29>

FBD<98>

FBD<93>

FBD<94>

FBD<103>

FBD<104>

FBD<96>

FBD<97>

FBD<95>

FBD<92>

FBD<91>

FBD<82>

FBD<83>

FBD<89>

FBD<73>

FBD<74>

FBD<75>

FBD<76>

FBD<77>

FBD<119>

FBD<123>

=PPV_GPU_VTT

FBD<50>

FBD<26>

FBD<24>

FBD<22>

FBD<21>

FBD<20>

FBD<19>

FBD<18>

FBD<17>

FBD<16>

FBD<7>

=PP5V_GPU

=PP3V3_GPU

VOLTAGE=3.3V


PPVCC_VTT_VREG

=PPV_GPU_MEM

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MMMAKE_BASE=TRUEVOLTAGE=0.9V

PPV_GPU_VTT

GPU_VTT_VREF

GPU_VTT_EN

=PPV_GPU_VTT

96 93

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

90

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

89

92

89

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88 88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

88

92

85

87

91

87

91

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87 87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

91

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

87

91

87

87

87

87

87

87

87

87

87

87

87

7

7

7

91

Preliminary

RESET

TRIGGER

THRESHOLD

DISCHARGE

OUTCONTROL

VCC

GND

555_TIMER

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

GPIO<5> FORCE_COMPLIANCE

GPIO<8> DEBUG_ACCESS

GPIO<4> EXTRA TX OUTPUT CURRENT

GPIO<6> CM_RANGE

ROMIDCFG

0 - 4MX32

1 - 8MX32

1 - HYNIX

0 - SAMSUNG

GPIO<14> - MEMORY DENSITY

00 - 325E / 200M

01 - 400E / 300M

10 - 500E / 350M

11 - RESERVED FOR FUTURE USE

DVPDATA<3,4> - SPEED

GPIO<7> - MEMORY DIE REVISION

0 - ORIGINAL DIE REVISION

1 - NEW (FUTURE) DIE REV

GPIO<10> - MEMORY VENDOR

MEMORY STRAPS

GPIO<1> TRANSMITTER DE-EMPHASIS (ACTIVE LOW) GPIO<0> TRANSMITTER POWER SAVINGS

(FEATURE DOES NOT WORK - PULLED HIGH TO DISABLE)

ATI STRAPS

PROTO1 HACK TO PROVIDE 91% DUTY CYCLE 25KHZ PWM

C

RB

NC

APPLE GPIOS

RA

402

10K5%

MF-LF1/16W

FB64MB_300MHZ_SAM&FB64MB_300MHZ_HYN

2

1R9203

402

10K

MF-LF

5%1/16W

RV380XT

2

1R9226

402

10K5%

MF-LF1/16W

RV370XT

2

1R9227

RV370XT

1/16W5%

MF-LF

10K

4022

1R9228

RV380XT

1/16WMF-LF

5%10K

4022

1R9229

1/16W5%

0

402MF-LF

21

R9256

MF-LF1/16W5%

402

10K

2

1R9212

10K

402

5%1/16WMF-LF

NOSTUFF

2

1R9200

MF-LF1/16W5%10K

4022

1R9201

10VCERM

20%

402

0.1UF2

1 C9230

1/16WMF-LF

5%

47

402

21

R9240

1/16W5%

47

402MF-LF

21

R9235

10K

NOSTUFF

MF-LF1/16W

402

1%

2

1R9232SOT23-5-LFMC74VHC1G08

5

4

1

2

3

U9230

NOSTUFF

402

0

5%

MF-LF1/16W

21

R9231

NOSTUFF

0.1UF

CERM

20%10V

4022

1 C9245

NOSTUFF

SOT23-5-LFMC74VHC1G08

5

4

1

2

3

U9245

402

0

5%1/16WMF-LF

21

R9245

402MF-LF1/16W5%10K

2

1R9207

MF-LF402

1/16W

10K5%

2

1R9209

402MF-LF1/16W5%10K

2

1R9211

MF-LF402

1/16W

10K5%

NOSTUFF

2

1R9213

5%

NOSTUFF

MF-LF

10K1/16W

4022

1R9222

MF-LF1/16W5%10K

402

FB64MB_300MHZ_HYN&FB128MB_300MHZ_HYN&FB128MB_350MHZ_HYN

2

1R9224

402MF-LF

5%1/16W

10K

2

1R9223

402

10K5%1/16WMF-LF

FB64MB_300MHZ_SAM&FB128MB_300MHZ_SAM&FB128MB_350MHZ_SAM

2

1R9225

NOSTUFF

10K

402

1%1/16WMF-LF

2

1R9230

NOSTUFF

MF-LF1/16W

5%0

4022

1R9233NOSTUFF

MF-LF

5%0

402

1/16W

2

1R9234

NOSTUFF

402

10K5%1/16WMF-LF

2

1R9242

402

10K5%1/16WMF-LF

NOSTUFF

2

1R9243402

47

5%1/16WMF-LF

21

R9244

MF-LF1/16W5%

402

10K

2

1R9204

MF-LF402

1/16W

10K5%

2

1R9221

402MF-LF1/16W5%10K

2

1R9219

402MF-LF1/16W

10K5%

2

1R9217

MF-LF1/16W

10K5%

4022

1R9215

DEVELOPMENT

SOI

8

2

6

4

3

1

7

5

U9250

MF-LF1/16W5%

2

DEVELOPMENT

402

21

R9250

DEVELOPMENT

402MF-LF1/16W1%10K

2

1R9251

DEVELOPMENT

402

1K1%1/16WMF-LF

2

1R9252

DEVELOPMENT

402CERM25V10%0.0047UF

2

1 C9252

DEVELOPMENT

4.99K1%1/16WMF-LF4022

1R9253

10K

DEVELOPMENT

1%1/16WMF-LF4022

1R9254

MF-LF1/16W5%

0

402

NOSTUFF

21

R92551UF

DEVELOPMENT

CERM6.3V10%

4022

1 C9250

10K1/16WMF-LF

5%

4022

1R9246

402

10K

MF-LF

5%1/16W

FB128MB_300MHZ_SAM&FB128MB_300MHZ_HYN&FB128MB_350MHZ_SAM&FB128MB_350MHZ_HYN

2

1R9202

GPU Straps

15492

051-6863 07


GPU_PWM

T555_PWM

PCI_RESET_L

LCD_PWM_R

GPU_DVPDATA<2>

=PP3V3_GPU

=PP3V3_GPU

=PP3V3_GPU

GPU_DVPDATA<1>

FPD_PWR_ON

=PP3V3_GPU

LCD_PWM

TMDS_EN

INV_CUR_HIGPU_DVPDATA<0>

PCI_RESET_L

FPD_PWR_ON

FPD_PWR_ON

T555_OUT

T555_THRES

T555_DISC

=PP5V_GPU

GPU_PWM_R

VOLTAGE=5V


PP5V_T555

GPU_GPIO<0>

=PP3V3_GPU

GPU_GPIO<1>

=PP3V3_GPU

GPU_DVPDATA<4>

GPU_DVPDATA<3>

GPU_GPIO<14>

GPU_GPIO<10>

GPU_GPIO<7>

GPU_GPIO<11>

GPU_GPIO<9>

GPU_GPIO<13>

GPU_GPIO<12>

=PP3V3_GPU

GPU_GPIO<5>

GPU_GPIO<8>

=PP3V3_GPU

GPU_GPIO<4>

GPU_GPIO<6>

96

96

96

96

96

96

96

96

93

93

93

93

93

93

93

93

119

92

92

92

92

119

92

92

92

92

92

85

85

85

96

85

92

96

96

85

85

85

85

93

9

20

93

7

7

7

93

92

7

96

96

96 93

20

92

92

9

9

9

7 9

93

7

93

7

93

93

93

93

93

93

93

93

93

7

93

93

7

93

93

Preliminary

PLLTEST

HPD1

DPLUSDMINUS

A2VSSQ

A2VDDQ

A2VSSN

A2VDD

AVSSQ

AVSSN

AVDD

VSS2DI

VDD2DI

VSS1DI

VDD1DI

TPVSS

TPVDD

TXVSSR

TXVDDR

DDC2DATADDC2CLK

R2SET

V2SYNCH2SYNCCOMP_B

Y_GC_R

STEREOSYNCGPIO_AUXWIN

DDC1DATADDC1CLK

VSYNC

RSET

G

HSYNCB

R

DDC3DATADDC3CLK

TX2M*TX2PTX1M*TX1PTX0M*TX0PTXCM*TXCP

TESTENTEST_YCLKTEST_MCLK

XTALINXTALOUT

VREFG

ROMCS*

GPIO

DVPCNTL

DVPDATA

DVOMODE

VDDR4VDDR3

NCNC

3

2

1

0

23

22

21

20

19

18

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

(5 OF 5)

TEST

CLK

EXTERNAL TMDS

17

16

7

11

10

9

8

6

5

4

3

2

1

0

12

13

14

GPIO+PWRCNTL

GPIO_MEMSSIN

TMDS

DAC2

DAC1

NO CONNECTS

OE

GND

OUT

VCC

OSC

XIN/CLKINSSCLK

VSSS0S1

FRSEL

XOUT

VDD

ADD1

ADD0

ALERT

SMBDATA

SMBCLK

VCC

NC_5

NC_1

STBY

DXP

NC_16

GND

NC_9

NC_13

DXN

(SYM_VER2)

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_5_ITEM



S0=1;S1=M => -1.5% DOWN-SPREADSPREAD SPECTRUM SUPPORT

GPU THERMAL SENSOR

A0 | A1 | ADDR

PLACE C9392 CLOSE TO TEMP SENSOR

----+----+------

0 | 0 | 30/31 0 | hiZ| 32/33

1 | 0 | 98/99hiZ | 1 | 56/57

1 | hiZ| 9A/9B

hiZ | hiZ| 54/55

1 | 1 | 9C/9D

hiZ | 0 | 52/53

0 | 1 | 34/35

*

(PLACE THE OSCILLATOR AND R9372 AND R9373

ROUTE GND IN BETWEEN RGB SIGNALS WITH A VIA EVERY INCH

PLACE R9321-3 & FL9600-2 NEAR MINI-VGA CONNECTOR

NC

(PLACE R9371 CLOSE TO OSC)27M OSC NC

NC

NC

NC

NC

NC

NC

NC

CLOSE TO ATI PIN AH28)

DIFFERENTIAL_PAIRNET_SPACING_TYPENET_PHYSICAL_TYPEELECTRICAL_CONSTRAINT_SET

DIFFERENTIAL IMPEDANCE SHOULD BE 100 OHM

402

7151%1/16WMF-LF

2

1R9324

1UF10%6.3VCERM402

2

1 C9303

CERM6.3V10%1UF

4022

1 C9302

402

1UF10%6.3VCERM2

1 C9301

MF-LF

1K1%

1/16W

4022

1R9316

1K1%

MF-LF1/16W

4022

1R9317

402

0.1UF20%10VCERM2

1 C9317

402

751%1/16WMF-LF

2

1R9321

MF-LF1/16W

402

4991%

2

1R9320

402MF-LF1/16W1%75

2

1R93221%1/16WMF-LF402

75

2

1R9323

CERM

0.1UF20%10V

4022

1 C9331

805

20%

CERM6.3V

4.7UF

2

1 C9330

NOSTUFF

0805

1.8UH21

L9330

SM

21

XW9330CERM402

0.1UF20%10V2

1 C9332

402

0.1UF20%

CERM10V2

1 C9333

402

0.1UF20%10VCERM2

1 C9337

402CERM

0.1UF20%10V2

1 C93364.7UF

805

20%6.3VCERM2

1 C93350805

FERR-220-OHM21

L9335

SM

21

XW9335

10V20%0.1UF

CERM402

2

1 C9341

CERM6.3V20%

805

4.7UF

2

1 C9340

FERR-220-OHM

0805

21

L9340

SM

21

XW9340

402CERM

0.1UF20%10V2

1 C9346

CERM805

6.3V

4.7UF20%

2

1 C9345

FERR-220-OHM

0805

21

L9345

SM

21

XW9345

10V20%0.1UF

CERM402

2

1 C9356

CERM6.3V20%

805

4.7UF

2

1 C9355

SM

21

XW9355

FERR-220-OHM

0805

21

L9365

402CERM

0.1UF20%10V

2

1 C9366

CERM6.3V20%4.7UF

8052

1 C9365

SM

21

XW9365

MF-LF1/16W

5%10K

4022

1R9325

SM

21

XW9347

I572

I573

I574

I575

I576

I577

I578

I579

I589

I590

I591

DEVELOPMENT

402MF-LF1/16W

1%75

2

1R9326

BGARV370XT

OMIT

AK21

AJ29

AH28

AK25AE21

AE24

AG4

AG7

AD10

AD9

AC10

AC9

AD21

AD19

AD7

AC22

AC21

AC19

AC8

AE22

AE23

AK24

AH14

AG14

AG13

AF14

AF13 AK12

AJ12

AK16

AK15

AJ15

AJ14

AJ13

AK13

AH12

AH13

AH27

E8

B6

AH25

AH26

AF5

AH21

AK27

AF25

AE16

AE15

AE12

AB4

T4

E4

AK18

AJ23

AJ21

AJ20

AJ19

AJ18

AJ17

AJ16

AH24

D25

AH19

AH18

AH17

AH16

AH15

AG20

AG18

AG17

AG16

AG15

D19

AG12

AF20

AF19

AF18

AF17

AF16

AF15

AE19

AE18

AE17

D13

D9

AJ25

AF12

AJ24

AF3

AF2

AG24

AJ2

AH3

AK3

AJ3

AF4

AH4

AK4

AJ4

AG2

AG1

AG3

AH1

AH2

AH5

AJ5

AJ27

AJ9

AH9

AJ8

AH8

AJ7

AK7

AH7

AF10

AG10

AF9

AE9

AK6

AF8

AG8

AE8

AF7

AE7

AF6

AG6

AE6

AH10

AK9

AJ6

AH6

AH11

AJ11

AK10

AJ10

AE10

AF11

AE11

AG23

AG22

AE14

AE13

AG25

AF24

AK22

AJ22

AJ26

AD22

AH22

AH23

AF22

AH20

AG21

AF23

AF21

AE20

U8400

MF-LF

5%1/16W

402

10K

2

1R9318

402

0

MF-LF

5%1/16W

21

R9319

4.7uF20%6.3VCERM805

2

1 C9371

402CERM

20%10V

0.1uF

2

1C9370NOSTUFF

MF-LF1/16W5%100K

4022

1R9370

27.0000MSM-1

CRITICAL 14

81

7

G9370

FERR-EMI-100-OHM

SM

21

L9370GPU_SS

402

05%1/16WMF-LF

2

1R9371

1/16W

402

33

5%

MF-LF

GPU_SS

21

R9385

CRITICALGPU_SS

SOICY25811

8

1

2

7

5

3

4

6

U9380

0.1uF20%10VCERM

GPU_SS

4022

1 C9381

805CERM

GPU_SS

6.3V20%

10uF

2

1C9380

GPU_SS

FERR-EMI-100-OHM

SM

21

L9380

402

0

MF-LF1/16W5%

GPU_SS

2

1R9381

402

05%

1/16WMF-LF

NOSTUFF

2

1R9383

402

NOSTUFF

05%

1/16WMF-LF

2

1R9382

MF-LF1/16W5%0

NOSTUFF

4022

1R9380

MF-LF1/16W1%

215

402

21

R9372

OMIT

130

402

1%1/16WMF-LF

2

1R9373

MF-LF402

1K

5%1/16W

21

R932710K

402

1/16W5%

MF-LF2

1R9310

6.3V

4.7UF

805

20%

CERM2

1 C9300

10V20%0.1UF

CERM402

2

1 C9357

10V20%0.1UF

402CERM2

1 C9342

I660

I661

NOSTUFF

402

0

MF-LF

5%1/16W

21

R9395

1K5%1/16WMF-LF402

DEVELOPMENT

2

1R9393

MF-LF1/16W5%1K

402

NOSTUFF

2

1R9394

402

DEVELOPMENT

1K5%

1/16WMF-LF

2

1R9391

QSOP

MAX6690MEE

DEVELOPMENT2

15

12

14

9

5

16

13

1

87

3

4

11

6

10

U9390

NOSTUFF

1K5%

1/16WMF-LF

4022

1R9392

0.0022UF10%50V

CERM402

DEVELOPMENT

2

1C9392

402

0.1UF10V20%

CERM

DEVELOPMENT

2

1 C9390402

200

5%1/16WMF-LF

DEVELOPMENT

21

R9390

I680

I681

I682

I683


93

07051-6863

154

GPU DVI & DACs

1 RV380XTRES,140 OHM,1/16W,1%,0402114S0134 R9373

RV370XT1 R9373RES,130 OHM,1/16W,1%,0402114S0131

TMDS_CKGPU_TMDSTMDS_CKM GPU_TMDS

TMDS0 TMDS_D0GPU_TMDSTMDS_D0P GPU_TMDS

TMDS_D0GPU_TMDSTMDS_D0M GPU_TMDS


ANALOG_BLU GPU_VGAGPU_VGA

I2C_GPU_TMDS_SCL I2C

I2CI2C_GPU_MON_SCL

I2CI2C_GPU_MON_SDA

I2CI2C_GPU_TMDS_SDA

ANALOG_VSYNC GPU_VGAGPU_VGA

GPU_VGAANALOG_HSYNC GPU_VGA

ANALOG_RED GPU_VGAGPU_VGA

ANALOG_GRN GPU_VGAGPU_VGA

TMDS0 TMDS_D2GPU_TMDSTMDS_D2P GPU_TMDS


TMDS0 GPU_TMDS TMDS_D1TMDS_D1P GPU_TMDS

TMDS_TCKM TMDS_CKGPU_TMDSTMDS_CKP GPU_TMDS

TP_GPU_DVPDATA<13>

=PP3V3_GPU

TMDS_D2P

I2C_GPU_TMDS_SCL

TP_GPU_HSYNC

TP_GPU_DDC1CLK

ANALOG_BLU

ANALOG_RED

ANALOG_GRN

PP2V5_GPU_A2VDD

VOLTAGE=0VGND_GPU_VSSDI


VOLTAGE=1.8VPP1V8_GPU_AVDD


GND_GPU_A2VSSN


MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MMVOLTAGE=1.8VPP1V8_GPU_A2VDDQ

NET_SPACING_TYPE=CLOCKSGPU_CLK27M_IN

TP_GPU_GPIO<2>

GPU_GPIO<1>

VOLTAGE=3.3VMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM

PP3V3_GPU_OSC

GPU_CLK27M_OSC_SSNET_SPACING_TYPE=CLOCKS

TP_GPU_DVPDATA<21>

GPU_DVPCNTL

=PP3V3_GPU

GPU_DVPDATA<4>

TP_GPU_DVPDATA<6>

TP_GPU_DVPDATA<7>

TP_GPU_DVPDATA<8>CY25811_S1CY25811_S0

MIN_LINE_WIDTH=0.5MMVOLTAGE=1.8V


PP1V8_GPU_VDDDI

GND_GPU_AVSSNVOLTAGE=0VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM

GPU_CLK27M_OSCNET_SPACING_TYPE=CLOCKS

GPU_GPIO<8>

I2C_GPU_MON_SCL

ANALOG_HSYNC

TMDS_CKM

GPU_GPIO<13>

GPU_GPIO<12>

GPU_GPIO<11>

GPU_GPIO<10>

GPU_GPIO<6>

GPU_GPIO<5>

TP_GPU_GPIO<3>

GPU_GPIO<4>

GPU_GPIO<0>

TP_GPU_DVPDATA<23>

TP_GPU_DVPDATA<22>

TP_GPU_DVPDATA<19>

TP_GPU_DVPDATA<18>

TP_GPU_DVPDATA<16>

TP_GPU_DVPDATA<15>

TP_GPU_DVPDATA<14>

TP_GPU_DVPDATA<12>

TP_GPU_DVPDATA<11>

TP_GPU_DVPDATA<10>

TP_GPU_DVPDATA<9>

GPU_DVPDATA<2>


VOLTAGE=0VGND_GPU_AVSSQ



PP1V8_GPU_TPVDD


VOLTAGE=0VMIN_LINE_WIDTH=0.5MM

GND_GPU_TPVSS

=PP1V8_GPU

VOLTAGE=0VMIN_LINE_WIDTH=0.5MM

GND_GPU_TXVSSR


MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MMVOLTAGE=1.8VPP1V8_GPU_TXVDDR

GPU_R2SET


GPU_GPIO<9>

GPU_GPIO<7>

GPU_PWM

TP_GPU_DVPDATA<20>

ANALOG_VSYNC

GPU_DIODE_PLUS

GPU_DIODE_MINUS

GPU_GPIO<14>

=PP3V3_GPU

GPU_SSCLK_UFNET_SPACING_TYPE=CLOCKS

=PP3V3_GPU

ATI_GPU_OE MON_DETECT_R

=PP3V3_GPU

MON_DETECT

GPU_TESTEN

TP_GPU_DDC1DATA

PP3V3_GPU_SS


GND_GPU_AVSSQ

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MMVOLTAGE=0VGND_GPU_A2VSSQ

GPU_MEMSSINNET_SPACING_TYPE=CLOCKS

=PP3V3_GPU

GPU_VREFG


=PP3V3_GPU

I2C_GPU_MON_SDA

GPU_DVPDATA<1>

GPU_DVPDATA<0>

TP_GPU_DVPDATA<5>

TP_GPU_DVPDATA<17>

GPU_DVPDATA<3>

GPU_DIODE_PLUSMIN_LINE_WIDTH=0.25mmMIN_NECK_WIDTH=0.2MM

GPU_DIODE_MINUSMIN_LINE_WIDTH=0.25mmMIN_NECK_WIDTH=0.2MM

SYS_OVERTEMP_L

TSENSE_GPU_ADD1

I2C_GPU_DIODE_SDA

I2C_GPU_DIODE_SCL

TSENSE_GPU_OVERTEMP_L

TSENSE_GPU_ADD0


PP3V3_GPU_TSENSE

GPU_STEREOSYNC MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM

GPU_RSET

GPU_DAC1_VSYNC

TMDS_D2M

TMDS_D0M

TMDS_D0P

TMDS_D1P

TMDS_D1M

TMDS_CKP

I2C_GPU_TMDS_SDA

96

96

96

96

96

96

96

93

93

87

93

93

93

93

93

92

92

86

92

92

92

92

92

28

96

96

96

96

96

96

96

96

96

96

96

96

96

96

96

96

96

85

96

96

96

96

96

85

96

96

96

93

85

96

93

93

85

85

85

93

85

85

96

93

93

24

96

96

96

96

96

96

96

93

93

93

93

93

93

93

93

93

93

93

93

93

93

93

93

93

7

93

93

93

93

93

85

6

6

92

7

92

6

92

93

93

93

92

92

92

92

92

92

92

92

92

6

85

6

84

6

92

92

92

93

9

9

92

7

7

7

96

6

6

7

7

93

92

92

92

9

9

20

9

39

39

9

9

9

93

93

93

93

93

93

93

Preliminary

125

G

S D

G

S D

125

125

G

D

S

S2

GATE

S1

S3 D4D3

D2

D1

SYM_VER-1

SYM_VER-1

SYM_VER-1

SYM_VER-1

LCFILTER

LCFILTER

LCFILTER

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PIN 15 NC REQUESTED BY EMC

M33: 514S0097

PLACE R9321-3 & FL9600-2 CLOSE TO J9603

(RED_RTN)

(GRN_RTN)

NC

(BLU_RTN)

NET_PHYSICAL_TYPE NET_SPACING_TYPE

AS CLOSE TO GPU AS POSSIBLE

PLACE R9600-R9604, C9600

TO TMDS CONNECTOR

PLACE FILTER CLOSE

NET_PHYSICAL_TYPE DIFFERENTIAL_PAIR

INTERNAL LCD

376S0225

PANEL POWER SEQUENCING

EXTERNAL VGA CONNECTOR

(516S0241)

INTERNAL TMDS CONNECTOR

NET_SPACING_TYPE

SILKSCREEN: 3

1/16W

33

5%

MF-LF402

21

R9608

2.0K5%

1/16WMF-LF

402 2

1R9605

402

16V10%

CERM

0.01UF

2

1 C9615

402

16V

0.01UF10%

CERM2

1 C9601

47PF

402CERM50V5%

2

1 C9678

4.7K1/16W

402MF-LF

5%

2

1R96785%

1/16WMF-LF

4.7K

402 2

1R9677

402CERM50V5%

47PF

2

1C9677

53307-3072F-ST-SM

CRITICAL

9

87

65

4

30

3

29

2827

2625

2423

2221

20

2

19

1817

1615

1413

1211

10

1

J9602

STDOFF-118OD-181H-TH

1

SDF9600

STDOFF-118OD-181H-TH

1

SDF9601

16V

1210

10UF10%

CERM2

1 C9616

603

3305%

MF-LF1/10W

2

1R9612

2.0X1.25AGREEN

2

1

LED9600

MF-LF402

5%1/16W

3321

R9606

MF-LF1/16W5%2.0K

4022

1R9607

20%0.1UF

402CERM10V

2

1 C9670

NOSTUFF

402

22PF5%

CERM50V

2

1 C9608

5%1/16WMF-LF

33

402

21

R9671

NOSTUFF

CERM402

22PF5%50V

2

1C9607MF-LF

5%1/16W

33

402

21

R967274LCX125

TSSOP

614

47

5

U9670

SOT-3632N7002DW-X-F

1

2

6

Q9675

SOT-3632N7002DW-X-F

4

5

3

Q9675

402

10K5%

1/16WMF-LF

2

1R9673

402

10K5%1/16WMF-LF

2

1R9674

MF-LF402

1/16W5%

10021

R9675

402

100

5%1/16WMF-LF

21

R9676

CRITICAL

TSSOP

74LCX1253

14

17

2

U9670

402

0.01UF10%16VCERM2

1 C9602

TSSOP

74LCX1258

14

107

9

U9670

MF-LF1/8W5%

0

805

21

R9680

805

0

5%1/8WMF-LF

21

R9682I885

I886

I887

I888

I889

I890

I891

I892

NOSTUFF

402

10K5%

MF-LF1/16W

2

1R9660

805MF-LF1/8W5%0

2

1R9634

SOT23MMBD914XXG

3

1D9614

402

NOSTUFF

0.022UF

CERM16V20%

21

C9618402

100K5%1/16WMF-LF

NOSTUFF

2

1R9625

402

10K5%1/16WMF-LF

2

1R96142N7002

NOSTUFF

SOT23-LF

2

1

3

Q9601

402

NOSTUFF

0.01UF20%16V

CERM 2

1C9619

SOT23

MMBZ5227B3

1

DZ9600

CERM1210

16V10%

10UF

2

1C9617

402

100K5%1/16WMF-LF

NOSTUFF

2

1R9613

NOSTUFF

SOISI4435DY

3

2

1

4

8

7

6

5

Q9600

NOSTUFF

021

R9626

90-OHM

SM

4

32

1L9602

332

402

1%1/16WMF-LF

2

1R9604

NOSTUFF

021

R9627

NOSTUFF

021

R9628

NOSTUFF

021

R9630

90-OHMSM4

3 2

1

L9608

NOSTUFF 021

R9629

90-OHM

SM

4

32

1L9609

402

3321%

1/16WMF-LF

2

1R9603

402

3321%

1/16WMF-LF

2

1R9602

NOSTUFF

021

R9632

NOSTUFF 021

R9631

90-OHMSM 4

32

1

L9610

0NOSTUFF

21R9633

402

1%1/16WMF-LF

165

2

1R9601

1651%

402

1/16WMF-LF

2

1R960050V

CERM402

5%22PF

2

1C9600

I955

I956

I957

I958

I959

I960

I961

0.01UF

CERM

10%

402

16V2

1 C96030.01UF

402

16V10%

CERM2

1 C9604

10%

402CERM

0.01UF

16V2

1 C9605

NOSTUFF

SM-220MHZ

43

21

FL9600

SM-220MHZ

NOSTUFF

43

21

FL9601

0

402

21

R9640

SM-220MHZ

NOSTUFF

43

21

FL9602402

021

R9641

0

402

21

R9642

F-ST-SM

CRITICAL

DV01793-M33-4F

98

76

54

32

16

15

1413

1211

10

1

J9603

051-6863 07

96 154

SYNC_DATE=MASTERSYNC_MASTER=M33-DD

TMDS / ExtVGA

LED5900_P1

FPD_PWR_ON LED5900_PWR

PP3V3_DDCGPU_TMDS GPU_TMDSTCKP TCK

I2C_TMDS_SDA

TD0M

PPVCC_TMDS

TD2P

TD2M

TD2P

GND_CHASSIS_TMDS

I2C_MON_SDA

I2C_MON_SCL

I2C_GPU_MON_SDA

I2C_GPU_MON_SCL

=PP3V3_GPU

GND_CHASSIS_VGA

I2C_MON_SDA_R

PP5V_VGA

ANALOG_HSYNC VGA_HSYNC

ANALOG_VSYNC VGA_VSYNC

GND_CHASSIS_VGA

VGA_HSYNC_R

VOLTAGE=5VPP5V_VGA


=PP3V3_GPU

VGA_VSYNC_R

PP5V_USB2

GND_CHASSIS_VGA

TCKP

TCKM

I2C_TMDS_SDA I2C_TMDS_SCL

TD1P

TD0P

I2C_GPU_TMDS_SDA

=PP3V3_GPU

I2C_GPU_TMDS_SCL I2C_TMDS_SCL

=PP12V_GPU

TMDS_EN_R

FPD_PWR_ON_D

PPVCC_TMDS


VOLTAGE=12V

TMDS_EN

=PP12V_GPU

FPD_PWR_SW_G

FPD_PWR_ON

TD1M


PP3V3_DDCVOLTAGE=3.3V

GPU_TMDS GPU_TMDSTCKM TCKTD0P GPU_TMDS TD0GPU_TMDS

GPU_TMDSGPU_TMDSTD0M TD0TD1P GPU_TMDS TD1GPU_TMDS

GPU_TMDSTD1M TD1GPU_TMDS

GPU_TMDSTD2P TD2GPU_TMDS

GPU_TMDSTD2M TD2GPU_TMDS

TD2M

TMDS_D2M

TD1M

TD1P

TD0P

TD0M

TMDS_D2P

TMDS_D1M

TMDS_D1P

TMDS_D0M

TCKM

TCKP

TMDS_D0P

TMDS_CKM


TMDS_CK_TERM

TMDS_CKP

GPU_VGAFILT_ANALOG_GRN GPU_VGA

GPU_VGAFILT_ANALOG_RED GPU_VGA

GPU_VGAFILT_ANALOG_BLU GPU_VGAVGA_VSYNC GPU_VGA GPU_VGAVGA_VSYNC_R GPU_VGAGPU_VGAVGA_HSYNC GPU_VGA GPU_VGAVGA_HSYNC_R GPU_VGAGPU_VGA

I2C_MON_SCL_R

ANALOG_RED

ANALOG_BLU

ANALOG_GRN

I2C_MON_SCL_R

FILT_ANALOG_BLU

FILT_ANALOG_GRN

FILT_ANALOG_RED

VGA_HSYNC_RVGA_VSYNC_R

PP5V_VGA

I2C_MON_SDA_R

MON_DETECT

GND_CHASSIS_VGA

96

96

96

93

93

93

92

92

92

91

91

91

96

85

96

96

85

96

85

96

96

96

96

92

96 96

96

96

96

96

96

96

7

93

93

7

7

96

96

93 96

93 96

7

96

96

7

96

143

7

96

96

96 96

96

96

93

7

93 96

7

96

92

7

92

96

96

96

96

96

96

96

96

96

96

93

96

96

96

96

93

93

93

93

96

96

93

93

93

96

96

96

96

96

96

96

96

93

93

93

96

96

96

96

96 96

96

96

93

7 Preliminary

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

SIG_NAME

KODIAK PCI-E POWER PHYSICAL CONSTRAINT TABLE

MIN_LINE_WIDTH MIN_NECK_WIDTH VOLTAGE

SIG_NAME

8

SIG_NAMENET_SPACING_TYPENET_PHYSICAL_TYPEDIFFERENTIAL_PAIR

KODIAK PCI-E PHYSICAL CONSTRAINT TABLE

NET_SPACING_TYPENET_PHYSICAL_TYPEDIFFERENTIAL_PAIRELECTRICAL_CONSTRAINT_SET


I311

I312

I313

I314

I315

I316

I317

I318

I319

I320

I321

I322

I323

I324

I325

I326

I327

I328

I329

I330

I331

I332

I333

I334

I335

I336

I337

I338

I339

I340

I341

I342


97 154

07051-6863

KODIAK PCI-E CONST

CLK_PCIE_SLOTA_NF<0> PCIE_CLKPCIE_CLKKODPCIE_CLKF

CKA_P<0> PCIE_CLKPCIE_CLKCLK_SLOTA_CKACLK_PCIE_SLOTA_PF<0> PCIE_CLKPCIE_CLKKODPCIE_CLKF

CLK_PCIE_SLOTA_P<0> PCIE_CLKPCIE_CLKKODPCIE_CLKCLK_PCIE_SLOTA_N<0> PCIE_CLKPCIE_CLKKODPCIE_CLK

PCIE_SLOTA_TO_NB_PF<1> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_1_FPCIE_SA2NB1

PCIE_SLOTA_TO_NB_PF<4> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_4_FPCIE_SA2NB4PCIE_SLOTA_TO_NB_NF<5> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_5_FPCIE_SA2NB5PCIE_SLOTA_TO_NB_PF<5> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_5_FPCIE_SA2NB5




PCIE_SLOTA_TO_NB_PF<3> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_3_FPCIE_SA2NB3PCIE_SLOTA_TO_NB_NF<4> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_4_FPCIE_SA2NB4

PCIE_NB_TO_SLOTA_NF<9> PCIE_NB2SA9 PCIE_NB_TO_SLOTA_9_F PCIE_DATA PCIE_DATA

PCIE_NB_TO_SLOTA_0_F PCIE_DATA PCIE_DATAPCIE_NB_TO_SLOTA_NF<0> PCIE_NB2SA0

CLK_KODPCIE_100M PCIE_CLK PCIE_CLKCLK_KOD_100M_P<0>

PCIE_NB2SA4 PCIE_NB_TO_SLOTA_4_F PCIE_DATA PCIE_DATAPCIE_NB_TO_SLOTA_NF<4>

PCIE_NB2SA7 PCIE_NB_TO_SLOTA_7_F PCIE_DATA PCIE_DATAPCIE_NB_TO_SLOTA_PF<7>


PCIE_NB_TO_SLOTA_3 PCIE_DATA PCIE_DATAPCIE_NB_TO_SLOTA_P<3>

PCIE_NB_TO_SLOTA_7 PCIE_DATA PCIE_DATAPCIE_NB_TO_SLOTA_N<7>



CLK_KODPCIE_100MF PCIE_CLK PCIE_CLKCLK_KOD_100M_NF<0>CLK_KODPCIE_100MF PCIE_CLK PCIE_CLKCLK_KOD_100M_PF<0>












PCIE_SLOTA_TO_NB_N<14> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_14

PCIE_SLOTA_TO_NB_P<15> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_15


PCIE_NB2SA13 PCIE_NB_TO_SLOTA_13_F PCIE_DATA PCIE_DATAPCIE_NB_TO_SLOTA_NF<13>PCIE_NB2SA12 PCIE_NB_TO_SLOTA_12_F PCIE_DATA PCIE_DATAPCIE_NB_TO_SLOTA_PF<12>













CLK_100M PCIE_CLK PCIE_CLK100M_P<0>


PCIE_NB2SA2 PCIE_NB_TO_SLOTA_2_F PCIE_DATA PCIE_DATAPCIE_NB_TO_SLOTA_NF<2>PCIE_NB2SA1 PCIE_NB_TO_SLOTA_1_F PCIE_DATA PCIE_DATAPCIE_NB_TO_SLOTA_PF<1>


PCIE_SLOTA_TO_NB_NF<0> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_0_FPCIE_SA2NB0








PCIE_SLOTA_TO_NB_NF<2> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_2_FPCIE_SA2NB2PCIE_SLOTA_TO_NB_PF<2> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_2_FPCIE_SA2NB2



PCIE_SLOTA_TO_NB_N<12> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_12PCIE_SLOTA_TO_NB_P<11> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_11


PCIE_SLOTA_TO_NB_P<9> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_9PCIE_SLOTA_TO_NB_N<9> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_9








PCIE_SLOTA_TO_NB_N<6> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_6PCIE_SLOTA_TO_NB_P<5> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_5PCIE_SLOTA_TO_NB_N<5> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_5PCIE_SLOTA_TO_NB_P<4> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_4PCIE_SLOTA_TO_NB_N<4> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_4PCIE_SLOTA_TO_NB_P<3> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_3





PCIE_SLOTA_TO_NB_NF<11> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_11_FPCIE_SA2NB11PCIE_SLOTA_TO_NB_PF<11> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_11_FPCIE_SA2NB11

PCIE_SLOTA_TO_NB_NF<14> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_14_FPCIE_SA2NB14PCIE_SLOTA_TO_NB_PF<14> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_14_FPCIE_SA2NB14PCIE_SLOTA_TO_NB_NF<15> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_15_FPCIE_SA2NB15PCIE_SLOTA_TO_NB_PF<15> PCIE_DATAPCIE_DATAPCIE_SLOTA_TO_NB_15_FPCIE_SA2NB15











CLK_100M PCIE_CLK PCIE_CLK100M_N<0>

CLK_KODPCIE_100M PCIE_CLK PCIE_CLKCLK_KOD_100M_N<0>
























CKA_N<0> PCIE_CLKPCIE_CLKCLK_SLOTA_CKA

KOD_G10_GND 00.3MM 0.25MM

KOD_H05_GND 00.3MM 0.25MM

KOD_H08_GND 00.3MM 0.25MM

KOD_J13_GND 00.3MM 0.25MM

KOD_L13_GND 00.3MM 0.25MMKOD_K07_GND 00.3MM 0.25MM

PWR_PCIE_A_AVDD 1.20.3MM 0.25MM

PWR_PCIE_A_AVDD_2 1.20.3MM 0.25MM



PWR_PCIE_A_AVDD_A 1.20.3MM 0.25MM

1.2PWR_PCIE_A_AVDD_B 0.3MM 0.25MM

1.2PWR_PCIE_A_AVDD_C 0.3MM 0.25MM

1.2PWR_PCIE_A_AVDD_2 0.3MM 0.25MM

1.2PWR_PCIE_A_AVDD_0 0.3MM 0.25MM

84

84

84

84

84

84

84

84

84

84

84

84

84

84

84 84

84

84

84

84

84

84

84

84 84

84

84

84

84

84

84

84

84

84

84

82

84

84

84

84

82

82

84

84

82

84

82

82

82

82

82

82

82

82

84

84

84

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

84

84

84

84

84

84

84

84

84

84

84

84

84

84

84

84

84

84

84

82

82

82

82

82

82

97

97

97

97

84

9

84

26

26

84

84

84

84

84

84

84

84

84

82

82

26

82

82

82

82

82

82

82

9

9

82

82

82

82

82

9

82

9

82

82

9

9

9

9

9

82

82

82

82

9

9

82

82

82

9

82

9

82

9

82

82

82

9

84

84

84

84

84

84

84

84

84

84

84

84

9

9

9

9

9

9

9

9

9

9

84

9

84

9

9

9

9

9

9

9

84

9

9

9

9

9

84

84

84

84

84

84

84

84

84

84

84

84

82

82

82

82

82

9

26

82

9

9

9

9

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

82

9

6

6

6

6

6

6

82

82

82

82

82

82

82

82

82

Preliminary

PP

PP

PP

PP

PP

PP

PP

PP

PP

PP

HT_CTL_RXN1

HT_CTL_RXP1

HT_REFCLK_AGND

HT_RX_GND

HT_RX_GND

HT_RX_GND

HT_RX_GND

HT_RX_GND

HT_RX_GND

HT_RX_GND

HT_RX_GND

HT_RX_GND

HT_RX_GND

HT_VD4_GND

HT_VD4_GND

HT_VD4_GND

HT_VD4_GND

HT_VD4_GND

HT_VD4_GND

HT_VD4_GND

HT_VD4_GND

HT_VD4_GND

HT_VD4_GND

HT_VD4_GND

HT_VD4_GND

HT_VD4_GND

HT_VD4_GND

HT_VD4_GND

HT_VD4_GND

HT_VD4_GND

HT_REFCLK_N

HT_REFCLK_P

HT_CAD_RXP15

HT_CAD_RXN15

HT_CAD_RXP14

HT_CAD_RXN14

HT_CAD_RXP13

HT_CAD_RXP12

HT_CAD_RXN13

HT_CAD_RXN12

HT_CAD_RXP11

HT_CAD_RXN11

HT_CAD_RXP9

HT_CAD_RXP8

HT_CAD_RXN9

HT_CAD_RXN8

HT_CLK_RXP1

HT_CLK_RXN1

HT_CAD_RXP7

HT_CAD_RXN7

HT_CAD_RXN6

HT_CAD_RXP6

HT_CAD_RXP5

HT_CAD_RXN5

HT_CAD_RXP4

HT_CAD_RXP3

HT_CAD_RXN4

HT_CAD_RXN3

HT_CAD_RXP2

HT_CAD_RXN2

HT_CAD_RXP1

HT_CAD_RXN1

HT_CAD_RXP0

HT_CAD_RXN0

HT_CTL_RXP0

HT_CTL_RXN0

HT_CLK_RXP0

HT_CLK_RXN0

HT_RX_VDD

HT_RX_VDD

HT_RX_VDD

HT_RX_VDD

HT_RX_VDD

HT_RX_VDD

HT_RX_VDD

HT_RX_VDD

HT_RX_VDD

HT_RX_VDD

HT_VD4

HT_VD4

HT_VD4

HT_VD4

HT_VD4

HT_VD4

HT_VD4

HT_VD4

HT_VD4

HT_VD4

HT_VD4

HT_VD4

HT_VD4

HT_VD4

HT_VD4

HT_VD4

HT_VD4

HT_RESET_L

HT_PWROK

HT_LDTREQ_L

HT_LDTSTOP_L

HT_CAD_TXP15

HT_CAD_TXN15

HT_CAD_TXP14

HT_CAD_TXN14

HT_CAD_TXP13

HT_CAD_TXN13

HT_CAD_TXP12

HT_CAD_TXN12

HT_CAD_TXP11

HT_CAD_TXN11

HT_CAD_TXP10

HT_CAD_TXN10

HT_CAD_TXP9

HT_CAD_TXN9

HT_CAD_TXP8

HT_CAD_TXN8

HT_CTL_TXN1

HT_CTL_TXP1

HT_CLK_TXP1

HT_CLK_TXN1

HT_CAD_TXP7

HT_CAD_TXN7

HT_CAD_TXP6

HT_CAD_TXN6

HT_CAD_TXP5

HT_CAD_TXN5

HT_CAD_TXP4

HT_CAD_TXN4

HT_CAD_TXP3

HT_CAD_TXN3

HT_CAD_TXP2

HT_CAD_TXN2

HT_CAD_TXP1

HT_CAD_TXN1

HT_CAD_TXP0

HT_CAD_TXN0

HT_CTL_TXN0

HT_CTL_TXP0

HT_CLK_TXP0

HT_CLK_TXN0

HT_REFCLK_AVDD2HT_REFCLK_AVDD

HT_CAD_RXP10

HT_CAD_RXN10

HT_PVTREF0

HT_PVTREF1

HT_PVTREF2_ALT

HT_PVTREF3_ALT

(1.6V-1.2V)(1.6V-1.2V)

HT X16 INTERFACE

(6 OF 10)

(1.65V-2.75V) (1.65V-2.75V)

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

DRAWING

KODIAK HT RECEIVE CLOCKS

(CAPACITORS ARE DOUBLED-UP WHERE POSSIBL;E)

KODIAK HT DECOUPLING(LOCATE CLOSE TO PINS AS INDICATED)

MHT1-MHT1+

TERMINATION(LOCATE CLOSE TO INPUT PINS)

KODIAK HT REFCLK

HREF0+HREF0-

KODIAK HT REFCLK

(THIS PAGE)

(200MHZ)

(THIS PAGE)

KODIAK HT DECOUPLING(LOCATE CLOSE TO PINS AS INDICATED)

9

PAGE 98

MHT0-MHT0+

(THIS PAGE)

KODIAK CORES

1.6V

Q63 = PP1V6

1.2V

Q63 = PP1V2

PLANE-SPLIT AC RETURN PATHSLOCATE EACH CAPACITOR SO THAT

THEY STRADDLE EACH PLANE SPLIT

HTM2NC0-HTM2NC0+

6.3V

1UF10%

CERM402

2

1 C9808

6.3V

1UF10%

CERM402

2

1 C9807

6.3V

1UF10%

CERM402

2

1 C9812

6.3V

1UF10%

CERM402

2

1 C9811

6.3V

1UF10%

CERM402

2

1 C9815

6.3V

1UF10%

CERM402

2

1 C9806

6.3V

1UF10%

CERM402

2

1 C9810

6.3V

1UF10%

CERM402

2

1 C9814

402CERM16V10%

0.01UF

2

1C9800

0.01UF10%16VCERM402

2

1 C9805

P4MMSM

1

PP9800

P4MMSM

1

PP9801

SMP4MM

1

PP9802

SM

P4MM

1

PP9803

P4MMSM

1

PP9804

P4MMSM

1

PP9805

P4MMSM

1

PP9806

P4MMSM

1

PP9807

0.22UH

0805-1

21

L9800

0.22UH

0805-1

21

L9801

0.01UF

10%16VCERM402

21

C9837MF-LF

1%1/16W

20.5

4022

1R9802

MF-LF

1%1/16W

29.4

4022

1R9803

MF-LF

1%1/16W

29.4

4022

1R9804

0.01UF

10%16VCERM402

21

C9838

MF-LF

1%1/16W

20.5

4022

1R9805

402CERM

10%1UF

6.3V2

1C9802

6.3V

1UF10%

CERM402

2

1 C9803

6.3V

1UF10%

CERM402

2

1 C9839

6.3V

1UF10%

CERM402

2

1 C9833

6.3V

1UF10%

CERM402

2

1 C9832

6.3V

1UF10%

CERM402

2

1 C9846

6.3V

1UF10%

CERM402

2

1 C9845

6.3V

1UF10%

CERM402

2

1 C9844

6.3V

1UF10%

CERM402

2

1 C9843

6.3V

1UF10%

CERM402

2

1 C9842

6.3V

1UF10%

CERM402

2

1C9847

8.2K5%

MF-LF1/16W

402 2

1R9807

5%8.2K

MF-LF1/16W

402 2

1R9806

0.1UF

10V20%

CERM402

21

C9834

6.3V

1UF10%

CERM402

2

1 C9821

6.3V

1UF10%

CERM402

2

1 C9820

6.3V

1UF10%

CERM402

2

1 C9819

6.3V

1UF10%

CERM402

2

1 C9818

6.3V

1UF10%

CERM402

2

1 C9817

6.3V

1UF10%

CERM402

2

1 C9826

6.3V

1UF10%

CERM402

2

1 C9825

6.3V

1UF10%

CERM402

2

1 C9824

6.3V

1UF10%

CERM402

2

1 C9823

6.3V

1UF10%

CERM402

2

1 C9822

NOSTUFF

1/16WMF-LF

8.2K5%

4022

1R9808

8.2K5%

MF-LF1/16W

402

NOSTUFF

2

1R9809

NOSTUFF

0.01UF

10%16VCERM402

21

C9836

MF-LF

5%1/16W

402

1K

2

1R9813

P4MMSM

1

PP9808

P4MMSM

1

PP9809

402MF-LF1/16W5%1K

2

1

R98121K

MF-LF

5%1/16W

4022

1R9810

402

1K

MF-LF

5%1/16W

2

1R9811

SM

2

1

XW9800

6.3V

10UF

X5R805

10%

2

1 C9804

1/16W1%

MF-LF

100

402 2

1R9800

KODIAK-ASIC-040812

BGA

SEE_TABLE

G22

G18

E20

E16

D18

B20

B16

A18

N18

M20

M16

L20

L16

K18

H20

H16

A14

G20

G16

E18

D20

D16

B18

B14

A20

N19

M21

M17

L18

K20

K16

H22

H18

A16

K24

H26

G24

E26

E22

D24

B26

B22

L22

A24

K22

H24

G26

E24

D26

D22

B24

A26

L24

A22

AE11

J15

J16

H15K15

L15

AF03

L19

K19

K17

L17

AF06

AF09

E15

J21

D15

J22

E21

K27

D21

J27

C17

J20

C16

J19

F23

D25

F22

E25

E17

E19

L21

F20

H21

H19

F19

J17

C21

C14

A19

B17

B15

C18

H17

F17

D17

D19

K21

F21

G21

G19

F18

J18

C20

C15

B19

A17

A15

C19

G17

F16

B23

D23

C27

J26

H27

K25

H25

B25

C25

B21

J24

L23

C23

G23

F24

F27

A23

E23

C26

J25

G27

L25

G25

A25

C24

A21

J23

K23

C22

H23

F25

F26

U1900

10%

805X5R

10UF

6.3V2

1C9801

1/16W1%

MF-LF

200

4022

1R9801

6.3V

1UF10%

CERM402

2

1 C9831

6.3V

1UF10%

CERM402

2

1 C9830

6.3V

1UF10%

CERM402

2

1 C9829

6.3V

1UF10%

CERM402

2

1 C9828

6.3V

1UF10%

CERM402

2

1 C9841

6.3V

1UF10%

CERM402

2

1 C9827

6.3V

1UF10%

CERM402

2

1 C9840

6.3V

1UF10%

CERM402

2

1 C9809

6.3V

1UF10%

CERM402

2

1 C9813


051-6863 07

15498

KODIAK HT16SYNC_MASTER=Q63

HT_LDTSTOP_L

HT_LDTREQ_L

=PP2V5_PWRON_HT

HT_PWROK

HT_LDTRESET_L




HT_MB_TO_NB_CAD_P<0>

HT_MB_TO_NB_CAD_N<0>



PWR_HT_AVDD2

=PP2V5_PWRON_NB_HT

PWR_HT_AVDD

KOD_L15_GND

HT_MB_TO_NB_CLK_P<0>

HT_MB_TO_NB_CLK_N<0>


HT_NB_N<0>

HT_NB_P<0>

HT_NB_REFCLK_NF<0>

HT_NB_REFCLK_PF<0>

HT_NB_REFCLK_N<0>

HT_NB_REFCLK_P<0>



HT_MB_TO_NB_CTL_N<0>

HT_MB_TO_NB_CTL_P<0>

KOD_L15_GND

=PP2V5_PWRON_NB_HT



HT_NB_TO_MB_CLK_N<0>

HT_NB_TO_MB_CLK_P<0>

HT_NB_TO_MB_CAD_N<0>

HT_NB_TO_MB_CAD_P<0>











































KOD_L15_GND

















HT_KOD_PVTREF3_ALT

HT_KOD_PVTREF2_ALT

HT_KOD_PVTREF1

HT_KOD_PVTREF0




HT_NB_TO_MB_CTL_N<1>

HT_NB_TO_MB_CTL_P<1>



HT_NB_G


HT_NB_TO_MB_CTL_P<0>

HT_NB_TO_MB_CTL_N<0>


<XR_PAGE_TITLE>


103D3

102B7 102B2 101D5

101D2 101B7

98D4

98D5

98D5

98D5

98D5

98D5

100D7

103D6

98D3

98D3

98D4

98D4

98D4

98D4

103B6

103B3

100D3

103B6

103B6

98D1

98D1

104D4

104D4

104D4

98D1

98D3

98D3

98D3

102A6

102B4

99B7

102A6

102B4

98D7

98D7

104B8

104B8

98C8

98C8

98C3

104B8

104B8

104A8

104B8

104B8

104B8

104B8

98C6

104A8

104A8

104D8

104D8

104D8

104D8

104D8

104C8

104C8

104C8

104C8

104C8

104C8

104C8

104C8

104C8

104C8

104C8

104C8

104C8

104D8

104D8

104B8

104B8

104B8

104B8

104B8

104B8

104B8

104B8

104B8

104B8

104B8

104B8

104B8

104A8

104A8

104A8

104A8

104A8

104A8

104A8

104A8

104A8

104A8

104A8

104A8

104A8

98C6

104B8

104B8

104B8

104C8

104C8

104C8

104C8

104C8

104C8

104C8

104C8

104C8

104C8

104C8

104C8

104C8

98C8

98D1

98D1

104B8

104D8

104D8

98C8

101A4

101A4

99B3

101A7

101A7

98D7

98D5

98D5

100D3

100D3

98B1

98B1

98D2

98A6

100D3

100D3

100B3

104D8

104D8

100C3

100C3

100B3

100B3

98A6

98D7

100C3

100C3

100D7

100D7

100D6

100D6

100C6

100C6

100C6

100C6

100C6

100C6

100C6

100C6

100C6

100C6

100C6

100C6

100C6

100C6

100C7

100C7

100C3

100C3

100C3

100C3

100C3

100C3

100C3

100C3

100C3

100C3

100C3

100C3

100C3

100C3

100C3

100C3

100C3

100C3

100C3

100B3

100B3

100B3

100B3

100B3

100B3

100B3

98C3

100B6

100B6

100B6

100B6

100B6

100B6

100B6

100B6

100C6

100C6

100C6

100C6

100C6

100C6

100C6

100C6

104D4

104D4

104D4

104D4

98B1

98B1

98C8

100C3

100B6

100B6

98B1

99A5

99A4

3C1

99A5

99A4

3A4

3A4

3A4

99C2

99C2

3C2

3C2

104D4

3C1

104D4

6A3

99C4

99C4

99D4

104D8

104D8

104D8

104D8

26C2

26C2

99D7

99D7

99D4

99D4

6A3

3C1

99D2

99D2

99C7

99C7

99C7

99C7

99C7

99C7

99B7

99B7

99B7

99B7

99B5

99B5

99C5

99C5

99C5

99C5

99C5

99C5

99A5

99B5

99C2

99C2

99C2

99C2

99B2

99B4

99B4

99B4

99B4

99C4

99C4

99C4

99C4

99D2

99D2

99D2

99D2

99D2

99C2

99C4

99D4

99C4

99D4

99D4

99D4

99D4

6A3

99A4

99A4

99D5

99D5

99D7

99D7

99D5

99D5

99D5

99D5

99D5

99C5

99C7

99C7

99D7

99D7

6A5

6A5

6A5

6A5

3C2

6A5

6A5

3C2

3C2

99B2

99D7

99D7

3C2

Preliminary

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

SIG_NAME

SIG_NAME MIN_LINE_WIDTH MIN_NECK_WIDTH VOLTAGE

DIFFERENTIAL_PAIRMAKE_BASE EC_SET

KEEP DIFF CLOCK FROM BEING A SINGLE XNET

NET_SPACING_TYPENET_PHYSICAL_TYPE

98A8

98D5

98D4

98C6 98C3 98A6 6D6

98A8 26C2

98A8 26C2

98A8 9D2

98A8 9D2

98A6 9D2

98A6 9D2

I97

FINO-EG 05/19/2005

HT ALIASES

051-6863 07

154101

HT_SB_TO_NB_PP HT_CADHT_SB_TO_NB_CAD_N<0> HT_SB_TO_NB_CADTRUE HT_SB_TO_NB_CAD0HT_SB_TO_NB_PP HT_SB_TO_NB_CADHT_CADTRUEHT_SB_TO_NB_CAD_P<0> HT_SB_TO_NB_CAD0

HT_CLKHT_CLKHT_NB0HT_NB_N<0>

HT_CLK HT_CLKHT_NB0HT_NB_P<0>

HT_NB_REFCLK0 HT_CLK HT_CLKHT_NB_REFCLKHT_NB_REFCLK_P<0>

HT_CLKHT_NB_REFCLK0 HT_CLKHT_NB_REFCLK_N<0>

NC_HT_NB_TO_MB_CLK_N<1> TRUE HT_NB_TO_MB_CLK_N<1>

NC_HT_NB_TO_MB_CLK_P<1> TRUE HT_NB_TO_MB_CLK_P<1>

NC_HT_NB_TO_MB_CAD_P<8..15> TRUE HT_NB_TO_MB_CAD_P<8..15>

NC_HT_NB_TO_MB_CAD_N<8..15> TRUE HT_NB_TO_MB_CAD_N<8..15>

TP_HT_MB_TO_NB_CLK_P<1> TRUE HT_MB_TO_NB_CLK_P<1>

NC_HT_MB_TO_NB_CAD_N<8..15> TRUE HT_MB_TO_NB_CAD_N<8..15>


TRUENC_HT_MB_TO_NB_CAD_P<8..15> HT_MB_TO_NB_CAD_P<8..15>

HT_CADHT_SB_TO_NB HT_SB_TO_NB_CADHT_SB_TO_NB_CTL_N<0> HT_SB_TO_NB_CTL0TRUE HT_SB_TO_MB_CTL_N<0>HT_SB_TO_NB HT_SB_TO_NB_CADTRUEHT_SB_TO_NB_CTL_P<0> HT_SB_TO_NB_CTL0 HT_CAD HT_SB_TO_MB_CTL_P<0>

HT_SB_TO_NB_CADHT_CADTRUEHT_SB_TO_NB_CAD_N<7> HT_SB_TO_NB_CAD7 HT_SB_TO_NB HT_SB_TO_MB_CAD_N<7>HT_SB_TO_NB HT_SB_TO_NB_CADHT_SB_TO_NB_CAD7 HT_CADTRUEHT_SB_TO_NB_CAD_P<7> HT_SB_TO_MB_CAD_P<7>

HT_SB_TO_MB_CAD_P<6>HT_SB_TO_MB_CAD_N<6>

HT_SB_TO_MB_CAD_P<5>HT_SB_TO_NB HT_SB_TO_NB_CADHT_SB_TO_NB_CAD5 HT_CADTRUEHT_SB_TO_NB_CAD_N<5> HT_SB_TO_MB_CAD_N<5>

HT_SB_TO_MB_CAD_N<4>HT_SB_TO_MB_CAD_P<4>

HT_SB_TO_MB_CAD_P<3>HT_SB_TO_NB_CAD_N<3> HT_SB_TO_NB_CAD3 HT_SB_TO_NB HT_SB_TO_NB_CADHT_CADTRUE HT_SB_TO_MB_CAD_N<3>

HT_SB_TO_MB_CAD_P<2>HT_SB_TO_NB_CADHT_SB_TO_NB HT_CADTRUEHT_SB_TO_NB_CAD_N<2> HT_SB_TO_NB_CAD2 HT_SB_TO_MB_CAD_N<2>

HT_SB_TO_MB_CAD_P<1>HT_SB_TO_NB_CADHT_CADHT_SB_TO_NBTRUEHT_SB_TO_NB_CAD_N<1> HT_SB_TO_NB_CAD1 HT_SB_TO_MB_CAD_N<1>

HT_SB_TO_MB_CAD_N<0>

HT_SB_TO_MB_CLK_P<0>HT_SB_TO_MB_CLK_N<0>

HT_NB_TO_SB_CTL0 HT_NB_TO_SB HT_NB_TO_SB_CADHT_CADTRUEHT_NB_TO_SB_CTL_N<0> HT_MB_TO_SB_CTL_N<0>HT_MB_TO_SB_CTL_P<0>

HT_MB_TO_SB_CAD_N<7>HT_MB_TO_SB_CAD_P<7>

HT_MB_TO_SB_CAD_P<6>HT_MB_TO_SB_CAD_N<6>

HT_NB_TO_SB_CADHT_NB_TO_SB_CAD4 HT_NB_TO_SBTRUEHT_NB_TO_SB_CAD_N<4> HT_CAD HT_MB_TO_SB_CAD_N<4>

HT_MB_TO_SB_CAD_N<3>

HT_MB_TO_SB_CAD_P<2>


HT_MB_TO_SB_CLK_P<0>HT_NB_TO_SB_PP HT_NB_TO_SB_CLKHT_CADHT_NB_TO_SB_CLKTRUEHT_NB_TO_SB_CLK_N<0> HT_MB_TO_SB_CLK_N<0>

HT_NB_G 0

0KOD_L15_GND 0.2MM0.4MM







HT_MB_TO_NB_CAD_P<7>HT_MB_TO_NB_CAD_N<7>




HT_NB_TO_MB_CAD_N<0>HT_NB_TO_MB_CAD_P<0>









HT_MB_TO_NB_CAD_N<5>HT_MB_TO_NB_CAD_P<5>


HT_MB_TO_NB_CAD_N<2>HT_MB_TO_NB_CAD_P<2>



0.4MM 0.2MM 2.5PWR_HT_AVDD

0.4MM 0.2MM 2.5PWR_HT_AVDD2

HT_SB_TO_NB HT_SB_TO_NB_CADHT_SB_TO_NB_CAD6TRUEHT_SB_TO_NB_CAD_P<6> HT_CADHT_SB_TO_NB HT_SB_TO_NB_CADTRUEHT_SB_TO_NB_CAD_N<6> HT_SB_TO_NB_CAD6 HT_CAD

HT_SB_TO_NB HT_SB_TO_NB_CADHT_SB_TO_NB_CAD4 HT_CADTRUEHT_SB_TO_NB_CAD_P<4>

HT_SB_TO_NB HT_SB_TO_NB_CADHT_SB_TO_NB_CAD5 HT_CADTRUEHT_SB_TO_NB_CAD_P<5>

TP_HT_MB_TO_NB_CLK_N<1> TRUE

HT_NB_REFCLK_F0 HT_CLKHT_CLKHT_NB_REFCLK_NF<0>

HT_NB_REFCLK_F0 HT_CLK HT_CLKHT_NB_REFCLK_PF<0>

HT_NB_TO_SB HT_NB_TO_SB_CADHT_CADTRUE HT_NB_TO_SB_CTL0HT_NB_TO_SB_CTL_P<0>

HT_SB_TO_NB_CLK_N<0> HT_SB_TO_NB_PP HT_SB_TO_NB_CLKTRUE HT_CADHT_SB_TO_NB_CLKHT_SB_TO_NB_CLK_P<0> TRUE HT_SB_TO_NB_PP HT_SB_TO_NB_CLKHT_SB_TO_NB_CLK HT_CAD






HT_SB_TO_NB_CAD_P<2> HT_SB_TO_NB HT_SB_TO_NB_CADHT_CADTRUE HT_SB_TO_NB_CAD2

HT_SB_TO_NB_CAD_P<3> HT_SB_TO_NB_CAD3 HT_SB_TO_NB HT_SB_TO_NB_CADHT_CADTRUE

HT_NB_TO_SBHT_NB_TO_SB_CAD6TRUEHT_NB_TO_SB_CAD_N<6> HT_NB_TO_SB_CADHT_CAD

HT_SB_TO_NB HT_SB_TO_NB_CADHT_CADTRUEHT_SB_TO_NB_CAD_P<1> HT_SB_TO_NB_CAD1

HT_SB_TO_NB HT_SB_TO_NB_CADHT_CADTRUEHT_SB_TO_NB_CAD_N<4> HT_SB_TO_NB_CAD4

HT_NB_TO_SB HT_NB_TO_SB_CADHT_NB_TO_SB_CAD4TRUEHT_NB_TO_SB_CAD_P<4> HT_CAD

HT_CADHT_NB_TO_SBTRUE HT_NB_TO_SB_CAD7HT_NB_TO_SB_CAD_N<7> HT_NB_TO_SB_CADHT_NB_TO_MB_CAD_N<7>



HT_NB_TO_MB_CTL_N<0>HT_NB_TO_MB_CTL_P<0>

HT_NB_TO_SB_CAD7 HT_NB_TO_SB HT_CADTRUEHT_NB_TO_SB_CAD_P<7> HT_NB_TO_SB_CAD

HT_NB_TO_SB HT_NB_TO_SB_CADHT_NB_TO_SB_CAD6 HT_CADTRUEHT_NB_TO_SB_CAD_P<6>

HT_NB_TO_SB HT_NB_TO_SB_CADHT_NB_TO_SB_CAD5 HT_CADTRUEHT_NB_TO_SB_CAD_P<5>HT_NB_TO_SB_CAD_N<5> HT_NB_TO_SBTRUE HT_NB_TO_SB_CADHT_NB_TO_SB_CAD5 HT_CAD



HT_NB_TO_SB_PP HT_NB_TO_SB_CLKHT_CADHT_NB_TO_SB_CLKTRUEHT_NB_TO_SB_CLK_P<0>

HT_SB_TO_MB_CAD_P<0>





HT_NB_TO_SB_CAD_P<3> HT_NB_TO_SBHT_NB_TO_SB_CAD3 HT_NB_TO_SB_CADTRUE HT_CADHT_CADHT_NB_TO_SB_CAD3 HT_NB_TO_SBTRUEHT_NB_TO_SB_CAD_N<3> HT_NB_TO_SB_CAD

HT_NB_TO_SBHT_NB_TO_SB_CAD1HT_NB_TO_SB_CAD_N<1> HT_CADTRUE HT_NB_TO_SB_CAD

HT_NB_TO_SB_CAD0TRUEHT_NB_TO_SB_CAD_P<0> HT_NB_TO_SB_CADHT_CADHT_NB_TO_SB_PP

HT_NB_TO_SB_CAD2 HT_NB_TO_SB HT_CADTRUEHT_NB_TO_SB_CAD_P<2> HT_NB_TO_SB_CADHT_NB_TO_SB_CAD2 HT_CADTRUEHT_NB_TO_SB_CAD_N<2> HT_NB_TO_SB_CADHT_NB_TO_SB

HT_NB_TO_SB_CAD1 HT_NB_TO_SB HT_CADTRUEHT_NB_TO_SB_CAD_P<1> HT_NB_TO_SB_CAD

TRUE HT_NB_TO_SB_CAD0HT_NB_TO_SB_CAD_N<0> HT_NB_TO_SB_CADHT_CADHT_NB_TO_SB_PP

9D2 9D2

98B3

98B3

98B6

98B6

9D2 9D2

9D2

9D2

9D2

9D2

9D2

9D2

9D2 9D2

9D2

9D2

9D2 9D2

9D2

9D2

9D2

9D2

9D2

9D2

9D2 9D2

9D2

9D2 9D2

9D2

9D2 9D2

9D2

9D2

9D2 9D2

9D2

9D2

6B7 98B3

6B7 98B3

6B7 98A3

6B7 98A3

9C7 98B8

6B7 98A6

98B8

6B7 98A6

103B3 103B3

103B3 103B3

103B3 103B3

103B3 103B3

103B3 103B3

103B3 103B3

103C3 103B3

103C3 103C3

103C3

103C3 103C3

103B6 103B6

103B6 103B6

103B6 103B6

103B6

103B6

103C6

103C6

103C6 103C6

98C6

98C6

98C8

98B3

98C6

98B6

98B6 98B6

98C8

98C8

98C3

98C3 98C3

98C3

98C3

98C3

98C3

98C3

98C3

98B3

98C6

98B6 98B6

98B6

98C6 98C6

98C8

98B3

9C7

98B3

98C3

98C3

98B6 98C6

98C6 98C6

98B3

98B3

98B3

98C3 98C3

103B6 103B6

103B6

103C3

103B6

103B6

103C6

103C6 103C6

Preliminary

SEL_HT00_H

HT_S100M66M

HT_CTLOUT_N

HT_CTLOUT_P

HT_CTLIN_N

HT_CTLIN_P

HT_LDTSTOP_L

HT_RESET_L

HT_LDTREQ_L

HT_RXVDDHTHT_PLL

VDDPDVDDAVDD

HT_CADIN_7_P

HT_CADIN_7_N

HT_PWROK_H

HT_CADIN_6_N

HT_CADIN_3_P

HT_CADIN_3_N

HT_CADIN_4_P

HT_CADIN_4_N

HT_CADIN_5_P

HT_CADIN_5_N

HT_CADIN_6_P

HT_CADIN_2_N

HT_CADIN_2_P

HT_CADIN_1_N

HT_CADIN_1_P

HT_CLKIN_N

HT_CLKIN_P

HT_CADIN_0_P

HT_CADIN_0_N

AGND DGNDHT_PLL

HT_RXGND

HT_CADOUT_7_P

HT_CADOUT_7_N

HT_TXGND

HT_R100N

HT_R100P

HT_CADOUT_6_N

HT_CADOUT_6_P

HT_CADOUT_5_N

HT_CADOUT_5_P

HT_CADOUT_4_N

HT_CADOUT_4_P

HT_CADOUT_3_N

HT_CADOUT_3_P

HT_CADOUT_2_N

HT_CADOUT_2_P

HT_CADOUT_1_N

HT_CADOUT_1_P

HT_CADOUT_0_N

HT_CADOUT_0_P

HT_CLKOUT_N

HT_CLKOUT_P(3 OF 8)

HT_TXVDD

HT_REFCLK

HYPERTRANSPORT

PP

PP

PP

PP

PP

DRAWING

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE


0 = 66MHz

0 = 66MHz

1 = 100MHz

1 = 100MHz

0 = 200MHz

0 = 200MHz

1 = 100MHz

1 = 100MHz

DETERMINES THE OPERATING FREQUENCY OF HT CORE

1.0V pk-pk

1: THE HT SLAVE, HTGS AND THE HT SIDE OF THE PCI BRIDGES OPERATE AT 100 MHZ

HT RefClk HT I/F Speed

0: THE HT SLAVE, HTGS AND THE HT SIDE OF THE PCI BRIDGES OPERATE AT 200 MHZ

DIFFERENTIAL_PAIRNET_SPACING_TYPE

Page Notes

=PP1V2_PWRON_HT

=PP2V5_PWRON_HT

(NONE)


- SB_HT_200M



Stuffs resistor to select 200MHz HT I/F.

HTS2MC0+

HTS2MC0-

HTS2MC0+

HTS2MC0-

20%

402CERM

0.1uF

10V2

1 CA331

20%

402CERM

0.1uF

10V2

1 CA330

20%

402CERM

0.1uF

10V2

1 CA320

1/16W1%

402MF-LF

1K

2

1RA351

MF-LF

3.3

805

5%1/8W

21

RA300

3.3

MF-LF805

5%1/8W

21

RA310

NOSTUFF

10K

MF-LF402

5%1/16W

2

1RA354

BGA-LF

V1.1

SEE_TABLE

SHASTA

B19

V6

G11

B9

B12

G10

A9

A12

D8

G13

B17

B15

G12

A17

A15

C18

C8 E10

F10

E16

B6

A6

C7

C6

E17 A19

C13

D13

F13

E13

B10

A10

D15

C15

A13

B13

E12

F12

C12

D12

A11

B11

D11

C11

E11

F11

B8

A8

D10

C10

B14

A14

E14

F14

D14

C14

B16

A16

D16

C16

F15

E15

B18

A18

D17

C17

U2300

I187

1/16W5%

402MF-LF

021

RA301

SMP4MM

1PPA302

I192

10UF10%6.3V

X5R805

2

1 CA302

805X5R6.3V

10%10UF

2

1 CA309

SMP4MM1PPA300

SMP4MM1PPA301

MF-LF1/16W5%

0

402

2 1

RA355

SMP4MM1PPA303

SMP4MM1PPA304

805X5R6.3V

10%10UF

2

1 CA300

6.3V

1uF

CERM402

10%

2

1 CA301

6.3V

1uF

CERM402

10%

2

1 CA311

805X5R6.3V

10%10UF

2

1 CA310

5%

402CERM

47pF

50V2

1CA350

5%

402CERM

47pF

50V2

1 CA3511/16W1%

402MF-LF

82.521

RA350

1/16W1%

402MF-LF

4.7K

NOSTUFF

2

1RA352

1/16W1%

402MF-LF

4.7K

2

1RA353

20%

402CERM

0.1uF

10V2

1 CA340

20%

402CERM

0.1uF

10V2

1 CA341

20%

402CERM

0.1uF

10V2

1 CA342

20%

402CERM

0.1uF

10V2

1 CA332

051-6863 07

154103


Shasta HyperTransport

ABBREV=DRAWING

TITLE=KILOHANA

HT_MB_TO_SB_CLK_P<0>

HT_MB_TO_SB_CLK_N<0>



VOLTAGE=1.2V

PP1V2_PWRON_HT_PLLAVDD


=PP1V2_PWRON_SB_HTVOLTAGE=1.2V

PP1V2_PWRON_HT_PLLDVDD









HT_LDTRESET_L

HT_CLK66M_SB HT_CLK66M_SB0.38mm SPACING

0.38mm SPACING HT_CLK66M_SB_C

=PP1V2_PWRON_SB_HT

SB_SELHT100

SB_HT_S100M66M

HT_LDTSTOP_L

HT_PWROK

SB_HT_R100_N

SB_HT_R100_P

HT_MB_TO_SB_CTL_P<0>







HT_MB_TO_SB_CTL_N<0>










HT_SB_TO_MB_CTL_N<0>

HT_SB_TO_MB_CTL_P<0>





HT_SB_TO_MB_CLK_N<0>


HT_SB_TO_MB_CLK_P<0>


HT_LDTREQ_SB_L HT_LDTREQ_L



P3MM SPACING HT_LDTRESET_L

=PP2V5_PWRON_HT

=PP1V2_PWRON_SB_HT

=PP1V2_PWRON_SB_HT

HT_CLK66M_SB HT_CLK66M_SB_C

<XR_PAGE_TITLE>


102B7 102B2 101D5 101D2 101B7 100D7

103D6

103B6

100D3

103D3

102B4

103D6

102A6

102A6

102B4

102B4

99B7

103D6

103D6

104C4

104C4

104C4

104C4

103C2

104B4

104B4

104B4

104B4

104B4

104B4

104B4

101A7

103D3

101A4

101A7

104C4

104B4

104B4

104B4

104C4

104B4

104B4

104C4

104A4

104A4

104A4

104B4

104A4

104B4

104B4

104B4

104A4

104B4

104B4

104B4

104A4

104A4

104B4

104B4

104B4

104B4

104B4

101A4

104B4

104A4

101A7

99B3

103C2

103D3

102D7

102D7

102C7

102C7

103A7

102C5

102D5

102C7

102D7

102C5

102C7

102D5

99A4

103B7

103C2

99A5

99A5

102A4

102D7

102C7

102C5

102C5

102D5

102D7

102A4

102C2

102C2

102C2

102D2

102D4

102D2

102D2

102D4

102C2

102C4

102C4

102D4

102C4

102C4

102D4

102B6

102D4

102B6

102D2

99A4

102D5

102C4

99A4

98B1

103A7

103A7

103D6

101C1

101C1

101C1

101C1

3B2

101C1

101C1

101C1

101C1

101C1

101C1

101C1

98A1

26C2

103B6

3B2

98A1

98A1

101B1

101C1

101C1

101C1

101C1

101C1

101C1

101B1

101C4

101C4

101C4

101C4

101C4

101C4

101C4

101C4

101C4

101B4

101B4

101C4

101C4

101C4

101C4

101C5

101C4

101C5

101C4

98A1

101C1

101C4

98A1

3C1

3B2

3B2

26C2 103D6

Preliminary

PP

PP

PP

PP

PCI

(4 OF 8)

PCI1CLK_H

PCIBR_CLK_H

PCI1PAR_H

PCI1AD_31_H

PCI1AD_30_H

PCI1AD_29_H

PCI1AD_28_H

PCI1AD_27_H

PCI1AD_26_H

PCI1AD_19_H

PCI1AD_18_H

PCI1AD_16_H

PCI1AD_17_H

PCI1AD_24_H

PCI1AD_25_H

PCI1AD_20_H

PCI1AD_21_H

PCI1AD_22_H

PCI1AD_23_H

PCI1AD_15_H

PCI1AD_8_H

PCI1AD_9_H

PCI1AD_10_H

PCI1AD_11_H

PCI1AD_12_H

PCI1AD_13_H

PCI1AD_14_H

PCI1AD_7_H

PCI1AD_6_H

PCI1AD_5_H

PCI1AD_4_H

PCI1AD_0_H

PCI1AD_1_H

PCI1AD_2_H

PCI1AD_3_H

PCIVDDPVDDOPC

PCI1GNT_0_L

PCI1REQ_0_L

PCI1REQ_1_L

PCI1GNT_1_L

PCI1REQ_2_L

PCI1GNT_2_L

ROMCS_L

ROMOE_L

ROMRW_L PCI1RST_L

PCI1STOP_L

PCI1TRDY_L

PCI1IRDY_L

PCI1FRAME_L

PCI1DEVSEL_L

PCI1C_BE_3_L

PCI1C_BE_2_L

PCI1C_BE_1_L

PCI1C_BE_0_L

DRAWING

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

Shasta drives PCI RESET, but its output

may not be valid during power-up, so

it is ANDed with a reset from the SMU.


Q63 APPLICATION OF POWER NET "=PP3V3_SB_PCI" IS RUN


AD30 - FireWire (0x106B/0x0052, PCI0 or 2)

AD29 - UATA 133 (0x106B/0x0050, PCI0 or 2)

PCI Devices implemented on this page:

AD11 - PCI0 (0x106B/0x0053)


(NONE)

(NONE)


AD11 - PCI1 (0x106B/0x0054)

AD11 - PCI2 (0x106B/0x0055)

AD28 - SATA 150 (0x1166/0x0240, PCI0 or 2)

AD23 - KeyLargo (0x106B/0x004F, PCI1)

AD31 - Ethernet (0x106B/0x0051, PCI0)

- =PP3V3_PCI

- =PP3V3_SB_PCI (CAN BE _PP3V3_PCI)

- =PP3V3_PWRON_SB

- =PP2V5_PWRON_SB


"Slot A" - AD17

"Slot G" - AD27

"Slot D" - AD20

STUFF NEAR SHASTA

20%

402CERM

0.1uF

10V2

1 CB909

20%

402CERM

0.1uF

10V2

1 CB908

20%

402CERM

0.1uF

10V2

1 CB907

20%

402CERM

0.1uF

10V2

1 CB906

20%

402CERM

0.1uF

10V2

1 CB905

20%

402CERM

0.1uF

10V2

1 CB904

20%

402CERM

0.1uF

10V2

1 CB903

402CERM

20%0.1uF

10V2

1 CB9020.1uF20%

402CERM10V

2

1 CB901

20%

402CERM

0.1uF

10V2

1 CB900

20%

402CERM

0.1uF

10V2

1CB923

20%

402CERM

0.1uF

10V2

1CB922

20%

402CERM

0.1uF

10V2

1CB9210.1uF

20%

402CERM

10V2

1CB920

1/16W5%

SM-LF

4.7K63

RPB902

1/16W5%

SM-LF

4.7K54

RPB902

1/16W5%

SM-LF

4.7K72

RPB902

1/16W5%

SM-LF

4.7K81

RPB902

4.7K

SM-LF

5%1/16W

72

RPB900

1/16W5%

SM-LF

4.7K81

RPB900

1/16W5%

SM-LF

4.7K54

RPB900

1/16W5%

SM-LF

4.7K63

RPB900

1/16W5%

SM-LF

4.7K54

RPB9011/16W5%

SM-LF

4.7K63

RPB901

1/16W5%

SM-LF

4.7K27

RPB901

10%

805X5R

10UF

6.3V2

1 CB910

10%

805X5R

10UF

NO STUFF

6.3V2

1 CB911

SOT23-5-LFMC74VHC1G08

5

4

1

2

3

UB950

20%

402CERM

0.1uF

10V2

1 CB950

1/16W1%

402MF-LF

4.7K

NOSTUFF

2

1RB950

1/16W1%

402MF-LF

4.7K

2

1RB955

SMP4MM

1

PPB900

P4MMSM

1PPB901

P4MMSM

1PPB905

SM

2 1

XWB900

SM

2 1

XWB901 P4MMSM

1 PPB906

BGA-LF

SHASTAV1.1

SEE_TABLE

V19

U21

R20

N21

M16

J21

H16

E21

B22

AA22

Y10

AA9

AB8

U20

N20

J18

B20

AB9

P19

P17

U18

V17

AB20

AB18

N17

R21

V18

AB19

AA18

T21

T22

V20

V22

P16

L19

U19

P22

M20

N16

M21

L20

M18

M22

T17

AA21

L22

T16

W20

Y21

T18

T19

R18

Y22

W21

R17

R16

K19

T20

P18

V21

P20

R22

P21

N19

M19

N18

M17

L18

U2300

NOSTUFF

402MF-LF1/16W5%

021

RB900

I181

NOSTUFF

402-1C0G

+/-0.25PF2PF

50V2

1 CB912

TITLE=KILOHANA

ABBREV=DRAWING

Shasta PCI InterfaceSYNC_DATE=05/19/2005SYNC_MASTER=Q63

051-6863

119 154

07

P3MM SPACINGPCI_CLK66M_SB_INT

=PP3V3_SB_PCI

=PP3V3_SB_PCI

=PP3V3_SB_PCI

PCI_STOP_L

PCI_AD<27>

PCI_DEVSEL_L

PCI_AD<17>

PCI_PAR

PCI_TRDY_L

PCI_IRDY_L

PCI_FRAME_L

PCI_CBE_L<3..0>

PCI_AD<16..0>

PCI_AD<23>

PCI_AD<31..28>

PCI_AD<19..18>

PCI_AD<20>

PCI_AD<21>

PCI_AD<22>

PCI_AD<26..24>

PCI_RESET_L

SYS_IO_RESET_L

=PP3V3_PWRON_SB

PP_2V5PWRONSB_B9

PP_3V3SBPCI_B9

PCI_SLOTA_REQ_L

PCI_SLOTG_REQ_L

PCI_SLOTD_REQ_L

PCI_FRAME_L

PCI_TRDY_L

PCI_SLOTA_GNT_L

PCI_SLOTG_GNT_L

PCI_SLOTD_GNT_L

PCI_IRDY_L

PCI_DEVSEL_L

PCI_STOP_L

PCI_SB_STOP_L

PCI_SB_PAR

PCI_SB_TRDY_L

PCI_SB_IRDY_L

PCI_SB_FRAME_L

PCI_SB_DEVSEL_L

PCI_SB_CBE_L<3>

PCI_SB_CBE_L<2>

PCI_SB_CBE_L<1>

PCI_SB_AD<31>

PCI_SB_CBE_L<0>

PCI_SB_AD<29>

PCI_SB_AD<30>

PCI_SB_AD<28>

PCI_SB_AD<27>

PCI_SB_AD<26>

PCI_SB_AD<25>

PCI_SB_AD<24>

PCI_SB_AD<23>

PCI_SB_AD<21>

PCI_SB_AD<22>

PCI_SB_AD<20>

PCI_SB_AD<18>

PCI_SB_AD<19>

PCI_SB_AD<16>

PCI_SB_AD<15>

PCI_SB_AD<17>

PCI_SB_AD<13>

PCI_SB_AD<14>

PCI_SB_AD<12>

PCI_SB_AD<11>

PCI_SB_AD<10>

PCI_SB_AD<8>

PCI_SB_AD<9>

PCI_SB_AD<7>

PCI_SB_AD<6>

PCI_SB_AD<5>

PCI_SB_AD<3>

PCI_SB_AD<4>

PCI_SB_AD<1>

PCI_SB_AD<0>

PCI_SB_AD<2>

=PP2V5_PWRON_SB

ROM_WE_L

ROM_OE_L

ROM_CS_L

PCI_SLOTD_GNT_L

PCI_SLOTD_REQ_L

PCI_SLOTG_GNT_L

PCI_SLOTG_REQ_L

PCI_SLOTA_REQ_L

PCI_SLOTA_GNT_L

SB_PCI_RESET_L

NET_SPACING_TYPE=P3MM SPACING

P3MM SPACING PCI_CLK66M_SB_INT

PCI_CLK33M_SB_EXT_RR

<XR_PAGE_TITLE>


154D2 149A3

125C5

120C4

125B5

29C7

122D5

29B4

122C5

24D2

121C4

125C3

24C3

125B5

121C3

122C5

125B5

125C3

122A7

24B7

138C6

122B5

125C3

122B5

122C5

122B5

122B5

122B5

122B5

121B4

122B5

122C5

125B5

122C5

29D6

24A6

122B5

122B5

122B5

122B5

122B5

24D5

119C7

119C7

119B8

121C3

122C6

121C3

121C4

122B5

121C3

121C4

121C3

121C4

121B3

122C5

121C4

121C4

122C5

122C5

122C5

121C4

28D4

23B7

121C3

121C3

121C4

121C3

121C3

23C2

119D6

119B8

119B1

119B1

120B6

121C4

120B6

121C1

121C3

120B6

120B6

120B6

121B3

120D6

121C4

121C3

121C3

121C3

121C4

121C3

121C3

120C2

24B7

20D2

121C4

122B5

120B6

120B6

121C3

122B5

120B6

120B6

120B6

120B7

120B7

120B7

120B7 120B7

120B7

120B7

120B7

120B7

120B7

120B7

120B7

120B7

120B7

120B7

120B7

120C7

120C7

120C7

120C7

120C7

120C7

120C7

120C7

120C7

120C7

120D7

120C7

23B2

125B7

125B7

125B7

122B5

122B5

121C4

121C3

119C5

26A2

3A7

3A7

3A7

119A2

120B6

119B2

120C6

120B6

119A2

119B2

119B2

120B6

120C6

120B6

120B6

120C6

120C6

120C6

120C6

120B6

120B4

21C5

3A3

119B5

119B5

119B5

119D6

119D6

119B5

119B5

119B5

119D6

119D6

119D6

6B1

6B1

6B1

6B1

6B1

120B7

6C1

6C1

6C1

6C1

6C1

6C1

6C1

6C1

120B7

6C1

6C1

120B7

6C1

6C1

120C7

120C7

6C1

6C1

120C7

120C7

120C7

6C1

6C1

120C7

6C1

6C1

120C7

6C1

120C7

120C7

120C7

6C1

6C1

120D7

6C1

6C1

3C1

121B4

121B3

121B4

119A7

119B7

119B7

119B7

119B7

119B7

26A2

26A1

Preliminary

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

ALL RESISTOR PACKS ARE 47 OHM 1/16W 5%

R PAKS ARE PIN SWAPPABLE ACROSS ALL SIGNALS (EXCEPT IDSELS)

AD<27> IS IDSEL FOR USB

AD<17> IS IDSEL FOR AIRPORT

PLACE CLOSE TO SHASTA

4772RPC003

4754RPC003

4772RPC009

4781RPC000

4754RPC009

4763RPC000

4754RPC000

4772RPC001

4754RPC001

4781RPC001

4781RPC009

4763RPC009

4781RPC007

4763RPC001

4781RPC008

4763RPC006

4781RPC0054772RPC005

4781RPC002

4763RPC002

4781RPC004

4754RPC006

4763RPC005

4772RPC002

4754RPC004

4754RPC002

4772RPC004

4763RPC003

4772RPC006

4754RPC005

4763RPC0044781RPC006

4754RPC007

4763RPC007

4763RPC008

4754RPC008

4772RPC008

4772RPC007

1/16W

402

5%

47

MF-LF

21

RC000

402

47

5%1/16WMF-LF

21

RC001

4772RPC000

4781RPC003

154120

07051-6863

SYNC_MASTER=FINO-EG SYNC_DATE=05/19/2005

PCI SERIES TERMINATION

PCI_AD<27>PCI_SB_AD<27>



PCI_CBE_L<3>PCI_SB_CBE_L<3>




























PCI_DEVSEL_LPCI_SB_DEVSEL_L

PCI_FRAME_LPCI_SB_FRAME_L

PCI_IRDY_LPCI_SB_IRDY_L

PCI_PARPCI_SB_PAR

PCI_TRDY_LPCI_SB_TRDY_L




PCI_STOP_LPCI_SB_STOP_L



125B5

125C3

122C5

125C5

125C5

125B5

125B5

125B5

125B5

125B5

125B5

125B5

125B5

125B5

125C3

125C3

125C3

125C3

125C5

125C3

125C3

125C5

125C5

125C5

125C5

125C5

122B5

122B5

122B5

122B5

125C5

125B5

125C3

122B5

125C5

122C6

121C6

122D5

122B5

122D5

122C5

122C5

122C5

122C5

122C5

122C5

122C5

122C5

122C5

122C5

122C5

122C5

122C5

122C5

122C5

122C5

122D5

122B5

122B5

122C5

122C5

122C5

122C5

122C5

122B5

122B5

121C5

121C4

121C5

122B5

121C4

122D5

122C5

122C5

121B5

122B5

122C5

121C5

121C4

121B5

121C5

121B4

121B4

121B5

121B4

121B4

121B4

121B4

121C5

121C5

121C4

121C5

121C5

121C4

121C4

121C5

121C5

121C5

121B5

121C5

121C4

121B4

121B5

121B5

121B5

121B5

121B4

121B4

119D6

119D6

119D6

121B5

119D6

121B5

121B4

121C4

119D6

121B5

121B5

119D6 119A3

119D6 119B3

119D6 119B3

119D6 119A3

119D6 119B3

119D6 119B3

119D6 119B3

119D6 119B3

119D6 119B3

119D6 119B3

119D6 119B3

119D6 119B3

119D6 119B3

119D6 119B3

119D6 119B3

119D6 119B3

119D6 119B3

119D6 119B3

119D6 119B3

119D6 119B3

119D6 119A3

119D6 119B3

119D6 119A3

119D6 119A3

119D6 119B3

119D6 119B3

119D6 119B3

119D6 119B3

119D6 119B3

119D6 119A3

119D6 119A3

119B2 119A3

119B2 119A3

119B2 119A3

119D6 119A3

119A2 119A3

119D6 119C3

119D6 119B3

119D6 119A3

119A2 119A3

119D6 119A3

119D6 119B3

Preliminary

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

516S0347



- _PP3V3_PCI

(NONE)

not support PME#.

- _PCI_CLK33M_AIRPORT (33MHz PCI clock)

AD17 (Slot "A") - AirPort (0x????/0x????)PCI Devices implemented on this page:

Q85 WIRELESS CONNECTOR




NOTE: This AirPort implementation does

10%1UF

402

6.3VCERM2

1 CC152

10K

1/16WMF-LF402

5%

2

1RC150

402

6.3V10%1UF

CERM2

1 CC151NOSTUFF

10UF6.3V

805

10%

X5R2

1 CC150

402

1UF

CERM

10%6.3V

2

1CC160

402MF-LF1/16W

22

5%

21

RC151

STDOFF-3MMOD5MMH-TH

1

SDFC100

STDOFF-3MMOD5MMH-TH

1

SDFC101

CRITICAL

F-ST-SM962-001-8028R

8079

7877

7675

7473

7271

7069

6867

6665

6463

6261

6059

5857

5655

5453

5251

5049

4847

4645

4443

4241

4039

3837

3635

3433

3231

3029

2827

2625

2423

2221

2019

1817

1615

1413

1211

109

87

65

43

21

JC150

AIRPORT & BLUETOOTHSYNC_DATE=05/19/2005SYNC_MASTER=FINO-EG

154121

07051-6863

=PP3V3_PCI

NC_AP_ALT_ANTMAKE_BASE=TRUENO_TEST=YES

AP_ALT_ANT

PCI_AD<28>

PCI_AD<17>

USB_BT_N

USB_BT_P

PCI_SLOTA_IDSEL

PCI_DEVSEL_L

PCI_CLK33M_AIRPORT

PCI_STOP_L

=PCI_AIRPORT_RESET_L

PCI_AD<22>

PCI_AD<19>

PCI_IRDY_L

PCI_AD<18>

AIRPORT_CLKRUN_L_PD

PCI_AD<31>

PCI_SLOTA_REQ_L

PCI_AD<25>

PCI_CBE_L<3>

PCI_AD<9>

ROM_CS_L

ROM_ONBOARD_CS_L

ROM_OE_L

PCI_AIRPORT_INT_L

PCI_AD<2>

ROM_WE_L

PCI_AD<11>

PCI_AD<4>

PCI_CBE_L<1>

PCI_AD<15>

PCI_AD<13>

PCI_AD<14>

PCI_AD<16>

PCI_CBE_L<2>

PCI_TRDY_L

PCI_FRAME_L

PCI_AD<20>

PCI_AD<23>

PCI_AD<24>

PCI_SLOTA_GNT_L

TP_AP_PME_L

PCI_AD<10>

PCI_AD<1>

PCI_AD<6>

PCI_AD<3>

PCI_AD<7>

PCI_CBE_L<0>

PCI_AD<8>

PCI_PAR

PCI_AD<12>

PCI_AD<21>

PCI_AD<26>

PCI_AD<29>

PCI_AD<27>

PCI_AD<30>

PCI_AD<17>

PCI_CLK33M_AIRPORTCLOCKSPCI_CLK_AIRPORT

=PP3V3_PWRON_BT

PCI_AD<0>

PCI_AD<5>

125

125

125

122

125

125

125

125

125

125

125

125

125

125

125

125

125

125

125

125

125

125

125

125

125

125

125

125

125

122

125

125

122

121

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

122

121

122

122

125

120

120

120

121

120

120

120

120

120

120

120

120

120

125

125

120

125

120

120

120

120

120

120

120

120

120

120

120

120

120

120

120

120

120

120

120

120

120

120

120

120

120

120

120

120

121

120

120

7

119

119

143

143

119

26

119

20

119

119

119

119

119

119

119

119

119

119

125

119

24

119

119

119

119

119

119

119

119

119

119

119

119

119

119

119

119

119

119

119

119

119

119

119

119

119

119

119

119

119

119

119

26

7

119

119

Preliminary

AD1

SRMOD

NANDTEST

NTEST1

SRDTA

SRCLK

TEST

TEB

AMC

SMC

LEGC

PME

PCLK

INTC

INTB

INTA

VBBRST

SMI

CRUN

SERR

REQ

STOP

TRDY

IRDY

FRAME

IDSEL

DEVSEL

GNT

PERR

PAR

CBE3

CBE2

CBE1

CBE0

AD31

AD30

AD29

AD28

AD24

AD23

AD22

AD21

AD20

AD19

AD18

AD25

AD26

AD27

AD14

AD13

AD12

AD11

AD10

AD9

AD8

AD15

AD16

AD17

AD7

AD6

AD0

AD2

AD5

AD4

VCCRST

AD3

VDD_PCI

PP

PP

PP

DRAWING

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

IPD

Q63 APPLICATION OF POWER NET "=PPVIO_PCI_USB2" IS PP3V3_RUN

RC250, RC251 & RPC203 REQUIRED TO

facilitate NAND-tree testing

(CHIP RESET)

OD

NOTE: This USB2 implementation supports

AD27 (Slot "G") - USB2 (0x1033/0x0035)

PCI Devices implemented on this page:



- _PPVIO_PCI (to 3.3V or 5V)

D3cold.

(NONE)

- _PCI_CLK33M_USB2 (33MHz PCI clock)


IPD

IPD

IPD

OD

(PCI RESET)

IPD

(PCI_AD<27>)

OD

OD

OD

OD

IPD

Page Notes

DIFFERENTIAL_PAIRELECTRICAL_CONSTRAINT_SET NET_SPACING_TYPE

ALL NETS TO FUNCTIONAL TEST PAGE

10V

0.1uF

CERM402

20%

2

1CC203

NEC_UPD720101_USB2FBGA-LF

C8

M4

H3

C9

B8

G1

L8

N7

G3

P9

N9

M9

L6

M7

H1

C6

D9

H2

A8

J4

M8

M10

L7

F4

A7

B7

C7

B3

D6

F3

G2

N6

C3

F1

J3

M2

P7

L1

L2

M1

N3

M3

N4

A6

B6

P4

C5

A5

C4

B5

A4

B4

C1

C2

D2

D1

N5

D3

E1

E3

F2

J1

J2

K3

K1

L3

K2

P5

M5

UC200

47

SM-LF

5%1/16W

8

1

RPC203

22

MF-LF402

5%1/16W

2

1RC214

10K

MF-LF402

5%1/16W

2

1RC21310K

MF-LF402

5%1/16W

2

1RC216

4.7K

MF-LF402

1%1/16W

2

1RC215

47

SM-LF

5%1/16W

72

RPC203

47

SM-LF

5%1/16W

54

RPC203

47

SM-LF

5%1/16W

63

RPC203

47

MF-LF402

5%1/16W

21

RC250

MF-LF402

5%1/16W

4721

RC251

10V

0.1uF

CERM402

20%

2

1CC202

10V

0.1uF

CERM402

20%

2

1CC201

P4MMSM

1PPC200

P4MMSM

1PPC201

SMP4MM1 PPC203

SM

2 1

XWC200

ABBREV=DRAWING

TITLE=KILOHANA

122 154

07051-6863


USB 2.0 PCI Interface

PCI_FRAME_L

SYS_IO_RESET_L

PCI_AD<10>

PCI_AD<11>

PCI_AD<9>

PCI_AD<27>

TP_NEC_NTEST1

TP_NEC_SMC

TP_NEC_TEB

TP_NEC_AMC

TP_NEC_TEST

TP_NEC_SRCLK

TP_NEC_NANDTEST

TP_NEC_SRDATA

TP_NEC_SRMOD

PCI_STOP_L

PCI_IRDY_L

PCI_PAR

PCI_AD<21>

PCI_AD<25>

PCI_AD<28>

PCI_CBE_L<0>

PCI_CBE_L<2>

PCI_AD<13>

PCI_AD<16>

PCI_AD<18>

PCI_AD<19>

PCI_AD<22>

PCI_AD<26>

PCI_AD<17>

PCI_AD<4>

PCI_AD<6>

PCI_AD<5>

PCI_AD<7>

PCI_AD<14>

PCI_AD<15>

PCI_AD<20>

PCI_AD<23>

=PCI_CLK33M_USB2CLOCKS

NEC_PERR_L_PU

PCI_SLOTG_GNT_L

PCI_SLOTG_REQ_L

PCI_DEVSEL_L

PCI_TRDY_L

PCI_AD<3>

PCI_AD<2>

PCI_AD<1>

PCI_AD<0>

PCI_AD<29>

PCI_AD<30>

PCI_AD<31>

PCI_CBE_L<1>

PCI_CBE_L<3>

NEC_INTA_L

NEC_INTB_L

TP_NEC_SMI_L

NEC_CRUN_L_PD

PCI_AD<12>

PCI_AD<8>

NEC_LEGC_PD

SYS_PME_L

NEC_PME_L

PCI_USB2_INT_L

=PPVIO_PCI_USB2

PCI_SLOTG_IDSEL

PCI_AD<24>

NEC_INTC_L

NEC_SERR_L_PU

=PCI_CLK33M_USB2

NEC_VBBRST_L

=PCI_USB2_RESET_L

=PPVIO_PCI_USB2

PP_VIOPCIUSB2_C2

<XR_PAGE_TITLE>


119A4

125B5

113A6

121C3

29D6

125B5

125B5

125C5

125C3

121C3

121C4

125C3

125C3

125B5

125B5

125B5

125B5

125C3

121C4

125C5

125C5

125C5

125C5

125B5

125B5

125B5

121C3

121C3

125C5

125C5

125C5

125C5

125C3

125C3

125C3

125B5

125C5

28C3

125C3

120B6

28D4

121C4

121C3

121B3

121C4

120B6

120B6

121C3

121C4

121C4

121C3

121B3

121C4

121C3

121C3

121C3

121C4

121C3

121C3

121C1

121B3

121B3

121B4

121B4

121C4

121C3

121C3

121C4

120B6

120B6

121B4

121B3

121B4

121B3

121C4

121C3

121C4

121C4

121C4

121C4

121B4

28B1

24C6

121C3

119D6

24B7

120C6

120C6

120C6

120B6

119D6

119D6

120B6

120C6

120B6

120B6

120B6

120B6

120C6

120C6

120C6

120C6

120C6

120B6

120C6

120C6

120C6

120C6

120C6

120C6

120C6

120C6

120B6

122B5

119B7

119B7

119D6

119D6

120C6

120C6

120D6

120D6

120B6

120B6

120B6

120B6

120B6

120C6

120C6

24B5

24B3

122D5

120B6

122D6

122B7

119B2

21C5

119D6

119D6

119D6

119D6

119A2

119B2

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

120A3

119B5

119B5

119B2

119A2

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

21C1

24A7

3A7

119D6

120A3

120A3

3A7

Preliminary

PP

PP

PP

PP

DQ1

VCCVPP

DQ7

DQ4DQ3DQ2

DQ5DQ6

DQ0

GNDPWDWPWEOECE

A19A18A17

A20

A16A15A14A13A12A11A10

A7A8A9

A5A4A3A2

A6

A1A0

DRAWING

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

Allows ROM override moduleto intercept ROM chip select


- =PP3V3_PCI


NOTE: This page does not specify a BootROM


(NONE)

(NONE)

symbol to declare U7500 part number.

part number. Must use a TABLE_x_ITEM



10V

0.1uF

CERM402

20%

2

1CC502

SMP4MM

1PPC500P4MMSM

1PPC501

SMP4MM

1PPC502

SMP4MM

1PPC503

1/16W5%

402MF-LF

10K

2

1RC50310K

MF-LF402

5%1/16W

2

1RC504

10V

0.1uF

CERM402

20%

2

1CC501

10V

2.2uF

CERM805

20%

2

1CC500

SEE_TABLE

1MX8-3.3V-90.0NSTSOP

12

9

11 3130

10

24

3923

35

34

33

32

28

27

26

25

22

7

8

14

15

16

17

18

38

19

37

13

40

1

2

3

4

5

6

36

20

21

UC500

10K

MF-LF402

5%1/16W

2

1RC501

470

5%1/16WMF-LF402

21

RC502

10K

MF-LF402

5%1/16W

2

1RC500

ABBREV=DRAWING

TITLE=KILOHANA

BootROMSYNC_DATE=05/19/2005SYNC_MASTER=Q63

07051-6863

154125

PCI_AD<10>

PCI_AD<2>

PCI_AD<9>

PCI_AD<8>

PCI_AD<6>

PCI_AD<5>

PCI_AD<4>

PCI_AD<3>

PCI_AD<7>

PCI_AD<11>

PCI_AD<0>

PCI_AD<1>

PCI_AD<13>

PCI_AD<19>

PCI_AD<18>

PCI_AD<12>

PCI_AD<15>

PCI_AD<16>

PCI_AD<17>

PCI_AD<14>

PCI_AD<20>

=PCI_ROM_RESET_L

=PP3V3_PCI

PCI_AD<29>

PCI_AD<28>

PCI_AD<27>

PCI_AD<24>

PCI_AD<26>

PCI_AD<25>

PCI_AD<30>

PCI_AD<31>

ROM_WP_L

ROM_WE_L

ROM_OE_L

=PP3V3_PCI

ROM_CS_L

ROM_ONBOARD_CS_L

<XR_PAGE_TITLE>


122C5

122C5

122D5

122C5

122C5

122C5

122C5

122C5

122D5

122C5

122C5

122D5

122D5

122C5

122C5

122C5

122C5

122C5

122C5

121C4

122C5

122C5

122C5

122C5

122C6

122C5

122C5

122C5

122B5

122B5

121C4

121B3

121B3

121B4

121B3

121B4

121B3

121B4

121B4

121C3

121B3

121B4

121C3

121C4

121C3

121C4

121C3

121C3

121C1

121C4

121C3

125B7

121C4

121C3

121C4

121C3

121C3

121C4

121C3

121C4

125C5

120C6

120C6

120C6

120C6

120C6

120C6

120C6

120C6

120C6

120C6

120D6

120D6

120C6

120C6

120C6

120C6

120C6

120C6

120C6

120C6

120C6

121D4

120B6

120B6

120B6

120B6

120B6

120B6

120B6

120B6

121B4

121B3

121D4

121B4

121B4

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

120A3

3A7

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119D6

119A5

119A5

3A7

119A5

6B7

Preliminary

UATA

UD_IDECHRDY_H

UD_IDEDMARQ_H

UD_IDEINTRQ_H

UD_IDEDA2_H

UD_IDEDA1_H

UD_IDEDA0_H

UD_IDEDD_15_H

UD_IDEDD_14_H

UD_IDEDD_0_H

UD_IDEDD_1_H

UD_IDEDD_2_H

UD_IDEDD_3_H

UD_IDEDD_4_H

UD_IDEDD_5_H

UD_IDEDD_6_H

UD_IDEDD_7_H

UD_IDEDD_8_H

UD_IDEDD_9_H

UD_IDEDD_10_H

UD_IDEDD_11_H

UD_IDEDD_12_H

UD_IDEDD_13_H

TXDN1

TXDP1

TXDN2

TXDP2

RXDN2

RXDP2

RXDN1

RXDP1

SATA_GND

SATA_VDD

SATA 0

SATA 1

(5 OF 8)

UD_IDECS1FX_L

UD_IDECS3FX_L

UD_IDEDMACK_L

UD_IDERD_L

UD_IDEWR_L

UD_IDERST_L

PP

PP

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

DRAWING

SYNC WITH Q63.RPAK PINS WERE REMAPPED FORBETTER ROUTING AROUND UATA

PLACE UATA TERMINATION RESISTORS NEAR JC901 CONNECTOR

NOTE: Target differential impedance for

SATA data pairs is 100 ohms.

- _PP1V2_PWRON_DISK


(NONE)


(NONE)


Length Tolerance: 1.27mm

Primary Max Sep: 0.23mm inner

Primary Max Sep: 0.25mm outer

Secondary Max Sep: 2.54mm

Secondary Length: 12.70mm

Line To Line: 0.38mm

Page Notes

Net Spacing Type: SATA

SATA_VDD x 5

DSTROBE aka:

DIOW*

IORDY/HDMARDY*

STOP aka:

DIOR*

HSTROBE aka:

SPARE

DIOR- :HDMARDY- :HSTROBE >

DIOW- :STOP >

ELECTRICAL_CONSTRAINT_SET NET_SPACING_TYPE NET_PHYSICAL_TYPE DIFFERENTIAL_PAIR

4-29-05

AS OF TODAY THIS PAGE FOR M33 IS NOT

CONNECTOR.

10V

0.1uF

CERM402

20%

2

1 CC702

10V

0.1uF

CERM402

20%

2

1 CC701

10V

0.1uF

CERM402

20%

2

1 CC700

10V

0.1uF

CERM402

20%

2

1 CC704

10V

0.1uF

CERM402

20%

2

1 CC703

SHASTA

SEE_TABLE

V1.1

BGA-LF

D3

E7

E4C5

D7 E8

D4

G5

G6

E3

C2

C1

E2

H6

H7

D5

E5

F5

C3

F6

G7

J6

D6

C4

E6

B4

B3

F9

Y15

AA16

Y14

AB16

Y18

W15

T14

AB17

AB14

W16

T13

AA17

AA14

AB15

Y17

AA15

Y16

U2300

I171

I172

I173

I174

I175

I176

I177

I178

I179

I180

33

SM-LF

5%1/16W

63

RPC704

MF-LF1/16W

33

402

5%

21

RC706

33

SM-LF

5%1/16W

81

RPC704

33

SM-LF

5%1/16W

54

RPC701

SM

2 1

XWCC00 SMP4MM1 PPCC00

SMP4MM1 PPCC01

20%

603CERM1

2.2UF

6.3V2

1 CC705

600-OHM-1.0A

0805

21

LC700

33

SM-LF

5%1/16W

54

RPC700

33

SM-LF

5%1/16W

63

RPC700

33

SM-LF

5%1/16W

72

RPC700

33

SM-LF

5%1/16W

54

RPC703

33

SM-LF1/16W

5%81

RPC701SM-LF

33

5%1/16W

72

RPC701

1/16W5%

33

SM-LF

63

RPC703

33

SM-LF

5%1/16W

81

RPC702

33

SM-LF

5%1/16W

72

RPC702

1/16W5%

SM-LF

3381

RPC700

33

SM-LF

5%1/16W

54

RPC702

1/16WSM-LF

33

5%

72

RPC703

33

SM-LF1/16W5%

63

RPC701

33

SM-LF

5%1/16W

81

RPC703

1/16W5%

SM-LF

3363

RPC702

SM-LF

33

5%1/16W

72

RPC704

SM-LF

33

5%1/16W

54

RPC704

10K

MF-LF402

5%1/16W

2

1RC705

33

MF-LF402

5%1/16W

21

RC701

22

MF-LF402

5%1/16W

21

RC702

22

MF-LF402

5%1/16W

21

RC703

22

MF-LF402

5%1/16W

21

RC704

33

MF-LF402

5%1/16W

21

RC700

Shasta DiskSYNC_DATE=05/19/2005

154127

07051-6863

SYNC_MASTER=M33-MB

TITLE=KILOHANA

ABBREV=DRAWING

SATA SATA_TXD1SATA SATA_TXD_N1

UATA_DD_R<14> UATA_DD<14>

UATA_DD_R<13>

UATA_DD_R<12>

UATA_DD<10>



UATA_DD<6>


UATA_DD_R<4>

UATA_DD_R<3>

UATA_DA_R<0>

=PP1V2_PWRON_DISK_SBMIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MMPP1V2_SATA_VDD

UATA_CS0_L_R

UATA_DMACK_L_R

UATA_STOP_R

UATA_DD_R<6..0>

UATA_CS1_L_R

UATA_HSTROBE_R

UATA_DD_R<7>

UATA_DA_R<2..0>

UATA_DD<7>

UATA_DMARQ

UATA_DMACK_L

UATA_CS1_L

UATA_DA<2..0>

UATA_DD<6..0>

SATA SATA_RXD1_CSATA SATA_RXD_N1_C

SATA SATA_RXD2_CSATA SATA_RXD_N2_C

SATA SATA_TXD2SATA SATA_TXD_N2

SATA SATA_RXD2_CSATA SATA_RXD_P2_C

SATA SATA_TXD1SATA SATA_TXD_P1

SATA SATA_TXD2SATA SATA_TXD_P2

UATA_DSTROBE

UATA_STOP

UATA_CS0_L

UATA_DD<15..8>

UATA_INTRQ

UATA_HSTROBE

PP_1V2PWRONDISKSB_CCNO_TEST=YES

UATA_DA<1>

UATA_DA<2>

UATA_DD_R<0>

UATA_RESET_L_R

UATA_STOP_R

UATA_DMACK_L_R

UATA_HSTROBE

UATA_DMACK_L

UATA_CS1_L

UATA_CS0_L_R UATA_CS0_L

UATA_CS1_L_R

UATA_HSTROBE_R

UATA_STOP

UATA_STOP_R

UATA_DA_R<1>

UATA_DA_R<2>

SATA_TXD_P1

SATA_TXD_P2

SATA_TXD_N2

UATA_DSTROBE

UATA_DMARQ

UATA_INTRQ

SATA_RXD_P2_C

SATA_RXD_P1_C

SATA_RXD_N1_C

SATA_RXD_N2_C

UATA_DD_R<1>

UATA_DD_R<3>

UATA_DD_R<4>

UATA_DD_R<5>

UATA_DD_R<6>

UATA_DD_R<8>

UATA_DD_R<10>

UATA_DD_R<12>

UATA_DD_R<14>

UATA_DD_R<13>

UATA_DD_R<15>

UATA_DA_R<0>

UATA_CS0_L_R

UATA_DMACK_L_R

UATA_HSTROBE_R

UATA_DD_R<0>

UATA_DA<0>

UATA_DD<0>

UATA_DD_R<1>

UATA_DD_R<2>

UATA_DD_R<11>

UATA_DD_R<15>

UATA_DA_R<2>

UATA_DD<15>

UATA_DD_R<2>

UATA_DD_R<7>

UATA_DD_R<9>

UATA_DD_R<11>

UATA_RESET_L_R

SATA_TXD_N1

UATA_RESET_L_R

UATA_DD_R<15..8>

SATA SATA_RXD1_CSATA SATA_RXD_P1_C

UATA_RESET_L

UATA_NETSPA UATA_RESET_L

UATA_DD<2>

UATA_DD<3>

UATA_DD<4>

UATA_DD<8>

UATA_DD<12>

UATA_DD<13>

UATA_DD<11>

UATA_DD_R<10>

UATA_DD_R<6>

UATA_DD_R<8>

UATA_DA_R<1>

UATA_DD<1>

UATA_CS1_L_R


129

129 129

129

129

129

129 129

129 129

129

129 129

129

129

127

129

129

129

129

129

129

129

129

129

129

129

129

129

127

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129 129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

127

129

129

129

129

129

129

129

129

129

127

129

129

127

127 127

127

127

127

127 127

127 127

127

127 127

127

127

129

7

127

127

127

127

127

127

127

127

127

127

127

127

127

129

127

127

127

127

127

127

127

127

127

127

127

127

6

127

127

127

127

127

127

127

127

127

127 127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

127

129

127

127

127

127

127

127

127

127

127

129

127

127 Preliminary

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

SATA & USB DIFF PAIR GND VIAS

0.152MM AWAY FROM SIGNAL VIA.SIGNAL VIA, AND PLACE GND VIA APPROXIMATELYFOR THE SATA DIFF PAIRS. ONE GND VIA PERADD THESE GROUND VIAS NEAR EACH LAYER JUMP

4-12-05M33 PATA CONNECTOR

UATA FROM SHASTA U2300 TO RPAKS

ATA-6 spec does not call out R8180 or R8182

NO_TESTDIFFERENTIAL_PAIRNET_SPACING_TYPEELECTRICAL_CONSTRAINT_SET NET_PHYSICAL_TYPE

SATA PORT1 IS NOT USED IN M23/M33:NO TEST

518S0251

ObsoleteNC

NCNC

Per ATA Spec

NC

NCNC

PER ATA7 SPECPER ATA SPEC

"UATA ACTIVE"

Per ATA Spec

ATA-6 spec does not call out C8177

Sourced by drive

Terminate near connector

HELP MITIGATE THE LOSS ACROSS THE Q1306 FET

PP1V2_ALL REG. IS SET TO BE 1.22V TO 1.23V

PREVIOUS ONE WAS 155S0031 (600 OHM,0.6 OHM DCR,0.2A)

NOTES FOR SHARED PAGE 127

UPDATED AC COUPLING CAPS FOR SATA JC900.

ARE SET BY Q63 FOR SCHEMATIC SHARING.

THE WIDTH/NECK PROPERTIES ON PAGE 127

TO THE DEFAULT VALUE WHEN NECESSARY.

FOR PP1V2_SATA_VDD AND THEN NECK DOWN

4-8-05

4-12-05.

SI3326DV.

4-11-05.

AS NOTED ON THE 1.2 REG PAGE 13. THIS WILL

ADDED DECOUPLING CAPS FOR JC901 PP5V_PATA NET.

SATA CONNECTOR

4-11-05:

PER TOKIN AMERICA PN: N2012Z601.

LC700 CHANGED TO 155S0240 (600 OHM,0.2 OHM DCR,1A)

FOR M23/M33 CREATE A WIDE SHAPE

UATA FROM RPAKS TO JC901

UATA TRACE IMPEDANCE ROUTE TO 50 OHMS

BOARD FILE HAS PHYSICAL/SPACING NAME ASSIGMENT ALREADY FOR SATA DIFF PAIRS (CAP TO SHASTA).

BUT NOT FOR THE SATA CAP TO CONNECTOR ROUTES, WHICH THE ABOVE ARE ADDED FOR THIS PURPOSE.

PLACE CC909/CC910 CLOSE TO JC901 FOR PP5V_PATA.

516S0152

10K

MF-LF1/16W

5%

402

NO STUFF

2

1RC911

5%1K

402MF-LF1/16W

2

1RC912

1/16W

10K

NO STUFF

402MF-LF

5%

2

1RC913

1/16W

402MF-LF

5%4.7K

2

1RC914

MF-LF

5%1/16W

402

8221

RC915

82

402MF-LF1/16W5%

21

RC916

5%50V

CERM402

10pF

NO STUFF

2

1CC901

MF-LF

5%6.2K1/16W

4022

1RC9170

402MF-LF1/16W5%

2

1RC918

402

5%5.6K

MF-LF1/16W

2

1RC919

402MF-LF1/16W5%

8221

RC920

DEVELOPMENT

1%1/16WMF-LF

402

499

2

1RC921

EP00-081-91M-ST-SM

7

6

5

4

3

2

1

JC900

GREEN

DEVELOPMENT

2.0X1.25A

21

LEDC901

16V

0.01UF

10%

CERM402

21

CC904

16V10%

CERM402

0.01UF21

CC905

402

16V

0.01UF

10%

CERM

21

CC907

16V

0.01UF

10%

CERM402

21

CC908

0.1uF20%

CERM10V

402

2

1 CC909

HOLE-VIA-P5RP251

GV908

HOLE-VIA-P5RP251

GV906

HOLE-VIA-P5RP251

GV901

HOLE-VIA-P5RP251

GV903

HOLE-VIA-P5RP251

GV905

HOLE-VIA-P5RP251

GV907

HOLE-VIA-P5RP251

GV902

HOLE-VIA-P5RP251

GV904

I392

I393

I394

I395

I396

I397

I398

I399

I400

I401

I402

I403

I404

M-SM

CRITICAL

9

8

7

6

50

5

49

48

47

46

45

44

43

42

41

40

4

39

38

37

36

35

34

33

32

31

30

3

29

28

27

2625

24

23

22

21

20

2

19

18

17

16

15

14

13

12

11

10

1

JC901

CERM

20%10UF10V

805-22

1 CE910

HOLE-VIA-P5RP251

GV909

HOLE-VIA-P5RP251

GV911

HOLE-VIA-P5RP251

GV913

HOLE-VIA-P5RP251

GV915

HOLE-VIA-P5RP251

GV910

HOLE-VIA-P5RP251

GV912

HOLE-VIA-P5RP251

GV914

HOLE-VIA-P5RP251

GV916

Disk Connectors

07051-6863

154129

SYNC_DATE=05/19/2005SYNC_MASTER=M33-MB

UATA_RESET_L

UATA_NETSPAUATA_NETPHUATA_RESET_LUATA_RESET_L

UATA_DD<10>

UATA_CS1_L

SATA_TXD1TRUESATA SATA

SATA_TXD_P1

UATA_NETPH UATA_NETSPAUATA_INTRQ

UATA_DD<14>

UATA_DSTROBE_R

UATA_DD<6>

UATA_DD<5>

=PP5V_PATA

UATA_DMARQ_R

=PP3V3_PATA

UATA_CSEL_PD

UATA_NETSPAUATA_NETPHUATA_DSTROBE

UATA_NETSPAUATA_HOST UATA_NETPHUATA_STOP

UATA_NETSPAUATA_DEV_R_C UATA_NETPHUATA_DSTROBE_R

UATA_NETSPAUATA_NETPHUATA_DD_R<6..0>

SATA_TXD_N1

SATA_RXD_P1_CSATA_RXD_P1

SATA_RXD_N1

SATA_TXD_P1SATA_TXD_P1_C

TX1C TRUESATA_TXD1

SATA SATASATA_TXD_P1_C

SATA_TXD1TRUESATA SATA

SATA_TXD_N1

UATA_NETSPAUATA_NETPHUATA_DD_R<15..8>

UATA_NETSPAUATA_HOST UATA_NETPHUATA_CS1_L

UATA_NETSPAUATA_DD UATA_NETPHUATA_DD<6..0>

UATA_DASP_L_DS

UATA_DMARQ

UATA_INTRQ

UATA_DSTROBE

=PP5V_PATA

SATA_RXD_P2_C NC_SATA_RXD_P2_CMAKE_BASE=TRUE

SATA_RXD_N2_CMAKE_BASE=TRUENC_SATA_RXD_N2_C

SATA_TXD_N2

SATA_TXD_P2MAKE_BASE=TRUENC_SATA_TXD_P2

SATA_TXD_N1_C

UATA_DA<2>

UATA_DD<7>

UATA_DD<2>

UATA_DD<1>

UATA_STOP

UATA_INTRQ_R

UATA_DA<1>

UATA_DA<0>

UATA_CS0_L

UATA_DASP_L

UATA_DD<8>

UATA_DD<9>

UATA_DD<11>

UATA_DD<12>

UATA_DD<13>

UATA_DD<15>

UATA_HSTROBE

UATA_DMACK_L

UATA_IOCS16_PU

UATA_DD<4>

UATA_DD<3>

UATA_DD<0>

NC_SATA_TXD_N2MAKE_BASE=TRUE

TX1C TRUESATA_TXD1

SATA SATASATA_TXD_N1_C

UATA_NETSPAUATA_HOST UATA_NETPHUATA_CS0_L

UATA_NETSPAUATA_NETPHUATA_DMARQ

UATA_NETPH UATA_NETSPAUATA_RESET_L_R

UATA_NETPH UATA_NETSPAUATA_STOP_R

UATA_NETPH UATA_NETSPAUATA_CS1_L_RUATA_NETSPAUATA_NETPHUATA_CS0_L_RUATA_NETSPAUATA_NETPHUATA_DA_R<2..0>

UATA_NETSPAUATA_NETPHUATA_DD_R<7>

UATA_NETSPAUATA_HOST_R UATA_NETPHUATA_DMACK_L

UATA_NETSPAUATA_DD UATA_NETPHUATA_HSTROBE

UATA_NETSPAUATA_DD7 UATA_NETPHUATA_DD<7>UATA_NETSPAUATA_DD UATA_NETPHUATA_DD<15..8>

UATA_NETSPAUATA_DEV_R UATA_NETPHUATA_INTRQ_RUATA_NETPH UATA_NETSPAUATA_DEV_RUATA_DMARQ_R

SATA_RXD_N1_C

UATA_NETSPAUATA_HOST UATA_NETPHUATA_DA<2..0>

UATA_NETSPAUATA_NETPHUATA_HSTROBE_R

UATA_NETSPAUATA_NETPHUATA_DMACK_L_R

RX1C TRUESATA_RXD1

SATA SATASATA_RXD_P1

TRUESATA_RXD1

SATA SATASATA_RXD_N1_C

TRUESATA_RXD1

SATA SATASATA_RXD_P1_C

RX1C TRUESATA_RXD1

SATA SATASATA_RXD_N1

129

129

129

129

129

129

129

129

129

129

129

129 129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

129

127

127

127

127

127

127

127

129

127

127

7

129

7

127

127

129

127

127

127 129

129

127 129

129

127

127

127

127

6

127

127

127

7

127 6

127 6

127

127 6

129

127

127

127

127

127

129

127

127

127

127

127

127

127

127

127

127

127

127

127

127

6

129

127

127

127

127

127

127

127

127

127

127

127

127

129

129

127

127

127

127

129

127

127

129

Preliminary

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PLACE THESE SERIES TERM CLOSE TO DRIVER: VESTA

SHASTA -> VESTAVESTA -> SHASTA

PLACE THESE SERIES TERM CLOSE TO DRIVER: SB/SHASTA

I58

I59

I60

I61

I62

I63

I64

I65

I66

I67

I68

I69

I70

I71

I72

I73

I74

I75

I76

I77

I78

I79

I80

I81

I82

I83

I84

051-6863 07

130 154

SYNC_DATE=05/19/2005SYNC_MASTER=FINO-HC

ENET SERIES TERM

ENET_TXD_R<5>

ENET_CRS_R MAKE_BASE=TRUE ENET_CRS

ENET_COL_R MAKE_BASE=TRUE ENET_COL

ENET_RX_ER_R MAKE_BASE=TRUE ENET_RX_ER

ENET_RX_DV_R MAKE_BASE=TRUE ENET_RX_DV

ENET_RXD_R<7> MAKE_BASE=TRUE ENET_RXD<7>








ENET_CLK125M_RX_R MAKE_BASE=TRUE ENET_CLK125M_RX

ENET_CLK25M_TX_R MAKE_BASE=TRUE ENET_CLK25M_TX

ENET_CLK125M_GBE_REF_R MAKE_BASE=TRUE ENET_CLK125M_GBE_REF

ENET_MDIO_R MAKE_BASE=TRUE ENET_MDIO

ENET_CLK125M_GTX_R MAKE_BASE=TRUE ENET_CLK125M_GTX

ENET_TX_EN_R MAKE_BASE=TRUE ENET_TX_EN

ENET_TX_ER_R MAKE_BASE=TRUE ENET_TX_ER

ENET_TXD_R<6> MAKE_BASE=TRUE ENET_TXD<6>



MAKE_BASE=TRUE ENET_TXD<5>





132

132

132

132

132

132

132

132

132

132

132

132

132

132

132

132

132

132

131

132

132

132

132

131 131

131 131

131 131

131 131

131 131

131 131

131 131

131 131

132

132

131 131

131 131

131 131

131 131

131 131

131

131 131

131 131

131 131

131 131

9

131 131

131 131

131 131

131 131

9 9

9 9

9 9

9 9

9 9

9 9

9 9

9 9

132 131

132 131

132 131

131 131

131 131

9 9

9 9

9 9

9 9

9 9

9

9 9

9 9

9 9

9 9

Preliminary

ETHERNET

(6 OF 8)

ETH_GTX_CLK_H

ETH_TX_ER_H

ETH_TX_EN_H

ETH_TXD_7_H

ETH_TXD_6_H

ETH_TXD_5_H

ETH_TXD_4_H

ETH_TXD_3_H

ETH_TXD_2_H

ETH_TXD_1_H

ETH_TXD_0_H

ETH_MDC_H

ETH_MDIO_H

ETH_TX_CLK_H

ETH_RX_CLK_H

ETH_RXD_0_H

ETH_RXD_1_H

ETH_RXD_2_H

ETH_REFCLK_H

ETH_RXD_3_H

ETH_RXD_4_H

ETH_RXD_5_H

ETH_RXD_6_H

ETH_RXD_7_H

ETH_RX_DV_H

ETH_RX_ER_H

ETH_CRS_H

ETH_COL_H

PP

PP

PP

PP

PP

PP

DRAWING

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE


DIFFERENTIAL_PAIRNET_SPACING_TYPEELECTRICAL_CONSTRAINT_SET

(NONE)



(NONE)

(NONE)

Page Notes


RD105 PIN 1 SHARES PIN WITH RD107 PIN 1




*

BGA-LF

V1.1

SEE_TABLE

SHASTA

F1

H3

H5

K6

J4

F2

G3

J5

H4

E1

G4

G2

K4

J3

G1

J2

K3

L4

J1

K2

L3

K1

M5

M6

M4

K5

L6

L5

U2300

1/16W5%

402MF-LF

0

SEE_TABLE

21

RD106

1/16W5%

402MF-LF

0

SEE_TABLE

21

RD103

1/16W5%

402MF-LF

0

SEE_TABLE

21

RD108

1/16W5%

402MF-LF

0

SEE_TABLE

21

RD105

1/16W5%

402MF-LF

33

SEE_TABLE

21

RD107

1/16W5%

402MF-LF

0

SEE_TABLE

21

RD104

I22

I40

I41

I42

I43

I44

I45

I46

I47

I48

I50

I51

I52

I53

I54

I55

I56

I57

I58

I59

I60

I61

I62

I63

I64

I65

I66

SMP4MM

1PPD101

SMP4MM

1PPD100

P4MMSM

1PPD102

SMP4MM

1PPD103

SMP4MM

1PPD104

P4MMSM

1 PPD105

116S0004 RES,0-OHM,402,5%3 RD104,RD108,RD106 ENET_MDIO_DELAY_4NS

1116S0030 RES,33-OHM,402,5% RD107 ENET_MDIO_DELAY_4NS

131 154

07051-6863

Shasta EthernetSYNC_DATE=05/19/2005SYNC_MASTER=Q63

RES,0-OHM,402,5%116S0004 3 RD104,RD105,RD106 ENET_MDIO_DELAY_2NS

1116S0004 RES,0-OHM,402,5% RD103 ENET_MDIO_DELAY_0

ABBREV=DRAWING

TITLE=KILOHANA


R8407_2

ENET_MDIO_R

ENET_CLK125M_RX

ENET_CLK25M_TX

ENET_CLK125M_GBE_REF

ENET_CRS

ENET_COL

ENET_RX_ER

ENET_RX_DV

ENET_RXD<5>

ENET_RXD<6>

ENET_RXD<7>

ENET_RXD<3>

ENET_RXD<4>

ENET_RXD<0>

ENET_RXD<1>

ENET_RXD<2>

ENET_TXD_R<3>

R8405_1 R8405_2

ENET_MDIO_R ENET_MDIO

ENET_CLK125M_GTX_R

ENET_TX_EN_R

ENET_TX_ER_R

ENET_TXD_R<7>

ENET_TXD_R<6>

ENET_TXD_R<5>

ENET_TXD_R<4>

ENET_TXD_R<2>

ENET_TXD_R<1>

ENET_TXD_R<0>

ENET_MDC

0.38mm SPACING ENET_CLK125M_GTX

ENET_CLK125M_GTX_R0.38mm SPACING

0.38mm SPACING ENET_CLK125M_GBE_REF

ENET_CLK125M_RX0.38mm SPACING

ENET_CLK25M_TX0.38mm SPACING

ENET_RXD_R<7..0>ENET_FW_2X

ENET_RX_DV_RENET_FW_3X

ENET_RX_ER_RENET_FW_3X

ENET_RX_DVENET_FW_3XENET_RXD<7..0>ENET_FW_2X

ENET_RX_ERENET_FW_3X

ENET_TXD_R<7..0>ENET_FW_2X

ENET_TX_EN_RENET_FW_3X

ENET_TX_ER_RENET_FW_3X

ENET_TXD<7..0>ENET_FW_2X

ENET_TX_ERENET_FW_3XENET_TX_ENENET_FW_3X

ENET_CRS_RENET_FW_3X

ENET_COL_RENET_FW_3X

ENET_FW_3X ENET_MDCENET_FW_3X ENET_MDIOENET_FW_3X ENET_MDIO_RENET_FW_3X R8405_1ENET_FW_3X R8405_2ENET_FW_3X R8407_2

ENET_CRSENET_FW_3X

ENET_COLENET_FW_3X

<XR_PAGE_TITLE>

132C3

132C5

131C6

131D6

131D6

131D6

131C6

131C6

131D6

131D6

131D6

131D6

131D6

131D6

131D6

131D6

131D6

131D6

131D6

131C6 132C6

131D6

131D6

131D6

131D6

131D6

131D6

131D6

131D6

131D6

131D6

132C6

132C5

131C3

131C6

131C6

131C6

130C4

132C3

132C3

131C6

131C6

131C6

131C3

131C3

131C3

130C6

132C5

132C5

132C3

132C3

132C6

132C6

131C3

131C6

131C6

131C6

131B5

130D5

130D5

130D5

130C5

130C5

130D5

130D5

130D5

130D5

130D5

130D5

130D5

130D5

130D5

130D5

130D4

131C6 131C6

131C3 131C6

130D4

130D4

130D4

130D4

130D4

130D4

130D4

130D4

130D4

130D4

131C6

130B6

130D4

130D5

130D5

130D5

130B4

130B4

130B4

130D5

130D5

130D5

130D4

130D4

130D4

130B6

130B6

130B6

130B4

130B4

131C3

131B3

131B5

131B4

131B4

131A4

130C5

130C5

Preliminary

INTR*/ENERGYDET

GTXCLK

XTALGND BIASGND PLLGND1

CLK125

TXD[4]TXD[3]TXD[2]TXD[1]TXD[0]

MDIOMDC

TX_ERTX_EN

TXD[7]TXD[6]TXD[5]

LOWPWR

TXC

RXC

RXD[7]

RX_DVRX_ER

XTALOXTALI

ERHUBMANMSSPD0F1000FDXRGMIIENEN_10B

PHYA[4]PHYA[3]PHYA[2]PHYA[1]PHYA[0]

TVCO

TEST[0]TEST[1]

COLCRS

RBC0

TRD+[0]TRD-[0]

TRD+[1]TRD-[1]

TRD+[2]TRD-[2]

TRD-[3]TRD+[3]

RBC1

RXD[2]RXD[3]RXD[4]RXD[5]RXD[6]

RXD[1]RXD[0]

SLAVE*/AN_EN

ACTLED*XMTLED*FDXLED*LINK2*LINK1*

QUALITY*/TXC_RXC_DELAY

RDAC1

PLLVDD1BIASVDD1XTALVDD1

VESTA ENET

2 OF 3

PP

PP

PP

PP

G

D

S

G

D

S

DRAWING

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

Q63 APPLICATION IS ALL

NET_SPACING_TYPE DIFFERENTIAL_PAIRELECTRICAL_CONSTRAINT_SET

- =PP1V2_ENETFW

- =PP2V5_ENETFW

- =PP3V3_ENET


CRYSTAL LOAD CAPACITANCE IS 20PF

IPU

IPD

IPD

(Internal Pull-down)

Sets Hub/DTE bit and master/slave configuration value bit

Sets manual duplex mode bit

1 - If RGMII Mode enabled, RXC clock and

TXC_RXC_DELAY

(Internal Pull-up)

0 - Auto-negotiation disabled

IPD

IPD

IPD

IPD=INTERNAL PULL-DOWN

IPU

IPU

IPD

Put crystal circuit close to PHY

IPD

IPD

IPD

IPD

IPD

F1000 - Speed Select

See table below


0 - Rise time approx. 4 ns

1 - Rise time approx. 5 ns

ER - Edge Rate Select

Sets manual master/slave configuration enable bit

VESTA SPEC CALLS FOR 2.2UF, LOW ESR CAP

ESR < 0.5 ohms

Vesta Config Straps:

PHYA<4..0> - PHY Address Select MANMS - Manual Master/Slave Configuration Select


(NONE)

(NONE)

1 - Auto-negotiation enabled

AN_EN - Auto-Negotiation Select

GTXCLK are delayed by 1.9 ns


0 - No clock delay

HUB - Repeater Select


0 1 X Force 1000BASE-T (test use only)

1 1 0 Auto-negotiate advertise 10/100/1000BASE-T

1 0 1 Auto-negotiate advertise 10/100BASE-TX

1 0 0 Auto-negotiate advertise 10BASE-T

0 0 1 Force 100BASE-TX

1 1 1 Auto-negotiate advertise 1000BASE-T

(Internal Pull-downs)

EN_10B - TBI Interface Select

1 - TBI/RTBI Mode


0 - GMII/RGMII Mode


RGMIIEN - RGMII Enable

1 - RGMII/RTBI Mode

0 - GMII/TBI Mode

(Internal Pull-up)

FDX - Full-Duplex Select

(Internal Pull-up)

AN_EN F1000 SPD0 Description

0 0 0 Force 10BASE-T

See table below


SPD0 - Speed Select

IPD

IPD

IPD

IPD

IPD

IPD

IPU

IPD

IPD

IPU

IPD

IPU

IPD

IPD

IPD

IPD

IPD

IPD

Net Spacing Type: ENET

IPD

IPD

ENET data pairs is 100 ohms.




Primary Max Sep: 0.13mm





Page Notes

IPU=INTERNAL PULL-UP

TERMINATION OFF PAGE


VESTA-V1.3FBGA-200-LF

N1

P2

N2

P3

B12

A5

B5

C5

E6

D6

C7

C6

B6

A6

C4

B4

N3

R10

R11

R9

R8

R6

R7

R5

R4

M5

M4

K5

C10

D3

D4

D5

E3

E4

E5

F5

F4

C1

C2

D2

B8

R1

B3

A3

A8

M1

M2

L1

L2

L3

L4

L5

G2

G1

D9

H5

B11

A10

D10

A9

A4

B10

C8

K4

H3

K3

G3

F3

D1

P1

R2

A11

U1701

I114

I115

I116

I117

I118

I119

I120

I121

I122

I123

I124

SMP4MM

1PPD200

SMP4MM1 PPD201

SMP4MM1 PPD238

SMP4MM1 PPD239

1K

MF-LF402

1%1/16W

1

2RD204

402CERM

10%1UF

6.3V2

1 CD2062N7002DW-X-FSOT-363

4

5

3 QD200

2N7002DW-X-FSOT-363

1

2

6 QD200

OMITSM

2 1

XWD200

SM OMIT

2 1

XWD201

SM OMIT

2 1

XWD202

SM

FERR-EMI-600-OHM

21

LD202

10UF10%6.3VX5R805

2

1CD205

50V

0.001uF

402

20%

CERM 2

1CD204

10V

0.1uF

402

20%

CERM2

1 CD201

50V

0.001uF

402

20%

CERM2

1 CD203

X5R805

10%10UF

6.3V2

1 CD202

FERR-EMI-600-OHM

SM

21

LD200

FERR-EMI-600-OHM

SM

21

LD201

1.24K

MF-LF402

1%1/16W

2

1RD213

1.5K

MF-LF402

5%1/16W

2

1RD250

50V

402

5%33pF

CERM 2

1CD219

0

MF-LF402

5%1/16W

2

1RD209

25.0000M

SM-2

CRITICAL

21

YD200

50V

33pF

402

5%

CERM 2

1CD218

I64

I65

I66

Vesta Ethernet PHYSYNC_DATE=05/19/2005SYNC_MASTER=Q63

132 154

07051-6863

TITLE=KILOHANA

ABBREV=DRAWING

PP1V2_VESTA_PLLVDD1


MIN_LINE_WIDTH=0.50mmVOLTAGE=1.2V

TP_VESTA_PLLVDD1

PP2V5_VESTA_XTALVDD1VOLTAGE=2.5V



TP_VESTA_XTALVDD1

PP2V5_VESTA_BIASVDD1VOLTAGE=2.5V



TP_VESTA_BIASVDD1

ENET_MDIO

=PP3V3_ENET

ENET_MDC

=PP3V3_ENETFW

=PP3V3_ENET

=PP1V2_ENETFW

=PP2V5_ENETFW

ENET_CLK125M_GBE_REF_R

ENET_MDI_N<3>

ENET_MDI_N<2>

ENET_MDI_N<1>

ENET_MDI_N<0>

ENET_MDI_P<0>

ENET_RXD_R<6>

ENET_RXD_R<5>

ENET_RXD_R<4>

ENET_RXD_R<1>

ENET_RXD_R<2>

ENET_RXD_R<3>

ENET_RXD_R<0>

ENET_RX_ER_R

ENET_RX_DV_R

ENET_RXD_R<7>

ENET_CLK125M_RX_R

ENET_CLK25M_TX_R

ENET_CRS_R

ENET_COL_R

ENET_TX_ER

ENET_TX_EN

ENET_TXD<7>

ENET_TXD<6>

ENET_TXD<5>

ENET_TXD<3>

ENET_TXD<2>

ENET_TXD<4>

ENET_TXD<0>

ENET_TXD<1>

VESTA_RDAC1_PD

TP_VESTA_ACTLED_L

TP_VESTA_XMTLED_L

TP_VESTA_FDXLED_L

TP_VESTA_LINK2_L

TP_VESTA_LINK1_L

TP_VESTA_RBC1

TP_VESTA_RBC0

TP_VESTA_TEST<0>

TP_VESTA_TEST<1>

TP_VESTA_TVCO

TP_VESTA_ER

TP_VESTA_HUB

TP_VESTA_MANMS

TP_VESTA_F1000

TP_VESTA_SPD0

TP_VESTA_RGMIIEN

TP_VESTA_FDX

TP_VESTA_PHYA<4>

TP_VESTA_EN_10B

TP_VESTA_PHYA<3>

TP_VESTA_PHYA<2>

TP_VESTA_PHYA<1>

TP_VESTA_PHYA<0>

VESTA_CLK25M_XTALI

VESTA_CLK25M_XTALO_R

ENET_ENERGYDET

TP_VESTA_AN_EN

TP_VESTA_TXC_RXC_DELAY

0.38mm SPACING VESTA_CLK25M_XTALO

0.38mm SPACING VESTA_CLK25M_XTALO_R

VESTA_CLK25M_XTALO

0.38mm SPACING VESTA_CLK25M_XTALI

ENET_CLK125M_RX_R0.38mm SPACING

ENET_CLK25M_TX_R0.38mm SPACING

ENET_MDI0ENET ENET_MDI_N<0>


ENET_MDI1ENET ENET_MDI_P<1>




ENET_MDI3ENET ENET_MDI_P<3>ENET_MDI3ENET ENET_MDI_N<3>

ENET_CLK125M_GBE_REF_R0.38mm SPACING

ENET_MDI_P<1>

ENET_MDI_P<3>

ENET_MDI_P<2>

ENET_CLK125M_GTX

VESTA_ENET_LOWPWR

VESTA_RESET_H

<XR_PAGE_TITLE>


140B4 139D1 139C6 139A6 139A1 17D7 17B8 17B1

139D5

139D5

131C6

132B7

131C6

17A6

132C6

139C1

139D1

132D6

132D6

132D6

132D6

132D6

132D6

131D6

131D6

131D6

131D6

131D6

131D6

131D6

131D6

131D6

131D6

132D6

132D6

131D6

131C6

131D6

131D6

131D6

131D6

131D6

131D6

131D6

131D6

131D6

131D6

24B3

132C3

132C3

132B1

132B1

132B1

132B1

132B1

132B1

132B1

132B1

132C3

132D6

132D6

132D6

131D6

6B1

6B1

6B1

131B3

3A3

131C3

3B6

3A3

3B4

3B5

130C4

130A3

130B3

130B3

130B3

130B3

130B4

130B4

130B4

130B4

130B4

130B4

130C4

130B4

130B4

130B4

130C4

130C4

130B4

130B4

130B6

130B6

130B6

130B6

130C6

130C6

130C6

130C6

130C6

130C6

132D6

132D6

24A2

132A4

132B5

132D6

132B5

130C4

130C4

130B3

130B3

130B3

130B3

130B3

130B3

130B3

130A3

130C4

130B3

130B3

130B3

130B6

17A6

Preliminary

75 OHM

75 OHM

1CT:1CT

1000PF, 2000VSHIELD

PRIMARY

MDI_3+

MDI_1+

ENET_CTAP

CHIP SIDERJ45

1CT:1CT

J3

J2

J1

J5

J6

J7

J8

J4

SECONDARY

CABLE SIDERJ45

75 OHMMDI_2-

MDI_2+

MDI_1-

MDI_0-

75 OHM

MDI_0+

ENET_CTAP

MDI_3-

1CT:1CT

1CT:1CT

TABLE_5_ITEM

TABLE_5_ITEM



DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

SPARE GND VIAS FOR LAYER TRAVERSALS DURING ROUTING

NET_PHYSICAL_TYPE

EXTRA CONSTRAINTS TO SUPPLEMENT THE THE MISSING NET PHYSICAL FROM EARLIER PAGE

ENET TERMINATION

PUT DEVELOPMENT LEDS ON TOP SIDE OF BOARD

PLACE THESE PARTS NEAR VESTA

(514-0253)

SM

FERR-EMI-600-OHM21

LD600

DEVELOPMENT

330

603MF-LF1/10W5%

2

1RD601

DEVELOPMENT

330

603MF-LF1/10W5%

2

1RD603

DEVELOPMENT

2.0X1.25AGREEN

2

1

LEDD600

DEVELOPMENT

2.0X1.25AGREEN

2

1

LEDD601

402MF-LF1/16W1%49.9

2

1RD60449.91%1/16WMF-LF4022

1RD605

402MF-LF1/16W1%49.9

2

1RD60649.91%1/16WMF-LF4022

1RD607

402MF-LF1/16W1%49.9

2

1RD60849.91%1/16WMF-LF4022

1RD609

402MF-LF1/16W1%49.9

2

1RD610

402MF-LF1/16W1%49.9

2

1RD611

0.01UF16V

402CERM

20%2

1 CD606

20%

CERM402

16V

0.01UF

2

1 CD607

20%

CERM402

16V

0.01UF

2

1 CD608

0.01UF16V

402CERM

20%2

1 CD609

0.1UF

CERM10V20%

4022

1 CD600

402CERM10V20%0.1UF

2

1 CD601

402CERM

10%0.001UF

50V2

1CD604

50V

0.001UF10%

CERM402

2

1 CD605

I295

I296

I297

I298

I299

I300

I301

I302

HOLE-VIA1

ZHD690

HOLE-VIA1

ZHD691

HOLE-VIA1

ZHD692

HOLE-VIA1

ZHD693

F-ANG-THJFM38V10-0112-4F

OMIT

9

8

7

6

5

4

3

2

10

1

13

12

11

JD600

1 20_INCH_LCD514-0254 CON,RJ-45 7 DEGRESS CRITICALJD600

514-0253 1 CRITICAL 17_INCH_LCDCON,RJ-45 7 DEGRESS JD600

ETHERNET CONNECTORSYNC_DATE=05/19/2005SYNC_MASTER=FINO-HC

136

07051-6863

154

ENET_MDI_P<0>

PP2V5_ENET_CTAP


VOLTAGE=2.5V

ENET_MDI_N<0>

GND_CHASSIS_RJ45

ENET_MDI_N<3>

ENET_MDI_P<3>

ENET_MDI_N<2>

ENET_MDI_N<1>

ENET_MDI_P<2>

ENET_MDI_P<1>

=PP2V5_ENET

LED8701_P

LED8700_P

TP_VESTA_XMTLED_L

TP_VESTA_ACTLED_L

ENET_MDI3

ENET_MDI1

ENET_MDI2

ENET_MDI0

VESTA_ACTLED_LMAKE_BASE=TRUE

=PP3V3_ENET

=PP3V3_ENET

ENET ENET_MDI_P<1>

ENET ENET_MDI_P<2>ENET ENET_MDI_N<2>

ENET ENET_MDI_N<3>

ENET ENET_MDI_P<3>

ENET ENET_MDI_N<1>

ENET ENET_MDI_P<0>ENET ENET_MDI_N<0>

VESTA_XMTLED_LMAKE_BASE=TRUE

136

136

136

136

136

136

136

136

136

136

132

132

136

136

136

132

136

136

136

136

132

132

7

132

132

132

132

132

132

7

132

132

7

7

132

132

132

136

132

132

132

132

Preliminary

PHY_LINKON_LPHY_PINT_L

FWVDDP

PHY_LREQ_H

PHY_LPS_H

PHY_CTL_1_H

PHY_CTL_0_H

PHY_DATA_7_H

PHY_DATA_6_H

PHY_DATA_0_H

PHY_DATA_1_H

PHY_DATA_2_H

PHY_DATA_3_H

PHY_DATA_4_H

PHY_DATA_5_H

(7 OF 8)

PHY_LCLK_HPHY_SCLK_H

FIREWIRE

DRAWING

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

(NONE)

(NONE)

- _PP2V5_PWRON_SB




Page Notes

ELECTRICAL_CONSTRAINT_SET NET_SPACING_TYPE DIFFERENTIAL_PAIR

22

MF-LF402

5%1/16W

21

RD800

10V

0.1uF

CERM402

20%

2

1 CD802

10V

0.1uF

CERM402

20%

2

1 CD801

10V

0.1uF

CERM402

20%

2

1 CD800

BGA-LF

V1.1

SHASTA

SEE_TABLE

P2

P3

P1

P6

N7

R1

L2

M3

L1

N6

M7

N1

P5

N4

N3

N2

A4

J7

N5

U2300

I87

I88

0

MF-LF402

5%1/16W

21RD80121RD802

I91

ABBREV=DRAWING

TITLE=KILOHANA

154138

07051-6863


Shasta FireWire

FW_PINT

FW_PINTENET_FW_3X

FW_DATA<7..0>ENET_FW_2X

FW_DATA_R<7..0>ENET_FW_2X

FW_CTL_R<1..0>ENET_FW_3XFW_LPSENET_FW_3X

FW_LREQENET_FW_3X

FW_CLK98M_LCLK0.38mm SPACING

FW_CTL_S<1..0>ENET_FW_3X

FW_CTL<1..0>ENET_FW_3X

FW_CLK98M_PCLK0.38mm SPACING

FW_CLK98M_LCLK_R0.38mm SPACING

FW_CLK98M_LCLK_R

FW_CLK98M_LCLK

FW_CTL_S<0>

FW_CTL_S<1>

FW_LREQ

=PP2V5_PWRON_SB

FW_CLK98M_PCLK

FW_LPS

FW_DATA<6>

FW_DATA<7>

FW_DATA<5>

FW_DATA<4>

FW_DATA<3>

FW_DATA<2>

FW_DATA<1>

FW_DATA<0>

FW_LINKON

FW_CTL<0>

FW_CTL<1>

<XR_PAGE_TITLE>


139D6

119C3

139D6

139D6

139C7

139B7

24D5

139B7

139B7

139B7

139A6

23C2

139A6

139A6

139C3

139C3

138C4

139C5

139D6

139B5

139B5

139C5

139D6

139A4

139C1

139C5

139D6

139D6

139B5

23B2

139C1

139B5

139B7

139B7

139B7

139B7

139B7

139C7

139C7

139C7

139A4

139A4

138D6

138B5

138B4

139B5

139B5

138B4

138B4

138B2

138B4

138B2

138B5

138B4

138D6

138D6

138D6

138D6

138D6

3C1

138D6

138D6

138D6

138D6

138D6

138D6

138D6

138D6

138D6

138D6

139C3

138D6

138D6

Preliminary

WIRESPD

TPAP[1]

TPBP[1]

TPBIAS[2]

TPAN[2]

RDAC2

TPBN[1]

TPAN[0]

PLI_DATA[0]

ESDET0

CPS

TPAN[1]

VESTA FW

3 OF 3

DS_ONLY_EN0LPWR_1394

PLI_LREQPLI_LPS

PLI_CTL[1]

PWR_CLASS

PLI_CTL[0]

PLI_DATA[6]PLI_DATA[5]PLI_DATA[4]PLI_DATA[3]PLI_DATA[2]PLI_DATA[1]

PLI_DATA[7]

PLI_LCLK

ESDET2ESDET1

XTALO_24XTALI_24

TVCO_24TEST_1394[1]TEST_1394[0]

PLLGND2BIASGND

PLLVDD2

BIASVDD2

XTALVDD2

SDASDC

PLI_LINKPLI_INT

TPBN[2]TPBP[2]

TPAP[2]

TPBIAS[1]

TPBN[0]TPBP[0]

TPAP[0]TPBIAS[0]

TDBL[0]

PLI_PCLK

TDBL[2]TDBL[1]

FAVDDH FAVDDM FAVDDL

PP

PP

PP

PP

PP

PP

PP

DRAWING

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

0=PORT 2 NOT PRESENT1=PORT 2 PRESENT

ESDET[2]

ESDET[0]

0=PARTS 1 AND 2 BI-LINGUAL

1=PORT 1 PRESENT0=PORT 1 NOT PRESENT

ESDET[1]

1=PORTS 1 AND 2 DS ONLY



IPD

IPD

IPU


Page Notes

IPD

IPD

Put crystal circuit close to PHY

IPD


IPD

IPD

IPU=INTERNAL PULL-UP

IPU

IPD

IPD

1 - Sets Power Class to 0x4

Net Spacing Type: FW

See straps table for more information.

counter internal pull-up in Vesta.

If stuffed, adds external pull-down to

- VESTA_PWR_CLASS_0

See straps table for more information.

counter internal pull-down in Vesta.

If stuffed, adds external pull-up to

- VESTA_DS_ONLY_EN0



SPEC CALLS FOR 2.2UF

IPD

IPD

IPD

IPD

IPU

IPU

IPD

IPD

ESR < 0.5 ohms

0 - Port 0 Bilingual mode


1 - Port 0 Data/Strobe mode only

(Internal Pull-up)

0 - Sets Power Class to 0x0

(NONE)

IPD

VESTA CONFIG STRAPS:

FW data pairs is 110 ohms.

IPD=INTERNAL PULL-DOWN

Q63 PORT ALOCATION

800 REAR PORT

400 REAR PORT

400 FNT PNL PORT

- =PPFW_PHY

- =PP3V3_FW

- =PP3V3_ENETFW

- =PP2V5_ENETFW

- =PP1V2_ENETFW


ETHERNET SPACING TO ROUTE ON LAYER 8

(PROVIDED BY LINK PAGE)

NET_PHYSICAL_TYPE NET_SPACING_TYPE DIFFERENTIAL_PAIR







CRYSTAL LOAD CAPACITANCE IS 12PF

FW_DS_ONLY_P0 - PORT 0 DATA/STROBE

FW_PWR_CLASS_MSB - FIREWIRE POWER CLASS

22

SM-LF

5%1/16W

54

RPD900

22

SM-LF

5%1/16W

63

RPD900

22

SM-LF

5%1/16W

72

RPD900

22

SM-LF

5%1/16W

81

RPD900

22

SM-LF

5%1/16W

63

RPD901

22

SM-LF

5%1/16W

81

RPD901

22

SM-LF

5%1/16W

54

RPD901

22

SM-LF

5%1/16W

72

RPD901

22

MF-LF402

5%1/16W

21

RD900

22

MF-LF402

5%1/16W

21

RD901

22

MF-LF402

5%1/16W

21

RD902

1/16W1%

402MF-LF

2.0K

2

1RD909

FW_DS_ONLY_P0

MF-LF402

5%1/16W

1K

2

1RD911

1K

1/16W5%

402MF-LF

FW_PWR_CLASS_MSB

2

1RD912

CERM

20%10V

0.1uF

402

2

1 CD913

CERM

20%10V

0.1uF

402

2

1 CD914

CERM

20%10V

0.1uF

402

2

1 CD915

CERM

20%10V

0.1uF

402

2

1 CD911

CERM

20%10V

0.1uF

402

2

1 CD909

CERM

20%10V

0.1uF

402

2

1 CD908

CERM

20%10V

0.1uF

402

2

1 CD907

CERM

20%10V

402

0.1uF

2

1 CD906

402CERM

20%10V

0.1uF

2

1 CD903SM

FERR-EMI-600-OHM

21

LD901

CERM

20%50V

0.001uF

402

2

1 CD90110UF10%6.3VX5R805

2

1 CD900

FERR-EMI-600-OHM

SM

21

LD900

CERM

20%50V

0.001uF

402

2

1 CD905

6.3V

10UF

X5R805

10%

2

1 CD904

FERR-EMI-600-OHM

SM

21

LD902

0

MF-LF402

5%1/16W

2

1RD921

CRITICAL

24.576M

8X4.5MM-SM

21

YD920

1K

MF-LF402

1%1/16W

2

1RD903

390K

MF-LF402

5%1/16W

2

1RD914

FERR-EMI-600-OHM

SM

21

LD906

FERR-EMI-600-OHM

SM

21

LD909

FERR-EMI-600-OHM

SM

21

LD913

6.3V

10UF

X5R805

10%

2

1 CD917

6.3V

10UF

X5R805

10%

2

1 CD918

6.3V

10UF

X5R805

10%

2

1 CD919

CERM50V

22pF

402

5%

2

1CD920

CERM50V

22pF

402

5%

2

1CD921

10K

MF-LF402

1%1/16W

2

1RD904

NOSTUFF

150

MF-LF402

1%1/16W

2

1RD962

NOSTUFF

150

MF-LF402

1%1/16W

2

1RD963

1/16W1%

402MF-LF

150

NOSTUFF

2

1RD960

1/16W1%

402MF-LF

150

NOSTUFF

2

1RD961

I399

I400

I401

FW_PORTS_1_2_BI

1K

MF-LF402

1%1/16W

2

1RD905FW_PORT1_NOT

1/16W1%

402MF-LF

1K

2

1RD906FW_PORT2_NOT

1/16W1%

402MF-LF

1K

2

1RD907

FBGA-200-LFVESTA-V1.3

N15

P13

P14

B9

N13

H15

K15

M15

H14

K14

M14

H13

J13

L13

G15

J15

L15

G14

J14

L14

J4

J5

B14

B13

A14

H1

H2

R15

A12

P15

N14

E15

D12

D11

D14

D15D13

G11

G12

G13

F13

F12

F11

E11

E12

E13

E14

J3

M12

M11

L12

L11

N12

N11

M10

L10

K13

K12

K11

C13

C12

C11

A13

R13

R14

P12

U1701

1K

MF-LF402

5%1/16W

2

1RD917

10K

MF-LF402

5%1/16W

2

1RD915

1/16W5%

402MF-LF

10K

2

1RD9161K

1/16W5%

402MF-LF

2

1RD908

SMP4MM

1PPD900

SMP4MM

1

PPD901

P4MMSM

1

PPD902

P4MMSM

1 PPD903

P4MMSM

1 PPD904

SMP4MM1

PPD905

P4MMSM

1

PPD906

OMITSM

21

XWD900

SM

OMIT

21

XWD901

OMIT

SM

21

XWD902SM

OMIT

21

XWD903

OMIT

SM

21

XWD904

OMIT

SM

21

XWD905

ABBREV=DRAWING

TITLE=KILOHANA

154139

07051-6863


Vesta FireWire PHY

FW_TPA_N<2>

FW FW FW_TPA_N<2>FW_TPA2

FW_TPA_P<2>

FW FW FW_TPA_P<2>FW_TPA2

FW_TPB_N<2>

FWFW FW_TPB_N<2>FW_TPB2

FW_TPB_P<2>

FW FW FW_TPB_P<2>FW_TPB2


VOLTAGE=3.3VPP3V3_VESTA_FAVDDH

TP_VESTA_FAVDDH


VOLTAGE=2.5VPP2V5_VESTA_FAVDDM

TP_VESTA_FAVDDM

VOLTAGE=1.2V


PP1V2_VESTA_FAVDDL

TP_VESTA_FAVDDLTP_VESTA_XTALVDD2


VOLTAGE=2.5VPP2V5_VESTA_XTALVDD2

TP_VESTA_BIASVDD2


VOLTAGE=2.5VPP2V5_VESTA_BIASVDD2

TP_VESTA_PLLVDD2


VOLTAGE=1.2VPP1V2_VESTA_PLLVDD2


FW_TPBIAS<1>


FW_TPBIAS<2>

FW_TPB_N<1>

FW_TPB_P<1>

FW_TPA_N<1>

FW_TPA_P<1>

FW_TPA_P<0>

FW_TPB_P<0>

FW_TPB_N<0>

FW_TPA_N<0>

FW_CLK98M_LCLK

FW_CTL_R<1>

FW_CTL<1>

FW_CTL<0>

FW_LPS

FW_DATA_R<6>

=PPFW_PHY

=PP1V2_ENETFW

=PP1V2_ENETFW

=PP2V5_ENETFW

VESTA_CLK24M_XTALO_R0.38mm SPACING

VESTA_CLK24M_XTALO0.38mm SPACING

VESTA_CLK24M_XTALI0.38mm SPACING

FW_TPA_P<0>FW_TPA0FWFW

0.38mm SPACING FW_CLK98M_PCLK_R

FW_TPA_N<0>FW_TPA0FWFW

FW_TPB_P<0>FW_TPB0FWFW

FW_TPB_N<1>FW_TPB1FWFWFW_TPB_P<1>FW_TPB1FWFW

FW_TPB_N<0>FW_TPB0FWFW

FW_TPA_P<1>FW_TPA1FWFW

FW_TPA_N<1>FW_TPA1FWFW

FW_CTL FW_CTL_R<1..0>

FW_CTL FW_CTL<1..0>

FW_CTL FW_CTL_S<1..0>

=PP2V5_ENETFW

FW_DATA<6>

FW_CTL<0>

FW_CTL<1>

VESTA_CLK24M_XTALO

FW_CTL<0>

FW_DATA<4>

FW_DATA<5>

FW_DATA<0>

FW_DATA<2>

FW_DATA<1>

FW_DATA<3>

FW_CTL<1>

FW_DATA<7>

FW_CLK98M_PCLK

FW_DATA_R<2>

TP_VESTA_TDBL<1>

TP_VESTA_TDBL<2>

FW_CLK98M_PCLK_R

TP_VESTA_TDBL<0>

FW_TPBIAS<0>MIN_LINE_WIDTH=0.25mmMIN_NECK_WIDTH=0.25mm

FW_PINT

FW_LINKON

TP_VESTA_TVCO_24

TP_VESTA_TEST_1394<1>

TP_VESTA_TEST_1394<0>

VESTA_CLK24M_XTALI

VESTA_CLK24M_XTALO_R

FW_CPS

FW_PLUG_PRESENT2

FW_PLUG_PRESENT1

FW_DATA_R<0>

FW_DATA_R<1>

FW_DATA_R<5>

FW_DATA_R<4>

FW_DATA_R<3>

FW_DATA_R<7>

FW_CTL_R<0>

FW_LREQ

FW_DS_ONLY_P1_P2

FW_PWR_CLASS_MSB

FW_LOWPWR

FW_DS_ONLY_PO

=PP3V3_ENETFW

=PP3V3_ENETFW

=PP3V3_ENETFW

NC_I2C_VESTA_SCL

NC_I2C_VESTA_SDA

VESTA_WIRESPD

=PP3V3_ENETFW

VESTA_RDAC2_PD

FW_DS_ONLY_P1_P2

FW_PLUG_PRESENT1

FW_PLUG_PRESENT2

<XR_PAGE_TITLE>


140B4

140B4

140B4

140B4

139D1

139D1

139C6

139D1

139A6

139C6

139A6

139C6

139A1

139A1

139A1

139A6

132C7

132C7

132C7

132C7

139D6

139D6

139B7

139D6

139D6

139D6

139D6

17D7

17D7

17D7

17D7

139B7

139B7

139A6

139B7

139B7

139A6

139A6

17B8

17B8

17B8

17B8

140B8

140B8

140B8

140B8

140B8

140B8

140B8

140B8

140A8

140A8

140A8

140B8

140B8

140B8

140B8

140B8

139A6

139A6

139D5

139C1

139D1

140B8

140B8

140B8

140A8

140A8

140B8

140B8

140A8

139A4

139D5

139A4

139A4

139A4

139A4

17B1

17B1

17B1

17B1

140A5

140A5

140A5

140A5

140A5

140A5

140A5

140A5

140A5

140A5

140A5

140A5

140A5

140A5

140A5

140A5

138D6

139D6

138D6

138D6

138D6

132D2

132D2

132D6

140A5

140A5

140A5

140A5

140A5

140A5

140A5

140A5

139B5

138D6

138D6

132D6

138D6

138D6

138D6

138D6

138D6

138D6

138D6

138D6

138D6

138D6

138D6

138D6

138D6

138D6

139D6

138D6

17A6

17A6

17A6

17A6

139D6

139B2

139D6

139B2

139D6

139B2

139D6

139B2

6B1

6B1

6B1 6B1

6B1

6B1

140D6

140C7

139D6

139D6

139D6

139D6

139D6

139D6

139D6

139D6

138B2

138D6

138B2

138B2

138B4

138D6

140D3

3B4

3B4

3B5

139B5

139A4

139B5

139B2

139C3

139B2

139B2

139B2

139B2

139B2

139B2

139B2

138D6

138B2

138B4

3B5

138B4

138B2

138B2

139D6

138B2

138B4

138B4

138C4

138C4

138C4

138C4

138B2

138B4

138B5

138D6

139D6

140D6

138B5

138B4

139D6

139D6

139A6

139A6

138D6

138D6

138D6

138D6

138D6

138D6

138D6

138B4

139A6

24B1

3B6

3B6

3B6

3B6

139C5

139C5

139C5 Preliminary

SYM_VER-1

SYM_VER-1

SYM_VER-1

SYM_VER-1

TPI

VGND

VP

TPI#

TPO#

TPO

TPI

VGND

VP

TPI#

TPO#

TPO

TABLE_5_ITEM

TABLE_5_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE



TABLE_5_ITEM

TABLE_5_ITEM

SPARE GND VIAS FOR LAYER TRAVERSALS DURING ROUTING

(TPA-)

(TPA+)

514-0251 20_INCH_VERSION SHOWN

514-0251 20_INCH_VERSION SHOWN

(TPA+)

Place close to FireWire PHY

(TPA-)

IT IS 2.2V INSTEAD OF 2.7V BECAUSE THE SNAPBACK ESD DIODES HAVE A .5V DROP

"Snapback" & "Late VG" Protection

FW_VP MAX IS 24V

DESIGNED WITH INTENTION TO RESIZE FUSE LIMITS EQUAL FW SPEC 1.5A LIMIT

POSSIBLE CURRENT SHARING SCENARIO

CALCULATION = 220 OHMS, THERE’S ALREADY A 215 IN THE DESIGN, SO I’M USING 215 INSTEAD

[ LATE VG NOTES ]

ESD Rail

CURRENT THROUGH THE BIAS RESISTOR SHOULD BE 5MA FOR A VOLTAGE DROP TO 2.2V

TO FW CDS PIN (CABLE POWER DETECT)

"Snapback" & "Late VG" Protection

Termination

PORT 1

(TPB+)

1394A

DIFFERENTIAL_PAIRPHYSICAL

NET_TYPE

SPACING

(TPB-)

(TPB+)

3rd TPA/TPB pair unused

12 VOLTS8 WATTS MAX

1394APORT 0

(TPB-)

FW_VP MAX IS 24V

KCL = CABLE POWER + SYSTEM POWER = > 1.5 AMPS

MURS320XXG

SMC

21

DE000

20%

1.3

1WFF2512

21

RE0561.3

2512

20%1WFF

CRITICAL

21

RE002

CERM

20%16V

402

0.01uF

2

1CE026

SOT-363BAV99DW-X-F

3

5

4

DPE020BAV99DW-X-F

SOT-363

6

2

1

DPE020

0.01uF

402CERM

20%16V 2

1CE016

BAV99DW-X-FSOT-363

3

5

4

DPE010

SOT-363BAV99DW-X-F

3

5

4

DPE011

BAV99DW-X-FSOT-363

6

2

1

DPE010

SOT-363BAV99DW-X-F

6

2

1

DPE011

CERM402

6.3V10%1uF

2

1 CE060

402

1%56.21/16WMF-LF

2

1RE06156.2

1%1/16W

402MF-LF

2

1RE060

6.3VCERM402

1uF10%

2

1 CE050

56.21%1/16WMF-LF4022

1RE05156.2

1%

402

1/16WMF-LF

2

1RE050

MF-LF

56.21%1/16W

4022

1RE06356.2

1%1/16WMF-LF

4022

1RE062

MF-LF402

1/16W1%4.99K

2

1RE064

402CERM25V5%

270pF

2

1CE064

1K5%

MF-LF1/16W

4022

1RE070

56.21%1/16WMF-LF4022

1RE0531%

56.21/16WMF-LF

4022

1RE052

402

1%1/16WMF-LF

4.99K

2

1RE054

25V5%

CERM402

270pF

2

1CE054

SM-1

400-OHM-EMI21

LE090

BZX84C2V7-X-FSOT23

31

DE090

I400

I401

I402

I403

I404

I405

I406

I407

120-OHM2012

4

32

1

FLE010

120-OHM2012

4

32

1

FLE011

120-OHM2012

4

32

1

FLE020

2012120-OHM

4

32

1

FLE021

FERR-160-OHM1206-LF

2

1

LE010

1206-LFFERR-160-OHM

2

1

LE020

1.5AMP-33V

SM

21

FE0000.75AMP-13.2V

MINISMD

21

FE002

SOT-363BAV99DW-X-F

3

5

4

DPE021BAV99DW-X-F

SOT-363

6

2

1

DPE021

I443

1/16W

215

1%

MF-LF402

21

RE090

603-1X7R

10%0.1UF50V2

1 CE009

50V

0.1UF10%

X7R603-1

2

1 CE015

603-1X7R

10%0.1UF50V

2

1 CE025

50V

0.001UF10%

CERM402

2

1CE02310%

402CERM

0.001UF50V 2

1CE022

402CERM

10%0.001UF

50V2

1CE012

50V

0.001UF

402CERM

10%2

1CE013

50V

0.001UF10%

CERM402

2

1CE021

50V

0.001UF10%

CERM402

2

1CE020

402CERM

10%0.001UF

50V2

1CE010

402CERM

10%0.001UF

50V2

1CE011

HOLE-VIA1

ZHE090

HOLE-VIA1

ZHE091

HOLE-VIA1

ZHE092

HOLE-VIA1

ZHE093

OMIT

F-ST-THUF01613-M33-4F

1

2

5

6

3

4

987 10

JE000

UF01613-M33-4FF-ST-TH

OMIT

1

2

5

6

3

4

987 10

JE001

CON,1394A 7 DEGREES JE001 20_INCH_LCD514-0251 CRITICAL1

CON,1394A 7 DEGREES 20_INCH_LCD514-0251 JE000 CRITICAL1

FIREWIRE CONNECTORS

140 154

07051-6863

SYNC_DATE=05/19/2005SYNC_MASTER=FINO-HC

CON,1394A 7 DEGREES JE001 17_INCH_LCDCRITICAL514-0248 1

CON,1394A 7 DEGREES 17_INCH_LCDJE000 CRITICAL1514-0248

FW_PORT0_TPA_P

FW FW FW_TPA1_FL FW_PORT1_TPA_N_FL

FW_TPA_P<0>

VOLTAGE=24V

FW_VP_RMIN_LINE_WIDTH=0.8MMMIN_NECK_WIDTH=0.25MMMAKE_BASE=TRUE

=PP12V_ALL_FW

FW FW FW_TPB1_FL FW_PORT1_TPB_N_FL

VOLTAGE=24VMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.8MM

FW_VP

VOLTAGE=24V

PPFW_PORT1_VPMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mm

PPFW_PORT1_VP

FW_TPA_N<1>

FW_TPB_N<0>

VOLTAGE=0VFW_TPA_C<1>

FW_TPB_N<1>

NO_TEST=YESMAKE_BASE=TRUEFW_TPB2_PD

NO_TEST=YESMAKE_BASE=TRUENC_FW_TPBIAS2

FW FW FW_TPB1_FL FW_PORT1_TPB_P_FL

FW FW FW_TPA1_FL FW_PORT1_TPA_P_FL

FW_PORT0_TPB_N_FLFW FW FW_TPB0_FL

FW FW FW_TPB0_FL FW_PORT0_TPB_P_FLFW FW FW_TPA0_FL FW_PORT0_TPA_N_FLFW FW FW_TPA0_FL FW_PORT0_TPA_P_FL

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mmVOLTAGE=3.3VPP3V3_FW_ESD

MAKE_BASE=TRUENO_TEST=YES

NC_FW_TPA_N2NO_TEST=YESMAKE_BASE=TRUENC_FW_TPA_P2

MAKE_BASE=TRUEFW_PORT1_TPA_N

MAKE_BASE=TRUEFW_PORT0_TPA_N

MAKE_BASE=TRUEFW_PORT0_TPB_P

MAKE_BASE=TRUEFW_PORT1_TPB_P

FW_TPBIAS<2>

FW_TPA_N<2>

FW_TPA_P<2>

FW_TPB_N<2>

FW_TPB_P<2>

FW_PORT0_TPB_N

FW_PORT0_TPB_P

FW_PORT0_TPA_N

FW_PORT1_TPB_N

FW_PORT1_TPA_N

FW_PORT1_TPA_P

=PPFW_PHY

VOLTAGE=12VMIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.8MMPP12V_FW

MAKE_BASE=TRUE

=PP3V3_FWPP3V3_FW_ESD_F

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.38 mmVOLTAGE=3.3V

VOLTAGE=24V

PPFW_PORT0_VP

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm

MAKE_BASE=TRUEFW_PORT0_TPA_P

MAKE_BASE=TRUEFW_PORT1_TPB_N

FW_PORT1_TPA_PMAKE_BASE=TRUE

FW_TPA_P<1>

PP3V3_FW_ESD


PP3V3_FW_ESD


PP3V3_FW_ESD


VOLTAGE=1.86VFW_TPBIAS<0>

VOLTAGE=1.86V

FW_TPBIAS<1>

FW_TPA_N<0>FW_TPB_P<0>

FW_TPB_P<1>

VOLTAGE=0VFW_TPA_C<0>

FW_PORT0_TPB_P_FL

FW_PORT0_TPB_N_FL

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.6 mm

PPFW_PORT0_VP_FLVOLTAGE=24V

FW_PORT0_TPA_P_FL

FW_PORT0_TPA_N_FL


FW_PORT1_TPB_P_FL

PPFW_PORT1_VP_FLMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.25 mmVOLTAGE=24V

FW_PORT1_TPA_P_FL

FW_PORT1_TPA_N_FL


FW_PORT1_TPB_N_FL

PP3V3_FW_ESD


MAKE_BASE=TRUEFW_PORT0_TPB_N

FW_PORT1_TPB_P

7

7

7

7

7

140

140

139

7

140

140

140

139

139

139

140

140

140

140

140

140

140

140

140

140

140

139

139

139

139

139

140

140

140

140

140

140

139

7

140

140

140 139

140

140

140

7

140

140

139

139

139

139

139

140

140

140

140

140

140

140

140

140

140

140

140

140

140

Preliminary

DM1

DP1

DM2

DP2

RSDM2

RSDP1

RSDM1

RSDP2

AVDD

DM3

DP3

RSDM3

RSDP3

PPON1

OCI2

OCI1

OCI3

OCI4

OCI5

PPON2

PPON5

PPON4

PPON3

RSDM4

DM4

DP4

DM5

DP5

RSDP4

RSDM5

RSDP5

RREF

AVSS(R)

AVSS

NC1

NC2

XT1/SCLK

XT2

VDD

VSS

(8 OF 8)NC0

NC1

NC3

NC2

NC4

NC5

NC6

NC7

NC8

NC9

NC10

NC12

NC11

NC14

NC13

NC15

NC19

NC18

NC17

NC16

NC20

NC22

NC23

NC24

NC21

NC25

NC29

NC28

NC27

NC26

PP

PP

PP

DRAWING

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

DIFFERENTIAL_PAIRNET_PHYSICAL_TYPENET_SPACING_TYPE

Page Notes





Net Spacing Type: USB2



Primary Max Sep: 0.19mm

USB2 data pairs is 90 ohms.

(NONE)



(NONE)

(USB2_N<4>)

(USB2_P<4>)

(USB2_P<0>)

(USB2_N<0>)

(USB2_N<1>)

(USB2_P<1>)

(USB2_N<2>)

(USB2_P<2>)

MINIMIZE TRACE LENGTH TO PINS

(USB2_P<3>)

(USB2_N<3>)

Tie to GND at ball N11

(USB2_OC<0>)

(USB2_OC<1>)

(USB2_OC<3>)

(USB2_OC<2>)

(USB2_OC<4>)

SPEC SHOWS LOAD CAPACITANCE OF 16PF

40.2 OHM RESISTORS ON PORT 2 FOR EVALUATION

BLUTOOTH CONNECTOR,(PORT #4)

MINIMIZE TRACE LENGTH OF CAPS FROM AVDD TO AVSS PINS

- =PP3V3_PWRON_USB


FRONT PANEL USB (PORT #1)

Q63 USB PORT ALLOCATION

REAR USB (PORT #0)

REAR USB (PORT #2)

REAR USB (PORT #3)

36

MF-LF402

1%1/16W

21

RE202

36

MF-LF402

1%1/16W

21

RE203

MF-LF402

1%1/16W

3621

RE204

MF-LF402

1%1/16W

3621

RE205

36

MF-LF402

1%1/16W

21

RE206

36

MF-LF402

1%1/16W

21

RE207

36

MF-LF402

1%1/16W

21

RE208

36

MF-LF402

1%1/16W

21

RE209

9.09K

MF-LF402

1%1/16W

2

1RE238

10V

0.1uF

CERM402

20%

2

1CE225

10V

0.1uF

CERM402

20%

2

1CE224

10V

0.1uF

CERM402

20%

2

1CE230

10V

0.1uF

CERM402

20%

2

1CE229

1.5K

MF-LF402

5%1/16W

2

1RE241

FBGA-LF

NEC_UPD720101_USB2

P8

L9

N2

B2

A2

B14

H14

N14

P10

N1

D8

F11

J11

G4

D12

H12

L12

M11

B13

N13

B1

L13

N8

E2

A3

A12

A13

P12

P3

D7

H4

G12

D13

F13

H13

J13

P2

C14

E14

G14

J12

K13

E13

F12

H11

K14

M14

P11

A9

C10

C11

A11

C12

B9

A10

B10

B11

B12

M6

P6

C13

E12

G13

J14

L14

D14

F14

G11

K12

M13

N11

M12

P13

N12

N10

UC200

100

MF-LF402

1%1/16W

1

2RE245

50V

22pF

CERM402

5%

2

1 CE246

10V

0.1uF

CERM402

20%

2

1CE223

10V

0.1uF

CERM402

20%

2

1CE222

10V

0.1uF

CERM402

20%

2

1CE228

10V

0.1uF

CERM402

20%

2

1CE227

10V

0.1uF

CERM402

20%

2

1CE221

10V

0.1uF

CERM402

20%

2

1CE226

10K

SM-LF

5%1/16W

5678

4321

RPE21033K

1/16W5%

402MF-LF

2

1RE210

6.3V

10UF

X5R805

10%

2

1CE220

1.5K

MF-LF402

5%1/16W

2

1RE240

SM-1

30.0000M

CRITICAL

21

YE245

50V

22pF

CERM402

5%

2

1CE245

BGA-LF

SHASTAV1.1

T2

T1

R8

R7

R6

R5

R4

Y3

Y1

W3

W1

V4

V3

V2

V1

U6

U5

R3

U4

U3

U2

U1

T8

T7

T6

T5

T4

T3

P8

P7

U2300

P4MMSM

1

PPE2000

SMP4MM

1

PPE2002

P4MMSM

1

PPE2001

SM

OMIT

21

XWE201

OMITSM

21

XWE200

10V

0.1uF

CERM402

20%

2

1CE237

10V

0.1uF

CERM402

20%

2

1CE236

6.3V

10UF

X5R805

10%

CE235

FERR-EMI-100-OHM

SM

21

LE235

4.7

MF-LF603

5%1/10W

21

RE235

36

MF-LF402

1%1/16W

21

RE200

36

MF-LF402

1%1/16W

21

RE201

ABBREV=DRAWING

TITLE=KILOHANA

07051-6863

142 154


USB Host Interfaces



PP3V3_PWRON_NEC_AVDDVOLTAGE=3.3V

TP_NEC_AVDD

NEC_CLK30M_XT1

NEC_CLK30M_XT2_R

NEC_NC2_PU

NEC_NC1_PU

GND_NEC_AVSS_RVOLTAGE=0V



NEC_RREF_PD

USB_NEC_P<4>

USB2_P<4>

USB2_N<4>

USB_NEC_N<4>

USB_NEC_P<3>

USB2_P<3>

USB2_N<3>

USB_NEC_N<3>

USB2_PWREN<4>

USB2_PWREN<3>

USB2_PWREN<2>

USB2_PWREN<1>

USB2_PWREN<0>

USB2_OC<4>

USB2_OC<3>

USB2_OC<2>

USB2_OC<0>

USB2_OC<1>

USB_NEC_P<2>

USB2_N<2>

USB_NEC_N<2>

USB2_P<2>

USB_NEC_P<1>

USB2_P<1>

USB_NEC_N<1>

USB2_N<1>

USB2_P<0>

USB_NEC_P<0>

USB_NEC_N<0>

USB2_N<0>

=PP3V3_PWRON_USB

=PP3V3_PWRON_USB

=PP3V3_PWRON_USB

NEC_CLK30M_XT2

GND_NEC_AVSS_R

TP_SB<1>

TP_SB<0>

TP_SB<4>

TP_SB<3>

TP_SB<6>

TP_SB<5>

TP_SB<7>

TP_SB<8>

TP_SB<9>

TP_SB<11>

TP_SB<10>

TP_SB<12>

TP_SB<13>

TP_SB<14>

TP_SB<15>

TP_SB<16>

TP_SB<17>

TP_SB<19>

TP_SB<18>

TP_SB<20>

TP_SB<21>

TP_SB<22>

TP_SB<25>

TP_SB<24>

TP_SB<23>

TP_SB<26>

TP_SB<27>

TP_SB<28>

TP_SB<29>

TP_SB<2>

0.38mm SPACING NEC_CLK30M_XT1

USB2 USB2_P<4>USB2_4USB2USB2 USB2_N<4>USB2_4USB2

USB2 USB2_N<3>USB2_3USB2

0.38mm SPACING NEC_CLK30M_XT2

USB2 USB2_P<3>USB2_3USB2

0.38mm SPACING NEC_CLK30M_XT2_R

USB2 USB2_P<2>USB2_2USB2_S



USB2 USB2_N<2>USB2_2USB2_S



<XR_PAGE_TITLE>


143D1

143D1

143D1

143D1

143D1

143D1

143D1

143D1

143D1

143D1

143C8

143C8

143D8

143D8

142C6

142D5

142D5

143D1

143D1

143D1

143D1

143D1

143C8

143D8

143D1

143C8

143D8

142D3

143A4

143A4

143A8

143A8

143B8

143B8

142D6

142D6

143D1

143D1

142B6

142C6

142B6

142A2

143A4

143A4

143A8

143A8

143B8

142C2

143D1

143B8

142C2

143D1

142D6

142D6

6B1

142D6

142D6

142D6

142D6

143B2

143B2

143B2

143B2

143B2

121B6

143B4

143B4

143B4

143B4

142D6

142D6

6B7

6B7

142D6

142D6

3A3

3A3

3A3

142D6

6B1

142A5

142A2

142A2

142B2

142A5

142B2

142A5

142B2

6B7

142C2

142B2

6B7

142C2

Preliminary

SYM_VER-1

SYM_VER-1

SYM_VER-1

EN*

GND

IN_0

IN_1

OC*

OUT_2

OUT_1

OUT_0

SYM_VER-2

SYM_VER-2


PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM

TABLE_5_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

514-0247

514-0247

514-0247

PORT 1

- _PP5V_PWRON_USB

- _PP3V3_PWRON_UDASH


Page Notes

BY

USBCONTROLLER


PROVIDED

NET_SPACING_TYPE DIFFERENTIAL_PAIR NET_PHYSICAL_TYPE

External USB Ports

(NONE)

single-pin connections.

provide the appropriate constraints

neoBorg ImplementationNOTE: This design does not provide power

USB controller outputs to indicate control on USB ports 2-4. Rename

USB Host Controller page will

to apply to entire USB D+/D- XNets.

NOTE: USB pairs are NOT constrained on


this page. It is assumed that the

- _PP5V_PWRON_UDASH

- _PP3V3_PWRON_BT

(NONE)

destinations and/or to properly

necessary aliases to map the


USB pairs to their appropriate

FHB CONNECTOR

ORDER LISTED, AND NOT ONBOTH SIDES OF THE PIN.

NEAR JE350 PIN 14 IN THE

D-

USB HUB IMPLIMENTS 15K PULLDOWNS INTERNAL

SO THEY ARE NOT NEED HERE

SENDS USB HUB PORT 3 TO BLUETOOTH MODULE

USB HUB IMPLIMENTS 15K PULLDOWNS INTERNAL

D-

D+

GND

D+

VDD

GND

D-

VDD

VDD

D+

GND

PORT 2

518S0275

740S0509

SENDS NEC CONTROLLER PORT 4 TO USB HUB UPSTREAM PORT

4-14-05

SO THEY ARE NOT NEEDED HERE

terminate unused signals.

PLACE CE343, CE344 & LE340

NOTE: This page is expected to contain the

PORT 3

2012120-OHM

4

32

1

LE312CERM402

16V

0.01uF20%

2

1CE313

CERM

20%

402

0.01uF16V 2

1CE312

SMD2

6.3VPOLY

20%150UF

NOSTUFF

2

1 CE310

FERR-250-OHM

SM

21

LE310

5%1/16WMF-LF402

15K

2

1RE311

402

15K5%

MF-LF1/16W

2

1RE310

16VCERM402

0.01uF20%

2

1CE323

16VCERM

0.01uF

402

20%2

1CE322

NOSTUFF

20%

POLY6.3V

330UF

SMD

2

1 CE320SM

FERR-250-OHM21

LE320

2012120-OHM

4

32

1

LE322

MF-LF1/16W

402

5%15K

2

1RE32115K

5%1/16W

402MF-LF

2

1RE320

120-OHM2012

4

32

1

LE332

16V

0.01uF

CERM402

20%2

1CE333

16V20%

0.01uF

402CERM 2

1CE332

FERR-250-OHM

SM

21

LE330

402MF-LF1/16W5%15K

2

1RE3315%

1/16W

402MF-LF

15K

2

1RE330

MF-LF402

1/16W5%15K

2

1RE351

MF-LF

15K

402

1/16W5%

2

1RE350

NOSTUFF

0

402

21

RE312

0

402

NOSTUFF

21

RE313

NOSTUFF

0

402

21

RE322

0

402

NOSTUFF

21

RE323

0

402

NOSTUFF

21

RE332

402

NOSTUFF

021

RE333

M-RT-SM53261-1471

9

8

7

6

5

4

3

2

14

13

12

11

10

1

16

15

JE350

15K5%1/16WMF-LF4022

1RE353

MF-LF

15K5%

1/16W

4022

1RE352

SOITPS2024

6

7

8

5

3

2

1

4

UE300

5%MF-LF1/8W805

021

RE334

0

1/8WMF-LF5%

805

21

RE335

805

5%MF-LF1/8W

021

RE336

0

402

NOSTUFF

21

RE342

402

NOSTUFF

021

RE343

120-OHM

2012

4

32

1

LE352

NOSTUFF

0

402

21

RE355

402

0

NOSTUFF

21

RE354

CERM16V

402

20%0.01uF

2

1CE343

16V20%

0.01uF

402CERM 2

1CE342

SM

FERR-250-OHM21

LE340

0

8051/8WMF-LF5%

21

RE346

0

8051/8WMF-LF5%

21

RE356

16V

0.01uF

402

20%

CERM 2

1CE352

2012

120-OHM

4

32

1

LE342

0.75AMP-13.2V

MINISMD

21

FE301

CERM

20%10UF10V

805-22

1 CE344

I602

I603

I604

I605

I606

I607

I608

I609

I610

I611

F-ST-TH

OMIT

UB01123M23-4F

4

3

2

1

7

6

5

JE310

F-ST-TH

OMIT

UB01123M23-4F

4

3

2

1

7

6

5

JE320

F-ST-THUB01123M23-4F

OMIT

4

3

2

1

7

6

5

JE330

USB RECEPTACLE,4P,UB1123-M23-4F514-0247 3 JE310,JE320,JE330 CRITICAL 17_INCH_LCD

USB RECEPTACLE,4P,UB1123-M33-4F 20_INCH_LCD514-0250 CRITICALJE310,JE320,JE3303


07051-6863

143 154

SYNC_MASTER=FINO-MB

USB Device Interfaces

MIN_LINE_WIDTH=0.6MMVOLTAGE=5V

PP5V_USB2_PORT3_F


USB2_P_L<3>USB2_BNDI_FUSB2 USB2

USB2_PORT2_FUSB2 USB2_PORT2_N_FUSB2

USB2USB2 USB2_PORT3_F USB2_PORT3_N_F

MAKE_BASE=TRUEUSB2_PORT3_N

USB2_N_L<3>USB2_BNDI_FUSB2 USB2

USB2 USB2_PORT2_F USB2_PORT2_P_FUSB2

GND_CHASSIS_BNDI

MAKE_BASE=TRUEUSB2_P<4>

USB2_N_L<3>

USB2_HUB_P_L<2>

GND_BNDIVOLTAGE=0V


USB2_HUB_N<2>USB2_PORT1_NMAKE_BASE=TRUE

MAKE_BASE=TRUEUSB2_PORT2_P

USB2_PORT2_NMAKE_BASE=TRUE

USB2_N<2>

USB2_P<2>MAKE_BASE=TRUE

USB2_PORT3_P

USB2_N<0>

USB2_P<0>

USB2_N<1>

USB2_P<1>

USB2_N<3>

USB2_HUB_N<3>MAKE_BASE=TRUE

USB_BT_P USB2_HUB_P<3>

USB2_HUB_N<0>

USB2_HUB_P<0>

MAKE_BASE=TRUEUSB2_N<4>

MAKE_BASE=TRUEUSB_BT_N

USB2_HUB_P<2>

USB2_HUB_N_L<2>

PP5V_PWRON_BNDI

AUD_MIC_IN_N_CONN

GND_CHASSIS_BNDI

GND_CHASSIS_BNDI

SB_GPIO14

USB2_P_L<3>

GND_BNDI

VOLTAGE=0V


GND_BNDI

AUD_MIC_IN_P_CONN

GND_AUDIO_MIC_CONN


PP5V_PWRON_BNDI

VOLTAGE=5V

GND_CHASSIS_BNDI


=PP5V_PWRON_BNDI

TP_USB2_PWREN<0>MAKE_BASE=TRUE

USB2_PWREN<0>


USB2_PWREN<1>


USB2_PWREN<2>


USB2_PWREN<3>


USB2_PWREN<4>

=PP5V_PWRON_USB

USB2_OC<0>

USB2_OC<1>

USB2_OC<2>

USB2 USB2_PORT1_F USB2_PORT1_P_FUSB2

USB2_PORT1_FUSB2 USB2_PORT1_N_FUSB2

USB2_PORT3_F USB2_PORT3_P_FUSB2USB2

USB2_HUB_P_L<2>USB2USB2 USB2_HUB_F

USB2_HUB_N_L<2>USB2USB2 USB2_HUB_F

MAKE_BASE=TRUEUSB2_PORT1_P

PP5V_BNDI_LE340

USB_OCMAKE_BASE=TRUE


VOLTAGE=5VPP5V_USB2

USB2_P<3>

GND_CHASSIS_USB

VOLTAGE=0


VOLTAGE=5VPP5V_USB2_PORT1_F


USB2_PORT1_N_F

VOLTAGE=0V GND_USB_PORT1


USB2_PORT1_P_F

GND_CHASSIS_USB

PP5V_USB2_PORT2_FVOLTAGE=5VMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MM

USB2_PORT2_N_F


VOLTAGE=0V GND_USB_PORT2

USB2_PORT2_P_F

GND_CHASSIS_USB

USB2_PORT3_N_F

MIN_NECK_WIDTH=0.25MMGND_USB_PORT3VOLTAGE=0V


USB2_PORT3_P_F

143

143

143

143

143

143

143

143

143

143

7

142

143

144

142

142

142

142

142

142

142

144

121 144

144

144

142

121

144

143

153

7

7

24

143

143

153

153

143

7

7

6 142

6 142

6 142

6 142

6 142

7

142

142

142

143

143

143

96

142

7

143

143

7

143

143

7

143

143 Preliminary

IN

IN

IN

IN

IN

IN

IN

IN

VDD33CRVDDA18PLL

VDDA33PLL

THRML_PAD

SELF_PWR

PRTPWR_POL

CFG_SEL1

RESET*

CLKIN_EN

XTAL1/CLKIN

XTAL2

ATEST/REG_EN

USBDP0

RBIAS

SCL/SMBCLK/CFG_SEL0

USBDP1

USBDN1

GR1/NON_REM0

OCS1*

PRTPWR1

USBDP2

TEST1

TEST0

PRTPWR2

GR2/NON_REM1

USBDN2

GR3/PRT_DIS0

PRTPWR3

GANG_EN

OCS2*

OCS3*

USBDN3

USBDP3VBUS_DET

USBDN0

VDD18

SDA/SMBDATA

VDDA33

VSS

VDD18

VDDA33

VDD18PLL

USBDM

RBIAS

USBDP

ATEST

MD0

MD1

MD2

MD3

MD4

MD5

MD6

MD7

MA0/CLK_SEL0

MA1/CLK_SEL1

MA2/SEL_CLKDRV

MA3

MA4

MA5

MA6

MA7

MA9

MA8

MA10

MA11

MA12

MA13

MA14

MA15

NMCE*

NMWR*

NMRD*

GPIO1

GPIO2

GPIO3

GPIO4

GPIO6/ROMEN

GPIO5

GPIO7

GPIO9

GPIO8/CRD_PWR0

GPIO10/CRD_PWR1

GPIO11/CRD_PWR2

GPIO12

GPIO14

GPIO13

GPIO15

RESET_N*

TEST_N0*

XTAL1/CLKIN

TEST_N1*

XTAL2

VSSVSSA

VSSPLL

MS_D0/MS_SDIO

MS_D1

MS_D2

MS_D3

MS_SCLK

MS_BS

MS_INS

SD_DAT0

SD_DAT1

SD_DAT2

SD_DAT3

SD_CLK

SD_CMD

SD_NWP*

SM_D1

SM_D2

SM_D0

SM_D4

SM_D3

SM_D5

SM_D6

SM_D7

SM_CLE

SM_NRE*

SM_NWE*

SM_NWP*

SM_NCD*

SM_NCE*

SM_NB/R*

SM_ALE

SM_NWPS*

CF_NCS0

CF_NCS1

CF_SA0

CF_SA1

CF_SA2

CF_NIOR*

CF_IRQ

CF_NIOW*

CF_NCD1*

CF_NRESET*

CF_IORDY

CF_NCD2*

CF_D0

CF_D1

CF_D3

CF_D2

CF_D4

CF_D6

CF_D5

CF_D8

CF_D7

CF_D11

CF_D10

CF_D12

CF_D13

CF_D14

CF_D15

VDD33

CF_D9

COMPACTFLASH

INTERFACE

MISC

INTERFACE

MEMORY

STICK

INTERFACE

USB

INTERFACE

INTERFACE

SD INTERFACE

MEMORY/IO

SMARTMEDIA

VCC

VSSNC

DIDO

ORG*/NCCSCLK

IN

IN

IN

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

ELECTRICAL_CONSTRAINT_SET NET_PHYSICAL_TYPENET_SPACING_TYPE

CRYSTAL IS 60PP INCLUDING AGINGINTERNAL DEFAULTS

LOW = PORT 2 AND 3 REMOVABLE

HIGH = PORT 2 AND 3 NON-REMOVABLE

CRYSTAL IS 60PPM INCLUDING AGING

CRYSTAL LOADING IS 16PF

DATA SHEET SAYS 12.0K 1%

ACTIVE HIGH

CRYTAL LOADING IS 16PFNEED TO CHECK LOADING

INTERNAL DEFAULTS

EXTERNAL CRYSTAL

SELF POWERED

GANGED POWER

TEST PINS SET XNOR

NEED TO CHECK LOADING CAPS

DATA SHEET SAYS 12.0K 1%

PORT 3 ENABLED

1.8V INTERNAL REGULATOR ENABLED

DIFFERENTIAL_PAIR

HIGH = PORT 1 NON-REMOVABLE

0.1UF20%10V

402CERM2

1 CE403

144 143

144 143

144

144

144

144

144

144

402

5%

MF-LF1/16W

10K

2

1RE433

GREEN2.0X1.25A

DEVELOPMENT

2

1LEDE400

805CERM

20%6.3V

4.7UF

2

1 CE404

DEVELOPMENT

402MF-LF1/16W5%330

2

1RE434

CERM402

10V20%0.1UF

2

1 CE4050.1UF20%10V

402CERM2

1 CE406

805CERM

20%6.3V

4.7UF

2

1 CE407

0.1UF20%10V

402CERM2

1 CE4014.7UF6.3V

603CERM

20%2

1 CE400

603

4.7UF6.3VCERM

20%2

1 CE409

1/16WMF-LF402

0

5%

21

RE400

100K5%1/16WMF-LF4022

1RE401

0.1UF20%10V

402CERM2

1 CE410

12.1K1%

402MF-LF1/16W

2

1RE402USB2503

QFN

42

43

48

41

38

30

22

104

45

13

71 44

39

40

31

23

29 12

8

6

211

9

5

3

49

36

24

28

25

26

37

47

18

14

16

33

15

32

34

17

19

21

20

35

27

46

UE401

5X3.2X1.2-SM

24.000M21

YE400

22PF

402CERM50V5%

2

1 CE427

5%1/16W

1M

MF-LF402

21

RE411

24.000M

5X3.2X1.2-SM

21

YE401

22PF

402CERM50V5%

2

1 CE426

20%

805CERM6.3V

4.7UF

2

1 CE4160.1UF20%10V

402CERM2

1 CE415

0.1UF20%10V

402CERM2

1 CE423

CERM402

10V20%0.1UF

2

1 CE424CERM402

10V20%0.1UF

2

1 CE4190.1UF20%10V

402CERM2

1 CE42020%

402CERM16V

0.01UF

2

1 CE421

805CERM

20%6.3V

4.7UF

2

1 CE422

805CERM

20%6.3V

4.7UF

2

1 CE418

1M

402MF-LF

5%1/16W

21

RE403

0.1UF20%10V

402CERM2

1 CE413

CERM402

10V20%0.1UF

2

1 CE414

12.1K1/16WMF-LF402

1%

2

1RE413

100K5%1/16WMF-LF4022

1RE409

CERM402

10V20%0.1UF

2

1 CE425

10K5%1/16WMF-LF4022

1RE407

22PF5%50VCERM402

2

1 CE411

402MF-LF1/16W5%10K

2

1RE40610K5%1/16WMF-LF4022

1RE4055%10K1/16WMF-LF4022

1RE404

402MF-LF1/16W5%10K

2

1RE410

402MF-LF1/16W5%10K

2

1RE41410K5%1/16WMF-LF4022

1RE415

10K5%1/16WMF-LF4022

1RE412

22PF5%50VCERM402

2

1 CE412

1/16W

10K5%

MF-LF4022

1RE418

NOSTUFF

1/16WMF-LF402

5%10K

2

1RE419

10K5%1/16WMF-LF4022

1RE417

1/16W

33

5%

402MF-LF

21

RE420

50V5%10PF

CERM402

2

1 CE429

NOSTUFF

10K5%1/16WMF-LF4022

1RE421

USB2227VTQFP

103

102

104

86

112

97

85

84

47

16

15

89

100

108

80

43

3101

106

49

88

87

95

96

76

74

82

81

83

78

77

72

71

70

69

68

67

66

65

75

73

25

29

28

27

26

30

31

115

98

14

13

17

23

18

22

21

20

19

24

12

11

10

9

8

7

6

5

125

124

123

122

121

120

119

118

4

2

1

128

127

126

117

116

105

42

107

109

110

111

94

113

90

91

92

93

44

79

114

64

63

62

59

58

57

61

60

54

53

55

56

41

40

39

38

37

36

35

34

52

51

50

48

46

45

33

32

99

UE400

0

MF-LF1/16W5%

402

21

RE424

5%

402MF-LF1/16W

10K

2

1RE422

402

5%

MF-LF1/16W

10K

2

1RE423

0

402MF-LF1/16W5%

21

RE425

5%

402MF-LF1/16W

10K21

RE427

1/16WMF-LF

5%

402

100K

2

1RE426

402CERM10V

0.1UF20%

2

1 CE430

402MF-LF1/16W5%10K

2

1RE428

MF-LF1/16W5%10K

NOSTUFF

4022

1RE429

0.1UF20%10V

402CERM2

1 CE402

1/16WMF-LF

2.2K

402

5%

2

1RE430

93LC56ASOI

5

8

6

7

4

3

1

2

UE402

330

402MF-LF1/16W5%

21

RE431

402CERM

0.1UF20%10V2

1 CE431

1/16WMF-LF402

5%10K

2

1RE432

144

144

144 143

144 143

SYNC_MASTER=FINO-PC

Flash Media CtrlSYNC_DATE=05/19/2005

154144

07051-6863

CR_EE_DO

CARD_READER_EE_DIO

CF_IRQ

CF_IOR_L

CF_SA<2>

CF_SA<0>

USB2_HUB_N<1>

CF_D<0>

CARD_READER_RBIAS

CF_PS

=PP3V3_PWRON_USB

USB_HUB_ATEST

USB2 USB2 USB2_HUB_N<3>USB2_HUB_3

USB2 USB2 USB2_HUB_P<3>USB2_HUB_3


USB2 USB2 USB2_HUB_P<2>USB2_HUB_2


USB2_HUB_P<1>USB2 USB2 USB2_HUB_1

XTAL_IN_CARD_READER0.38MM SPACING

=PP3V3_PWRON_USB

PP3V3_CARD_READER_VDDA VOLTAGE=3.3V

MIN_NECK_WIDTH=.2 MMMIN_LINE_WIDTH=.38 MM

USB_HUB_PRT_DIS0

USB_HUB_RESET_L

XTAL_IN_USB_HUB

XTAL_OUT_USB_HUB

XTAL_OUT_USB_HUB_R

USB2_HUB_P<1>

USB2_HUB_N<1>

USB_HUB_NON_REM0

USB2_HUB_P<1>

SD_D<1>

XTAL_OUT_CARD_READER

XTAL_OUT_CARD_READER_R

SD_D<0>

SD_D<3>

VOLTAGE=1.8V


PP1V8_CARD_READER_INTERNAL

CF_RESET_L

CF_IOW_L

CF_CD_L<2>

CF_SA<1>

CF_CS_L<1>

CF_CS_L<0>

CF_D<15>

CF_D<14>

CF_D<12>

CF_D<11>

CF_D<10>

CF_D<9>

CF_D<8>

CF_D<7>

CF_D<6>

CF_D<5>

CF_D<4>

CF_D<3>

CF_D<2>

CF_D<1>

PP1V8_CARD_READER_PLLMIN_LINE_WIDTH=.38 MMMIN_NECK_WIDTH=.2 MM

VOLTAGE=1.8V

TP_USB_HUB_TEST<0>

TP_USB_HUB_TEST<1>

=PP3V3_PWRON_USB

USB_HUB_PRTPWR_POL

USB_HUB_GANG_EN

USB_HUB_SELF_PWR

USB_HUB_CFG_SEL1

USB_HUB_CLKIN_EN

USB_HUB_ATEST

=PP3V3_PWRON_USB

USB_HUB_RBIAS

=PP3V3_PWRON_USB

USB_HUB_VBUS_DET

=PP3V3_PWRON_USB

USB_HUB_VBUS_DET

USB2_HUB_P<0>

USB2_HUB_N<0>

USB2_HUB_P<2>

USB2_HUB_N<2>

USB2_HUB_P<3>

USB2_HUB_N<3>

=PP3V3_PWRON_USB

SD_PWR

SD_CLK

SD_CMD

SD_WP_L

CARD_READER_ATEST

=PP3V3_PWRON_USB

XTAL_IN_CARD_READER

SD_CLK_R

SD_D<2>

CF_CD_L<1>

=PP3V3_PWRON_USB

CARD_READER_EE_CS

CARD_READER_EE_CLK

CARD_READER_EE_DIO

CARD_READER_EE_CLK

USB_HUB_NON_REM1

=PP3V3_PWRON_USB

MIN_LINE_WIDTH=.38 MMVOLTAGE=1.8V

MIN_NECK_WIDTH=.2 MM

PP1V8_USB_HUB_VDD_INTERNALPP1V8_USB_HUB_PLL_INTERNAL


VOLTAGE=1.8V

USB_HUB_CFG_SEL0

XTAL_OUT_CARD_READER0.38MM SPACING

0.38MM SPACING XTAL_OUT_CARD_READER_R

0.38MM SPACING XTAL_IN_USB_HUB

0.38MM SPACING XTAL_OUT_USB_HUB

0.38MM SPACING XTAL_OUT_USB_HUB_R

SD_DET_RSD_DET

CARD_READER_TEST_N0_L

=PP3V3_PWRON_USB

CARD_READER_EE_CS

CARD_READER_VBUS_DETECT

SD_PWR

CARD_READER_ACTIVITY

CF_IORDY

CARD_READER_TEST_N1_L

CARD_READER_RESET_L

CF_D<13>

=PP3V3_PWRON_USB

CARD_READER_ACTIVITY_R

CARD_READER_ACTIVITY

145

145

145

145

145

145

145

145

145

145

145

145

144

144

144

144

144

144

144

144

144

144

144

144

142

142

142

142

142

142

144

144

144

144

142

145

142

142

142

142

145

142

144

145

145

145

145

144

145

145

7

144

7

144

144

144

144

144

144

145

144

144

145

145

145

145

145

145

145

145

145

145

145

145

145

145

145

145

145

145

145

145

145

145

7

144

7

7

144

7

144

143

143

143

143

143

143

7

144

145

145

145

7

144

145

145

7

144

144

144

144

7

145

7

144

144

144

145

145

7

144 Preliminary

CF49

CF48

CF47

CF46

CF45

CF44

CF43

CF41

CF39

CF37

CF36

CF34

CF33

CF32

CF31

CF30

CF29

CF27

CF26

CF2

CF3

CF4

CF5

CF6

CF7

CF10

CF8

CF9

CF11

CF12

CF13

CF15

CF14

CF16

CF17

CF18

CF20

CF19

CF23

CF21

CF22

CF24

CF25

SD9

SD_CD_SW

SD_COMMON

SD_WP_SW

SD1

SD7

SD8

SD6

CF35

CF1

CF28

CF38

CF42

CF40

SD5

SD4

SD3

SD2

CF50

SHLD1

SHLD2

SHLD3

SHLD4

D

G

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NC

NC

NC

NC

CARD-READER-2IN1F-ST-SM

66

65

64

63

62

61

60

51

59

58

57

56

55

54

53

52

18

16

14

12

49

10

47

45

43

41

39

37

35

33

31

29

8

27

25

23

21

19

17

15

13

11

9

6

7

5

3

1

50

48

46

44

42

40

4

38

36

34

32

30

28

26

24

22

20

2

JE500402CERM10V20%0.1UF

2

1 CE501

CERM402

10V20%0.1UF

2

1 CE502

NTR4101PSOT-23

2

1

3

QE500

0.1UF

NOSTUFF

20%10VCERM402

2

1 CE500MF-LF402

1/16W5%

100K21

RE500


Flash Connector

154145

07051-6863

CF_D<9>

CF_D<8>

CF_IORDY

CF_RESET_L

CF_IRQ

CF_IOR_L

CF_CS_L<1>

CF_D<15>

CF_D<14>

CF_D<13>

CF_D<12>

CF_D<11>

CF_CD_L<1>

CF_D<3>

CF_D<4>

CF_D<5>

CF_D<6>

CF_D<7>

CF_CS_L<0>

CF_SA<2>

CF_SA<0>

CF_SA<1>

CF_D<2>

CF_D<0>

CF_D<1>

CF_CD_L<2>

SD_WP_L

SD_CMD

SD_D<3>

SD_CLK

SD_D<0>

SD_D<1>

CF_IOW_L

CF_PS_R CF_PS


SD_PWR

SD_D<2>

=PP3V3_PWRON_USB


VOLTAGE=3.3VCF_PWR

SD_DET

CF_D<10>

144 142

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

144

7

144

144

Preliminary

DOUTLRCK

VREF2L/M#REFO

VREF1

VDD

BCK

MINPMINM

MBIAS

VCOM

VOUTLVOUTR

VINRVINL

ATESTSCKI

PDWN*

SDA

ADRSCL

I2CEN

DOUTSDIN

DGND AGND

VCC

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

APPLE P/N 353S0933AUDIO CODEC

NC

NC

805

10%1UF10VCERM2

1 CE703

ELEC

10UF

SM

20%16V2

1 CE706

0603

1000-OHM-200MA21

LE700

10VCERM

1UF10%

8052

1 CE7021UF10V

805CERM

10%2

1 CE701

SM

10UF16VELEC

20%2

1 CE7125%

MF-LF402

1/16W

3321

RE700

402

1/16W

33

MF-LF

5%

21

RE702

4.7K

MF-LF

5%

402

1/16W

2

1RE701 16V

SMELEC

20%10UF

2

1 CE710

603-1

50V

0.1UF10%

X7R 2

1CE711

603-1

50V

0.1UF10%

X7R 2

1CE709

805-1

6.3VCERM

10UF20%

2

1CE700

603-1

50V

0.1UF10%

X7R2

1 CE704

603-1

50VX7R

10%0.1UF

2

1CE705

VQFNPCM3052A

5

4

24

25

6

2

16

26

31

23

7

18

19

17

32

9

29

28

27

10

3

21

14

13

12

15

11

1

30

228

20

UE700

10UF

ELECSM

16V20%

2

1 CE708

603-1

50VX7R

10%0.1UF

2

1CE707

SYNC_MASTER=FINO-SO

AUDIO: CODECSYNC_DATE=05/19/2005

154

07

147

051-6863

VOLTAGE=3.3V

=PP3V3_AUDIO

MIN_LINE_WIDTH=1MMMIN_NECK_WIDTH=0.6MM

GND_AUDIO_CODEC

VOLTAGE=0V

GND_AUDIO_CODEC

AUD_CODEC_IN_L

AUD_CODEC_IN_R

AUD_CODEC_OUT_L

AUD_CODEC_OUT_R

AUD_PSEUDO_VREF

PP4V5_AUDIO_ANALOG


VOLTAGE=4.5V

AUDI2S0OUT

AUDSPDIFOUT

AUD_PCM_REF2

AUD_PCM_REF1

NET_SPACING_TYPE=AUDIOI2S0_SYNC

NET_SPACING_TYPE=AUDIOI2S0_SB_TO_DEV_DTO

NET_SPACING_TYPE=AUDIOI2S0_BITCLK

I2C_AUDIO_SCL NET_SPACING_TYPE=AUDIOI2C_AUDIO_SDA NET_SPACING_TYPE=AUDIO

I2S0_RESET_L

NET_SPACING_TYPE=AUDIOAUD_CODEC_MCLK

NET_SPACING_TYPE=AUDIOI2S0_DEV_TO_SB_DTI

NET_SPACING_TYPE=AUDIOAUD_SPDIF_OUT

AUD_CODEC_LI_SHDN_L

AUD_PCM_VCOM

AUD_PCM_MBIAS

AUD_MICIN_N

AUD_MICIN_P

PPV_3V3_AUDIO_CODEC


12

12

12

8

8

11

6

6

10

5

5

10

10

12


3

2

2

6

6

8

8

6

6

4

4

4

4

12

4

11

6

10

12

12

12

Preliminary

V-

V+

V-

V+

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

AV= 0.49

LINE IN PSEUDO-DIFFERENTIAL AMP

APPLE P/N 353S0642

APPLE P/N 353S0642

UMAXMAX4253EUB

CRITICAL

4

10

5

1

2

3

UE800

CERM603

10V20%

0.47UF

2

1CE802

ELEC

20%16V

SM

10UF2 1

CE800

10UF

SM

20%16VELEC

2 1

CE801

1/16WMF-LF402

1%100K

2

1RE803

MF-LF1/16W

5%

402

47K

2

1RE802

402MF-LF

5%

0

1/16W

NOSTUFF

21

RE801

402MF-LF1/16W

20.5K

1%

21

RE804

402MF-LF1/16W

10K

1%

21

RE807

MF-LF

1%

20.5K

402

1/16W

21

RE805

MF-LF402

10K

1%1/16W

21

RE806402

1651%1/16WMF-LF

2

1RE800

47PF

402

50V5%

NOSTUFF

CERM

21

CE803

SOT-363BAV99DW-X-F

6

2

1

DE800

402

10K

1%1/16WMF-LF

21

RE811

47PF

402CERM50V5%

NOSTUFF

21

CE806

402MF-LF1/16W

10K

1%

21

RE812

CRITICAL

MAX4253EUBUMAX

4

10

6

9

8

7

UE800BAV99DW-X-F

SOT-363

3

5

4

DE800

1/16W

20.5K

1%

MF-LF402

21

RE809

20.5K

MF-LF

1%

402

1/16W

21

RE810

16VELEC

20%

SM

10UF2 1

CE804

SM

10UF

20%16VELEC

2 1

CE805

1/16W1%

MF-LF402

100K

2

1RE808

154148

07051-6863

SYNC_MASTER=FINO-SO SYNC_DATE=05/19/2005

AUDIO: LINE INPUT AMP

PP4V5_AUDIO_ANALOG

GND_AUDIO_CODEC

AUD_LI_L1

AUD_LI_GNDL1

AUD_CODEC_LI_SHDN_L

AUD_LI_R1

PP4V5_AUDIO_ANALOG

AUD_CODEC_LI_SHDN_L1

GND_AUDIO_CODEC

AUD_LI_R2

AUD_LI_GNDR1 AUD_LI_VREFR

AUD_LI_VREFL

AUD_LI_L2

AUD_PSEUDO_VREF

AUD_PSEUDO_VREF

AUD_LI_R

AUD_LI_L

AUD_LI_GND

AUD_LI_GND

AUD_CODEC_IN_R

AUD_CODEC_IN_L

12

12

8

8

12

6

12

6

6

5

6

5

6

6

11

11

5

2

5

5

2

5

5

11

11

6

6

5

5

Preliminary

RIN+

SHDN*

VDDR

PVDD

VDDL

C1P

ROUT

PGND

SGND

PVSS

VSS

RIN-

LOUTLIN-LIN+

C1N

NC

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TO GPIO 38

LINE OUT LOW-PASS FILTERFC = 37 KHZ, HO = -1.4

LINE OUT AMP

LINE OUTGROUND NOISECANCELLATION

APPLE P/N 353S0687

805

10V10%1UF

CERM2

1 CF008

ELEC

10UF20%

SM

16V

2

1

CF01110%1UF

805

10VCERM 2

1CF010

MAX9722AETEQFN

CRITICAL

11

9 13

16

6

108

7

5

1

3

17

1214

15

2

4

UF000

10K1%1/16WMF-LF4022

1RF005

14.0K

MF-LF

1%1/16W

402

21

RF006

MF-LF

14.0K

402

1/16W1%

21

RF001

MF-LF

1%1/16W

402

3.92K21

RF002

ELECSM

16V20%10UF

2

1 CF006

MF-LF1/16W1%

10K

402

21

RF000

SM-1ELEC16V20%

10UF21

CF000

CRITICAL

CERM25V5%1.5NF

06032

1 CF002

CRITICAL

1.5NF5%25V

0603CERM2

1 CF004

1%

14.0K

1/16W

402MF-LF

21

RF009

1/16W1%

MF-LF402

3.92K21

RF008

1%1/16WMF-LF

10K

402

21

RF007

20%16VELECSM-1

10UF21

CF003

MF-LF

5%1/16W

4.7K

4022

1RF015

603MF-LF

4.7

5%1/10W

21

RF010

50V5%

603CERM

270PF21

CF001

603

5%50VCERM

270PF21

CF005

5%

402CERM

100PF50V

2

1CF012

CERM

5%100PF

402

50V2

1CF013MF-LF1/16W5%

1K

402

21

RF016

1%1/16W

402MF-LF

1K

2

1RF017

402MF-LF1/16W1%1K

2

1RF018

6.3VCERM

10UF20%

805-12

1CF007

805MF-LF1/8W1%

1421

RF011

14

1%1/8WMF-LF805

21

RF012

402MF-LF

1%1/16W

10K

2

1RF004

5%

805

0

1/8WMF-LF

21

RF013

1%

402

1/16WMF-LF

14.0K21

RF003

10VCERM

10%

805

1UF

2

1 CF009

07051-6863

150 154


AUDIO: LINE OUT AMP

MIN_LINE_WIDTH=1MMMIN_NECK_WIDTH=0.6MM

GND_AUDIO_CODEC

GND_AUDIO_CODEC


GND_AUD_LOAMP

VOLTAGE=0V

AUD_CODEC_OUT_L

AUD_CODEC_OUT_R

AUD_LOAMP_OUT_L


AUD_LOAMP_OUT_L

AUD_LOAMP_OUT_R


AUD_LOAMP_OUT_R

MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.25MMVOLTAGE=0VGND_AUD_LOAMP_CHGPMP

AUD_LOAMP_IN_R_M

AUD_LOAMP_IN_L_P

AUD_LOAMP_IN_L_M

AUD_LO_GND_PRB

AUDCODECOUTL AUDCODECOUTL1

AUD_LOAMP_IN_L_M

AUD_LOAMP_IN_L_P

AUD_LOAMP_IN_R_P

AUD_LOAMP_IN_R_M

AUDCODECOUTR1AUDCODECOUTR

AUDIO_LO_MUTE_LAUDIO_LO_MUTE_L_F

AUD_MAX9722_C1P

AUD_MAX9722_C1N

GND_AUD_LOAMP_CHGPMP

AUD_MAX9722_PVSSMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.30MM


PP5V_AUDIO_LOAMP

MIN_NECK_WIDTH=0.25MMVOLTAGE=5V


AUD_LO_R


AUD_LO_L


AUD_LOAMP_IN_R_P

AUD_LO_GND

VOLTAGE=0VMIN_NECK_WIDTH=0.6MMMIN_LINE_WIDTH=1.0MM

PP5V_AUDIO_ANALOG


VOLTAGE=5VMIN_NECK_WIDTH=0.6MM

12

12

8

8

6

6

12

12

12

12

5

5

12

10

10

8

8

8

11

2

2

2

5

5

8

8

8

8

2

8

8

8

11

8

8

8

8

4

2

2

11

11

8

11

3

Preliminary

PGND

VDD

G1

G2

CHOLD

AGND PADTHM

NC

SHDN*

FS2

FS1

INL-

INL+

INR-

REG

INR+

OUTL+

OUTL+

OUTL-

OUTL-

C1+

C1-

OUTR+

OUTR+

OUTR-

OUTR-

SS

G

D

S G

D

S

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

GAIN SETTINGS: +19DB

MODULATION SETTING: LOW EMI

NC

SPEAKER AMPAPPLE P/N 353S0680

TIE TO GPIO 40

GAIN AND SWITCHING FREQUENCY STUFF OPTIONS

MF-LF

1%1/16W

10K

402

21

RF215

5%

MF-LF1/16W

47K

402

21

RF213

402

1/16WMF-LF

1%10K

2

1RF214

MAX9714QFN

22

21

43

33

12

11

14

24

2321

26

28

25

27

30

32

29

31

8

15

16

9

10

18

17

20

19

7

5

6

13

UF200

180-OHM-1.5A

0603

21

LF203

0.1UF50V10%

X7R603-1

2

1 CF208

180-OHM-1.5A

0603

21

LF204

X7R

0.47UF16V10%

8052

1 CF209

FERR-250-OHM

SM-1

21

LF200

0.47UF

16V

805X7R

10%

21

CF204

0.47UF

16VX7R

10%

805

21

CF205

180-OHM-1.5A

0603

21

LF202

0.47UF

X7R805

10%16V2

1 CF214

10%

X7R805

16V

0.47UF21

CF207

10%

805X7R16V

0.47UF21

CF206

20%

SM-2ELEC

220UF16V 2

1CF200

0603

180-OHM-1.5A21

LF201

402MF-LF1/16W5%0

2

1RF208

16V20%

SM-2

220UF

ELEC2

1CF217

CERM16V20%

1206

1UF

2

1 CF202

SM-LF1/16W

47K5%

5678

4321

RPF200

5%1/16WMF-LF

4.7K

4022

1RF212

50R28

1

XCF200

1000-OHM-200MA

0603

21

LF205

5%

CERM

100PF

402

50V2

1 CF215

402CERM50V5%100PF

2

1 CF216

1000-OHM-200MA

0603

21

LF206

0603

1000-OHM-200MA21

LF207

1000-OHM-200MA

0603

21

LF208

0.1UF

603

20%

CERM16V

2

1 CF219

603

20%16V

CERM

0.1UF

2

1CF218

CERM50V5%

402

100PF

2

1CF220

CERM50V5%

402

100PF

2

1CF221

OMITSM

21

XWF201

10UF10%16VCERM1210

2

1 CF20310UF10%16VCERM1210

2

1 CF223

CERM1210

10%10UF

16V2

1CF201

1000PF

CERM25V5%

6032

1 CF210

603

1000PF5%25VCERM2

1 CF211

603

1000PF5%25VCERM2

1 CF212

CERM25V5%1000PF

6032

1 CF213SOT-3632N7002DW

1

2

6

QF200SOT-3632N7002DW

4

5

3

QF200


051-6863 07

154152

SYNC_MASTER=FINO-SO

AUDIO: SPEAKER AMP

=PP3V3_AUDIO

=PP3V3_AUDIO

AUD_CODEC_OUT_R

AUDIO_SPKR_MUTE_L_F

MIN_LINE_WIDTH=1MMNET_SPACING_TYPE=AUDIO


GND_AUDIO_SPKRAMP_PLANE

AUDIO_SPKR_MUTE_L

AUD_PCM_VCOM

AUD_CODEC_OUT_L

AUD_SAMP_FS1

AUD_SAMP_G1


AUDSAMPCSS

DIFFERENTIAL_PAIR=AUD_SPKRAMP_PWR

GND_AUDIO_SPKRAMP

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=1MM

NET_SPACING_TYPE=AUDIO


VOLTAGE=12V

PP12V_AUD_SPKRAMP_PLANE

MIN_NECK_WIDTH=0.30MMMIN_LINE_WIDTH=1MM

NET_SPACING_TYPE=AUDIOMIN_LINE_WIDTH=0.5MM

AUD_SPKR_OUTR_N




AUDSAMPCPPMIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.2MM

AUD_SAMP_G1

AUD_SAMP_G2

AUD_SAMP_FS2

AUD_SAMP_FS1

AUD_SAMP_SHDN_L

MIN_NECK_WIDTH=0.15MMAUDSAMPCPN




AUDSAMPOUTLN


AUD_SPKR_OUTR_P



MIN_NECK_WIDTH=0.3MMAUDSAMPOUTRN




AUDSAMPOURTP


MIN_NECK_WIDTH=0.3MMAUDSAMPOUTLP



AUD_SPKR_OUTL_N


AUD_SPKR_OUTL_P




AUD_MAX9714_CHOLD



AUD_MAX9714_VREG

AUD_SAMP_G2

AUDIO_SPKR_MUTE_L_INV

AUD_SAMP_INR_N

AUDSAMPINRN

AUD_SAMP_INR_P

AUD_SAMP_INL_P

AUDSAMPINLP

AUDSAMPINRP

AUDSAMPINLN

AUD_SAMP_INL_N

DIFFERENTIAL_PAIR=AUD_SPKRAMP_PWRNET_SPACING_TYPE=AUDIO

MIN_NECK_WIDTH=0.30MMVOLTAGE=12V

MIN_LINE_WIDTH=1MM

PP12V_AUDIO_SPKRAMP


AUD_SAMP_FS2

=PP3V3_AUDIO

12

12

12

11

11

11

10

10

12

12

12

12

12

10

5

5

8

10

8

3

10

10

3

10

5

3

3

5

2

4

5

5

10

10

2

11

2

2

10

10

10

10

11

11

11

10

2

2

10

3 Preliminary

G

D

S

TIP_DET

RING

TIP

GND_1

GND_2

TYPE_DET

LED

VCC

VIN

GND

G

D

S

G

D

S

TABLE_5_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM



APPLE P/N 514-0260 (M23)APPLE P/N 514-0261 (M33)

LINE OUT JACK

SPEAKER TYPE DETECT

LINE IN JACKAPPLE P/N 514-0249 (M33)

TO GPIO 33

AUDIO_LO_OPTICAL_PLUG_L = LOW: OPTICAL DIGITAL AUDIO PLUG INSERTED

TO GPIO 32

APPLE P/N 518S0249

AUDIO_LO_OPTICAL_PLUG_L = HIGH: ANALOG AUDIO PLUG INSERTED

SPEAKER CABLE CONNECTOR

TO GPIO 34

MMBZ15DLT1

TO GPIO 43

LINE OUT PLUG DETECTSAUDIO_LO_DET_L = LOW: PLUG INSERTEDAUDIO_LO_DET_L = HIGH: PLUG NOT INSERTED

AUDIO_IN_DET0_L = LOW: PLUG INSERTEDAUDIO_IN_DET0_L = HIGH: PLUG NOT INSERTED

APPLE P/N 514-0246 (M23)

LINE IN PLUG DETECT

100PF50VCERM402

5%2

1 CF303

100K

402MF-LF

5%1/16W

2

1RF300

0.1UF

CERM

20%10V

4022

1 CF3081/16WMF-LF

47K

402

5%

21

RF302

402

47K

MF-LF1/16W5%

2

1RF301

MF-LF1/16W

402

47K

5%

21

RF305

402

47K5%1/16WMF-LF

2

1RF304

100PF

CERM50V5%

4022

1 CF302

402MF-LF

5%100K1/16W

2

1RF303

402

47K5%1/16WMF-LF

2

1RF307

47K

1/16WMF-LF402

5%

21

RF308

100K5%1/16WMF-LF4022

1RF306

5%1/16WMF-LF

402

0

2

1RF312

47K1/16W

402MF-LF

5%

2

1RF313

040514V-15A

42

31

DZF300CERM

5%50V

402

100PF

2

1 CF301

10%1000PF25VX7R402

2

1 CF32010%

X7R

1000PF25V

4022

1 CF321

402

10%

X7R25V

1000PF

2

1 CF322

402

100PF5%50VCERM2

1 CF300

100PF

CERM50V

402

5%2

1 CF324

100PF

CERM50V

402

5%2

1 CF323

0603

1000-OHM-200MA21

LF332

SOT23-LF2N7002

2

1

3

QF300

1000PF

603CERM25V5%

2

1 CF3195%1000PF

CERM25V

6032

1 CF3271000PF

CERM25V5%

6032

1 CF326

CERM

5%

603

1000PF25V

2

1 CF325

0603

180-OHM-1.5A21

LF333

0603

180-OHM-1.5A21

LF331

180-OHM-1.5A

0603

21

LF330

180-OHM-1.5A

0603

21

LF334

FERR-EMI-100-OHM

SM

21

LF300

SM

FERR-EMI-100-OHM21

LF301

SM

FERR-EMI-100-OHM21

LF302

FERR-EMI-100-OHM

SM

21

LF303

SM

FERR-EMI-100-OHM21

LF304

SM

FERR-EMI-100-OHM21

LF305

SM

FERR-EMI-100-OHM21

LF306

SM

FERR-EMI-100-OHM21

LF307

FERR-EMI-100-OHM

SM

21

LF308

SM

FERR-EMI-100-OHM21

LF309

FERR-EMI-100-OHM

SM

21

LF310

FERR-EMI-100-OHM

SM

21

LF311

FERR-EMI-100-OHM

SM

21

LF312

FERR-EMI-100-OHM

SM

21

LF313

FERR-EMI-100-OHM

SM

21

LF314

FERR-EMI-100-OHM

SM

21

LF315

SM

FERR-EMI-100-OHM21

LF316

SM

FERR-EMI-100-OHM21

LF317

FERR-EMI-100-OHM

SM

21

LF318

FERR-EMI-100-OHM

SM

21

LF319

SM

FERR-EMI-100-OHM21

LF320

FERR-EMI-100-OHM

SM

21

LF321

FERR-EMI-100-OHM

SM

21

LF322

SM

FERR-EMI-100-OHM21

LF323

SM

FERR-EMI-100-OHM21

LF324

FERR-EMI-100-OHM

SM

21

LF326

SM

FERR-EMI-100-OHM21

LF325

SM

FERR-EMI-100-OHM21

LF327

SM

FERR-EMI-100-OHM21

LF328

FERR-EMI-100-OHM

SM

21

LF329

SOT23

15V

3

2 1

DZF301

53261-0771M-RT-SM

7

6

5

4

3

2

1

9

8

JF301

402MF-LF1/16W5%0

NOSTUFF

2

1RF31005%1/16WMF-LF4022

1RF311

F-ANG-TH

OMIT

UCNT2052E007-0JF303

805

10VCERM

1UF10%

2

1 CF31820%

CERM402

0.1UF10V

2

1 CF317

CERM402

16V10%0.01UF

2

1 CF316CERM50V

402

5%100PF

2

1 CF315

100PF5%50VCERM402

2

1 CF314402CERM50V5%100PF

2

1 CF313

100PF

402CERM50V5%

2

1 CF312

100PF

CERM402

5%50V

2

1 CF311

2N7002DWSOT-363

4

5

3 QF301

SOT-3632N7002DW

1

2

6 QF301

JA03333-M23-4F

OMIT

F-ST-TH

4

3

2

1

8

7

6

5

JF300

MF-LF1/16W5%100K

NOSTUFF

4022

1RF309

402

0.1UF20%10VCERM2

1 CF309

402

20%10V

0.1UF

CERM2

1 CF310

LINE IN CONNECTOR, 5.5 DEG 17_INCH_LCD1514-0246 JF300

051-6863

153 154

07


AUDIO: CONNECTORS

JF300 20_INCH_LCDLINE IN CONNECTOR, 5.5 DEG1514-0249

JF303COMBO OUT CONN, 4.5 DEG 17_INCH_LCD1514-0260

20_INCH_LCDCOMBO OUT CONN, 4.5 DEG JF3031514-0261

AUD_SPDIF_OUT_EMI

GND_CHASSIS_AUDIO_INTERNAL

AUD_LO_DET1_EMI

=PP3V3_AUDIO

MIN_LINE_WIDTH=0.2MMMIN_NECK_WIDTH=0.15MMAUD_LI_R_JACK


MIN_LINE_WIDTH=0.2MMMIN_NECK_WIDTH=0.15MMAUD_LI_L_JACK


AUD_LI_GND_JACK


AUD_SPKR_OUTL_P_CONN

MIN_NECK_WIDTH=0.3MMMIN_LINE_WIDTH=0.5MMNET_SPACING_TYPE=AUDIO

AUD_LO_DET1

AUDIO_SPKR_ID

MIN_NECK_WIDTH=0.4MMAUD_LO_GND_EMI


AUD_LO_L

AUD_LO_R

AUD_LO_GND_PRB_EMI


AUD_LO_GND_PRB

AUD_LO_GND

AUD_LO_DET2

=PP3V3_AUDIO

AUDIO_SPDIF_PWR

AUD_LI_GND_EMI

AUDLINDETH


AUD_SPKR_OUTR_PNET_SPACING_TYPE=AUDIO


NET_SPACING_TYPE=AUDIOMIN_NECK_WIDTH=0.3MM

AUD_SPKR_OUTL_N

AUD_SPKR_OUTR_N_CONN

MIN_NECK_WIDTH=0.3MMNET_SPACING_TYPE=AUDIO



AUD_SPKR_OUTL_P



=PP3V3_AUDIO

AUD_LI_DET_JACKMIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.2MM

=PP3V3_AUDIO


AUD_LI_GND_EMIMIN_NECK_WIDTH=0.3MM


AUD_LI_DET_HMIN_NECK_WIDTH=0.15MM


AUD_MIC_IN_P_EMIDIFFERENTIAL_PAIR=MIC_IN_EMI

AUD_MIC_IN_P_CONNDIFFERENTIAL_PAIR=MIC_INNET_SPACING_TYPE=AUDIO

AUD_MIC_IN_N_EMIDIFFERENTIAL_PAIR=MIC_IN_EMINET_SPACING_TYPE=AUDIO

AUD_MIC_IN_N_CONNNET_SPACING_TYPE=AUDIODIFFERENTIAL_PAIR=MIC_IN

GND_AUDIO_MICNET_SPACING_TYPE=AUDIO

AUD_LO_DET2_1

=PP3V3_AUDIO

AUD_LO_DET1

AUDIO_LO_DET_L

AUD_LI_DET_H

GND_AUDIO_MIC_CONN NET_SPACING_TYPE=AUDIO

AUDIO_LI_DET_L

AUD_LI_R_EMI



AUD_LI_DET_EMI

NET_SPACING_TYPE=AUDIOGND_AUDIO_MIC_EMI

DIFFERENTIAL_PAIR=AUDIO_MICNET_SPACING_TYPE=AUDIO

AUD_MIC_IN_N

AUD_LI_R


AUD_LI_LMIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.2MM

AUD_LI_GND


AUD_MIC_IN_PDIFFERENTIAL_PAIR=AUDIO_MICNET_SPACING_TYPE=AUDIO

AUDIO_LO_OPTICAL_PLUG_L

AUD_LO_DET1_1

AUD_SPDIF_OUT

PP5V_AUDIO_ANALOG

AUD_LO_L_EMI


AUD_SPKR_OUTL_N_CONN

MIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.3MMNET_SPACING_TYPE=AUDIO

AUD_SPKR_OUTR_P_CONN

NET_SPACING_TYPE=AUDIOMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.3MM

NET_SPACING_TYPE=AUDIOMIN_NECK_WIDTH=0.3MMMIN_LINE_WIDTH=0.5MM

AUD_SPKR_OUTR_N

AUDIO_SPKR_ID_CONN

AUD_LI_L_EMIMIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.2MM

AUD_LO_DET2

AUD_LO_DET2_EMI

AUD_SPDIF_GNDMIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.25MM

MIN_NECK_WIDTH=0.2MMPP5V_AUDIO_SPDIF_EMI


MIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.2MMAUD_LO_R_EMI

MIN_LINE_WIDTH=0.5MMAUD_LO_GND_JACK



AUD_LO_DET2_JACK

AUD_LO_DET1_JACKMIN_NECK_WIDTH=0.2MM

AUD_LO_R_JACKMIN_LINE_WIDTH=0.3MM

MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.3MMAUD_LO_L_JACK

AUD_SPDIF_OUT_JACK

MIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.2MMPP5V_AUDIO_SPDIF_JACK

12

12

12

12

12

11

11

11

11

11

10

12

10

12

10

10

10

12

12

5

11

5

11

5

5

12

5

8

11

3

3

3

11

8

8

8

8

11

3

11

10

10

10

3

3

3

11

11

2

3

11

4

11

4

12

6

6

6

12

4

5

3

10

11

3

Preliminary

IN OUT

SHDN*

GND

BP

TABLE_ALT_ITEM


TABLE_ALT_HEAD

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PLACE NEAR ENTRY TO SPEAKER

MICROPHONE IMPEDANCE MATCHING CIRCUIT

UNUSED GPIO TERMINATIONS

PLACE ACROSS GROUND SPLIT

AMP GROUND PLANE

PLACE ACROSS GROUND SPLIT

AUDIO GROUND RETURNS

APPLE P/N 353S0733

AT CODEC UE700

PLACE AT JF303

4.5V POWER SUPPLY FOR CODEC AND LINE IN AMP

MAX8510-4.5V

CRITICAL

SC70-5

3

51

2

4

VRF401

0.1UF

16V10%

603X7R

21

CF413

0.1UF

603

10%16VX7R

21

CF414

1/16WMF-LF402

1%1K

2

1RF423

MF-LF1/16W

100K

402

5%

2

1RF422

402MF-LF1/16W1%1K

2

1RF424

165

1%1/16WMF-LF402

21

RF419

25V

402X7R

10%1000PF

2

1CF412

402MF-LF1/16W1%

16521

RF420

10UF20%

SM-1

16VELEC

2

1 CF411

I116

NOSTUFF

805

0

5%1/8WMF-LF

21

RF429

1/8WMF-LF

5%

0

805

21

RF405

402

1/16WMF-LF

5%

47K

BOMOPTION=CPU_2_2GHZ

21

RF418

ELEC16V

SM-1

20%10UF

2

1 CF408

805

10%10VCERM

1UF

2

1 CF407

MF-LF

100K

402

1/16W5%

2

1RF403

16V

603

0.1UF

X7R

10%2

1 CF405

SM OMIT

21

XWF400

SM OMIT

21

XWF401

SM OMIT

21

XWF402

SM OMIT

21

XWF40350R28

1

XCF401

402

5%1/16W

47K

MF-LF

21

RF410

5%

47K

1/16WMF-LF402

21

RF413

MF-LF1/16W5%

47K

402

21

RF414

MF-LF1/16W5%

47K

402

21

RF415

MF-LF402

47K

5%1/16W

21

RF406

47K

MF-LF1/16W5%

402

21

RF407

MF-LF1/16W5%

47K

402

21

RF408

1/16W

47K

MF-LF

5%

402

21

RF409

402

47K

5%1/16WMF-LF

21

RF411

402

47K

5%1/16WMF-LF

BOMOPTION=CPU_2_0GHZ

21

RF412

I88

I89

NOSTUFF

100K

MF-LF1/16W

402

5%

21

RF404

805

10UF20%6.3VCERM2

1 CF404

805

0

1/8W

NOSTUFF

5%

MF-LF

21

RF416

0.01UF

CERM16V10%

4022

1 CF406NOSTUFF

MF-LF1/8W5%

805

021

RF417

PCM3052U9500353S0933353S0655


AUDIO: POWER SUPPLIESSYNC_MASTER=FINO-SO

051-6863

154 154

07

AUDIO_MIC_ID

AUD_4V5_FB=PP3V3_AUDIO

GND_AUDIO_MIC

NC_I2S2_MCLK

I2S0_MCLK

AUD_PCM_MBIAS

AUDIO_SPDIFIN_INT_L


AUD_4V5_SHDN*

GND_AUDIO_SPKRAMP

I2S2_SYNC

I2S2_BITCLK

AUDIO_LI_OPTICAL_PLUG_L

AUDIO_HP_DET_L

I2S2_DEV_TO_SB_DTI

TP_I2S2_SB_TO_DEV_DTO

I2S2_MCLK

AUD_CODEC_MCLK

I2S2_RESET_L

AUDIO_HP_MUTE_L

AUDIO_EXT_MCLK_SEL


I2S2_SB_TO_DEV_DTO

GND_AUDIO_CODEC

GND_AUDIO_CODEC

GND_AUDIO_CODEC

MIN_LINE_WIDTH=1MMMIN_NECK_WIDTH=0.6MMVOLTAGE=0V

GND_AUDIO_CODEC


VOLTAGE=0V

GND_AUD_LOAMP

AUD_MIC_IN_N

NET_SPACING_TYPE=AUDIODIFFERENTIAL_PAIR=AUDIO_MIC

AUD_MIC_IN_P

NET_SPACING_TYPE=AUDIODIFFERENTIAL_PAIR=AUDIO_MIC DIFFERENTIAL_PAIR=AUDIO_MIC_1

AUD_MIC_P1


DIFFERENTIAL_PAIR=AUDIO_MIC_2

AUD_MICIN_NNET_SPACING_TYPE=AUDIO

AUD_MICIN_P

DIFFERENTIAL_PAIR=AUDIO_MIC_2NET_SPACING_TYPE=AUDIO

AUD_MIC_M1

DIFFERENTIAL_PAIR=AUDIO_MIC_1NET_SPACING_TYPE=AUDIO



PP4V5_AUDIO_ANALOG

VOLTAGE=0V

GND_AUDIO_MIC


VOLTAGE=0V



MIN_LINE_WIDTH=1.0MMMIN_NECK_WIDTH=0.6MMVOLTAGE=0V

DIFFERENTIAL_PAIR=AUD_PWRNET_SPACING_TYPE=AUDIO

GND_AUDIO

=PP3V3_AUDIO


MIN_LINE_WIDTH=1.0MMMIN_NECK_WIDTH=0.6MMVOLTAGE=5VPP5V_AUDIO_ANALOG

DIFFERENTIAL_PAIR=AUD_PWR

GND_AUDIO_CODEC

12

12

12

12

12

12

12

11

8

8

8

8

11

8

10

12

10

6

6

6

6

12

10

11

6

5

11

MAKE_BASE=TRUE

MAKE_BASE=TRUE

10

3

MAKE_BASE=TRUE

11

5

5

5

5

8

6

11

8

3

5

8

5

2

3

2

2

4

5

4

2

2

4

4

4

4

4

4

5

4

4

4

3

4

2

2

2

2

2

11

11

5

5

5

2

2

2

3

3

2

Preliminary

8 7 6 5 4 3 2 1 fino m33 -...

Documents