University of PuneS.E. I.T.

Subject code: 214447

Part 02: Assembly Language Programming With 8086

Processor Architecture and Interfacing

Tushar B Kute,Sandip Institute of Technology and Research Centre, Nashiktbkute@gmail.com

Program Development

• Assembly Language Program Development

Example Code

DATA SEGMENT ;Data segment declarationMULTIPLICAND DW 341AHMULTIPLIER DW 20F4HPRODUCT DW 2 DUP(0)

DATA ENDSCODE SEGMENT

ASSUME CS:CODE, DS:DATASTART: MOV AX, DATA

MOV DS, AXMOV AX, MULTIPLICANDMUL MULTIPLIERMOV PRODUCT, AXMOV PRODUCT+2, DXINT 3

CODE ENDSEND START

8086 Instructions

• Data transfer • Arithmetic• Bit manipulation• String• Program execution transfer• Processor control

Data Transfer Instructions

• MOV• PUSH• POP• PUSHA• POPA• XCHG• XLAT

General

MOV Destination, Source

• MOV CX, 045FH• MOV BL, [43E4H]• MOV AX, DX• MOV DH, [BX]• MOV DS, BX• MOV RESULTS[BP], AX

PUSH Source

• PUSH BX• PUSH DS• PUSH TABLE[BX]

POP Destination

• POP BX• POP DS• POP TABLE[BX]

XCHG Destination, Source

• PUSHA• POPA• XLAT / XLATB

• XCHG AX, BX• XCHG AL, CH• XCHG AL, PRICES[BX]

Data Transfer Instructions• IN• OUT

• LEA• LDS• LES

• LAHF• SAHF• PUSHF• POPF

Simple IO port transfer

Special address transfer

Flag transfer

IN Accumulator, Port

• IN AL, 0C4H• IN AX, 34H

OUT Port, Accumulator

• OUT 3BH, AL• OUT 2CH, AX

LES Register, Memory addr of first word

• LES BX, [789AH]• LES DI, [BX]

LEA Register, Source

• LEA BX, PRICES• LEA BP, SS:STACK_TOP• LEA CX, [BX][DI]

LDS Register, Memory addr of first word

• LDS BX, [789AH]• LDS DI, [BX]

Flag Transfer Instructions

• LAHF [Load AH With Flags]

• SAHF [Store AH in Flags]

• PUSHF [Push flags on stack]

• POPF [Pop stack top to flags]

Arithmetic Instructions• ADD• ADC• INC• AAA• DAA• SBB• SUB• DEC• NEG• CMP

• AAS• DAS• MUL• IMUL• AAM• DIV• IDIV• AAD• CBW• CDW

ADD Destination, Source• ADD AL, 74H• ADD CL, BL• ADD DX, BX• ADD DX, [SI]

ADC Destination, Source• ADC AL, 74H• ADC CL, BL• ADC DX, BX• ADC DX, [SI]

INC Destination

• INC BL• INC CX• INC VARIABLE

AAA [ASCII Adjust Accumulator After Addition]

DAA [Decimal Adjust Accumulator After Addition]

SUB Destination, Source

• SUB CX, BX• SUB CH, AL• SUB AX, 4563H• SUB PRICES[BX], 04H

SBB Destination, Source

• SBB CX, BX• SBB CH, AL• SBB AX, 4563H

DEC Destination

• DEC AL• DEC BP• DEC VARIABLE

NEG Destination

• NEG AL• NEG BX• NEG BYTE PTR[BX]

CMP Destination, Source

• CMP AL, 01H• CMP BH, CL• CMP CX, TEMP_MIN• CMP TEMP_MIN, CX

AAS [ASCII Adjust Accumulator For Subtraction]

DAS [Decimal Adjust Accumulator For Subtraction]

MUL Source

• MUL BH• MUL CX• MUL BYTE PTR[BX]

AAM[BCD Adjust Accumulator After Multiply]

DIV Source

• DIV BH• DIV CX• DIV BYTE PTR[BX]

AAD[Binary Adjust Accumulator Before Division]

CBWConvert Signed Byte to Signed Word

CWDConvert Signed Word to Signed Double Word

Bit Manipulation Instructions

• NOT• AND• OR• XOR• TEST

• SAL• SHL• SAR• SHR

• ROL• RCL• ROR• RCR

Logical Shift Rotate

NOT Destination

• NOT BX• NOT BYTE PTR[BX]

AND Destination, Source

• AND BH, CL• AND CX, [SI]• AND BX, 00FFH• AND DX, BX

OR Destination, Source

• OR BH, CL• OR CX, [SI]• OR BX, 00FFH• OR DX, BX

XOR Destination, Source

• XOR BH, CL• XOR BP, DI• XOR DX, BX

TEST Destination, Source

• TEST BH, CL• TEST CX, [SI]• TEST BX, 00FFH• TEST DX, BX

SAL / SHL Destination, Count

• SAL BX, 01• SAL BP, CL• MOV CL, 04H• SAL AL, CL

1 0 1 1 0 1 1 10

B7 B6 B5 B4 B3 B2 B1 B0C

0 1 1 0 1 1 1 01

SHR Destination, Count

• SHR BP, 01• SHR AL, CL

1 0 1 1 0 1 1 1

B7 B6 B5 B4 B3 B2 B1 B0

0 1 0 1 1 0 1 1

0

C

1

0

SAR Destination, Count

• SAR DI, 1• SAR AL, 01

1 0 1 1 0 1 1 1

B7 B6 B5 B4 B3 B2 B1 B0

1 1 0 1 1 0 1 1

0

C

1

ROL Destination, Count

• ROL AX, 1• ROL BL, CL

1 0 1 1 0 1 1 10

B7 B6 B5 B4 B3 B2 B1 B0C

0 1 1 0 1 1 1 11

RCL Destination, Count

• RCL AX, 1• RCL BL, CL

1 0 1 1 0 1 1 10

B7 B6 B5 B4 B3 B2 B1 B0C

0 1 1 0 1 1 1 01

ROR Destination, Count

• ROR BL, 01• ROR AL, CL

1 0 1 1 0 1 1 1

B7 B6 B5 B4 B3 B2 B1 B0

1 1 0 1 1 0 1 1

0

C

1

RCR Destination, Count

• RCR BL, 01• RCR AL, CL

1 0 1 1 0 1 1 1

B7 B6 B5 B4 B3 B2 B1 B0

1 1 0 1 1 0 1 1

0

C

1

Program Execution Transfer

• CALL SQRT• CALL BX• CALL WORD PTR(BX)

CALL name of procedure

RET

Jump Instructions

• JMP label

Instruction Description (Jump if) ConditionsJA/JNBE Above/Below Not Equal C=0, Z=0JAE/JNB Above or Equal/ Not Below C=0, Z=1JB/JNAE Below/Not Above nor Equal C=1, Z=0JBE/JNA Below or Equal/Not Above C=1, Z=1JC Carry flag=1 C=1JE/JZ Equal / Zero Z=1

Jump InstructionsInstruction Description (Jump if) ConditionsJG/JNLE Greater/Not Less Than or

EqualC=O, Z=0

JGE/JNL Greater Than or Equal/Not Less Than

S=O

JL/JNGE Less Than/Not Greater Than or Equal

S≠O

JLE/JNG Less Than or Equal/Not Greater Than

S=O, Z=1

JNC No Carry C=0JNE/JNZ Not Equal / Not Zero Z=0

Jump InstructionsInstruction Description (Jump if) ConditionsJNO Not Overflow O=0JNP/JPO Not Parity/Parity Odd P=0JNS Not Sign S=0JO Overflow O=1JP/JPE Parity/Parity Even P=1JS Sign Flag S=1JCXZ CX is Zero CX=0

Iteration Control Instructions

Instruction Description Conditions for Exit

LOOP Loop through sequence of instructions

CX=0

LOOPE/LOOPZ

Loop through sequence of instructions

CX=0 or ZF=0

LOOPNE/LOOPNZ

Loop through sequence of instructions

CX=0 or ZF=1

Processor Control Instructions

• STC• CLC• CMC• STD• CLD• STI• CLI

External Hardware Synchronization

• HLT• WAIT• ESC• LOCK• NOP

Interrupt Instructions

• INT• INTO• IRET

References

• “Microprocessors and Interfacing” by Douglas Hall, Tata McGraw Hill Publishing.