95-2-semiconductor (1)

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    Introduction to

    Semiconductor Fabrication Process

    Yao-Joe Yang

    2

    Why I have to introduce semiconductor

    manufacturing process ?

    The most important industry in Taiwan

    Both IC and LCD use similar

    manufacturing concepts ME play the most important role in the

    field (process, equipment, automation,

    QC)

    The core of the hi-tech in the world

    The core of the recent technology

    revolution in human history

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    Integrated Circuits

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    ANALOG ADXL-50 ARCHITECTURE

    ~ 5 mm

    The cover picture of

    Micorelectronic Circuit

    by Sedra and Smith

    Accelerometer

    A classic example ofintegration of MEMS

    and electronic circuit

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    NovaSensor Accelerometer

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    MIT/AT&T Micro Motor (Circa 1989)

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    Optical Switch

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    Micro-robot

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    Packaged tactile array: (a) close-up of polyimidesensor array inserted into connector and (b) overview

    of tactile sensor, connector and PCB patterned to

    interface with card-edge connector.

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    Crystal Growth

    Yao-Joe Yang

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    Crystal Pulling: CZ method

    Graphite Crucible

    Single Crystal

    silicon Ingot

    Single Crystal Silicon Seed

    Quartz Crucible

    Heating Coils1415 C

    Molten Silicon

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    CZ Crystal Pulling

    Source: http://www.fullman.com/semiconductors/_crystalgrowing.html

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    CZ Silicon Ingots

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    Czochralski Growth Equipnment

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    Overview of Wafer Fabrication

    Yao-Joe Yang

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    Basic Wafer Fabrication Operations

    Layering form thin layer/film structures

    oxidation, CVD, sputtering, evaporation, epitaxy ..

    Patterning (patter transfer) trim layer/film to desired device size

    lithography, etching .

    Doping skip adjust layer/film/substrate electrical properties

    ion implementation, diffusion

    Heat treatment skip partially recover the damage after certain processes

    diffusion process, annealing .

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    Layering

    Adding (uniform) thin layers to wafer surfaces

    Methods

    Growing:

    oxidation (grow silicon oxide: SiO2)

    nitridation (grow silicon nitride: Si3N4)

    Deposition

    Epitaxy

    chemical vapor deposition physical vapor deposition

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    Layering

    In terms of final shapes, there are three types oflayering processes:

    Conformal

    Planar

    Stack (not traditional IC process)

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    Conformal

    original original

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    Planar

    original original

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    Stack

    (not traditional IC process)

    original original

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    Patterning

    A series of steps that remove unwanted

    patterns from substrate surface layers

    Patterns are defined byphoto-masks ( )

    Also known as: Photomasking, masking,

    lithography, photo-lithography, -lithography

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    Etching

    Layer 1

    Layer 2

    Layer 1

    Layer 2

    Photo-mask

    Example:

    Layer 1 is etched by an etchant

    Pattern is defined by photo-mask (etching mask is not shown)

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    FSG

    Metal 4 Copper

    Passivation 1, USG

    Passivation 2, nitride

    Lead-tin

    alloy bump

    FSG

    CopperMetal 2

    FSG

    FSG

    CopperMetal 3

    FSG

    P-epi

    P-wafer

    N-wellP-well

    n+STI p+ p+USGn

    +

    PSG Tungsten

    FSG

    Cu Cu

    Tantalum

    barrier layer

    Nitride etch

    stop layer

    Nitride

    seal layer

    M 1

    Tungsten local

    Interconnection

    Tungsten plug

    PMD nitride

    barrier layer

    T/TiN barrier &

    adhesion layer

    Tantalum

    barrier layer

    CMOS Chip

    with 4 Metal

    Layers

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    CMOS IC

    p-Si USGn-Si

    Balk Si

    Polysilicon

    STI

    n+ Source/Drain p+ Source/DrainGate Oxide

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    Overview of Patterning

    Yao-Joe Yang

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    Patterning

    Patterns transferred from photo-masks to

    thin-films on a planar substrate via

    lithographic process

    Example

    Step 1:

    Transfer patterns of photo-masks () tophotoresist () by lithography techniques

    Step 2:Use etchants () to etch unwanted portionof material defined by etching-masks.

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    Pattern Transfer:

    Example 1

    Spin-coating PR

    Photo-lithography

    alignment and exposure

    Development

    Etching

    Striping remaining PR

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    Example 2:

    Starting Material

    P-Well

    USGSTI

    Polysilicon

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    Example 2:

    Spin-coating PR

    P-Well

    USGSTI

    Polysilicon

    Photoresist ()

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    Example 2:

    Photo-Mask Alignment (using an aligner)

    P-Well

    USGSTI

    Polysilicon

    Photoresist

    Photomask ()

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    Example 2:

    Gate Mask Exposure

    Gate Mask

    P-Well

    USGSTI

    Polysilicon

    Photoresist

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    Example 2:

    Development

    P-Well

    USGSTI

    Polysilicon

    PR

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    Example 2:

    Etch Polysilicon (not finished yet)

    P-Well

    USGSTI

    PRPR

    Polysilicon

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    Example 2:

    Final Shape of Etched Polysilicon

    P-Well

    USGSTI

    Gate Oxide Polysilicon

    PR

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    Example 2:

    Strip Photoresist

    P-Well

    USGSTI

    Gate Oxide Polysilicon

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    Summary of a typical patterning procedure

    Spin coating photoresist (PR) on a wafer

    Mask alignment with the wafer using an

    aligner ( )

    Exposure of PR

    Development (remove unwanted PR)

    With the remained PR as etching masks, etch the

    wafer

    Striping the remaining PR from the wafer

    Patterning

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    Lithography

    Yao-Joe Yang

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    Optical

    X-ray (skipped)

    electron beam writer (skipped)

    non-traditional, no masks

    Types of lithography systems

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    Optical Lithography

    Photo-masks ()

    Interface between designers and devices

    Designers layout design (mask) on computers (2D patterns)

    opaque patterns (chromium) on transparent glass (fused

    silica)

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    Photomasks ( )

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    Photoresist

    Photoresist (PR, )

    Optical resists:

    photosensitive polymers

    PR is coated on the whole

    substrate surface using spin-

    coater

    Positive PR:

    can be removed by KOH orNaOH solution if it is exposed

    most popular for IC process

    Negative PR:

    can be removed by specificsolution if it is not exposed

    not good for feature size < 3 um

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    Aligners

    Alignment and exposure systems

    ()

    A microscopic system which:

    Align the photo-mask and the substrate

    Expose PR

    Also called:

    printers

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    Classification of aligners by exposure methods

    Contact printer ()

    High resolution ( 1m)

    Mask deterioration

    Proximity printer ()

    10 - 25 m gap --> longer mask life

    Diffraction effect --> 2 - 4 m resolution

    Projection printer ()

    Image of mask usually reduced

    Scanning or stepping of small field (~ 1cm)

    VLSI standard (0.25 m possible with deep-UV source)

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    Schematics of Exposure systems

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    Contact Printer

    Light Source

    Lenses

    Mask

    PhotoresistWafer

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    Proximity Printer

    Light Source

    Lenses

    Mask

    PhotoresistWafer

    ~10 m

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    Light Source

    Lens

    Mask

    Photoresist

    Wafer

    Scanning Projection System

    Synchronized

    mask and wafer

    movement

    (stepper)

    Slit

    Lens

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    Lithography

    Karl Suss Contact Aligner stepper

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    Light sources ()

    Visible light

    Ultraviolet (UV)

    Deep ultraviolet (DUV)

    Extreme ultraviolet (EUV)

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    Coating of Photoresists

    Spinning coating

    Final thickness of photoresist is a function of rotating speed.

    Relationship has been calibrated and formed a look up table

    Thickness1

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    Photoresist Spin Coating

    Spindle

    To vacuumpump

    PR dispensernozzle

    Chuck

    PR suck back

    Wafer

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    Photoresist Spin Coating

    Spindle

    To vacuumpump

    PR dispensernozzle

    Chuck

    PR suck back

    Wafer

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    Coater ( )

    Spin coater