A GaN HEMT Driver IC with Programmable SlewRate and Monolithic Negative Gate-Drive Supply

and Digital Current-Mode ControlM. Rose1, Y. Wen2, R. Fernandes2, R. Van Otten1, H.J. Bergveld1 and O. Trescases2

1NXP Semiconductors, Eindhoven, The Netherlands2University of Toronto, Toronto, Canada

Tel: (+31 6 229 29 652), Email: matthias.rose@nxp.com

Abstract— This work presents an intelligent driver IC for400 V GaN-based Power Factor Correction (PFC) applications.The targeted power level of the converter is 100 W, with aswitching frequency above 500 kHz. The IC was implemented ina 140 nm automotive BCD SOI process, while the GaN HEMTand Schottky diode were optimized in a Si-fab compatible GaN-on-Si process. A low-Ron DMOS is integrated in the driver ICto achieve high-speed cascode switching operation. The chipalso features a novel dual-mode drive scheme with monolithicnegative drive voltage capability and programmable slew rate, aswell as a digital peak current-mode controller. Advanced digitalPFC control schemes can therefore be implemented, while EMCperformance and efficiency can be optimized through active slopecontrol.

I. INTRODUCTION

Gallium Nitride (GaN) power devices are leading to a tech-nological revolution in power electronics by offering higherpower density through increased switching frequency andreduced switching losses. The depletion-mode GaN High-Electron-Mobility Transistor (HEMT) structure, as shown inFig. 1, has been widely used with a series-connected sil-icon MOSFET to achieve normally-off behavior in a cas-code structure. While 600 V enhancement-mode GaN deviceshave been demonstrated [1], depletion-mode GaN HEMTsare typically superior in intrinsic performance and cheaperto fabricate. The attractive benefits of depletion-mode GaNHEMTs, used in the cascode configuration, are motivatingnumerous research efforts in high-frequency switched-modepower converter applications such as Power Factor Correction(PFC) boost converters [2], [3], LLC resonant converters [4]and Dual Active Bridge bidirectional DC-DC converters [5].This work presents an intelligent driver IC that is specificallyoptimized for depletion-mode GaN HEMTs. The GaN driverIC and one targeted PFC application are shown in Fig. 2. Theproposed silicon BCD IC consists of

• the low-Ron silicon DMOS to form the cascode switchstructure together with the GaN HEMT,

• gate drivers to control the GaN HEMT and the siliconDMOS separately and

• basic control functionality required for digital current-mode control.

The driver IC is packaged with a depletion-mode GaN HEMTto minimize the interconnect parasitics and is suitable for400 V GaN-based PFC applications. The targeted power levelof the converter is 100 W, with switching frequencies above500 kHz.

Fig. 1. Cross section of a GaN HEMT. NXP GaN-on-Si process technologyuses Ti/Al-based ohmic contacts and Ni-based Schottky contacts. The GaNdevices used in this work are manufactured in NXP’s standard production fab.

EMI

Filter

Vgrid

Vrect

Mn

Mh

Package

BCD IC

Current-Mode

Control

iL

GaNLoad

+

Vref

AD

C

AD

C

Vrect

Digital PFC

Controller

Serial Interface

Cc

Cdr

Fig. 2. Targeted PFC application for the GaN driver IC.

II. IC ARCHITECTURE AND DIFFERENTIATING FEATURES

The IC was implemented in a 140 nm automotive BCDSOI process, while the GaN HEMT and Schottky diode wereoptimized in a Si-fab compatible GaN-on-Si process. A low-Ron DMOS is integrated in the driver IC for high-speedswitching cascode operation; however, unlike the state-of-the-art GaN drivers [6], [7], the chip also features a noveldual-mode drive scheme with fully integrated negative drivecapability and a programmable slew rate. Unlike [6], the ICdoes not require any external components to generate thenegative drive voltage. The peak of the inductor current,iL(t), can be digitally controlled throughout the AC line

cycle using a combination of the on-chip 10-bit Digital-to-Analog Converter (DAC) and the high-bandwidth closed-loopsenseFET-based (Msense) current sensor, as shown in Fig. 3.A high-speed amplifier is used to equalize the drain voltageof Msense, Vsense, with the sampled drain voltage Vxns. Thesensed current in Msense is mirrored into a current-modecomparator. The reference for the comparator is set by aflash-based current-mirror DAC, whose input is derived fromthe serial interface. The current-sensor output is designed totrack iL(t) within 40 ns of the turn-on transient, as shown inFig. 4. The use of the cascode structure is inherently usefulfor current-mode operation, as the low-voltage cascode deviceshields the sensor from high voltages on the HEMT drainnode. Advanced digital PFC control schemes adapted for DCMand CCM operation, such as [8] and [9] respectively, cantherefore be implemented using a serial interface to set thetarget inductor peak current on a cycle-by-cycle basis, withoutthe need for digitally sampling the inductor current, iL(t).The EMI performance and efficiency can be optimized throughslope control, as described in the following section. Since thedriver was implemented in a deep submicron 140 nm BCDprocess, the complete digital controller logic can easily beintegrated in the future.

D

GM

GH

PWM

GaN

S

VX

VxnVDRV

Mn

ZD

D1

iDACiDAC[n]

+ -

+

-

current input

comparator

Msense

Vse

ns

e

Vxn

s

S

RQ

CLK

VDD

GMOS

Current-Mode Control

Cascode-Driver

blanking

Si Driver IC

Fig. 3. Driver architecture in Cascode-Drive mode with peak current-modecontrol.

iL

Vx

Vxn

Vxns

Vsense

Fig. 4. Simulated closed-loop senseFET-based current sensor response; Vxns

tracks Vsense within 40 ns of turn-on.

III. DRIVER OPERATING MODES

The driver operates in two distinct modes: Cascode-Drive(CD) mode and HEMT-Drive (HD) mode, as shown in Figs. 3and 5, respectively. In CD mode, the PWM signal controls thegate of the 130 mΩ, 20 V DMOS, Mn, while the gate of theHEMT, Mh, is connected to the source of Mn. A 10 V Zenerdiode, ZD, prevents breakdown of Mn. This mode achieves thehighest switching frequency and dv/dt at Vx, especially sinceMn and its driver are integrated on the same die. In HD mode,Mn stays on while the PWM signal drives the gate of Mh, asshown in Fig. 5. The turn-off of Mh, which has a thresholdvoltage of -1.5 V, is achieved by using a negative drive voltageof -3.3 V. The negative voltage generator used in HD modeis based on a fully-integrated inverted bootstrap scheme. Thebootstrap capacitance, Cboot = 2 nF is fully integrated. This isonly possible due to the low gate charge of Mh. Since Mh hasa Schottky gate structure with a leakage current in the rangeof 20 µA at VDS = 400 V, the driver also includes a high-frequency charge pump circuit to replenish Cboot, as shown inFigs. 6 and 7. The charge pump operates at a high frequencyof 8 MHz, which can be controlled using the serial interface.The charge-pump circuit guarantees turn-off capability evenunder static conditions. For added reliability, Mn is turned offby an Under-Voltage-Lock-Out (UVLO) block if Cboot getsdischarged in fault conditions.

D

GM

GH

GMOS

Cslope

Cboot

Charge pump

GaN

S

Current controliDAC

current-source gate driver

VDD VDD

DRV

MP0

MN0MN1

MP1

UVLO

Vx

!"#

$%&!'

()*+%

Mh

Mn+

VDD VDD

GHVDD=3.3 V

VDD

Fig. 5. Driver architecture in HEMT-Drive mode and negative voltage supply.A UVLO keeps Mn off until the negative supply is established.

VDD

Cboot

VSS

GH

DRV

Q1 Q3

++

Ccharge

Q2 Q4

+

3.3V

-

0

3.3V

-3.3V

0

Q5

Q6

Fig. 6. Charge pump used to supply the gate current of Mh under staticconditions in HEMT-Drive mode.

VDD

Cboot

VSS

GH

DRV

++

Ccharge

VDD

Cboot

VSS

GH

DRV

++

Ccharge

0

3.3V

1) HEMT 'on' 2) HEMT 'off' - Phase 1 3) HEMT 'off' - Phase 2

-3.3V

0

1) 2)

VDD

Cboot

VSS

GH

DRV

++

Ccharge

0

-3.3V

3)

Fig. 7. Charge pump states in HEMT-Drive mode.

In HD mode, the slew rate at Vx is controlled with asmall external capacitor, Cslope, and a digitally programmablecurrent-source gate driver, as shown in Fig. 5, since dVx/dt =IDRV /Cslope. The current-source-based gate driver has adigitally programmable drive current that enables indepen-dent control of the rising and falling edges. The externalcontroller can transition dynamically between HD and CDmode depending on the EMI requirements. This offers theflexibility to optimize the trade-off between efficiency and EMIperformance in the application. The current-mode controller,as shown in Fig. 3, operates the same way in both modes,although in HD mode, Mn remains on and serves as a current-sensing resistor.

Fig. 8. Leakage versus VDS for GaN devices.

IV. EXPERIMENTAL RESULTS

The GaN HEMT has a measured leakage current of1 µA/mm and a RonA of 2.5 mΩ·cm2 [10], as shown inFigs. 8 and 9. The packaged 570 mΩ GaN HEMT and driverIC, as well as the driver IC layout, are shown in Fig. 10.The switching waveforms in CD mode are shown in Figs. 11and 12. In CD mode, the drain of Mn, Vxn, is clamped to 10 Vwhen Mn is turned off, as designed. The switching waveformsin HD mode are shown in Fig. 13. In HD mode, Mn remains

Fig. 9. Specific on-resistance versus breakdown voltage for Si, SiC and GaNdevices.

on and Vxn remains zero. The GaN HEMT Mh is activelyswitched by the gate driver. The drain fall-time during turn-onis 3 ns in CD mode, and ranges between 6-20 ns in HD modeusing active slope control (which is configurable through SPI),as shown in Fig. 14. The measured driver output in HD modeis shown in Fig. 15, demonstrating the negative drive operationof the inverted bootstrap circuit.

Fig. 10. Packaged GaN HEMT with driver IC and driver chip micrograph.The driver die measures 1.4 x 2 mm2.

iL

Vx

Vxn

2 µs

Fig. 11. Measured Cascode-Drive mode switch waveforms in DCM(CH4: 0.5A/div, Vrect = 50 V, Vbus = 200 V).

iL

Vx

Vxn

2 µs

Fig. 12. Measured Cascode-Drive mode switch waveforms in DCM(CH4: 0.5A/div, Vrect = 100 V and Vbus = 200 V).

iL

Vx

Vxn

2 µs

Fig. 13. Measured HEMT-Drive mode switch waveforms in DCM(CH4: 0.5A/div, Vrect = 50 V and Vbus = 200 V).

Vx (Cascode-Drive)

Vx (HEMT-Drive)

Vx (HEMT-Drive)

fast setting

slow setting

10 ns

Fig. 14. Turn-on switching speed comparison of the Cascode-Drive andHEMT-Drive modes with two different slew rates.

V. CONCLUSION

The dual-mode driver presented in this work offers theflexibility needed for a wide variety of high-frequency hard-and soft-switching power converter applications. HEMT-Drivemode is particularly important in hard-switching applicationswhere digitally programmable slope control is important forEMI considerations. The monolithic negative supply generatorwas successfully demonstrated. The on-chip DMOS allows

GH

G

2 µs

Fig. 15. Measured HEMT-Drive mode switching waveforms demonstratingthe -3.3 V gate swing.

fast turn-on, in excess of 20 V/ns, in Cascode-Drive mode,and allows for accurate digital peak current-mode controlusing the senseFET approach. Further work is required todemonstrate the driver IC’s performance in a high-frequencyPFC application.

ACKNOWLEDGMENT

This project was supported by NXP Semiconductors, theNatural Sciences and Engineering Research Council of Canadaand the Canada Foundation for Innovation.

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