ads2009 high frequency and high speed co-design platformtech.mweda.com/download/hwrf/ads/ads-1-ads...

Agilent ConfidentialDeveloped Feb 20091

ADS2009 High Frequency and High Speed

Co-Design Platform

Board

Package

Chip


Agenda

1. Co-Design, What is it?

– Case Study: RFIC differential power amplifier

2. Complete Co-Design for 4G LTE application

– Ptolemy system level co-design– X-Parameters– Integrated 3DEM– ADS/EMPro Co-Design for Improving Handset Performance

3. Summary


Co-Design, Why is it?- The Trends in High Frequency and High Speed Electronic Designs

Market pressures in consumer wireless electronics are driving exponential growth in functionalities that must be integrated into the same sized and same priced packages.

• Much closer proximity, embedded passives – increased parasitics, couplings• Multichip modules, and stacked die become more common - forcing IC,

package, and board designers to work together more closely• Multiple available technologies are integrated onto the PCB as shown

instead of designing all onto an IC

Chip/package/module/board co-design from the beginning of design process is inevitable!

Board

PoP

Chips

SMDSiPRF SiP

Packages

Motivation for Co-Design: Reducing risk of designing in isolation

4

Risk increases when more components are integrated 90% x 90% x 90% = 73% chance of integration success

90% success

90% success

90% success

IC Design Module Design Board Design


Another View of Co-Design

DR1 DR2 DR3 DR4

DR1 DR2 DR3

DR1 DR2 DR3 DR4 Inte

grat

ion

Project Start

Sequential Design Process

DR1 DR2 DR3 DR4

DR1 DR2 DR3

DR1 DR2 DR3 DR4

Don

e

Project Start

Con-current Co-Design Process

Don

e

OK?Y

N

Ex: EEsof Build Process


Chip/Pkg/Module/Board Co-Design Case StudyRFIC Differential Power Amplifier Test Board

Single Ended PA Input

Single Ended PA Output

LTCCBalun

Package

Bondwires

LTCCBalunSi

PA

PCB


Let’s Prove Whether The Integration WorksRFIC PA + Balun

RFIC PA, integrated with Ideal and LTCC Balun, meets the performance goals

Ideal to LTCC BalunSpectre Netlist

Spectre Compatibility

Blue: Ideal Balun Red: LTCC Balun


Let’s Prove Whether The Integration WorksFinal Integration of Balun + RFIC PA + Package


Unexpected or Unpredicted Parasitic Resonance Caught in Last Minute Final Integration Test!Unexpected parasitic resonance around 1.7GHz

How will this unexpected or unpredicted behavior impact on the development schedule?

S21 S12

S21 S12

S11 S22


Last Minute Design Failure Could Impact Greatly on Design Wins and Time to MarketWhat if, this is a design failure to meet the spec?

So, will you re-spin the chip? $$$ & TTM

Or re-spin the package? $$$ & TTM

Or bandage the design or just blame others?

Ground Through

W/B

Typical grounding problem with RFIC


Agenda

1. Co-Design, What is it?

– Case Study: RFIC differential power amplifier

2. Complete Co-Design for 4G LTE application

– Ptolemy system level co-design– X-Parameters– Integrated 3DEM– ADS/EMPro Co-Design for Improving Handset Performance

3. Summary


Designing for The Single Goal, LTE

RFIC

MMIC

Package

LTCC BalunLTCC LPF RF Power Amp

RF LNA

Duplexer

S1 S1

S1 S1X2X2

LTE

Board DesignIC Design

Pkg Design

Module Design

PDFMIMO Ant

Ant Design


Why Not Verify and Test The Designs Against The Targeted System, LTE As realistic as possible!

As harsh as possible!

We want every circuit, component, even for sub-system designer to use ADS Ptolemy to verify and test their designs under a true co-design environment

So don’t over or under-design circuits, components, or even sub-systems


System Design – LTE Front-End Co-Design

Ptolemy system level co-design allows designers to

• Find problems that will degrade the system’s performance• Reduce risks inherent in making RF hardware work within a PHY

– Optimize RF HW to work well with PHY baseband algorithms and HW

Why choose LTE? Why does LTE need Co-Design?

• 3.9G on to 4G standard in same small form-factor to co-exist with existing 2G-3G HW – multiplies the risk

• Challenging RF HW design due to modulation, multiple bands, MIMO, power

ADS2009 has LTE library that is fully framed and coded, supports TDD mode, same algorithms as instruments with full MIMO Tx/Rx and can demodulate faded MIMO channel

SystemSystem

Board Integration &Design

IC Design

Package/Module Design

ADS 2009 front-end Co-Design infrastructure

1. Simulation platform for multi-technology

– Faster, higher capacity multi-threaded simulators– Acceleration with graphics processors– Parallel simulation on compute clusters– Intelligent algorithms for increased capacity and accuracy

2. Model support for multi-technology

– X-parameters non-linear models from measurement– 3D electromagnetic components for package,

antennas, shields– Behavioral & transistor level models– Netlist compatibility with HSPICE and Spectre– Signal stimulus data to and from instruments

3. Interoperability with back-end co-design platforms from Cadence and Mentor

15


Create candidate architecture

Validate frequency plan

Analyze for noise, spurs, leakage

Validate Tx, Rx w/behavioral models, generate component

specs

Replace behavioral models with

component designs

Re-validate each change w/LTE test

benches

Trade-off and optimize components, add

packages, modularize

Re-validate w/LTE test benches

Perform validation of final design;

substitute measured

components as they become

available

Spectrasys, WhatIF

• Ptolemy•LTE Wireless Library•Circuit Envelope Co-Simulation• Simulation consistent with Agilent VSA/Instruments

• Integrated 3D EM• 3D Components• Antenna Modeling

•X-Parameters•Connected Solutions

= Lockout

SystemSystem

LTE Front-End Co-Design Flow and Enabling Technologies


SystemSystem

LTE Architectural Design – SpectraSys and WhatIF

Spectrasys root-cause analysis capability accounts for all frequencies at all nodes as well as all mismatches and all possible signal or leakage paths across any arbitrary

WhatIF for frequency planning

• Finds Tx, Rx or Tx/Rx spur-free zones, spurs near desired IF or RF


Create candidate architecture

NodeNames Parts ( ) CF (MHz) CP (dBm) GAIN (dB) CGAIN (dB) COMP (dB) CNP (dBm) CNF (dB) CNDR (dB) SDR (dB) ECGAIN (dB) ECNF (dB)

1 TxSource 220 -0.366 0 0 0 -101.151 0 100.785 100.366 0 0

9 TxIFBPF 220 -8.421 -8.054 -8.054 0 -101.151 8.054 92.73 108.421 -8 8

15 TxIFAmp 220 -2.427 5.993 -2.061 3.407e-3 -91.55 11.662 61.329 20.278 -2 11

14 TxMixer 1880 -10.535 -8.109 -10.17 0 -96.033 15.288 27.991 110.531 -2 11

12 TxBPF1 1880 -12.542 -2.007 -12.176 0 -97.274 16.053 28.003 112.542 -4 11.309

6 TX_Driver 1880 3.939 16.481 4.305 9.343e-3 -79.136 17.71 27.988 16.041 12.5 12.046

11 Tx_PA 1880 23.472 19.519 23.824 0.241 -59.588 17.74 23.144 1.908 32.5 12.061

16 TxCoupler 1880 23.072 -0.4 23.424 0 -59.988 17.74 23.144 76.285 32.1 12.061

Target PoutCorrect Gain from Spectrasys Simulator

• “Traditional Spreadsheet” Gain is 9 dB too high – will cause miss-specification and force a re-spin

• Avoid unnecessary over-specification causing design delays and increased component costs

Spreadsheet

SystemSystem

Spreadsheets Enough? – Toxic Approximation

19Agilent Confidential

Circuit/System/EM Co-Simulation Co-Validates Candidate System to LTE Specs

19

Validate Tx, Rx w/behavioral models, generate component

specs

Fully framed and coded, bit accurate LTE UL source; set frequency and power

LTE measurements use same algorithms as Vector Signal Analyzer / Instruments

Circuit-Level Components in Uplink:

1. Gilbert Cell Mixer

2. PC Board Amps

3. LTCC Low-Pass Filter

4. X-Parameter Driver Amp

5. Packaged MMIC PA

6. Tunable antenna match

1

2 34

5

Replace behavioral models with component designs

2

6


Breath and Depth of ADS Co-Design LTE Transmitter Sub-System Test Bench

Board AMP

LTCC LPF

RFIC

MMIC

Antenna

LTE CoLTE Co--DesignDesign


Real Time Ptolemy Co-simulation with VSA for TX


Agilent ConfidentialDeveloped Feb 200922 August 18, 2009Confidentiality Label

22

S11 < -15 dBS22 < -15 dBGain > 20 dB

LTE SPECSTransmitter Pout = 23 +/- 2 dBmPA Pout = 24.5 +/- 2 dBmDuplexer + Coupler loss 1.5 dB

MMIC DFN PackageX-Parameters Driver Amp MMIC PA Amp

MMICMMIC

Chip/Package Co-Design in MMIC PA


Completed MMIC PA with DFN Package + Bondwire

True MMIC Design Verification prior to Manufacturing is done by Co-simulating the MMIC inside the package and with bond wires using 3D EM simulation in ADS

MMICMMIC


24

A slight drop in gain (.12 dB) is due to the bond wire and Package effects.

S21 Spec> 20 dB

S21 Spec> 20 dB

MMICMMIC

MMIC PA Verification With/Without Package+Bondwires

LTE Wireless library Verification in ADS

August 18, 2009Confidentiality Label25Confidentiality Label

ADS•True Circuit Level Co-Simulation with Fast Verification modeling (AVM)•CE ties the circuit with Ptolemy•Able to optimize for ACPR, EVM…•Accounts for the Frame structure•Identical to the real Wireless signal•True and Accurate verification

LTE Wireless library Verification in ADS

August 18, 2009Confidentiality Label26Confidentiality Label

Gating ON

Gating OFF Gating ON

Gating OFF

Gating ONGating OFF

Gating ON

Gating OFF

Gating “ON” on a typical wireless signal; “Measures on the burst”Fully compliant with wireless stds

ADS

Gating is “OFF”Not accurate & not compliant with wireless standards

Other EDA Tools


Simple Simulation Based X-Parameter Extraction in ADS 2009

August 18, 2009Confidentiality Label

27

X Parameters in ADS

1. Insert X Parameter template which is already setup for the extraction.

2. Connect your DUT.

3. Modify Power levels and frequencies as needed.

4. Simulate.

XP_SourceXPTerm1Num=1

XP_LoadXPTerm2Num=2

XP_BiasXPTerm3Num=3

AmpAmp1

X-Parameters

X_ParamXP1Freq[1]=1 GHzZ0=50 Ohm

In ADS 2009, you will be able to create simulation based X Parameters for your circuits.

You can then use these X parameters in X-Parameter model to do higher level simulations to understand more about your design.

XX--ParaPara


Parameters that capture non-linearties of amplitude and phase at specified harmonics

Extracted either from measurement or simulation

• Easy extraction of parameters based on automated NVNA• New devices, for example GaN, with inaccurate models can be easily characterized• Drag and Drop-in ADS X-Parameter models

August 18, 2009Confidentiality Label

28

Confidentiality Label

NVNANVNAMeasures X-Parameters

MDIF File

PHD model generation for ADS

Tuners that covers all regions on the Smith Chart (all Impedances)

Cable / connectors

Load Pull TunerSource Pull Tuner

ADSADS

What are X-Parameters?XX--ParaPara

X-Parameters SeminarFeb. 2009

LSOP In Our Example

5.0E8

1.0E9

1.5E9

2.0E9

2.5E9

3.0E9

3.5E9

4.0E9

4.5E9

5.0E9

5.5E9

0.0

6.0E9

-250

-200

-150

-100

-50

-300

0

indep(dB(A1))

dB(A

1)

indep(dB(a1))

dB(a

1)

5.0E8

1.0E9

1.5E9

2.0E9

2.5E9

3.0E9

3.5E9

4.0E9

4.5E9

5.0E9

5.5E9

0.0

6.0E9

-250

-200

-150

-100

-50

-300

0

indep(dB(B1))

dB(B

1)

indep(dB(b1_S))

dB(b

1_S

)

indep(dB(b1_T))

dB(b

1_T)

5.0E8

1.0E9

1.5E9

2.0E9

2.5E9

3.0E9

3.5E9

4.0E9

4.5E9

5.0E9

5.5E9

0.0

6.0E9

-250

-200

-150

-100

-50

-300

0

indep(dB(B2))

dB(B

2)indep(dB(b2_S))

dB(b

2_S

)indep(dB(b2_T))

dB(b

2_T)

5.0E8

1.0E9

1.5E9

2.0E9

2.5E9

3.0E9

3.5E9

4.0E9

4.5E9

5.0E9

5.5E9

0.0

6.0E9

-250

-200

-150

-100

-50

-300

0

indep(dB(A2))

dB(A

2)

indep(dB(a2))

dB(a

2)

5.0E8

1.0E9

1.5E9

2.0E9

2.5E9

3.0E9

3.5E9

4.0E9

4.5E9

5.0E9

5.5E9

0.0

6.0E9

-100

-80

-60

-40

-20

0

-120

20

indep(dB(I3))

dB(I3

)

indep(dB(i3_S))

dB(i3

_S)

indep(dB(i3_T))

dB(i3

_T)

5.0E8

1.0E9

1.5E9

2.0E9

2.5E9

3.0E9

3.5E9

4.0E9

4.5E9

5.0E9

5.5E9

0.0

6.0E9

0

5

10

15

-5

20

indep(dB(V3))

dB(V

3)

indep(dB(v3_S))

dB(v

3_S

)

indep(dB(v3_T))

dB(v

3_T)

x_1_AmpDUTAmp1

VCC

RF outRF in

Input incident

Input reflected

Output incident

Output reflected

Voltage @ DC-bias port

Current @ DC-bias port


30

Breakthrough Non-Linear X-Parameters

Value for Co-Design: • PA vendors can offer X-parameters to the system integrators such as mobile phone

manufacturing companies for an evaluation from the early stage of design process• PA vendors can protect the design IP (Intellectual Property)

XX--ParaPara

System Integrators

IC Design Houses

Existingparts

New Designs


Only ADS can test this 2X2 MIMO configuration for the one performance spec that really matters: BER/PER with channel fading

Perform validation of final design; substitute measured components as they become

availableDual handset antennas with correlation, from EMPro FDTD

SystemSystem

Validate Candidate Rx in MIMO Configuration


Breath and Depth of ADS Co-Design Receiver Sub-System Test Bench

LTCC BalunRFIC

Board LNA



Real Time Ptolemy Co-simulation with VSA for RX



Breath and Depth of ADS Co-Design LTE Top Level System Test Bench

Entire system simulation that includes Tx, Channel, and Rx

Fully framed and coded, bit accurate LTE UL source; set frequency and power

LTE measurements use same algorithms as Vector Signal Analyzer / Instruments



Real Time Ptolemy Co-simulation with VSA for Whole System


Integrated 3D EM is the Key to Co-Design

Integrated 3D EM is essential technology to Co-Design as demonstrated

Integrated 3D EM also saves cycle time on the EM front-end process

Reducing “EM front-end process”, the process from entering the design geometry to being ready for the simulation, could save hours of simulation setup time (1hr +) and also on CAD resources

Non-Integrated EM Flow Integrated EM Flow

3DEM3DEM


3DEM Co-Design With FlipChip IC Packaging

Our value: Greatly reduce the risk that comes with the final integration by co-designing the circuit, package, and board interface together. Create 3D components, like solder bumps (with EMPro UI) and use them in ADS to get the most accurate prediction of the overall behavior.

Application Area: Package/Board interface with Solder Bumps

E-field plot

Multiple E field plot

3D Component3D ComponentGenerated withGenerated with

EMPro 2008EMPro 2008

3DEM3DEM


3DEM Co-Design With RF/MMIC QFN Packaging

Top View Board Microstrip Feed

Double Bonding Wires

Microstrip Line on ThinFilm Substrate

Board

Chip

dB(S21)dB(S11)

Cyan & Dark Green: Original Design

Improved Package Transition

3DEM3DEM


3DEM Co-Design With Mechanical Shield

Shield ADS 3D component Frequency

Response Shift

Parasitic Resonancedue to bad grounding

No more approximation! What you see is what you get (WYSIWYG)

Our value: RF Designers can create EM shielding in minutes – No need to waste time redraw difficult 2-D layout, set up layers, material parameters, ports, boundary conditions, etc. in standalone 3DEM tools just to see what happens when you place a shield on top.

3DEM3DEM

Agilent ConfidentialDeveloped Feb 200940Confidentiality Label

August 18, 200940

ADS/EMPro Co-Design for Improving Handset Performance Adaptive Antenna Matching

Co- Design using EMPro – ADS

Co-Design and Optimization of Switched WLAN antenna using EMDS G2, Momentum G2 & Circuit Simulation

Calculate Antenna Diversity for Use in LTEMIMO Channel Simulation Using EMPro & Ptolemy

AntennaAntenna


August 18, 200941

Co-Design with Adaptive Antenna Matching

Tuning Network

Adaptive BST

VSWR block

Time Switch Between 2 Antenna Configurations

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.90.0 1.0

2

4

6

8

10

12

14

0

16

time, usec

Vdc

_ Tu

ne (V

)

9.0E8

1.0E9

1.1E9

1.2E9

1.3E9

1.4E9

1.5E9

1.6E9

1.7E9

1.8E9

8.0E8

1.9E9

1.52.02.53.03.54.04.55.0

1.0

5.5

Freq_sweep

VSW

R

Tuning Time Const

VSWR

-600 -400 -200 0 200 400 600-800 800

-360

-340

-320

-300

-280

-380

-260

freq, KHz

dB(fs

(Vfw

_cou

pler

[1],,

,,,"K

aise

r"))

dB(fs

(Vbw

_cou

pler

[1],,

,,,"K

aise

r"))

GSM_antenna Signal

AntennaAntenna

BST


August 18, 200942

EMPro Antenna Diversity calculations and MIMO System Simulations

Solve The Multiple Reflection Problem For Increased Bandwidth

EMPro Assures Antenna Diversity In All Environments

Indoor Environment

PDF

Outdoor Environment

PDFMIMO Antennas

AntennaAntenna

ADS 2009 enables frontend Co-Design with:Momentum G2 Planar 3DEM• Improved meshing • Improved resistance modeling• Port re-sequence for easy S-Parameter

interpretation• Substrate stack driven viewing utilities• Enhancements to Broadband Spice Model

Generator for passivity and causality

Physical Layout• DRC for Flattened Layout• DRC 3rd-party integration (Assura, Calibre,

MailDRC)• PDK Builder for Schematic• Enhanced layout and SMT connectivity transfer

from Allegro PCB, APD and SIP

Usability• AEL Debugger for ADS customization• Data Display snap-to-grid alignment• New 50 ADS examples• Direct drawing of pass-fail limit lines on plots• Fast variable setup tab for statistics and DOE

simulation

Signal Integrity• Channel Simulator• GPU Accelerated Transient Simulator• New, fast eye diagram measurements• Djordjevic loss model for fast, causal

multilayer models• Causality-corrected microstrip and

stripline models• Threaded impulse characterization for

faster convolution

Simulation• Support HSPICE .pat statement• Arbitrary Jitter Analysis• Multi-threaded harmonic balance• Improved Passive Circuit Design Guide• Wireless Libraries (WiMedia v1.2, 3GPP/

LTE MIMO v8.3.0 & v8.4.0)• Pole-zero custom frequency-dependent

voltage and current sources

EMDS G2 full 3DEM• 3D parameterized components• Improved mesher and solver• Fast frequency sweep for iterative solver• Symmetry planes

43

SummaryADS 2009 enables front-end Co-Design with:

1. Multi-Technology Simulation Platform

• Multi-threading

• Acceleration

• Channel Simulator

• LTE, Wimax, WiMedia verification libraries

2. Multi-technology Model Support

• X-parameters

• 3D EM integration

3. Interoperability with backend design platforms

Mounted on Board

IC Design

Packaged IC

44

专注于微波、射频、天线设计人才的培养易迪拓培训网址：http://www.edatop.com

射频和天线设计培训课程推荐

易迪拓培训(www.edatop.com)由数名来自于研发第一线的资深工程师发起成立，致力并专注于微

波、射频、天线设计研发人才的培养；我们于 2006 年整合合并微波 EDA 网(www.mweda.com)，现

已发展成为国内最大的微波射频和天线设计人才培养基地，成功推出多套微波射频以及天线设计经典

培训课程和 ADS、HFSS 等专业软件使用培训课程，广受客户好评；并先后与人民邮电出版社、电子

工业出版社合作出版了多本专业图书，帮助数万名工程师提升了专业技术能力。客户遍布中兴通讯、

研通高频、埃威航电、国人通信等多家国内知名公司，以及台湾工业技术研究院、永业科技、全一电

子等多家台湾地区企业。

易迪拓培训课程列表：http://www.edatop.com/peixun/rfe/129.html

射频工程师养成培训课程套装

该套装精选了射频专业基础培训课程、射频仿真设计培训课程和射频电

路测量培训课程三个类别共 30 门视频培训课程和 3 本图书教材；旨在

引领学员全面学习一个射频工程师需要熟悉、理解和掌握的专业知识和

研发设计能力。通过套装的学习，能够让学员完全达到和胜任一个合格

的射频工程师的要求…

课程网址：http://www.edatop.com/peixun/rfe/110.html

ADS 学习培训课程套装

该套装是迄今国内最全面、最权威的 ADS 培训教程，共包含 10 门 ADS

学习培训课程。课程是由具有多年 ADS 使用经验的微波射频与通信系

统设计领域资深专家讲解，并多结合设计实例，由浅入深、详细而又

全面地讲解了 ADS 在微波射频电路设计、通信系统设计和电磁仿真设

计方面的内容。能让您在最短的时间内学会使用 ADS，迅速提升个人技

术能力，把 ADS 真正应用到实际研发工作中去，成为 ADS 设计专家...

课程网址： http://www.edatop.com/peixun/ads/13.html

HFSS 学习培训课程套装

该套课程套装包含了本站全部 HFSS 培训课程，是迄今国内最全面、最

专业的HFSS培训教程套装，可以帮助您从零开始，全面深入学习HFSS

的各项功能和在多个方面的工程应用。购买套装，更可超值赠送 3 个月

免费学习答疑，随时解答您学习过程中遇到的棘手问题，让您的 HFSS

学习更加轻松顺畅…

课程网址：http://www.edatop.com/peixun/hfss/11.html

`

专注于微波、射频、天线设计人才的培养易迪拓培训网址：http://www.edatop.com

CST 学习培训课程套装

该培训套装由易迪拓培训联合微波 EDA 网共同推出，是最全面、系统、

专业的 CST 微波工作室培训课程套装，所有课程都由经验丰富的专家授

课，视频教学，可以帮助您从零开始，全面系统地学习 CST 微波工作的

各项功能及其在微波射频、天线设计等领域的设计应用。且购买该套装，

还可超值赠送 3 个月免费学习答疑…

课程网址：http://www.edatop.com/peixun/cst/24.html

HFSS 天线设计培训课程套装

套装包含 6 门视频课程和 1 本图书，课程从基础讲起，内容由浅入深，

理论介绍和实际操作讲解相结合，全面系统的讲解了 HFSS 天线设计的

全过程。是国内最全面、最专业的 HFSS 天线设计课程，可以帮助您快

速学习掌握如何使用 HFSS 设计天线，让天线设计不再难…

课程网址：http://www.edatop.com/peixun/hfss/122.html

13.56MHz NFC/RFID 线圈天线设计培训课程套装

套装包含 4 门视频培训课程，培训将 13.56MHz 线圈天线设计原理和仿

真设计实践相结合，全面系统地讲解了 13.56MHz线圈天线的工作原理、

设计方法、设计考量以及使用 HFSS 和 CST 仿真分析线圈天线的具体

操作，同时还介绍了 13.56MHz 线圈天线匹配电路的设计和调试。通过

该套课程的学习，可以帮助您快速学习掌握 13.56MHz 线圈天线及其匹

配电路的原理、设计和调试…

详情浏览：http://www.edatop.com/peixun/antenna/116.html

我们的课程优势：

※ 成立于 2004 年，10 多年丰富的行业经验，

※ 一直致力并专注于微波射频和天线设计工程师的培养，更了解该行业对人才的要求

※ 经验丰富的一线资深工程师讲授，结合实际工程案例，直观、实用、易学

联系我们：

※ 易迪拓培训官网：http://www.edatop.com

※ 微波 EDA 网：http://www.mweda.com

※ 官方淘宝店：http://shop36920890.taobao.com

专注于微波、射频、天线设计人才的培养

官方网址：http://www.edatop.com 易迪拓培训淘宝网店：http://shop36920890.taobao.com

ads2009 high frequency and high speed co-design platformtech.mweda.com/download/hwrf/ads/ads-1-ads...

Documents