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Agilent Physical Layer Test System (PLTS) 2013

Technical Overview

Vector Network Analyzer-based and Time Domain Reflectometer-based Systems

Includes:“What’s New in PLTS 2013 Software”

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What’s New with Physical Layer Test System 2013?

The new Physical Layer Test System (PLTS) 2013 includes novel features that will help solve real world problems for today’s signal integrity engineers. There are so many signal integrity tools avail-able for design, analysis, and troubleshooting of high-speed inter-connects it’s difficult to manage them all. Agilent’s PLTS design team has created version 2013, integrating new features into PLTS for a substantial boost in productivity. Agilent sets a new standard in signal integrity innovation.

• S-parametermeasurementupto110GHzfrequencyrange

• Vectornetworkanalyzerportcountfrom2to24

• TestsuitesforHDMI,SATA,USB3.0,DisplayPort,etc.

• Multi-channelenhancedeyediagramforanalyzingeyedensity using color grade display

• AdvancedreceiverequalizationsusingCTLE,FFE,DFEto improve channel performance

• AutomaticFixtureRemoval(AFR)fornon-50Ohmfixturesand AFRGUIredesign

• TRLWizardenhancementtoverifycalkitsymmetryutilizing reverse measurements

• Moreaccurateskewmeasurementsforhigherdatarates

• ENAcalibrationandmeasurementwizardenhancementsfor economical solutions

• GUIenhancementsincludingnewmarkermath,userspan,plot panning,smartspinscaling,equationeditorandgatingviewer

Figure 1. The PLTS 2013 application has enhanced the Automatic Fixture Removal algorithm to include both asymmetric fixtures and non-50 ohm fixtures.

Figure 2. Color grade eye diagrams are now implemented in PLTS 2013 to analyze eye density of high-speed interconnect channels.

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Thenextgenerationcomputerandcommunicationsystemsnowbeing developed will handle data rates of multiple gigabits/sec-ond.ManysystemswillincorporateprocessorsandSERDESchipsetsthatexceedGigaHertzclockfrequencies.Newandtroublinginput/output issues are emerging as switches, routers, server blades,andstorageareanetworkingequipmentmovingtoward10Gbpsdatarates.Digitaldesignengineerschoosingchip-to-chip and backplane technologies for these systems are finding signal integrity challenges that have not been encountered before.

Traditional parallel bus topologies are running out of bandwidth. Asparallelbussesbecomewider,thecomplexityandcosttorouteonPCboardsincreasedramatically.Thegrowingskewbetween data and clock lines has become increasingly difficult to resolve within parallel busses. The solution is fast serial chan-nels.Thenewerserialbusstructureisquicklyreplacingtheparallelbusstructureforhigh-speeddigitalsystems.Engineershave been turning to a multitude of gigabit serial interconnect protocols with embedded clocking to achieve the goal of simple routingandmorebandwidthperpin.However,theseserialinter-connects bring their own set of problems.

In order to maintain the same total bandwidth as the older paral-lel bus, the new serial bus needs to increase its data rate. As the data rate increases through serial interconnects, the rise time of the data transition from a zero logic level to a one logic level becomes shorter. This shorter rise time creates larger reflections at impedance discontinuities and degrade the eye diagram at the end of the channel. As a result, physical layer components such asprintedcircuitboardtraces,connectors,cables,andICpackag-es can no longer be ignored. In fact, in many cases, the silicon is so fast that the physical layer device has become the bottleneck.

In order to maintain signal integrity throughout the complete channel, engineers are moving away from single-ended circuits and now use differential circuits. The differential circuit provides goodCommonModeRejectionRatio(CMRR)andhelpsshieldadjacentPCBtracesfromcrosstalk.Properlydesigneddifferentialtransmission lines will minimize the undesirable effect of mode conversionandenhancethemaximumdataratethroughputpos-sible.Unfortunately,differentialsignalingtechnologyisnotalwaysan intuitive science.

Differential transmission lines coupled with the microwave effects of high-speed data have created the need for new design and validationtoolsforthedigitaldesignengineer.Understandingthefundamental properties of signal propagation through measure-ment and post-measurement analysis is mandatory for today’s leading edge telecommunication and computer systems. The traditional Time Domain Reflectometer (TDR) is still a very useful tool, but many times the Vector Network Analyzer (VNA) is needed for the complete characterization of physical layer components. There is a strong need for a test and measurement system that willallowsimplecharacterizationofcomplexmicrowavebehaviorseen in high speed digital interconnects. In fact, many digital standards groups have now recognized the importance of specifying frequencydomainphysicallayermeasurementsasacompliancerequirement.BothSerialATAandPCIExpresshaveadoptedtheSDD21parameter(inputdifferentialinsertionloss)asarequiredmeasurement to ensure channel compliance. This parameter is an indicationofthefrequencyresponsethatthedifferentialsignalsees as it propagates through the high-speed serial channel. AnexampleofaproposedSDD21compliancemaskisshowninFigure5fortheChannelElectricalInterface(CEI)workinggroupfortheOpticalInternetworkingForum(OIF).

Figure 5. Today’s digital standards are now using frequency domain mea-surements for compliance testing, such as this input differential insertion loss (SDD21) mask for XAUI.

ISI Loss > 4 dB

Sample Compliance Interconnect

0 312.5 MHz 1.5625 GHz 3.125 GHz

–11.4

–15

SDD2

1 (d

B)

0

WhyisPhysicalLayerTestingRequired?

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Time-domain analysis is typically used for characterization of these physical-layer structures, but often, the designer concen-tratesonlyontheintendedmodesofoperation.Foracompletetime-domain view, step and impulse responses in reflection and transmission (TDR and TDT) must be seen. The analysis must include the unintended modes of operation as well.

Frequency-domainanalysis,againinallpossiblemodesofopera-tion, is also necessary for fully characterizing these physical-layer structures. The s-parameter model describes the analog behavior exhibitedbythesedigitalstructures.Thisbehaviorincludesreflectionsfromdiscontinuities,frequencydependentlosses,crosstalk,andEMIperformance.

Fortranslatingdeviceperformanceintostandardscompliance,eye diagrams add an important statistical analysis. And for lever-aging this complete characterization into improved simulations, measurement-baseds-parameterorRLCGmodelextractioncompletes the picture.

Time domain Frequency domainMode TDR TDT Reflection TransmissionDifferential TDD11 TDD21 SDD11 SDD21 TDD22 TDD12 SDD22 SDD12Diff-to-comm TCD11 TCD21 SCD11 SCD21 TCD22 TCD12 SCD22SCD12Comm-to-diff TDC11 TDC21 SDC11 SDC21 TDC22 TDC12 SDC22SDC12Common TCC11 TCC21 SCC11 SCC21 TCC22 TCC12 SCC22 SCC12Single-ended T11 T21T31T41 S11 S21S31S41 T22 T12T32T42 S22 S12S32S42 T33 T13T23T43 S33 S13S23S43 T44 T14T24T34 S44 S14S24S34

Figure 7. Complete characterization includes forward and reverse transmission and reflection, in all possible modes of operation, in both frequency and time domains.

A single test system can provide the total view

Asthecombinationofbothtime-domainandfrequencydomainanalysis becomes more important, the need for multiple test systems becomes difficult to manage. A single test system that can fully characterize differential high-speed digital devices, while leaving domain and format of the analysis up to the designer, is a very powerful tool. Agilent’s Physical Layer Test System (PLTS) is designed specifically for this purpose.

PLTS has been designed specifically for signal integrity analysis. PLTS software guides the user through hardware setup and calibration,andcontrolsthedataacquisition.Itautomaticallyapplies patented transformation algorithms to present the data inbothfrequencyandtimedomains,inbothforwardandreversetransmission and reflection terms, and in all possible modes of operation (single-ended, differential, and mode-conversion).

A powerful virtual bit pattern generator feature allows a user-definedbinarysequencetobeappliedtothemeasureddatatoconvolveeyepatterndiagrams.Next,highlyaccurateRLCG 1 modelscanbeextractedandusedtoenhancetheaccuracyofyour models and simulations.

PLTS provides design confidence through complete characterization

Physical-layer structures have increasingly become the bottleneck in high-speed digital system performance. At low data rates, these interconnects are electrically short. The driver and receiver aretypicallythebiggestcontributorstosignalintegrity.Butasclock speeds, bus speeds, and link speeds all push past the giga-bit-per-second mark, physical layer characterization becomes more critical.

Another challenge for today's digital designers is the trend to differentialtopologies.Fullyunderstandingdeviceperformancerequiresanalysisinallpossiblemodesofoperation.

1. AnRLCGequivalentcircuitmodel,alsoknownasTelegrapher’s Parameters, describes the electrical behavior of a passive transmission line. The model is a distributed network consisting of series resistance and inductance (R and L) and parallel capacitance and conductance (CandG).

Single endedPort 1

Single endedPort 2

Single endedPort 3

Single endedPort 4

Differential Port 2

Differential Port 1

Device under test+

–

+

–

Figure 6. A differential structure operates in many modes. Single-ended analysis can reveal sources of asymmetry on this differential transmission line.

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Modeconversion

A practical application of how mode conversion helps identify problemsinphysicallayerdevicesisshowninFigure9.Thisshowsa XAUIbackplanewithtwodaughtercardsthattypicallytransmitdata at3.125Gbps.Thedesignobjectiveforthishigh-speed differential channel is to minimize the crosstalk betweenadjacentdifferentialPCBtracesthroughoutthelengthofthechannel.Thechannelconsists of the linear passive combination of the backplane and two daughter cards. Any mode conversion from differential mode tocommonmodewillgenerateEMIandcreatecrosstalkthatwillbe incident upon other channels and will degrade performance. However,locatingtheexactstructurewithin the channel that creates the most mode conversion is not simple.

Figure 9. By aligning the impedance profile with the mode conversion profile, PLTS allows the pinpointing of crosstalk-generating structures within physical layer devices.

LookingatFigure9,thedifferentialtocommonmodeconversiontimedomainreflectionparameter(TCD11)istimealignedwiththedifferential impedance profile of the channel (TDD11) below it. A markerisplacedonthelargestmagnitudepeakofTCD11.Thisiswhere the physical structure within the channel is creating the most mode conversion and thus the source of the most crosstalk. WecanaligntheTDD11totheTCD11intimeandthereforeco-locate the problematic structure on TDD11. To relate this struc-ture to the channel, we use the differential impedance profile as a reference.Frompreviousanalysis,weknowthatthetwocapaci-tive discontinuities on TDD11 are the daughter card via field and motherboard via field, respectively. Since the marker falls upon the second discontinuity on TDD11, it is deduced that the mother-boardviafieldisthebiggestculprittocausingcrosstalkinadja-centchannels.Themotherboardviafieldwassubsequentlyre-routed and the crosstalk generation was reduced considerably. This shows how identifying the mode conversion in a channel can be intuitive with proper analysis.

PLTS enables mode-conversion analysis for early insightintoEMIproblems

The benefits of differential signaling include lower voltage swings, immunityfrompowersupplynoise,areduceddependencyonRFground,andimprovedEMIperformance(reducedgenerationandsusceptibility).Theextenttowhichadevicecantakeadvantageof these benefits is directly related to device symmetry.

Symmetric devices only respond to, and only generate, differen-tial signals. These ideal devices do not respond to or generate common-modesignals,andtheyrejectradiatedexternalsignals(i.e., power supply noise, harmonics of digital clocks or data, andEMIfromotherRFcircuitry).

Asymmetricdeviceshowever,donotexhibitthesebenefits.When stimulated differentially, an asymmetric device will produce a common-mode response in addition to the intended differential response,andcauseEMIradiation.Conversely,withacommon-mode stimulus, an asymmetric device will produce an unintended differentialresponse.ThismodeconversionisasourceofEMIsusceptibility.

Mode-conversionanalysisisanimportanttoolforunderstandingand improving device symmetry, and provides the designer with earlyinsighttoidentifyandresolveEMIproblemsatthedesignstage.

Figure 8. Asymmetric devices cause mode-conversions, which are indicators of EMI generation and susceptibility.

Passive differential structure

Differentialstimulus

Differentialresponse

Common-moderesponse(unintended mode conversion)

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Dynamic rangeHigh-dynamicrangeisimportantforanumberofreasons.Certainly,measurementsofverylowlevelsofcrosstalkarepossible, but this is only one parameter where dynamic range is important.

Moreimportantistheabilitytoovercomemaskingeffectsofmultiple discontinuities, which in systems with lower dynamic range would attenuate the stimulus such that deep structures would become invisible.

And most importantly for differential devices, high-dynamic range allows for identification of very low levels of mode-conversion, which are the direct result of device asymmetry. This allows early resolutionofpotentialEMIissues.

Accuracy through error-correction

VNA-based systems

Four-portSOLT(Short-Open-Load-Thru)Themostcommontechniqueforbothcoaxialandnon-coaxialenvironments,SOLTcalibration,isavectorerrorcorrectionpro-cess that characterizes systematic error by measuring known calibration standards. This data is used to calculate a 72-term error model, which is then used to remove the effects of systematicerrorsfromsubsequentmeasurements.

Utilizingthreeimpedancestandards(theshort,open,andload)and a thru standard, the error model compensates for directivity, source match, load match, reflection and transmission tracking (frequencyresponse),andcrosstalkinbothforwardandreversedirections.

Four-portTRL(Thru-Reflect-Line)TRLcalibrationisprimarily(butnotexclusively)usedinnon-coaxial environments,suchasin-fixtureormicroprobemeasurements.ItdeterminesthesameerrormodelastheSOLTcalibration,althoughit uses different calibration standards - a thru, a reflection standard (a short), and one or more offset length transmission lines.

Figure 11. The vector-correction process characterizes systematic error to provide superior accuracy in network analyzer-based systems.

TRLcalibrationtypicallyprovidesmoreaccuracythanSOLTandisonly available for PNA-based systems (it is not supported for 872x-basedsystems).

Four-portLRM(Line-Reflect-Match)LRMisavariationofTRL,anddeterminesthesameerrormodelastheSOLTandTRLcalibrations,althoughitusesdifferent(andfewer) calibration standards – a transmission line, a reflection standard (a short), and a load.

Inbroadbandnon-coaxialenvironments,specificallymicroprobing,LRMcanofferanaccuracyimprovementoverTRLduetoband-width limitations of the TRL line standards.

LRMcalibrationisonlyavailableforPNAnetworkanalyzer-basedsystems(itisnotsupportedforAgilent872x-networkanalyzerbased systems).

Four-portElectronicCalibration(ECal)Forelectroniccalibrationto9GHz,theAgilentN4430BECalModule(30kHzto9GHz)issupportedbyallofthePLTSVNA-based systems. With one set of connections, this solid-state tuner simulatesalloftheimpedancestatesrequiredforfullfour-porterrorcorrectionwithaccuracythatisgenerallybetterthanSOLT,but somewhat less than TRL.

Figure 10. The PNA network analyzer-based calibration interface simplifies a complex process, allowing full error-correction in minutes, not hours.

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TDR-based systems

ModulecalibrationModulecalibration,alsocalledverticalcalibration,calibratesthegains, offsets, and timing for each channel.

At the start of the TDR calibration process, PLTS will report that amodulecalibrationisvalid,recommended,orrequired.

This calibration is available for all supported TDR-based systems.

De-skewAsymmetry in a differential system – between the two step generators, between the two receivers, etc… – can potentially lead to imbalances or errors in resulting measurements.

When differential measurements are selected in the calibration process, PLTS automatically performs this operation to remove lengthvariancefromcablesortestfixtures.


Referenceplanecalibration(RPC)RPCadjuststhecalibrationreferenceplanetotheendofthetest cables and automatically performs the de-skew operation (see above).


NormalizationNormalization is an error correction process that characterizes systematic error by measuring known calibration standards (a short, a load, and a thru) to calculate an error model, which is then used to remove the effects of systematic errors from subsequentmeasurements.

The error model compensates for directivity, source match, and reflectiontracking(frequencyresponse).Thisisthemostaccurate calibration type for TDR.

Note: Normalization is available for the Agilent 86100 family of oscilloscopes only.

Figure 12. Like the PNA network analyzer-based calibration interface, the TDR-based calibration interface guides the user through the calibration(s) reducing operator error and saving time.

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= Pre-measurement error correction= Post-measurement error correction

Mostaccurate

Mostsimple

S-parameter de-embedding

PortextensionTime domain gating

NormalizationReference plane calibration

Thru-reflect-line(TRL)Line-reflect-match(LRM)

Short-open-load-thru (SOLT)

PLTSerrorcorrectiontechniquesAutomaticfixtureremoval

Figure 13. PLTS has advanced error correction techniques to allow flexibility for many applications.

Port Extension (also known as Phase Rotation) mathematically extendsthecalibrationreferenceplanetotheDUT.

Thistechniqueiseasytouse,butassumesthefixture–theunwanted structure – looks like a perfect transmission line: a flat magnitude response, a linear phase response, and constant impedance.Ifthefixtureisverywelldesigned,thistechniquecan provide good results.

Because gating essentially considers the magnitude of the unwanted discontinuity, and Port Extensions consider phase (electrical length), using the two tools together may provide optimum results.

Time-domain gatingissimilartoportextension,inthatitisalsovery easy and fast. The user simply defines two points in time or distance, and the software mathematically replaces the actual measured data in that section with data representing an "ideal" transmission line. The return loss is then recalculated to show theeffectsofthechangeinthefrequencydomain.

Onepracticalapplicationoftime-domaingatingisasaconfidencecheck before replacing a suspect connector.

Figure14illustrateshowthistechniquemightbeused.

Remove unwanted effects from the measurement

ErrorcorrectionOvertheyears,manydifferentapproacheshavebeendevelopedforremovingtheeffectsofthetestfixturefromthemeasurement(showninFigure13).Thelevelofdifficultyforeacherrorcorrection techniqueislinearlyrelatedtotheaccuracyofeachmethod.Timedomain gating is perhaps the simplest and most straightforward method, but it is also the least accurate. Likewise, de-embeding is the most complicated method, but it is the most accurate. It is importanttohaveatestsystemthatwillallowflexibilityofchoos-ing the method of error correction desired for each application.

Errorcorrectiontechniquesfallintotwofundamentalcategories:direct measurement (pre-measurement processing) and de-embedding (post-measurement processing). Direct measurement requiresspecializedcalibrationstandardsthatareconnectedtotheendofacoaxialtestcableandmeasured.Theaccuracyofthedevicemeasurementreliesonthequalityofthesephysicalstan-dards.De-embeddingusesamodelofthetestfixtureandmath-ematicallyremovesthefixturecharacteristicsfromtheoverallmeasurement.Thisfixturede-embeddingprocedurecanproducevery accurate results.

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Calibration at the DUT reference plane has the advantage that theprecisecharacteristicsofthefixturedonotneedtobeknownbeforehand, as they are measured and corrected for during the calibration process.

Anexampleofthistechniqueismicroprobingusingacalibrationsubstrate, where the calibration reference plane is established at theprobetips,ratherthanattheendofthecoaxialtestcables.

Advancedcalibrationtechniques(TRL/LRM)–originallydeveloped for wafer probing applications – provide additional options.

Figure 16. A microprobing application, where the calibration is performed using an impedance standard substrate, establishes the calibration reference plane at the probe tips.

Figure 15. The effects of test fixtures can be removed from the device in post-processing through de-embedding.

De-embeddingusesanaccuratelinearmodelofthefixture,ormeasureds-parameterdataofthefixture.ThisfixturedatacanthenberemovedmathematicallyfromtheDUTmeasurementdata in post-processing.

Figure 14. In this rather extreme example of time-domain gating, the top plots show the measured differential step impedance and return loss. The lower left plot shows a gate added to remove the large discontinuity in the center of the trace. On the lower right, the measured and the recalculated return losses are displayed. In this case, the gate improved the return loss by more than 10 dB within the frequency band of interest.

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PLTSSupportforMicroprobingApplications

Agilent works closely with leading microprobe and probe station suppliers to provide the best complete system solutions possible.

Oneofthemostsignificantmeasurementchallengesisconnectiv-ity.Testequipmentprovidesacontrolledcoaxialenvironment,butwhatiftheDUT–thebackplane,theinterfaceconnector,theICpackage–isnon-coaxial?

Testfixturescanprovidetherequiredconnectivity,butatacost.Thequalityofthetestfixture–itsconnectors,impedancediscontinuities, parasitics, and dielectric losses – all contribute tolessthanidealperformanceofthefixture.Subsequently,the accuracy of the device measurement is degraded.

Severaltechniquesareavailabletoremovethesefixtureeffects(see Remove Unwanted Effects from the Measurement on page 7), buttheaccuracyofthesetechniquesisgreatlyimpactedbythequalityofthefixtureitself,ortheavailabilityofanaccurates-parametermodelofthefixture(usedforde-embedding).Microprobingcanoffertheusertheabilitytoforegothetestfixtureandlaunchthestimulusdirectlyatthedeviceinput.The response can be measured directly at the device output. Additionally, when calibration substrates are available, calibration can be performed directly at the probe tips. This achieves co-location of the calibration reference plane with the device measurement reference plane.

PLTShastheflexibilitytoaccommodatemanymicroprobeconfigurations.Byaddingthecalibrationsubstratecoefficientsas a calibration kit, the process becomes as straightforward asacoaxialcalibration.

Figure 17. Cascade Microtech’s Summit probe station.

Figure 18. GigaTest Lab’s GTL-4060 probe station.

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Step 1System setup

Step 2Calibration

Step 3Device measurement

TDRsetup

process

VNAsetup

process

Setup andcalibrationcomplete

TDRsetup

Select calibrationand measurement

parameters

VNAsetup

TDRcalibration

VNAcalibration

PLTSSimplifiestheMeasurementProcess

Device characterization with PLTS software is straightforward. The user interface has been designed to make setup, calibration, and measurement intuitive and error-free. A wizard guides the userthroughalloftherequiredsteps.Thelastpromptistoconnect the device-under-test and initiate the measurement. Setup and calibration differs slightly between TDR-based and VNA-based systems.However,inbothcasesthePLTSsoftwareprovidesanintuitive wizard to assist in the step-by-step process.

Easysetup

Step 1.

Inthefirststep,PLTSsoftwareautomaticallypollstheGPIB,and prompts the user to accept or modify the default parameters based on hardware capabilities.

Figure 19. PLTS has a three-step system set up to make measurements intuitive and error-free.

TDR setup

VNA setup

Figure 20. PLTS software completely controls the hardware setup via GPIB.

Figure 22. Default parameters are calculated from system capabilities. User modifications are interactive.

Figure 21. The user may calibrate only for the specific parameters of interest. Estimated calibration times are calculated based on selections.

Parameter selection not required in the VNA setup

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Step 3. Device measurement

ForbothTDRandVNAsystems,whenthecalibrationiscompleted, PLTS prompts the user to connect the device-under-test, and select an initial analysis format.

Then,thesystemmakesallofthemeasurementsrequiredforthecomplete characterization.

Withonesetup,calibrationandmeasurement,uptosixty-fourtime-domainandfrequency-domaindeviceparametersareavailable.

Step 2. Calibration

After the system setup, the calibration method is selected. Again, thewizardsimplifiestheprocessandprovidesthegreatestflex-ibility to the user.

Thecalibrationinterfaceshowstherequiredcalibrationstandards as icons, which are initially represented in red. As the user con-nects the standards, and mouse-clicks the corresponding icon, the system makes the measurement, and the icon color changes to green (indicating completion). When all of the icons are green, the calibration is complete.

TDR calibration

VNA calibration

Setup and calibration complete

Figure 25. All domains and formats are available immediately after the measurement is completed.

Figure 24. The VNA system calibration wizard simplifies four-port SOLT, TRL, and LRM error correction.

Figure 23. The TDR system calibration wizard provides status and controls module and reference plane calibrations, de-skew, and normalization.

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File and view management with the data browser

Time domain analysis: •2n2 parameters •7formats •timeordistance

Frequency domain analysis: •2n2 parameters •8formats

Format, scaling, and marker control with easy access toolbars

RLCG model extraction •2n2 parameters

Plot and trace management with context-sensitive parameter buttons

Eye diagram analysis: •n2 parameters •8formats

Data analysis with n-port PLTS

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4-portdataanalysis

All supported analysis types and formats are available immediately after the measurement is completed, and at any time there after. PLTSflexibilityallowstheusertobeginwheretheyaremostfamiliar.

Time-domain analysis

Themixed-modetimedomainisacommonstartingpoint.Initially,sixteenparametersaredisplayedinthumbnailviewasshownbelow. These thumbnails represent four modes of device opera-tion: differential, common-mode, and the two mode-conversion types (common-mode stimulus with differential response and differential stimulus with common-mode response). A double mouse-clickonanyofthesethumbnailswillexpandtheselectedparameter to full screen for closer analysis.

Not shown here are the additional sixteen single-ended time-domain parameters.

Figure 26. The mixed-mode time-domain matrix.

Frequency-domainanalysis

Themixed-modefrequencydomainisanothercommonstartingpoint.

Initially,sixteenparametersaredisplayedinthumbnailviewasshown below. These thumbnails represent four modes of device operation: differential, common-mode, and the two mode-conver-sion types (common-mode stimulus with differential response and differential stimulus with common-mode response). A double mouse-clickonanyofthesethumbnailswillexpandtheselectedparameter to full screen for closer analysis.

Not shown here are the additional sixteen single-ended frequency-domain parameters.

Figure 27. The mixed-mode frequency-domain matrix.

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Measurement-basedeyediagramanalysis

Usingthebuilt-indigitalpatterngenerator,theuserisabletodefine virtual bit pattern (as wide as 232-1 bits). PLTS then con-volves the selected bit pattern with the device impulse response tocreateanextremelyaccuratemeasurement-basedeyepatterndiagram.

This eliminates the need for a hardware pulse/pattern generator, anditsflexibilityallowsforagreatdealof"Whatif…"analysis.

Figure 28. The digital pattern generator.

After the eye pattern is generated, marker functions can be used tomaketypicalmeasurementslikejitter,eyeopening,riseandfalltimes, and more.

Figure 29. Eye pattern diagram.

RLCGmodelextraction

RLCG(resistance,inductance,capacitance,andconductance)models describe the electrical behavior of passive transmission linesinanequivalentcircuitmodel.

FromthemeasuredS-parametersofadevice,PLTScalculatestheR,L,C,G,complexpropagationconstant,andcomplexcharacter-istic impedance.

This provides a highly accurate, measurement-based coupled transmissionlinemodelforexportintomodelingandsimulationsoftwaresuchasAgilentADS,SynopsisHSPICE,andothers.

Figure 30. RLCG model extraction (W-Element shown).

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Frequency

Num

ber o

f cha

nnel

s

4-port50GHz 4-port 67 GHz4-port18 GHz

12-port 20 GHz 12-port 50GHz 12-port 67 GHz

4-port20 GHz

14-port20 GHz

N-port

8-port 20 GHz8-port 50GHz

4-port40GHz

12-port 40GHz

8-port 40GHz 8-port 67 GHz

PLTS Signal Integrity Solutions Portfolio

PNA-BasedExamplesBeloware4-portPLTSconfigurationexamples.Foracompletelistofcompatibletestsetsgotowww.agilent.com/find/multiport.ForacustomtestsetsolutioncontactyourlocalAgilentsalesrepresentative.

PLTSmultiportconfiguration(4-port67GHzsystem)

Qty Default options Available options Description Physicallayertestsystem,11ps,67GHz1 N5227A-401 10MHzto67GHzvectornetworkanalyzer, 4-ports,configurabletestset4 N4421B-K67 Testportcables,3ft.,1.85mm(m-f)1 N1930B-1FP PLTSbaseanalysisnetworkedlicense1 N1930B-3FP PLTSmeasurementandcalnetworkedlicense1 N1930B-5FPPLTSadvancedcalibration(AFR)fixedlicense1 PS-S20-01 N4694A RecommendedStartupAssistance1 Option00F 1.85mmECalkit


Qty Default options Available options Description Physicallayertestsystem,15ps,50GHz1 N5225A-401 10MHzto50GHzvectornetworkanalyzer, 4-ports,configurabletestset4 N4421AK20 Testportcables,3ft.,2.4mm(m-f)1 N1930B-1FP PLTSbaseanalysisfixedlicense1 N1930B-3FP PLTSmeasurementandcalfixedlicense1N1930B-5FP PLTSadvancedcalibration(AFR)fixedlicense1 PS-S20-01 Recommended Startup Assistance1 N4693A-00F 2.4mmECalkit

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PLTSmultiportconfiguration(4-port43.5GHzsystem)

Qty Default options Available options Description Physicallayertestsystem,16.5ps,43.5GHz1 N5224A-401 10MHzto43.5GHzvectornetworkanalyzer, 4-ports,configurabletestset4 N4421AK20 Testportcables,3ft.,2.4mm(m-f)1 N1930B-1FP PLTSbaseanalysisfixedlicense1 N1930B-3FP PLTSmeasurementandcalfixedlicense1N1930B-5FP PLTSadvancedcalibration(AFR)fixedlicense1 PS-S20-01 Recommended Startup Assistance1 N4693A-00F 2.4mmECalkit


Qty Default options Available options Description Physicallayertestsystem,27ps,26.5GHz1 N5222A-401 10MHzto26.5GHzvectornetworkanalyzer, 4-ports,configurabletestset4 N4419AK20 Testportcables,3ft.,3.5mm(m-f)1 N1930B-1FP PLTSbaseanalysisfixedlicense1 N1930B-3FP PLTSmeasurementandcalfixedlicense1N1930B-5FP PLTSadvancedcalibration(AFR)fixedlicense1 PS-S20-01 Recommended Startup Assistance1 N4433A-010 3.5mmECalkit


Qty Default options Available options Description Physicallayertestsystem,35ps,20GHz

1 N5230C-245 4-portPNA-Lnetworkanalyzer

4 N4419AK20 Testportcables,3ft.,3.5mm(m-f)1 N1930B-1FP PLTSbaseanalysisfixedlicense

1 N1930B-3FP PLTSmeasurementandcalfixedlicense

1N1930B-5FP PLTSadvancedcalibration(AFR)fixedlicense

1 PS-S20-01 Recommended Startup Assistance

1 N4433A-010 3.5mmECalkit

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Qty Default options Available options Description Physicallayertestsystem,27ps26.5GHz

1 N5222A-401 10MHzto26.5GHzvectornetworkanalyzer,

4-portconfigurabletestset

1 N5222A-551 N-portcalibratedmeasurements16 N4419AK20 Testportcables,3ft.,3.5mm(m-f)

1 U3042AE12 12-port26.5GHzmultiporttestset1 N1930B-1FP PLTSbaseanalysisfixedlicense1 N1930B-3FP PLTSmeasurementandcalfixedlicense1 N1930B-5FP PLTSadvancedcalibration(AFR)fixedlicense1 N1930B-7FP PLTSN-portmeasurementandanalysisfixedlicense1 PS-S20-01 Recommended Startup Assistance1 N4433A-010 3.5mmEcalkit


Qty Default options Available options Description Physicallayertestsystem,15ps50GHz

1 N5225A-401 10MHzto50GHzvectornetworkanalyzer,

4-portconfigurabletestset

1 N4421A-1CP Rack-mountkitwithhandles

12 N4421AK20 Testportcables,3ft.,2.4mm(m-f)

1 U3045AE08 8-port50GHzS-parametermultiporttestset

1 N1930B-1FP PLTSbaseanalysisfixedlicense

1 N1930B-3FP PLTSmeasurementandcalfixedlicense

1 N1930B-5FP PLTSadvancedcalibration(AFR)fixedlicense

1 N1930B-7FP PLTSN-portmeasurementandanalysisfixedlicense

1 PS-S20-01 Recommended Startup Assistance

1 N4694AOption00F 2.4mmEcalkit

19

Upgradesfrom2-portPNAto4-portPLTS Supported network analyzers PNA Network analyzer options Required

System

Required

model Required Compatible Not tested test set frequency

application

number or specified range

software

E8364A/B/C N4421B

45MHzto50GHz E8364A/B/C 10MHzto50GHz E8363A/B/C

014 010,UNL 016, 080, 081, 083

N4420B 45MHzto40GHz

N1930B

E8363A/B/C H08,H11

10MHzto40GHz

1. See software licensing sidebar on page 26.2. PNAfirmwareisfrequentlyupdated.Forthelatestrecommendedfirmware, please go to http://www.na.tm.agilent.com/pna/firmware/firmware.html

PLTSOrderingGuidePLTSsystemrequirementsToensurethatPLTSoperateseffectively,yourPCshouldhavethefollowingminimumrequirements:

PLTS feature Introduced in PLTS version: MustbeusedwithPNAversionorhigher:USBecalsupportforcalibrationinPLTS 3.0 A.04.87MultiportCalibrationinPNA 4.0 A.06.00Query individual calibration thru types 4.2 A.07.21.00

Calibrationviewwindow 4.5 A.07.50.27RefreshCal 5.0 PNA-XandCmodels:A.08.33.13LoadErrorterms 5.0 N5230AandE836xB:A.07.50.37

PNA support2

ThefollowingarerequirementsforPNAFirmware.FirmwareselectionmaydependupontheCPU. SeehowtodetermineyourCPUtype.(Internetconnectionrequired.)·AllPNA(E836xC)SeriesandPNA-LN5230C-A.09.33.09·AllPNA-X(N524xA)Series-A09.33.09·AllPNA(N522xA)Series-A09.33.09·Allmodelswith1.1GHzCPU:(E8361A,E8362B,E8363B,E8364B,N5230A)-A.07.50.48·AnymodelusingXPon500MHzCPU:-A.06.04.32·AnymodelusingWindows2000;andall3-portmodels:(N3381A,N3382A,N3383A)-A.04.87.01Inaddition,somePLTSfeaturesrequirealaterPNAfirmwareversion.

MeasurementmodeONLY Off-lineanalysismodeIn the lab, controlling test

equipmentandmakingquickanalysis of the results.

In your office, performing “What if...” analysis, characterization, cross-domain analysis, filtering,

waveform math, and eye diagram simulation.CPU 1GHz 1.5GHz

Main memory (RAM)512MB - 1GB isrecommended whenmeasuring 16,000 points with the PNA

B-modelnetworkanalyzers.1GB

Virtual memory - As a general rule, virtualmemoryshouldbe1.5to2times the size of main memory.

1GB 1.5GB

GPIB interface

WithPLTS4.2,PLTScan connect to a PNA over LAN

Agilent82357AUSB/GPIBInterfaceforWindowsorsupportedGPIBcard

(any National Instruments or Agilent82340/41or82350GPIBcard)

NoGPIBconnectionisrequiredto use PLTS off-line.

Saved (stored) measurement files can be recalled at any time for analysis.

Operating systems Windows XP, Vista32,Vista64,andWindows7.

Windows XP, Vista32,Vista64,andWindows7.

Screen resolution 1280x1024orgreaterrequired 1280x1024orgreaterrequiredDisplay colors HighColor(16Bit)orgreater HighColor(16Bit)orgreater

http://na.tm.agilent.com/pna/cputype.html

20

PLTS multiport test set ordering information

Testsetsforusewith2-portnetworkanalyzers(E836XFamily)

Model Freq Switch # Test set ports Options # Total system ports

U3024AE06 40GHz Mechanical 6port 700 STD(withamp) 8U3024AE06 40GHz Mechanical 6port 001 BiasT 8U3024AE10 40GHz Mechanical 10port 700 STD(withamp) 12U3024AE10 40GHz Mechanical 10port 001 BiasT 12U3025AE06 50GHz Mechanical 6port 700 STD(withamp) 8U3025AE06 50GHz Mechanical 6port 001 BiasT 8U3025AE10 50GHz Mechanical 10port 700 STD(withamp) 12U3025AE10 50GHz Mechanical 10port 001 BiasT 12

Testsetsforusewith4-portnetworkanalyzers(N5230A/CFamily)


U3042AE08 20GHz Solidstate 8port 700 STD 12U3042AE08 20GHz Solidstate 8port 001 Amp 12 U3042AE08 20GHz Solidstate 8port 002 BiasT/amp 12U3042AE12 20GHz Solidstate 12port 700 STD 16U3042AE12 20GHz Solidstate 12port 001 Amp 16U3042AE12 20GHz Solidstate 12port 002 BiasT/amp 16U3044AExx 40GHz xPort Futuretestsets

U3045AExx 50GHz xPort Futuretestsets

Z5623AK44 20GHz Solidstate 4port STD STD 8Z5623AK44 20GHz Solidstate 4port 001 Amp 8Z5623AK44 20GHz Solidstate 4port 002 BiasT/amp 8

Testsetsforusewith2-port(E836XFamily)or4-port(N5230A/CFamily)analyzers


U3022AE10 20GHz Mechanical 10port STD STD 12or14U3022AE10 20GHz Mechanical 10port 001 BiasT/amp 12or14

Note 1: The highest port count available to date is 24-ports. This is achieved by using the following configuration: N5230C-245 (4-Port VNA) U3042AE10 (10-Port Test Set) U3042AE10 (10-Port Test Set)

Note 2: PLTS 5.2 is the last release that supports the legacy 8753 and 872x VNA based measurement systems. This will also be the last release that officially supports PNA network analyzers with a CPU board < 1.1 GHz. There are currently upgrade kits or trade-in programs to assist in upgrading or migrating these legacy instruments to a supported platform. Please contact your local support team for more information.

21

PLTS software ordering information

Model Description

N1930B-1NP Baseanalysisnetworkablelicense;1-yearupdatesubscriptionN1930B-1FP Baseanalysisfixedlicense;1-yearupdatesubscriptionN1930B-1TP Baseanalysistransportablelicense(USBKey);1-yearupdatesubscriptionN1930B-3NP Measurement&calnetworkablelicense;1-yearupdatesubscriptionN1930B-3FP Measurement&calfixedlicense;1-yearupdatesubscriptionN1930B-3TP Measurement&caltransportablelicense(USBKey);1-yearupdatesubscriptionN1930B-5NP Advancedcalibrationnetworkablelicense;1-yearupdatesubscriptionN1930B-5FP Advancedcalibrationfixedlicense;1-yearupdatesubscriptionN1930B-5TP Advancedcalibrationtransportablelicense(USBKey);1-yearupdatesubscriptionN1930B-7NP N-portmeasurement&analysisnetworkablelicense;1-yearupdatesubscriptionN1930B-7FP N-portmeasurement&analysisfixedlicense;1-yearupdatesubscriptionN1930B-7TP N-portmeasurement&analysistransportablelicense(USBKey);1-yearupdatesubscription

Important notes regarding PLTS software configuration

1.IfPLTSStudioisused(PLTSoptions1NP,1FPor1TP),thiswillallowdataanalysisoffilesuptoandincluding 4ports(*,s4pTouchstonefiles).However,ifdataistobeanalyzedfromfilescontainingmorethan4ports(for example,12-portdatafroma*.s12pTouchstonefile),theappropriatePLTSmultiportoptionmustbepurchased (PLTSoptions7NP,7FPor7TP).

2.Asnotedinthesampleconfigurationsonpages16-19ofthistechnicaloverview,theVNAfirmwareoptions550 or551mustbeorderedinconjunctionwithPLTStoworkproperlyasacalibrationandmeasurementsystem. Option550isforapplicationsof4portsorless,whileoption551isforapplicationsgreaterthan4ports.3.PLTSoption1xPisrequiredforeither3xP,5xP,or7xPoptions.

4.PLTShasanannualupdatecalled“SUS”thatstandsfor“SoftwareUpdateService”.EachnewPLTSlicense comeswith12monthsofSUS.After12months,a1or2yearSUSmustbepurchasedtoreceivetechnicalsupport andnewPLTSsoftwareupdates.IfanySUSlapses,thena2yearSUSmustbepurchasedtore-activatethesupport and updates.

5.Option3xPisrequiredforinstrumentcontrolportionsofoption5xP.Asnotedin3above,option1xPisrequiredfor either3xP,5xP,or7xPoptions.

22

Agilent has developed a breakthrough signal integrity software tool that enables digital interconnect designers never before available capabilities. The Physical Layer Test System (PLTS) ver-sion5.2softwareOptionN1930B-5TPwillincorporatethreenewadvanced calibration tools that optimize the design of high speed connectors, cables, backplanes and printed circuit boards. The PLTSOptionN1930B-5TPprovidesadvancedcalibrationwizardsfor a complete suite of signal integrity capability including:• Thru-Reflect-Line(TRL)calibrationwizardfordesignand validationofcustomer-builttestfixtures• Differential crosstalk calibration wizard that takes into account couplingeffectsofdifferentialtransmissionlinesonfixturesfor extremelyaccurateerrorcorrection• Automaticfixtureremovalfeaturethatrequiresonlya symmetric“Thru”structureismeasuredforquickandeasy fixturede-embedding

TRL calibration wizard

Manyhigh-speeddigitallabstodaymustdesigntestfixturesfordataratesabove5Gbps.Moreadvanceddesigntechniquesmustbeusedwhendesigningtestfixturesforthesesensitives-param-eter measurements. The TRL calibration process has been the tra-ditional method for microwave engineers for decades to precisely locatethemeasurementreferenceplane.Howeverthisadvancedtechniquehasbeenoutofreachformostdigitallaboratoriesduetocomplexity.Thisisnolongerthecase.

The TRL calibration wizard is the world’s first software tool that enablesthedesignandvalidationofaPCB-basedTRLcalibrationkit. This step-by-step process easily guides you carefully through thenormallytediousanderrorproneprocessofTRLfixturede-sign,savingatleast50%ofthedesigncycletimefrombeginningto end, thus reducing the number of board spins. Now, with TRL calibration wizard, you can invoke the wizard to define the line lengths for each calibration structure. After sending the board layoutdetailstoaPCBhouseformanufacture,thewizardwillmeasurethenewlydesignedTRLtestfixturetoverifythatitwillworkproperlyatthedesiredhighfrequencyrange.

Figure 31. The TRL Calibration Wizard in PLTS N1930B-5TP option is an industry fi rst for enabling complex vector network analyzer error correction in an easy to use format for PCB fixtures.

Figure 32. The TRL Calibration Wizard has a step-by-step procedure for validating the customer built TRL fi xture and verifi es the high frequency performance level in a quantitative fashion.

AdvancedCalibrationSoftwareOptionN1930B-5xP

23

Differential crosstalk calibration wizard

Whendesigningtestfixturingforinterconnectcharacterization,theageoldquestionis“HowshouldIroutemytestfixturetransmis-sion lines, single-ended or differential?” Some engineers correctly route them single-endedly, some erroneously route them differen-tiallyandsomejustdon’tcare.Thebiggestmistakeistoroutedif-ferentially and ignore the coupling effects. As long as a calibration algorithmisusedtoremovecouplingeffects,thenthistestfixturedesign flaw can be easily remedied. The differential crosstalk cali-brationwizardinPLTS5.2Option5TPwillautomaticallymeasurethese coupling effects and remove them from the measurement using a proprietary calibration algorithm. Some steps in the wizard canbeeliminatedifthefixtureissymmetricfromfronttoback,therebyoptimizingthealgorithminrealtime.Therearetestfixtureamplitudemeasurementerrorsaslargeas25dBthathavebeenfixedbythedifferentialcrosstalkcalibrationwizard.

Automaticfixtureremoval

It can sometimes be a complicated process to achieve accurate calibrations with a vector network analyzer (VNA). The time consumingpartofthemeasurementsequenceisoftennotthemeasurementitself,butthecalibration.Forthosewhofeelthatway,wehavecreatedtheAutomaticFixtureRemovalWizard.This is a simple process that entails measuring a user created 2X ThrucalibrationPCBcoupon(twofixturesend-to-end).This2XThrucoupontracecanbebuiltontestfixturesthemselvesoronaseparateCalboard.Ineithercase,assoonasthismeasurementisinputintothewizardandthetotalmeasurementoftheDUTplusfixturesisintheactivewindowofthewizard,thenasimpleclickonthe“Apply”buttonandthefixtureisaccuratelyremoved.The

resultant accuracy is better than a TRL calibration. It is simple, fastANDaccurate.ForPLTS2013,theAFRhasbeengreatlyen-hancedwithmoreadvancedfeaturessuchasasymmetricfixturematch,asymmetricfixturepropagationdelayandnon-50ohmfixtureimpedance.ThismeansthatAFRcannowaccommodateanyexistingfixturethatmaynothavebeenoptimizedforAFR.

MakingVNAseasierthanTDRs

IthasoftenbeenstatedthatVNAsareextremelyaccurateatthecost of being complicated. This is possibly true if the right tools are not at your disposal. Well, now the right toolset is available at therighttime;justasdataratesaredrivento5Gbpsandhigher.Nolongerdoyouneedtosettleforthe–40dBdynamicrangeofaTDR when you have a VNA toolset that makes high dynamic range measurementsasimpletask.ThePLTS5.2OptionN1930B-5TPisexactlywhatyou’vebeenwaitingfor.

Figure 33. One of the most difficult error corrections to do is remove differential coupling in test fixtures. The Differential Calibration Wizard is the first tool of its kind to perform a correction to remove error due to this type of coupling.

Figure 34. Automatic Fixture Removal (AFR) is the industry standard for de-embedding test fixtures without having the fixture S-parameters. In PLTS 2013, AFR has been greatly enhanced by providing the following breakthrough capabilities: asymmetric fixture match, asymmetric fixture propagation delay and non-50 ohm fixtures impedance.

24

PLTS application software uses new licensing capabilities. Besides fixed license and networkable FLEXlm licensing on a shared server, there is also a transportable USB key. The summary of the three licensing options are as follows:

Option xFP Fixed license (default). FixedlicensesarelockedtoasinglePCthroughitshostID(e.g.,theMACaddress)withorwithoutconnectedsystemhardware.Fixedlicensesdonotrequireanynetworkingorlicenseserverprocesses.Afixedlicenseisalsoknownasa node-locked license.

Option xNP Networkable license. Networkable licenses allow users to share a single license, or multiple licenses, over a network. The application soft-waremaybeinstalledonanunlimitednumberofPCswithor without connected system hardware. The number of available licenses determines the number of concurrent users.NetworkablelicensesrequirealicenseserverandaTCP/IP(orIPX/SPX)connectionbetweenclientsandserver(s). A networkable license is also known as a floating license.

Option xTP Transportable license. Transportable licenses arelockedtoaUSBkeythatcanbesharedamongdifferentPCs. Important licensing notes: 1.Fileimport,fileexport,calibrations,andmeasurements greaterthan4portsrequiresoneofthefollowingPLTS options:7NP,7FP,or7TP.2.For4-portcalibrationsoption550isrequiredonthePNA firmware.Forgreaterthan4-portcalibrationsoption551 isrequiredonthePNAfirmware.3. See configuration guide information contained in this TechnicalOverviewforfurtherdetails.

Web resources

Visit our Web sites for additional product and literature information.

www.agilent.com/find/pltswww.agilent.com/find/enawww.agilent.com/find/pnawww.agilent.com/find/multiportwww.agilent.com/find/ecal

MATLAB® is a registered trademark ofthe The MathWorks, Inc.

Windows is a U.S. registered trademark of Microsoft Corporation.

www.agilent.comwww.agilent.com/find/plts

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