20101203 desktop emulation

The Verification ProblemEmulation

Case StudiesSummary

Emulation On Your Desktop

Nirajnayan Sharma

Head, Engineering and Marketing - IndiaBluespec, Inc.

niraj.sharma@bluespec.com

March 12, 2010

Nirajnayan Sharma Emulation On Your Desktop

Case StudiesSummary

Outline

1 The Verification Problem

2 EmulationFirst Generation EmulationNext Generation Emulation

3 Case StudiesAXI SwitchCMU ProtoFLEX

4 Summary

Case StudiesSummary

Outline

4 Summary

Case StudiesSummary

Simulation – The Fundamental Verification Bottleneck

Simulations are great for DOA and initial testingSimulators allow the highest visibility into the hardwareSimulations remain the best method for the debug-fix-verifycycle

However . . .Speed quickly becomes a limiting factor in the verification ofcomplex systems

System simulations which can last days1 sec of D1 H.264 encode => 15 hoursLinux boot initialization => 140 hours . . .

Case StudiesSummary

First Generation EmulationNext Generation Emulation

Outline

4 Summary

Case StudiesSummary

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Case StudiesSummary

First Generation Emulation

Emulation when used effectively can be a game-changer, butexisting systems are . . .

Expensive – difficult to justify except at the highest-endComplexity – co-emulation link API requires bit-level datapacking and timing synchronization!"#$%&'&(")*+*,(-./'&"#

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Case StudiesSummary

First Generation Emulation . . .

Difficult to remove bottlenecks between testbench andDUT resulting in unrealized performance

Complex test-benches from simulation will not port intoemulation

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Case StudiesSummary

First Generation Emulation . . .

Limited to later in the development cycle when RTL hasreached a critical point in verification

Only functional after a lot of verification (includingarchitectural and spec) have already been completed

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Case StudiesSummary

Next Generation Emulation

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Hardware Abstraction Layer – decouples userapplication from physical layer

Proprietary or standard (USB, Ethernet, PCI-E, . . . ), serialor parallel physical linkWork with high-level data structuresLow-level link data and timing details hidden

Case StudiesSummary

Next Generation Emulation . . .

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SCE-MIStandardized API and communication protocol to take fulladvantage of emulation performanceBoth on hardware and software sidesEnsures simulation and emulation componentinter-operability

Case StudiesSummary

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Transactors – Virtual termination of external designinterfaces

Help eliminate link bottlenecks by converting from timedbit-level to untimed transaction-level

Case StudiesSummary

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Synthesizable testbenchHelps eliminate bottlenecks in the simulator andco-emulation linkAllow debug instrumentation to be placed around the DUTwithout affecting performance

Case StudiesSummary

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Emulator – Commodity FPGAsMust move to commodity FPGAs and support virtualizationof FPGA platforms (portability)Allows tracking of latest FPGA technology at lowest cost

Case StudiesSummary

AXI SwitchCMU ProtoFLEX

Outline

4 Summary

Case StudiesSummary

AXI Switch Performance Validation!"#$%&'&(")

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DUT and emulation setupAXI switch as DUTConfigurable number of masters and slavesImplemented on ML507 Virtex-5 board

Case StudiesSummary

AXI Switch Performance Validation . . .!"#$%&'&(")

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Test setupDirected random trafficTraffic generator and analyzer split between simulator andemulator

Case StudiesSummary

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Test setup . . .Simulator’s GUI configures and analyzes traffic patternsAXI Traffic Director transmits traffic configurationparameters to emulator

Case StudiesSummary

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Test setup . . .Emulator has AXI Traffic Generators configured fromsimulator sideRAM modules serve as memory-mapped slaves

Case StudiesSummary

AXI Switch Performance Validation . . .

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SCE-MI communication – consistent framework forimplementing untimed communication between simulatorand emulator

Case StudiesSummary

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HAL automatically serializes and de-serializes transactionlevel communication through the USB

Case StudiesSummary

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Performance – entire system runs at 50 MHz in emulationon the board.

Case StudiesSummary

CMU ProtoFLEX – Accelerating Software ValidationFor many SoCs software development and verification can dominate development cycle

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Virtutech SimicsVirtutech Simics – Commercial SW simulator for wholesystems (OS/devices/apps)Despite clever tricks, steady slowdown for each addedthread and for each added bit of instrumentation

Case StudiesSummary

CMU ProtoFLEX . . .

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CMU ProtoFLEXFully operational model of 16-cpu UltraSPARC III SunFire3800 Server, running unmodified Solaris 8; running onFPGA at 90 MHzHybrid simulation – continue to use Simics for modelingrest of system (I/O devices, ...)

Case StudiesSummary

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CMU ProtoFLEXBenchmarks

TPC-C OLTP on Oracle 10g Enterprise Database ServerSPECINT (bzip2, crafty, gcc, gzip, parser, vortex)

Performance: 10-60 MIPS. 39x faster than Virtutech Simicsalone on same system/benchmarkWritten by 1 graduate student (Eric Chung) in 1 year

Case StudiesSummary

Outline

4 Summary

Case StudiesSummary

SummaryIf you had a 50-100 MHz emulation platform on your desktop right from the start?

FPGA densities and parallel interconnect speeds todayallow

Significant unit verification to be done in a single FPGAComplete chips to be cost effectively emulated on FPGAboards and systems

A well-engineered co-emulation stack and linkvirtualization are key to enabling mainstream use

Ensure simple and rapid bringupFlexible hardware-software partitioningPortability across hardware and applications

Paired with a general-purpose high-level synthesis language, awell productized co-emulation stack can enable mass-adoptionof emulation.

20101203 desktop emulation

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