26-digital design
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CS 150 Spring 2007 - Lec #26 Digital Design 1
Digital Design and System Implementation
Overview of Physical Implementations
CMOS devices
CMOS transistor circuit functional behavior
Basic logic gatesTransmission gates
Tri-state buffers
Flip-flops vs. latches revisited
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The stuff out of which we make systems
Overview of Physical Implementations
Integrated Circuits (ICs) Combinational logic circuits, memory elements, analog interfaces
Printed Circuits (PC) boards substrate for ICs and interconnection, distribution of CLK, Vdd, and
GND signals, heat dissipation
Power Supplies Converts line AC voltage to regulated DC low voltage levels
Chassis (rack, card case, ...)
1-25 conductive layers holds boards, power supply, fans, provides physical interface to user
or other systems
Connectors and Cables
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Integrated Circuits
Primarily Crystalline Silicon 1mm - 25mm on a side
200 - 400M effective transistors
(50 - 75M logic gates")
3 - 10 conductive layers
2007 feature size ~ 65nm = 0.065 x 10-6 m45nm coming on line
CMOS most common -complementary metal oxide semiconductor
Package provides: Spreading of chip-level signal paths to
board-levelHeat dissipation.
Ceramic or plastic with gold wires
Chip in Package
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Multichip Modules (MCMs)
Multiple chips directly connected to a substrate(silicon, ceramic, plastic, fiberglass) without chip packages
Printed Circuit Boards
Fiberglass or ceramic
1-20in on a side
IC packages aresoldered down
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Integrated Circuits Moores Law has fueled innovation for the last 3 decades
Number of transistors on a die doubles every 18 months.
What are the consequences of Moores law?
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Integrated Circuits
Uses for Digital IC technology today:Standard microprocessors
Used in desktop PCs, and embedded applications (ex: automotive)Simple system design (mostly software development)
Memory chips (DRAM, SRAM)
Application specific ICs (ASICs)custom designed to match particular applicationcan be optimized for low-power, low-cost, high-performancehigh-design cost / relatively low manufacturing cost
Field programmable logic devices (FPGAs, CPLDs)customized to particular application after fabrication
short time to marketrelatively high part cost
Standardized low-density componentsstill manufactured for compatibility with older system designs
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Cross Section
The gate acts like a capacitor. A high voltage onthe gate attracts charge into the channel. If avoltage exists between the source and drain acurrent will flow. In its simplestapproximation, the device acts like a switch.
Top View
MOSFET (Metal Oxide Semiconductor Field Effect Transistor)
nFET
pFET
CMOS Devices
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Logic and Layout: NAND Gate
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Transmission gates are the way to build switches in CMOS
In general, both transistor types are needed:
nFET to pass zeros
pFET to pass ones
The transmission gate is bi-directional (unlike logic gates)
Does not directly connect to Vdd and GND, but can be combined withlogic gates or buffers to simplify many logic structures
Transmission Gate
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Pass-Transistor Multiplexer
2-to-1 multiplexer:
c = sa + sb
Switches simplify the
implementation:s
sb
a
c
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4-to-1 Pass-transistor Mux
The series connection ofpass-transistors in eachbranch effectively forms theAND of s1 and s0 (or theircomplement)
20 transistors
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Alternative 4-to-1 Multiplexer
This version has lessdelay from in to out
Care must be taken to
avoid turning on multiplepaths simultaneously(shorting together theinputs)
36 Transistors
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Example: Tally Circuit
N inputs: How many of these are asserted?
Tally
In
I1
N
TwoOneZero
E.g., 1 input, 2 outputs: One, ZeroE.g., 2 inputs, 3 outputs: Two, One, ZeroN inputs, N+1 outputs: N, , One, Zero
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Example: Tally Circuit
01
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Example: Tally Circuit
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Example: Tally Circuit
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Example: Tally Circuit
2 inputs, 3 outputs:Two, One, Zero
I1
0
1
1
0
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Example: Tally Circuit
2 inputs, 3 outputs:Two, One, Zero
I1
0
1
0
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Example: Tally Circuit
2 inputs, 3 outputs:Two, One, Zero
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Example: Tally Circuit
2 inputs, 3 outputs:Two, One, Zero
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Example: Tally Circuit
2 inputs, 3 outputs:Two, One, Zero
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Example: Tally Circuit
2 inputs, 3 outputs:Two, One, Zero
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Example: Crossbar Switch
N inputs, N outputs, N x N control signals
CrossBar
Busi
Outi
Note: circuit like thisused inside Xilinxswitching matrix
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Barrel Shifter
BarrelShifter
BusOut
Shift
Bus Shift
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Example: Barrel Shifter
N inputs, N outputs, N control signals
Shift 0
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Example: Barrel Shifter
N inputs, N outputs, N control signals
Shift 1
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Example: Barrel Shifter
N inputs, N outputs, N control signals
RotatingShift 1
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Tri-state Based Multiplexer
Multiplexer
If s=1 then c=a else c=b
Transistor Circuit forinverting multiplexer:
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D-type Edge-triggered Flip-flop
The edge of the clock is used tosamplethe "D" input & send it to"Q (positive edge triggering) At all other times the output Q is
independent of the input D (juststores previously sampled value)
The input must be stable for ashort time before the clock edge.
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Transistor-level Logic Circuits
Positive Level-sensitive latch:
Latch Transistor Level:
clk
clk
clk
clk
Positive Edge-triggered flip-flop built from two level-sensitive latches:
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State Machines in CMOS
Two Phase Non-Overlapping Clocking
CombinationalLogic
R
EG
R
EG
In Out
State
P1 P2
CLK
P1
P2
1/2 Register 1/2 Register
Di it l D si d I l t ti
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Digital Design and ImplementationSummary
CMOS preferred implementation technology
Much more than simple logic gatesTransmission gate as a building block
Used to construct steering logic
Very efficient compact implementations of interconnectionand shifting functions
Simple storage building blocksD-type flip flop behavior with cross-coupled inverters and
two phase clocking
Heart of Xilinx implementation structures
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