al-azhar university lecture 5

Microprocessor

Dr. Rabie A. RamadanAl-Azhar University

Lecture 5

Interfacing Memory

An address should be placed on the

address lines.

The low-order address lines are

decoded by the internal decoder of the

memory chip, and the addressed

register is identified.

The high-order address should be

decoded to generate a Chip Select

signal, and the memory chip is

selected by asserting the Chip Select

low.

2

CS

Interfacing Memory

To read from the addressed register, the

should be asserted low to enable the output

buffer, and then the data byte from the

register will be placed on the I/O lines.

To write into the addressed register, the

should be asserted low to enable the input

buffer, and then data bits from the data

lines are stored into the register.

3

RD

WR

How does the Z80 Read from or

Write into Memory?

4

Basic Concepts in Memory

Interfacing

Interface Function:

• Be able to select the chip

• Identify the register

• Enable the appropriate buffer.

5

Read from the Memory

6

Write into memory register

7

Address Decoding

3 input lines A0-A2 (Memory Select Buffer (MSB))

A3 – A7 are control lines since the address starts at F0H to F7H

3 lines enable only one o/p line

8 memory chips can be controlled

8

A7 A6 A5 A4 A3 A2 A1 A0

1 1 1 1 0 1 1 1= F7H

Example 1: Interfacing the 2764

EPROM

Used in industry to develop

microprocessor-based products.

8k (8192 8) memory chip with

8 data lines

Housed in a 28-pin package.

9

Chip Configuration

10

What is the Memory Addresses Range?

11

A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1

0000H 1FFFH

Interfacing CMOS 6116 Static R/W

Memory

This is a 2k static memory chip

organized as 2048 8 format.

It has 11 address lines (A10-A0),

8 data lines

3 control signals:

12

Chip Configuration

13

Memory Interface

What is the addresses range? Assume A12 and A11 are do not care .

14

A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

1 0 0 X X 0 0 0 0 0 0 0 0 0 0 0

1 0 0 X X 1 1 1 1 1 1 1 1 1 1 1

8000 87FF -- Address ranges may differ due to the do not care at A12 and A11