prepaid report
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CHAPTER 1
INTRODUCTION
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CHAPTER 1
INTRODUCTION
In this chapter we will give overview of the concept of the Electronic prepaid electricity
meter used by us in daily life. Here we are giving the basic idea about prepaid electricity
and also the basics of the project.
1.1INRODUCTION TO PREPAID ELECTRICITY
In this project we show that how we interface the digital energy meter to the easy recharge
unit and convert this meter into prepaid energy meter. By using this technique we show
that how we convert all meter with the prepaid logic. B y using this type of technology it
is possible to stop the misuse of electricity. Normally in every postpaid connection bill is
much higher then the prepaid. When there is postpaid, no body want to take care of the
wastage, but at the end of month when bill is present then bill is paid by the house inch
rage, small workers in the office, employees in the school, in all the private and Govt
office no body want to take care of the wastage. So we add some innovative idea to avoid
and save this valuable energy for every one.In this project we use one LCD screen. LCD
screen display the balance amount every time, LCD screen not only show the balance
amount but at the same time LCD display the unit consumption. When the balance is zero
then output is off.
Now for continue the electricity we must need to recharge the unit from the mobile
phone. Now we go to any energy shop and tell the shopkeeper to transfer the amount of
100 or any add amount to my this energy meter. Shop keeper transfer the amount with the
help of easy recharge. For this purpose first of all he dial the particular gsm number and
when phone is automatic on then he transfer the amount in digit code. This data is decoded
by the circuit and value is to be added in the unit. This added value is to be shown in the
lcd screen automatically. When we want to go any palace then first of all we press the off
switch, then unit the stop reading and no energy is consume. When balance is below 5 R/s
then alarm is on. This alarm is a indication that you must recharge the unit. By chance if
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the supply is off then electronics circuit is also off and there is no supply . In normal
electronics circuit is also off, but in this project we provide a memory feedback option.
With the help of this memory feedback it is possible to record all the detail of the LCD
screen. When supply is again on then first of all memory is on and recall the last detail by
auto feedback logic
1.1.1 OVERVIEW OF THE PROJECTFollowing Block Diagram illustrates our project.
Figure 1.1 Basic Overview of the project
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CHAPTER 2
AN INTRODUCTION TO TECHNICAL ASPECTS OF THE PROJECT
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2.1 Circuit Diagram:
Figure 2.1
Our project is divided into 6 parts
1. 5 VREGULATED POWER SUPPLY2. MOBILE SIGNAL DECODER3. MICROCONTROLLER INTERFACE4. LCD INTERFACE5. RELAY INTERFACE CIRCUIT6. MEMORY INTERFACE
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2.2 MAJOR COMPONENTS USED IN THIS PROJECT
1. LCD FOR DISPLAY PURPOSE DISPLAY THE BALANCE AMOUNT ANDUNIT CONSUME ( 2 LINE AND 16 CHARACTER)
2. MICROCONTROLLER. 89C51, 40 PIN CONTROLLER, 128 BYTE RAM, 4 KBYTE RAM. USED HERE FOR LCD DISPLAY AND START STOP
FUNCTION. CHECK THE BALANCE AND CONTROL THE LOAD AS PER
THE BALANCE.
3. IC 8870 , DTMF DECODER IC.4. IC 8870 PROVIDE A GSM INTERFACE WITH THIS CIRCUIT. DUE TO THISIC WE DECODE THE CALL THE PROVIDE A BALANCE IN THE ENERGY
METER AUTOMATICALLY.
5. 5 VOLT REGULATED POWER SUPPLY TO PROVIDE A REGULATEDVOLTAGE TO THE MICROCONTROLLER UNIT.
6. 24C02 MEMORY ( 8 PIN).
In this project we use one 5 volt regulated power supply with the help of the 7805
regulator we provide a 5 volt regulated power supply. Output of the regulated power
supply is displayed by the resistance and led in series. . IC 8870 is here as a dtmf
decoder ic. This ic decode the output and converted into bcd signal. Pin no 2 and 3 is
connected to the resistor and capacitor network. With the help of this circuit we insert a
dtmf input in the decoder. Here we attach a handsfree from the mobile phone. Pin
no 7 and 8 is connected to the external crystal. With the help of this crystal we decode the
signal. This crystal is a fixed value of the 3.58 Mhz. Output is available on the pin no
11,12,13,14 . his output is bcd output from the circuit. One led with resistor is
connected with the pin no 15 .This signal is a ack of decoded signal. If the signal is
decoded then this led is on. This signal further connected to the base of the npn transistor
and provide a signal to the microcontroller circuit. Microcontroller directly read the code
and insert he value on lcd. In this project we use special code to transfer the value into
microcontroller. Value is to be transfer into 4 different values. So every time we want to
transfer a value to the meter then first of all we insert the code from scratch card and thenenter a hash. As the hash value is to be enter then controller compare the code and insert a
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value according to the code. Here we use ic 89s52 as a main controller. Pin no 40 of the ic
is connected to the positive supply. Pin no 20 is connected to the ground pin. Pin o 18 and
19 is connected to the external crystal oscillator. Pin no 39 to pin no 32 is connected to the
lcd data pins. Here we use 8 bit data from the controller to provide a data to the lcd. LCD
control pins RS, RW, enable is connected to the pin no 26,27,28.
Memory is connected to the pin no 23,24 of the ic. Pin no 23 and 24 is connected to the
non voltaic memory. Pin no 8 is connected to the positive supply. Pin no 7 is connected to
the ground. . Use of memory is to retail all the data of variable, which store the data of
balance and unit value. When light is off then data is to be saved into non volatic memory.
When we press the start switch then if the balance is available then output is available on
the pin no 23. On this pin we connect a relay coil. Relay switch on the load circuit. If the
load is connected then load provide a feedback by the feedback transformer circuit. This
feedback is when connected to the controller then controller decrement the amount.
In this project we use original meter to get a value . for this purpose we connect one
photodiode in the front of the meter. When meter light blink then photodiode gets a signal.
As the photodiode gets a signal , this signal is compare with comparator circuit. Output of
the comparator is further connected to the meter. In the original meter there is total 3200
counts when one unit is consumed. In this project we count the pulse from meter and
decrement the amount. For demonstrate purpose we use 32 pulse to decrement the value.
Artificial signal is also provided by the ic 555 square wave generator. Now its our option
to select the ic 555 pulse generator circuit or check the pulse from original meter.
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CHAPTER 3
DESCRIPTION OF HARDWARE COMPONENTS
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CHAPTER 3
DESCRIPTION OF HARDWARE COMPONENTS
The hardware components used in project consist of following,we are not
giving the description of 89s52,which will be covered in next chapter.
3.1 EXTERNAL MEMORY DETAIL
Figure 3.1
In this project we connect pin no 5 and 6 is to the controller directly. Pin no 1to 4 is
connected to the ground. Here we ground all the address of the ic. Pin no 8 is also
connected to the positive 5 volt supply. Pin no 7 is wp pin. Here pin no 7 is also grounded.
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SERIAL CLOCK (SCL)
The SCL input is used to positive edge clock data into each EEPROM device and negative
edge clock data out of each device. When we want to enter a data in the memory then we
provide a low to high pulse and when we get a data from the memory then we provide a
high to low signal.
SERIAL DATA (SDA)
The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and
may be wire-ORed with any number of other open-drain or opencollector devices.
DEVICE/PAGE ADDRESSES (A2, A1, A0)
The A2, A1 and A0 pins are device address inputs that are hard wired for the AT24C01A
and the AT24C02. As many as eight 1K/2K devices may be addressed on a single bus
system (device addressing is discussed in detail under the Device Addressing section).
The AT24C04 uses the A2 and A1 inputs for hard wire addressing and a total of four 4K
devices may be addressed on a single bus system. The A0 pin is a no connect. The
AT24C08 only uses the A2 input for hardwire addressing and a total of two 8K devicesmay be addressed on a single bus system. The A0 and A1 pins are no connects.
WRITE PROTECT (WP)
The AT24C01A/02/04/16 has a Write Protect pin that provides hardware data protection.
The Write Protect pin allows normal read/write operations when connected to ground
(GND). When the Write Protect pin is connected to VCC, the write protection feature is
enabled and operates as shown in the following table.
Operation CLOCK and DATA TRANSITIONS
The SDA pin is normally pulled high with an externaldevice. Data on the SDA pin may
change only during SCL low time periods (refer toData Validity timing diagram). Data
changes during SCL high periods will indicate a startor stop condition as defined below.
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START CONDITION
A high-to-low transition of SDA with SCL high is a start condition which must precede
any other command (refer to Start and Stop Definition timing diagram).
STOP CONDITION
A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence,
the stop command will place the EEPROM in a standby power mode (refer to Start and
Stop Definition timing diagram).
ACKNOWLEDGE
All addresses and data words are serially transmitted to and from the EEPROM in 8-bit
words. The EEPROM sends a zero to acknowledge that it has received each word. This
happens during the ninth clock cycle.
STANDBY MODE
The AT24C01A/02/04/08/16 features a low-power standby mod which is enabled: (a) upon
power-up and (b) after the receipt of the STOP bit and thecompletion of any internal
operations.
Device Addressing
The 1K, 2K, 4K, 8K and 16K EEPROM devices all require an 8-bit device address word
following a start condition to enable the chip for a read or write operation (refer to Figure
2.1). The device address word consists of a mandatory one, zero sequence for the first four
most significant bits as shown. This is common to all the EEPROM devices. The next 3bits are the A2, A1 and A0 device address bits for the 1K/2K EEPROM. These 3 bits must
compare to their corresponding hard-wired input pins.The 4K EEPROM only uses the A2
and A1 device address bits with the third bit being a memory page address bit. The two
device address bits must compare to their corresponding hard-wired input pins. The A0 pin
is no connect. The 8K EEPROM only uses the A2 device address bit with the next 2 bits
being for memory page addressing. The A2 bit must compare to its corresponding hard-
wired input pin. The A1 and A0 pins are no connect. The 16K does not use any device
address bits but instead the 3 bits are used for memory page addressing. These page
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Figure 3.3
Figure 3.4
Pin Diagram
Features
1. Output Current up to 1A2. Output Voltage of 5V3. Thermal Overload Protection4. Short Circuit Protection5. Output Transistor Safe Operating Area Protection
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Description
The LM7805 is a three terminals, positive regulator available in the TO-220/D-PAK
package and with 5V fixed output voltage. It employs internal current limiting, thermal
shut down and safe operating area protection, making it essentially indestructible. If
adequate heat sinking is provided, it can deliver over 1A output current. Although designed
primarily as fixed voltage regulators, it can be used with external components to obtain
adjustable voltages and currents.
Figure: 3.5
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3.3 DTMF DECODER - DETAIL OF IC 8870.
CMOS Integrated DTMF Receiver
Features
Full DTMF receiver
Less than 35mW power consumption
Industrial temperature range
Uses quartz crystal or ceramic resonators
Adjustable acquisition and release times
Applications
PABX
Central office
Mobile radio
Remote control
Remote data entry
Call limiting
Telephone answering systems
Paging systems
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The CAMD CM8870/70C provides full DTMF receiver capability by integrating both the
band-split filter and digital decoder functions into a single 18-pin DIP, SOIC, or 20-pin
PLCC package. The CM8870/70C is manufactured using state-of-the-art CMOS process
technology for low power consumption (35mW, MAX) and precise data handling. The
filter section uses a switched capacitor
technique for both high and low group filters and dial tone rejection. The CM8870/70C
decoder uses digital counting techniques for the detection and decoding of all 16 DTMF
tone pairs into a 4-bit code. This DTMF receiver minimizes external component count by
providing an on-chip differential input amplifier, clock generator, and a latched three-state
interface bus. The on-chip clock generator requires only a low cost TV crystal or ceramic
resonator as an external component.
Figure 3.6
The CAMD CM8870/70C DTMF Integrated Receiver provides the design engineer with
not only low power consumption, but high performance in a small 18-pin DIP, SOIC, or
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20-pin PLCC package configuration. The CM8870/70Cs internal architecture consists of a
band-split filter section which separates the high and low tones of the received pair,
followed by a digital decode (counting) section which verifies both the frequency and
duration of the received tones before passing the resultant 4-bit code to the output bus.
Filter Section
Separation of the low-group and high-group tones is achieved by applying the dual-tone
signal to the inputs of two 9th-order switched capacitor bandpass filters. The bandwidths of
these filters correspond to the bands enclosing the low-group and high-group tones (See
Figure 3). The filter section also incorporates notches at 350Hz and 440Hz which provides
excellent dial tone rejection. Each filter output is followed by a single order switched
capacitor section which smooths the signals prior to limiting. Signal limiting is performed
by high-gain comparators. These comparators are provided with a hysteresis to prevent
detection of unwanted low-level signals and noise. The outputs of the omparators provide
full-rail logic swings at the frequencies of the incoming tones.
Decoder Section
The CM8870/70C decoder uses a digital countingtechnique to determine the frequencies of
the limited tones and to verify that these tones correspond to standard DTMF frequencies.
A complex averaging algorithm is used to protect against tone simulation by extraneous
signals (such as voice) while providing tolerance to small frequency variations. The
averaging algorithm has been developed to ensure an optimum combination of immunity
to talk-off and tolerance to the presence of interfering signals (third tones) and noise.
When the detector recognizes the simultaneous presence of two valid tones (known as
signal condition), it raises the Early Steering flag (ESt). Any subsequent loss of signal
condition will cause ESt to fall.
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for a tREC of 40ms would be 300K. A typical circuit using this steering configuration is
shown in Figure 3.6. The timing requirements for most telecommunication applications are
satisfied with this circuit. Different steering arrangements may be used to select
independently the guard-times for tone-present (tGTP) and tone absent (tGTA). This may
be necessary to meet system specifications which place both accept and reject limits on
both tone duration and interdigit pause. Guard time adjustment also allows the designer to
tailor system parameters such as talk-off and noise immunity. Increasing tREC improves
talk-off performance, since it reduces the probability that tones simulated by speech will
maintain signal condition for long enough to be registered. On the other hand, a relatively
short tREC with a long tDO would be appropriate for extremely noisy environments wherefast acquisition time and immunity to drop-outs would be requirements.
Input Configuration
The input arrangement of the CM8870/70C provides a differential input operational
amplifier as well as a bias source (VREF) which is used to bias the inputs at mid-rail.
Provision is made for connection of a feedback resistor to the op-amp output (GS) for
adjustment of gain. In a single-ended configuration, the input pins are connected as shown
in Figure 1, with the op-amp connected for unity gain and VREF biasing the input at
VDD. Figure 6 shows the differential configuration, which permits the adjustment of gain
with the feedback resistor R5.
Clock Circuit
The internal clock circuit is completed with the addition of a standard television color burst
crystal or ceramic resonator having a resonant frequency of 3.579545MHz. The CM8870C
in a PLCC package has a buffered oscillator output (OSC3) that can be used to drive clock
inputs of other devices such as a microprocessor or other CM887Xs as shown. Multiple
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CM8870/70Cs can be connected as shown in figure 8 such that only one crystal or
resonator is required.
Figure 3.8
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drawn whenever a dc voltage is applied to the capacitor, that is, whenever it is in operation.
In fact, electrolytic capacitors often last longer when they are in continuous, mild use that
when they are only charged up briefly every year or decade.
3.4.3 Disadvantage
The disadvantage of electrolytic capacitors is the non-ideal, lossy characteristics which
arise from the semiconductive oxide properties, double-layer effects from the electrolyte-
oxide charge-space region, resistive losses from the high electrolyte resistivity, frequency
response rolloff due to the roughness of the surface oxide, and finite capacitor life due to
breakdown and degradation of the electrolyte. Some of these considerations will be
discussed below in more detail from the standpoint of the aluminum electrolytic capacitor.
Also, the anodic oxide dielectric is polar, and so are the electrolytic capacitors, that is the
capacitors must be connected with the correct polarity as marked. Connecting with reverse
voltage injects hydrogen ions through the oxide readily, causing high electrical conduction,
heating and reduction of the anodic oxide film. Non-polar (or bi-polar) devices can be
made by using two anodes instead of an anode and a cathode, or one could connect the
positives or negatives of two identical device together, then the other two terminals would
form a non-polar device.
3.4.4 Uses and applications of electrolytic capacitor
Power supply output filter Blocking and dc bypass Motor start and other non-polar Audio applications Energy discharge applications
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3.5 RESISTOR
A resistor is a two-terminal electronic component that produces a voltage across its
terminals that is proportional to the electric current passing through it in accordance with
Ohm's law:
V = IR
Practical resistors are made of various compounds and films, as well as resistance wire
(wire made of a high-resistivity alloy, such as nickel/chrome).
3.5.1 Characteristics
The primary characteristics of a resistor are the resistance, the tolerance, maximum
working voltage and the power rating. Other characteristics include temperature
coefficient, noise, and inductance. Less well-known is critical resistance, the value below
which power dissipation limits the maximum permitted current flow, and above which the
limit is applied voltage. Critical resistance depends upon the materials constituting the
resistor as well as its physical dimensions; it's determined by design.
Figure 3.10
3.5.2 Units
The ohm (symbol:) is a SI-driven unit ofelectrical resistance, named after Georg Simon
Ohm. Commonly used multiples and submultiples in electrical and electronic usage are the
milliohm (1x103
), kilohm (1x103), and megohm (1x10
6).
http://en.wikipedia.org/wiki/Terminal_%28electronics%29http://en.wikipedia.org/wiki/Electronic_componenthttp://en.wikipedia.org/wiki/Voltagehttp://en.wikipedia.org/wiki/Proportionality_%28mathematics%29#Direct_proportionhttp://en.wikipedia.org/wiki/Electric_currenthttp://en.wikipedia.org/wiki/Ohm%27s_lawhttp://en.wikipedia.org/wiki/Resistance_wirehttp://en.wikipedia.org/wiki/Electrical_resistancehttp://en.wikipedia.org/wiki/Engineering_tolerance#Electrical_component_tolerancehttp://en.wikipedia.org/wiki/Power_%28physics%29http://en.wikipedia.org/wiki/Temperature_coefficienthttp://en.wikipedia.org/wiki/Temperature_coefficienthttp://en.wikipedia.org/wiki/Electrical_noisehttp://en.wikipedia.org/wiki/Inductancehttp://en.wikipedia.org/w/index.php?title=Critical_resistance&action=edit&redlink=1http://en.wikipedia.org/wiki/Ohm_%28unit%29http://en.wikipedia.org/wiki/%CE%A9http://en.wikipedia.org/wiki/%CE%A9http://en.wikipedia.org/wiki/%CE%A9http://en.wikipedia.org/wiki/SIhttp://en.wikipedia.org/wiki/Electrical_resistancehttp://en.wikipedia.org/wiki/Georg_Simon_Ohmhttp://en.wikipedia.org/wiki/Georg_Simon_Ohmhttp://en.wikipedia.org/wiki/Georg_Simon_Ohmhttp://en.wikipedia.org/wiki/Georg_Simon_Ohmhttp://en.wikipedia.org/wiki/Electrical_resistancehttp://en.wikipedia.org/wiki/SIhttp://en.wikipedia.org/wiki/%CE%A9http://en.wikipedia.org/wiki/Ohm_%28unit%29http://en.wikipedia.org/w/index.php?title=Critical_resistance&action=edit&redlink=1http://en.wikipedia.org/wiki/Inductancehttp://en.wikipedia.org/wiki/Electrical_noisehttp://en.wikipedia.org/wiki/Temperature_coefficienthttp://en.wikipedia.org/wiki/Temperature_coefficienthttp://en.wikipedia.org/wiki/Power_%28physics%29http://en.wikipedia.org/wiki/Engineering_tolerance#Electrical_component_tolerancehttp://en.wikipedia.org/wiki/Electrical_resistancehttp://en.wikipedia.org/wiki/Resistance_wirehttp://en.wikipedia.org/wiki/Ohm%27s_lawhttp://en.wikipedia.org/wiki/Electric_currenthttp://en.wikipedia.org/wiki/Proportionality_%28mathematics%29#Direct_proportionhttp://en.wikipedia.org/wiki/Voltagehttp://en.wikipedia.org/wiki/Electronic_componenthttp://en.wikipedia.org/wiki/Terminal_%28electronics%29 -
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3.5.3 Power dissipation
The power dissipated by a resistor (or the equivalent resistance of a resistor network) is
calculated using the following:
All three equations are equivalent. The first is derived from Joule's first law. Ohms Law
derives the other two from that.
The total amount of heat energy released is the integral of the power over time:
If the average power dissipated is more than the resistor can safely dissipate, the resistor
may depart from its nominal resistance and may become damaged by overheating.
Excessive power dissipation may raise the temperature of the resistor to a point where it
burns out, which could cause a fire in adjacent components and materials. The nominal
power rating of a resistor is not the same as the power that it can safely dissipate inpractical use. Air circulation and proximity to a circuit board, ambient temperature, and
other factors can reduce acceptable dissipation significantly. Rated power dissipation may
be given for an ambient temperature of 25 C in free air. Inside an equipment case at 60
C, rated dissipation will be significantly less; if we are dissipating a bit less than the
maximum figure given by the manufacturer we may still be outside the safe operating area,
and courting premature failure.
3.5.4 Four-band resistors
Four-band identification is the most commonly used color-coding scheme on resistors. It
consists of four colored bands that are painted around the body of the resistor. The first two
bands encode the first two significant digits of the resistance value, the third is a power-of-
ten multiplier or number-of-zeroes, and the fourth is the tolerance accuracy, or acceptable
error, of the value. The first three bands are equally spaced along the resistor; the spacing
to the fourth band is wider. Sometimes a fifth band identifies the thermal coefficient, but
this must be distinguished from the true 5-color system, with 3 significant digits.For
example, green-blue-yellow-red is 56104 = 560k 2%. An easier description can be
http://en.wikipedia.org/wiki/Joule%27s_lawshttp://en.wikipedia.org/wiki/Joule%27s_lawshttp://en.wikipedia.org/wiki/Safe_operating_areahttp://en.wikipedia.org/wiki/Engineering_tolerancehttp://en.wikipedia.org/wiki/Engineering_tolerancehttp://en.wikipedia.org/wiki/Safe_operating_areahttp://en.wikipedia.org/wiki/Joule%27s_laws -
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as followed: the first band, green, has a value of 5 and the second band, blue, has a value of
6, and is counted as 56. The third band, yellow, has a value of 104, which adds four 0's to
the end, creating 560,000 at 2% tolerance accuracy. 560,000 changes to 560 k 2%
(as a kilo- is 103).Each color corresponds to a certain digit, progressing from darker to
lighter colors, as shown in the chart below
Fig 3.11
3.5.5 Failure modes
Like every part, resistors can fail in normal use. Thermal and mechanical stress, humidity,
etc., can play a part. Carbon composition resistors and metal film resistors typically fail as
open circuits. Carbon-film resistors may decrease or increase in resistance. Carbon film
and composition resistors can short if running close to their maximum dissipation. The
resistance of carbon composition resistors are prone to drift over time and are easily
damaged by excessive heat in soldering (the binder evaporates).
3.6 LIGHT EMITTING DIODELight emitting diode (LED) is basically a P-N junction semiconductor diode particularly
designed to emit visible light. There are infrared emitting LEDs which emit invisible light.
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The LEDs are available in many colours red, green and yellow. A normal LED emits at
2.4V. The LEDs are made in the form of flat tiny p-n junction enclosed in a semi-spherical
dome made up of clear coloured epoxy resin. The dome of a LED acts as a lens and
diffuser of light. The diameter of the base is less than a quarter of an inch. The actual
diameter varies somewhat with different makes. The common circuit symbols for the LED
are shown in Fig. It is similar to the conventional rectifier diode symbol with two arrows
pointing out. There are two leads- one for anode and the other for cathode.
Figure 3.12
Circuit Symbol of LED
LEDs often have leads of dissimilar length and the shorter one is the cathode. All
manufacturers do not strictly adhere this to. Sometimes the cathode side has a flat base. If
there is doubt, the polarity of the diode should be identified. A simple bench method is to
use the ohmmeter incorporating 3-volt cells for ohmmeter function. When connected with
the ohmmeter: one way there will be no deflection and when connected the other way
round there will be a large deflection of a pointer. When this occurs the anode lead is
connected to the negative of test lead and cathode to the positive test lead of the ohmmeter.
If low range of the ohmmeter is used the LED would light up in most cases because the
low range of ohmmeter can pass sufficient current to light up the LED.
3.6.1 Electrical Characteristics of LEDs
Electrically, a LED is similar to the conventional diode in that it has relatively low forward
voltage threshold. Once this is exceeded the junction has a low slope resistance and
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conducts current readily. An external resistor must limit this current. Forward voltage drew
across red LED is nominally 1.6 V but spread with commercial diodes, it may be as high as
2 volts or so, while the green LED drops 2.4V. Another important parameter of the LED is
its maximum reverse voltage rating. For typical red device it is of the order of 3 volts. The
LED produces light only when a d.c. current is passed in the forward direction and the
amount of light emitted by a LED is proportional to the forward current over a broad
range. It means that light intensity increases in an approximately linear manner with
increasing current.
3.7 RELAY
A relay is used to isolate one electrical circuit from another. It allows a low current control
circuit to make or break an electrically isolated high current circuit path. We already said
that the average remote lead can only handle about one half of an amp of current. If a
circuit with a large amount of current must be controlled by the remote output lead of a
head unit, a relay could be used to buffer the remote output from the head unit. The basic
relay consists of a coil and a set of contacts. The most common relay coil is a length of
magnet wire wrapped around a metal core. When voltage is applied to the coil, current
passes through the wire and creates a magnetic field. This magnetic field pulls the contacts
together and holds them there until the current flow in the coil has stopped. The diagram
below shows the parts of a simple relay.
Figure 3.13
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3.6.1 Relay Specifications
There are two specifications that you must consider when selecting a relay for use in an
automobile, the coil voltage and the current carrying capability of contacts. The coil
voltage for relays used in automobiles is ~12 volts. This means that if you apply 12 volts to
the coil, it will pull in and stay there until the applied voltage is removed from the coil. The
current rating on relay contacts tells how much current can be passed through the contacts
without damage to the contacts.
3.7 555 TIMER
The LM555 is a highly stable device for generating accurate time delays or oscillation.
Additional terminals are provided for triggering or resetting if desired. In the time delay
mode of operation, the time is precisely controlled by one external resistor and capacitor.
For astable operation as an oscillator, the free running frequency and duty cycle are
accurately controlled with two external resistors and one capacitor. The circuit may be
triggered and reset on falling waveforms, and the output circuit can source or sink up to
200mA or drive
3.8.1 Features
Direct replacement for SE555/NE555 Timing from microseconds through hours Operates in both astable and monostable modes Adjustable duty cycle Output can source or sink 200 mA Output and supply TTL compatible Temperature stability better than 0.005% per C Normally on and normally off output Available in 8-pin MSOP package High Current Drive Capability (200mA) Timing From Sec to Hours fig3.14
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Turn off Time Less Than 2Sec
3.8.2 APPLICATIONS:
Precision timing Sequential timing Pulse generation Time delay generation Pulse width modulation Pulse position modulation
3.8.3 Pin Diagram And Discription:
Figure 3.15
GND: this pin use for ground supply
Trigger: use for giving the triggering voltage
Output : use for taking output of 555 Timer
Reset : use for reseting the flip-flop
Control voltage: it is use for controllin the voltage of 555 timer
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Thresold : it is set the thesold voltage for operating the 555 timer in monostable& astable
mode.
Di scharge: it is the discharge pin using discharging the capacitor through a trasistor.
Vcc : this pin provide 5V supply to 555 timer IC.
3.8.4 Working Operation Of 555 Timer
When the low signal input is applied to the reset terminal, the timer output remains low
regardless of the threshold voltage or the trigger voltage. Only when the high signal is
applied to the reset terminal, the timer's output changes according to threshold voltage and
trigger voltage. When the threshold voltage exceeds 2/3 of the supply voltage while the
timer output is high, the timer's internal discharge Tr. turns on, lowering the threshold
voltage to below 1/3 of the supply voltage. During this time, the timer output is
maintained low. Later, if a low signal is applied to the trigger voltage so that it becomes
1/3 of the supply voltage, the timer's internal discharge Tr. turns off, increasing the
threshold voltage and driving the timer output again at high.
Basically 555 timer operate in the two mode .
1. Monostable mode2. Astable mode
3.8.5 MONOSTABLE MODE
In this mode of operation, the timer functions as a one-shot. the external capacitor is
initially held discharged by a transistor inside the timer. Upon application of a negative
trigger pulse of less than 1/3 V to pin 2, the flip-flop is set which both releases the short
circuit across the capacitor and drives the output high. the voltage across the capacitor then
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increases exponentially for a period of t = 1.1 RC, at the end of which time the voltage
equals 2/3 Vcc .
The comparator then resets the flip-flop which in turn discharges the capacitor and drives
the output to its low state. Figure 4.4 shows the waveforms generated in this mode of
operation. Since the charge and the threshold level of the comparator are both directly
proportional to supply voltage, the timing interval is independent of supply.
Figure 3.16
Circuit for monostable mode operation.
Fig3.17
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During the timing cycle when the output is high, the further application of a trigger pulse
will not effect the circuit so long as the trigger input is returned high at least 10s before
the end of the timing interval. However the circuit can be reset during this time by the
application of a negative pulse to the reset terminal (pin 4). the output will then remain in
the low state until a trigger pulse again applied.When the reset function is not in use, it is
recommended that it be connected to Vcc to avoid any possibility of false triggering.
3.8.6 ASTABLE OPERATION
An astable timer operation is achieved by adding resistor R to Figure 1 and configuring as
shown on Figure. in the astable operation, the trigger terminal and the threshold terminal
are connected so that a self-trigger is formed, operating as a multi vibrator. when the timer
output is high, its internal discharging Tr. turns off and the Vc1 increases by exponential
function with the time constant (RA+RB)*C.
Figure 3.18
Circuit for astable mode operation.
When the Vc1, or the threshold voltage, reaches 2Vcc/3, the comparator output on the
trigger terminal becomes high, resetting the F/F and causing the timer output to become
low. This in turn turns on the discharging Tr. and the C1 discharges through thedischarging channel formed by R and the discharging Tr. When the Vc1 fall below
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Vcc/3the coparator output on the trigger terminal become high and timer output become
high again.the discharge Tr. Turn Off and the Vc1 rises again. In the above process, the
section where the timer output is high is the time it takes for the Vc1 to rise from Vcc/3 to
2Vcc/3, and the section where the timer output is low is the time it takes for the Vc1 to
drop from 2Vcc/3 to Vcc/3.
Figure 3.19-Waveform
In this mode of operation, the capacitor charges and discharges between 1/3 V and 2/3 V
and since the triggered mode, the charge and discharge times, and therefore the frequency
are independent of the supply voltage.
3.9 LM358
In this project we have use LM358 as operational amplifier which amplify the very low
voltage, in order of milivolt of temperatue sensor.
The LM158 series consists of two independent, high gain, internally frequency
compensated operational amplifiers which were designed specifically to operate from a
single power supply over a wide range of voltages. Operation from split power supplies is
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also possible and the low power supply current drain is independent of the magnitude of
the power supply voltage.
Application areas include transducer amplifiers, dc gain blocks and all the conventional op
amp circuits which now can be more easily implemented in single power supply systems.
For example, the LM158 series can be directly operated off of the standard +5V power
supply voltage which is used in digital systems and will easily provide the required
interface electronics without requiring the additional 15V power supplies
3.9.1 Features
Internally frequency compensated for unity gain Large dc voltage gain: 100 Db Wide bandwidth (unity gain): 1 MHz (temperature compensated) Wide power supply range Single supply: 3V to 32V or dual supplies: 1.5V to 16V Very low supply current drain (500 A)-essentially independent of supply voltage Low input offset voltage: 2 mV Input common-mode voltage range includes ground Differential input voltage range equal to the power supply voltage Single supply: 3V to 32V Internally frequency compensated for unity gain Internally frequency compensated for unity gain
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3.9.2 Pin And Circuit diagram
Figure 3.20 LM358
Figure 3.21
circuit diagram of LM358 .
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Figure 3.23-LCD interfacing
we use 8 data line for the data transfer from the microcontroller to lcd. Our processor
inside the controller is 8 bit processor, so we use parallel line transfer from microcontroller
to lcd. Three control line R/S, R/W, AND ENABLE is also provided by the
microcontroller itself.
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CHAPTER 4
DESCRIPTION OF MICROCONTROLLER
Look around. Notice the smart intelligent systems? Be it the T.V, washing machines,
video games, telephones, automobiles, aero planes, power systems, or any application
having a LED or a LCD as a user interface, the control is likely to be in the hands of a
microcontroller!
Measure and control, thats where the micro controller is at its best.
Micro controllers are here to stay. Going by the current trend, it is obvious that micro
controllers will be playing bigger and bigger roles in the different activities of our lives.
So where does this scenario leave us? Think about it
4.1Microcontrollers
What is the primary difference between a microprocessor and a micro controller? Unlike
the microprocessor, the micro controller can be considered to be a true Compu ter on a
chip.In addition to the various features like the ALU, PC, SP and registers found on a
microprocessor, the micro controller also incorporates features like the ROM, RAM, Ports,
timers,clock circuits, counters, reset functions etc.
While the microprocessor is more a general-purpose device, used for read, write and
calculations on data, the micro controller, in addition to the above functions also controls
the environment. We have used a whole lot of technical terms already! Dont get worried
about the meanings at this point. We shall understand these terms as we proceed further
For now just be aware of the fact, that all these terms literally mean what they say.
4.2Bits
Before starting on the 8051, here is a quick run through on the bits and bytes. The basic
unit of data for a computer is a bit. Four bits make a nibble.Eight bits or two nibbles make
a byte.Sixteen bits or four nibbles or two bytes make a word.
1024 bytes make a kilobyte or 1KB,and 1024 KB make a Mega Byte or 1MB.
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Thus when we talk of an 8-bit register,we mean the register is capable of holding data of 8
bit.
4.3The8051
The 8051 developed and launched in the early 80`s, is one of the most popular micro
controller in use today. It has a reasonably large amount of built in ROM and RAM. In
addition it has the ability to access external memory. The generic term `8x51` is used to
define the device. The value of x defining the kind of ROM, i.e. x=0, indicates none, x=3,
indicates mask ROM, x=7, indicates EPROM and x=9 indicates EEPROM or Flash.
ROM
The early 8051, namely the 8031 was designed without any ROM. This device could run
only with external memory connected to it. Subsequent developments lead to the
development of the PROM or the programable ROM. This type had the disadvantage of
beingunreliable.
The next in line, was the EPROM or Erasable Programmable ROM. These devices used
ultraviolet light erasable memory cells. Thus a program could be loaded, tested and erased
using ultra violet rays. A new program could then be loaded again.
An improved EPROM was the EEPROM or the electrically erasable PROM. This does not
require ultra violet rays, and memory can be cleared using circuits within the chip itself.
Finally there is the FLASH, which is an improvement over the EEPROM. While the terms
EEPROM and flash are sometimes used interchangeably, the difference lies in the fact that
flash erases the complete memory at one stroke, and not act on the individual cells. .
4.3.1Understanding the basic features of the 8051 core
Lets now move on to a practical example. We shall work on a simple practical application
and using the example as a base, shall explore the various features of the 8051
microcontroller.
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4.4 89S52 MICROCONTROLLER
The AT89S52 is a low-power, high-performance CMOS 8-bit microcontroller with 8K
bytes of in-system programmable Flash memory. The device is manufactured using
Atmels high-density nonvolatile memory technology and is compatible with the industry
standard 80C51 instruction set and pin out.
4.4.1 Description
The on-chip Flash allows the program memory to be reprogrammed in-system or by a
conventional nonvolatile memory programmer. By combining a versatile 8-bit CPU with
in-system programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful
microcontroller which provides a highly-flexible and cost-effective solution to many
embedded control applications. The AT89S52 provides the following standard features:
8K bytes of Flash 256 bytes of RAM 32 I/O lines Watchdog timer Two data pointers Three 16-bit timer/counters A six-vector two-level interrupt architecture A full duplex serial port On-chip oscillator Clock circuitry
In addition, the AT89S52 is designed with static logic for operation down to zero
frequency and supports two software selectable power saving modes. The Idle Mode stops
the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to
continue functioning. The Power-down mode saves the RAM con-tents but freezes the
oscillator, disabling all other chip functions until the next interrupt or hardware reset
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4.4.2 Pin Configurations
Fig-4.2-pin diagram
4.4.3 Block Diagram
Figure 4.7
Fig.4.3
Fig-4.3-block diagram
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4.4.3 Pin Description
VCC
Supply voltage.
GND
Ground.
Ports
Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink
eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-
impedance inputs. Port 0 can also be configured to be the multiplexed low-order
address/data bus during accesses to external program and data memory. In this mode, P0
has internal pull-ups. Port 0 also receives the code bytes during Flash programming and
outputs the code bytes during program verification. External pull-ups are required duringprogram verification.
Port 1
Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers can
sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by
the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally
being pulled low will source current (IIL) because of the internal pull-ups. In addition,
P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2)
and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown in the following
table. Port 1 also receives the low-order address bytes during Flash programming and
verification.
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Table 4.1
Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers can
sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by
the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally
being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the
high-order address byte during fetches from external program memory and during accesses
to external data memory that use 16-bit addresses (MOVX @ DPTR). In this application,
Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data
memory that uses 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2
Special Function Register. Port 2 also receives the high-order address bits and some
control signals during Flash programming and verification.
Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can
sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by
the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externallybeing pulled low will source current (IIL) because of the pull-ups. Port 3 receives some
control signals for Flash programming and verification. Port 3 also serves the functions of
various special features of the AT89S52, as shown in the following table
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EA/VPP
External Access Enable. EA must be strapped to GND in order to enable the device to
fetch code from external program memory locations starting at 0000H up to FFFFH. Note,
however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA
should be strapped to VCC for internal program executions. This pin also receives the 12-
volt programming enable voltage (VPP) during Flash programming.
XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.
4.4.4. Special Function Registers
A map of the on-chip memory area called the Special Function Register (SFR) space is
shown in Table 2.5. Note that not all of the addresses are occupied, and unoccupied
addresses may not be implemented on the chip. Read accesses to these addresses will in
general return random data, and write accesses will have an indeterminate effect. User
software should not write 1s to these unlisted locations, since they may be used in future
products to invoke new features. In that case, the reset or inactive values of the new bitswill always be 0.
Timer 2 Registers: Control and status bits are contained in registers T2CON and T2MOD
for Timer 2. The register pair (RCAP2H, RCAP2L) is the Capture/Reload registers for
Timer 2 in 16-bit capture mode or 16-bit auto-reload mode.
Interrupt Registers: The individual interrupt enable bits are in the IE register. Two
priorities can be set for each of the six interrupt sources in the IP register.
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Table 4.3
Fig 4.3-SFRs
Dual Data Pointer Registers: To facilitate accessing both internal and external data
memory, two banks of 16-bit Data Pointer Registers are provided: DP0 at SFR address
locations 82H-83H and DP1 at 84H-85H. Bit DPS = 0 in SFR AUXR1 selects DP0 andDPS = 1 selects DP1. The user should alwaysinitialize the DPS bit to the appropriate value
before accessing the respective Data Pointer Register.
Power Off Flag: The Power Off Flag (POF) is located at bit 4 (PCON.4) in the PCON
SFR. POF is set to 1 during power up. It can be set and rest under software control and is
not affected by reset.
4.4.5 Memory Organization
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MCS-51 devices have a separate address space for Program and Data Memory. Up to 64K
bytes each of external Program and Data Memory can be addressed.
Program Memory
If the EA pin is connected to GND, all program fetches are directed to external memory.
On the AT89S52, if EA is connected to VCC, program fetches to addresses 0000H through
1FFFH are directed to internal memory and fetches to addresses 2000H through FFFFH
are to external memory.
Data MemoryThe AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a
parallel address space to the Special Function Registers. This means that the upper 128
bytes have the same addresses as the SFR space but are physically separate from SFR
space. When an instruction accesses an internal location above address 7FH, the address
mode used in the instruction specifies whether the CPU accesses the upper 128 bytes of
RAM or the SFR space. Instructions which use direct addressing access the SFR space. For
example, the following direct addressing instruction accesses the SFR at location 0A0H
(which is P2).
MOV 0A0H, #data Instructions that use indirect addressing access the upper 128 bytes of
RAM. For example, the following indirect addressing instruction, where R0 contains
0A0H, accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H).
MOV @R0, #data Note that stack operations are examples of indirect addressing, so the
upper 128 bytes of data RAM are available as stack space.
Watchdog Timer (One-time Enabled with Reset-out)
The WDT is intended as a recovery method in situations where the CPU may be subjected
to software upsets. The WDT consists of a 14-bit counter and the Watchdog Timer Reset
(WDTRST) SFR. The WDT is defaulted to disable from exiting reset. To enable the WDT,
a user must write 01EH and 0E1H in sequence to the WDTRST register (SFR location
0A6H). When the WDT is enabled, it will increment every machine cycle while the
oscillator is running. The WDT timeout period is dependent on the external clock
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frequency. There is no way to disable the WDT except through reset (either hardware reset
or WDT overflow reset). When WDT overflows, it will drive an output RESET HIGH
pulse at the RST pin.
Using the WDT
To enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST
register (SFR location 0A6H). When the WDT is enabled, the user needs to service it by
writing 01EH and 0E1H to WDTRST to avoid a WDT overflow. The 14-bit counter
overflows when it reaches 16383 (3FFFH), and this will reset the device. When the WDTis enabled, it will increment every machine cycle while the oscillator is running. This
means the user must reset the WDT at least every 16383 machine cycles. To reset the
WDT the user must write 01EH and 0E1H to WDTRST. WDTRST is a write-only register.
The WDT counter cannot be read or written. When WDT overflows, it will generate an
output RESET pulse at the RST pin. The RESET pulse duration is 98xTOSC, where TOSC
= 1/FOSC. To make the best use of the WDT, it should be serviced in those sections of
code that will periodically be executed within the time required to prevent a WDT reset.
WDT during Power-down and Idle
In Power-down mode the oscillator stops, which means the WDT also stops. While in
Power-down mode, the user does not need to service the WDT. There are two methods of
exiting Power-down mode: by a hardware reset or via a level-activated external interrupt
which is enabled prior to entering Power-down mode. When Power-down is exited with
hardware reset, servicing the WDT should occur as it normally does whenever the
AT89S52 is reset. Exiting Power-down with an interrupt is significantly different. The
interrupt is held low long enough for the oscillator to stabilize. When the interrupt is
brought high, the interrupt is serviced. To prevent the WDT from resetting the device while
the interrupt pin is held low, the WDT is not started until the interrupt is pulled high. It is
suggested that the WDT be reset during the interrupt service for the interrupt used to exit
Power-down mode. To ensure that the WDT does not overflow within a few states of
exiting Power-down, it is best to reset the WDT just before entering Power-down mode.
Before going into the IDLE mode, the WDIDLE bit in SFR AUXR is used to determine
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whether the WDT continues to count if enabled. The WDT keeps counting during IDLE
(WDIDLE bit = 0) as the default state. To prevent the WDT from resetting the AT89S52
while in IDLE mode, the user should always set up a timer that will periodically exit IDLE,
service the WDT, and reenter IDLE mode. With WDIDLE bit enabled, the WDT will stop
to count in IDLE mode and resumes the count upon exit from IDLE.
UART
The UART in the AT89S52 is one of the basic interfaces which you will find in almost all
the controllers available in the market till date. This interface provides a cost effectivesimple and reliable communication between one controller to another controller.
Timer 0 and 1
Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and Timer 1 in the
AT89C51 and AT89C52.The basic unit of the timer is a free-run counter which is in fact a
register whose numeric value increments by one in even intervals, so that by taking its
value during periods T1 and T2 and on the basis of their difference we can determine how
much time has elapsed. This is a very important part of the microcontroller whose
understanding required most of our time.
Timer 2
Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter.
The type of operation is selected by bit C/T2 in the SFR T2CON. Timer 2 has three
operating modes: capture, auto-reload (up or down counting), and baud rate generator. The
modes are selected by bits in T2CON. Timer 2 consists of two 8-bit registers, TH2 and
TL2. In the Timer function, the TL2 register is incremented every machine cycle. Since a
machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscillator
frequency.
In the Counter function, the register is incremented in response to a 1-to-0 transition at its
corresponding external input pin, T2. In this function, the external input is sampled during
S5P2 of every machine cycle. When the samples show a high in one cycle and a low in the
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next cycle, the count is incremented. The new count value appears in the register during
S3P1 of the cycle following the one in which the transition was detected. Since two
machine cycles (24 oscillator periods) are required to recognize a 1-to-0 transition, the
maximum count rate is 1/24 of the oscillator frequency. To ensure that a given level is
sampled at least once before it changes, the level should be held for at least one full
machine cycle.
Interrupts
The AT89S52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1),
three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. Each of these
interrupt sources can be individually enabled or disabled by setting or clearing a bit in
Special Function Register IE. IE also contains a global disable bit, EA, which disables all
interrupts at once. User software should not write a 1 to this bit position, since it may be
used in future AT89 products. Timer 2 interrupt is generated by the logical OR of bits TF2
and EXF2 in register T2CON. Neither of these flags is cleared by hardware when the
service routine is vectored to. In fact, the service routine may have to determine whether it
was TF2 or EXF2 that generated the interrupt, and that bit will have to be cleared in
software. The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in
which the timers overflow. The values are then polled by the circuitry in the next cycle.
However, the Timer 2 flag, TF2, is set at S2P2 and is polled in the same cycle in which the
timer overflows.
Oscillator Characteristics
XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier that
can be configured for use as an on-chip oscillator, as shown in Figure 16-1. Either a quartz
crystal or ceramic resonator may be used. To drive the device from an external clock
source, XTAL2 should be left unconnected while XTAL1 is driven, as shown in Figure 16-
2. There are no requirements on the duty cycle of the external clock signal, since the input
to the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and
maximum voltage high and low time specifications must be observed.
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REFERENCES
www.datasheetcatalog.com The circuit designers companion by Tim Williams Digital design,2nd edition by Morris Mano The 8051 microcontroller and embedded systems by Muhammad Ali Mazidi and
Janice Gillispie.
Scott MacKenzie, The 8051 microcontroller, 2nd edn., Prentice-Hall Inc.,USA,1995.
Todd D Morton,Embedded Microcontroller, Pearson Education, Inc.,2001 John B Peatman ,Design with Microcontroller, McGraw-hill,USA,1988 Dogan Ibrahim, microcontroller Project in C For the 8051, 1st edn.,Butterworth
Heinemann,2000.
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