short cuts for multiply and divide for positive numbers 1. multiply by 2 k is the same as shift k to...
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Computer Architecture CSE 3322Lecture 13
HW Due 3/24/09 3.4.2a, 3.7.2a, 3.8.1a
Short Cuts for Multiply and Divide
For Positive Numbers 1. Multiply by 2k is the same as shift k to the left, 0 fill 2. Divide by 2k is the same as shift k to the right, 0 fill
0
11
22
31
1
1
2222
2
ccc...cc
cc
nn
in
ii
Short Cuts for Multiply and Divide
For Positive Numbers 1. Multiply by 2k is the same as shift k to the left, 0 fill 2. Divide by 2k is the same as shift k to the right, 0 fill
1
1
2
in
iicc
For 2’s Complement Numbers It does not always work!
Short Cuts for Multiply and Divide
For Positive Numbers 1. Multiply by 2k is the same as shift k to the left, 0 fill 2. Divide by 2k is the same as shift k to the right, 0 fill
1
1
2
in
iicc
For 2’s Complement Numbers It does not always work!Ex: -5 = -0101 , 2’s Complement = 1011Divide by 4 by shift right 2, fill with ?
Short Cuts for Multiply and Divide
For Positive Numbers 1. Multiply by 2k is the same as shift k to the left, 0 fill 2. Divide by 2k is the same as shift k to the right, 0 fill
1
1
2
in
iicc
For 2’s Complement Numbers It does not always work!Ex: -5 = -0101 , 2’s Complement = 1011Divide by 4 by shift right 2, fill with ?1110 is 0001+1=0010 = 2 WRONG!
Floating Point NumbersNormalized Mantissa or Significand and Exponent
Add 0.713 x 10-2 and 0.964 x 10-1
Floating Point NumbersNormalized Mantissa or Significand and Exponent
Add 0.713 x 10-2 and 0.964 x 10-1 1. Align the exponents by shifting the smaller
0.0713 x 10-1
0.9640 x 10-1
Floating Point Numbers Normalized Mantissa or Significand and Exponent
Add 0.713 x 10-2 and 0.964 x 10-1 1. Align the exponents by shifting the smaller
0.0713 x 10-1
0.9640 x 10-1
2. Add 1.0353 x 10-1
Floating Point Numbers
Add 0.713 x 10-2 and 0.964 x 10-1 1. Align the exponents by shifting the smaller
0.0713 x 10-1
0.9640 x 10-1
2. Add 1.0353 x 10-1
3. Normalize 0.10353 x 100
Floating Point Numbers
Add 0.713 x 10-2 and 0.964 x 10-1 1. Align the exponents by shifting the smaller
0.0713 x 10-1
0.9640 x 10-1
2. Add 1.0353 x 10-1
3. Normalize 0.10353 x 100
4. Round off 0.104 x 100
Normalized REAL Binary Number: ±1.yyyyyyyyy x 2eeee
Normalized REAL Binary Number: ±1.yyyyyyyyy x 2eeee
Leading 1 Binary Point Significand = 1.yyyyyyyyyExponent(signed)Arithmetic
Normalized REAL Binary Number: ±1.yyyyyyyyy x 2eeee
Leading 1 Binary Point Significand = 1.yyyyyyyyyExponent(signed)Arithmetic
16
181
41
212 43210
1
0
ccccccc in
ii
143210 nccccc.c
Floating Point Numbers
Add 1.0101 x 23 and 1.1011 x 21
Floating Point Numbers
Add 1.0101 x 23 and 1.1011 x 21 1. Align the exponents by shifting the smaller
1.0101 x 23
0.011011 x 23
Floating Point Numbers
Add 1.0101 x 23 and 1.1011 x 21 1. Align the exponents by shifting the smaller
1.0101 x 23
0.011011 x 23
2. Add 1.101111 x 23
Floating Point Numbers
Add 1.0101 x 23 and 1.1011 x 21 1. Align the exponents by shifting the smaller
1.0101 x 23
0.011011 x 23
2. Add 1.101111 x 23
3. Normalize – Check for Overflow and Underflow
1.101111 x 23
Round - Off
4.56 3 significant digits + .0357 4.5957
Round - Off
4.56 3 significant digits + .0357 4.5957
4.60 Rounded Off
Round - Off
4.56 3 significant digits + .0357 4.5957
4.60 Rounded Off
What if 4.5950 ?
Round - Off
4.56 3 significant digits + .0357 4.5957
4.60 Rounded Off
What if 4.5950 ? 4.60 Round to even
Round - Off
Binary Decimal.00 .00.01 .25.10 .50.11 .75
Round - Off
Binary Decimal.00 .00.01 .25.10 .50 Are there any trailing 1’s ?
If not, round to even.11 .75
Floating Point Numbers
Add 1.0101 x 23 and 1.1011 x 21 1. Align the exponents by shifting the smaller
1.0101 x 23
0.011011 x 23
2. Add 1.101111 x 23
3. Normalize – Check for Overflow and Underflow
1.101111 x 23
4. Round to 4 bits Guard bit = 1 and Round bit = 1
Floating Point Numbers
Add 1.0101 x 23 and 1.1011 x 21 1. Align the exponents by shifting the smaller
1.0101 x 23
0.011011 x 23
2. Add 1.101111 x 23
3. Normalize – Check for Overflow and Underflow
1.101111 x 23
4. Round to 4 bits Guard bit = 1 and Round bit = 1
1.1100 x 23
IEEE 754 Floating Point StandardNormalized REAL Binary Number:
±1.yyyyyyyyy x 2eeee
IEEE 754(-1)S x ( 1 + F) x 2E-127
s exponent+127 significand - 1
1 bit E (8 bits) F (23 bits)
IEEE 754 Floating Point StandardNormalized REAL Binary Number:
±1.yyyyyyyyy x 2eeee
IEEE 754(-1)S x ( 1 + F) x 2E-127
s exponent+127 significand - 1
1 bit E (8 bits) F (23 bits)
Bias Exponent E>0
IEEE 754 Floating Point StandardNormalized REAL Binary Number:
±1.yyyyyyyyy x 2eeee
IEEE 754(-1)S x ( 1 + F) x 2E-127
s exponent+127 significand - 1
1 bit E (8 bits) F (23 bits)
• Only Zero is F = 0 and E = 0• Simplifies data exchange• Compare using integer processes• Accuracy and round-off & Overflow and Underflow
IEEE 754 Floating Point Standard
1 10000010 01010000000000000000000
161
412
23
1
i
iixcF = .25+.0625 = .3125
IEEE 754 Floating Point Standard
1 10000010 01010000000000000000000
161
412
23
1
i
iixcF = .25+.0625 = .3125
E = 27 + 2 = 128 + 2 = 130
IEEE 754 Floating Point Standard
1 10000010 01010000000000000000000
161
412
23
1
i
iixcF = .25+.0625 = .3125
E = 27 + 2 = 128 + 2 = 130
Number = (-1)S x ( 1 + F) x 2E-127
IEEE 754 Floating Point Standard
1 10000010 01010000000000000000000
161
412
23
1
i
iixcF = .25+.0625 = .3125
E = 27 + 2 = 128 + 2 = 130
Number = (-1)S x ( 1 + F) x 2E-127
= – ( 1 + .3125) x 2130 – 127
IEEE 754 Floating Point Standard
1 10000010 01010000000000000000000
161
412
23
1
i
iixcF = .25+.0625 = .3125
E = 27 + 2 = 128 + 2 = 130
Number = (-1)S x ( 1 + F) x 2E-127
= – ( 1 + .3125) x 2130 – 127
= – 1.3125 x 23 = – 1.3125 x 8 = – 10.5
IEEE 754 Floating Point Standard
Consider representing –5 in IEEE 754 Floating Point Format
IEEE 754 Floating Point StandardConsider representing –5 in IEEE 754 Floating Point Format
5 = 101.0 x 20 = 1.01 x 22
IEEE 754 Floating Point StandardConsider representing –5 in IEEE 754 Floating Point Format
5 = 101.0 x 20 = 1.01 x 22
IEEE 754(-1)S x ( 1 + F) x 2E-127
s exponent+127 significand - 1
1bit E (8 bits) F (23 bits)
IEEE 754 Floating Point Standard
Consider representing –5 in IEEE 754 Floating Point Format5 = 101.0 x 20 = 1.01 x 22
IEEE 754(-1)S x ( 1 + F) x 2E-127
s exponent+127 significand - 1
1bit E (8 bits) F (23 bits)
E –127 = 2E = 2 + 127 = 129 = 1000 0001
IEEE 754 Floating Point Standard
Consider representing –5 in IEEE 754 Floating Point Format5 = 101.0 x 20 = 1.01 x 22
IEEE 754(-1)S x ( 1 + F) x 2E-127
s exponent+127 significand - 1
1bit E (8 bits) F (23 bits)
E –127 = 2E = 2 + 127 = 129 = 1000 0001
1 +F = 1.01000 ...
IEEE 754 Floating Point Standard
Consider representing –5 in IEEE 754 Floating Point Format5 = 101.0 x 20 = 1.01 x 22
IEEE 754(-1)S x ( 1 + F) x 2E-127
s exponent+127 significand - 1
1bit E (8 bits) F (23 bits)
1 1000 0001 0100 0000 .... 0000
E = 2 + 127 = 129 = 1000 0001
1 +F = 1.01000 ...
IEEE 754 Floating Point StandardNormalized REAL Binary Number:
±1.yyyyyyyyy x 2eeee
Double PrecisionIEEE 754(-1)S x ( 1 + F) x 2E-1023
s exponent+1023 significand - 1
1 bit E (11 bits) F (20 bits)
significand – 1 (continued)
F (32 bits)
Sequential Network Structures - Review
X1X2
Xn
Y1Y2
Ym
Q1Q2
Qm
Z1 Z2 Zk
Combinational Logic
Register Q
Clock
Stability Conditionclki Y Q
Input
Output
Flip - Flop with NOR Gates
Q = R+Q
Q = S+Q
R
S
PresentState RS Q 00 01 10 11 0 1 Next State Q
Flip - Flop with NOR Gates
Q = R+Q
Q = S+Q
R
S
PresentState RS Q 00 01 10 11 0 0 1 1 Next State Q
Flip - Flop with NOR Gates
Q = R+Q
Q = S+Q
R
S
PresentState RS Q 00 01 10 11 0 0 1 1 1 1 Next State Q
Flip - Flop with NOR Gates
Q = R+Q
Q = S+Q
R
S
PresentState RS Q 00 01 10 11 0 0 1 0 1 1 1 0 Next State Q
Flip - Flop with NOR Gates
Q = R+Q
Q = S+Q
R
S
PresentState RS Q 00 01 10 11 0 0 1 0 ? 1 1 1 0 ? Next State Q
D-latch
C
D
Q
D
C
Q
QS
R
D-latch
C
D
Q
D
C
Q
QS
R
D flip-flop
Output changes only on the trailing clock edge
_Q
Dl a t c h
D
C
Dl a t c h
D
C
D
C
Q
D
C
Q
D flip-flop
Output changes only on the trailing clock edge
_Q
Dl a t c h
D
C
Dl a t c h
D
C
D
C
Q
D
C
Q
Sequential Network Structures - Review
X1X2
Xn
Y1Y2
Ym
Q1Q2
Qm
Z1 Z2 Zk
Combinational Logic
Register Q
Clock
Stability Conditionclki Y Q
Input
Output
Five Components of Computers
Input
Output
MemoryControl
Datapath
Processor
Start by Building the Datapath
1. Access the Instruction from Memory2. Access the Data from Registers3. Perform the Instruction4. Write the Result
PC
InstructionMemory
Next PC Logic
Instruction
Address
Simplified Overview
Access the Instruction from Memory
PC
InstructionMemory
Next PC Logic
Instruction
Address
RegisterFile
Simplified Overview
Access the Data from Registers
PC
InstructionMemory
Next PC Logic
Instruction
Address
RegisterFile
ALU
Simplified Overview
Perform the Instruction
PC
InstructionMemory
Next PC Logic
Instruction
Address
RegisterFile
ALU DataMemory
Addr
Data In
DataOut
Simplified Overview
Write the Result
PC
InstructionMemory
Next PC Logic
Instruction
Address
RegisterFile
ALU DataMemory
Addr
Data In
DataOut
Simplified Overview
Timing Assumption
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