standard cell approach to 3d interconnect crosstalk modeling

Standard Cell Approach to 3D Interconnect Crosstalk Modeling

Dr. A.A. IlumokaAssociate Professor, University of Hartford, CT, USAVisiting Prof, Georgia Institute of Technology ,USA

Visiting Prof, Imperial College, London

Interconnect Effects

Interconnect is Interconnect is 70% chip area70% chip area

DelayDelay

CrosstalkCrosstalk

Logic Logic HazardsHazards

Poor SignalPoor Signal IntegrityIntegrity

Major Issues in Nanoscale VLSI Design

Interconnect Coupling Noise Low Power Design Wafer Scale Integration Thermal Modelling Hardware/Software Co-Design

Interconnect Effects

Delay - due to self parasitic effects. Accounts for up to 70% of clock cycle time in dense high-speed circuits

Crosstalk - due to mutual parasitic effects. Electromagnetic coupling between signal paths

Delay Noise

Extensive work Well characterised Elmore Delay equations Passive Multi-port models ED A tools

Interconnect Modelling

Several approaches reported: Distributed model for lossy Tx Lines (Frye &

Chen) Simplified Pole/Zero Descriptions of circuit

behaviour (Brews) Graph-based approaches - risk graphs

generated for each region (Xue, Kuh & Wang) Reduced-Order Modelling Techniques

(Feldman, Kamon, White)

Problems with Interconnect Modelling

Difficulty Modelling 3D Effects

Difficulty modelling effect of several non-correlated variables ( wire geometry, insulating medium properties)

Lack of re-usability - need to recalculate models for changes in interconnect

Example-based Learning

Map set of Inputs to set of Outputs

Many network formulations

General form: f(x)= Σ ci Gi(x,W)

In p u t 1 In p u t 2 In p u t 3

N eu ra l N etw ork O u tp u ts

AI to the rescue Neural NetworksAI to the rescue Neural Networks

Neural Nets

f(x) = Σ ci Gi (x ,W) (sum over i) x = (x1, x2, x3,…….) are inputs f(x) is output: weighted sum of

activation functions Gi W : weights which parameterize Gi c: coefficients which modify Gi

Types of ANN’s

Many network formulations depending on problem type

SLP: if Gi are sigmoids, suitable for low dim problems

MLP: if f(x) applied as input to another net, more cx problems

Radial Basis - if Gi are Gaussian, suitable for classification problems

Modular Artificial Neural Network (MANN)

All animal brains exhibit some degree of regional specialisation wrt function

Specific parts of the human brain are known to have certain functions e.g. sleep control, memory etc

Certain neural nets called MANN’sMANN’s function in analogous way

MANN

Jacobs, Nowlan and Hinton, (MIT) 1991 Group of sub nets called local experts

competing to learn different aspects of a problem

Competitive learning controlled by a gating network

Useful for high dim problems with input data space stratification

MANN Architecture

G ate In p u t 1 G ate In p u t 2 G ate In p u t 3

N eu ra l N e tw ork O u tp u ts

In p u t 1 In p u t 2 In p u t 3

L oca l E xp ert L

In p u t 1 In p u t 2 In p u t 3

N eu ra l N et In p u ts

In p u t 1 In p u t 2 In p u t 3

L oca l E xp ert 1

In p u t 1 In p u t 2 In p u t 3

L oca l E xp ert 2

In p u t 1 In p u t 2 In p u t 3

G atin g N e tw ork

MANN Probabilistic Weight Update

Training is by back-propagation of error Update of LE weights posed as a max likelihood

problem Initially gating net outputs mixture of LE outputs As learning progresses, gate net tends to select

one LE for each region of input space Learning rule - gate net learns by matching prior

and posterior probabilities that LE was responsible for current output vector

Interconnect Building Blocks - Wirecells

(a) Parallel Pair (PP)

(b) L-Shaped Pair (LP)

© 4-ConductorParallel Pair

(d) 4-Conductor L-Shaped PairFig 2 Wirecells

Wirecell Circuit Extraction

Electrically characterise 3D conducting structures via 3-step process :

EM FieldEM FieldSimulationSimulation

Circuit Circuit ParameterParameterExtractionExtraction

FEMFEMFiniteFiniteElementElementMethodMethod

Parameterized MANN Models

In p u t 1 In p u t 2 In p u t 3

N eu ra l N etw ork O u tp u ts

Wirecell

For each interconnect wirecell Generate Monte Carlo Database for Training

and Testing MANN Store final MANN model in library

(a) Parallel Pair (PP)

(b) L-Shaped Pair (LP)

© 4-ConductorParallel Pair

(d) 4-Conductor L-Shaped PairFig 2 Wirecells

Standard Wirecells

WirecellsChipInterconnect

(a) Parallel Pair (PP)

(b) L-Shaped Pair (LP)

© 4-ConductorParallel Pair

(d) 4-Conductor L-Shaped PairFig 2 Wirecells

MANN-Based Standard Wirecell Approach

MANNWirecellModels

ChipInterconnect

In p u t 1 In p u t 2 In p u t 3

N eu ra l N e tw ork O u tp u ts

In p u t 1 In p u t 2 In p u t 3

N eu ra l N e two rk O u tp u ts

In p u t 1 In p u t 2 In p u t 3

N eu ra l N e tw ork O u tp u ts

In p u t 1 In p u t 2 In p u t 3

N eu ra l N e tw ork O u tp u ts

Advantages of MANN-Based Approach

Simultaneous modelling of several non-correlated interconnect variables

Can handle 3D systems of multiple conductors

Computationally efficient due to wirecell re-usability

Results for some CMOS Circuits

Ring Oscillator Operational

Transconductance Amplifier

Combinational Logic Circuit

Ring Oscillator Circuit

Ring Oscillator Results

Ring Osc Layout showing isocouples

Operational Transconductance Amp

OTA DC Transfer Characteristic

Effect of Crosstalk on DC Gain

OTA Isocouples: Contours of Equi-coupling

CMOS COMB LOGIC

Crosstalk in Comb Logic Circuit

Conclusions & Future Research

Efficient method presented for MANN-based standard cell approach to interconnect delay & crosstalk prediction

Contours of equi-coupling - isocouples - derived to guide layout

Future research - develop reverse neural net mapping for automated crosstalk minimization by manipulation of interconnect geometry and material properties