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AN10343MicroPak soldering informationRev. 2 — 30 December 2010 Application note

Document information

Info Content

Keywords MicroPak, footprint, Ball Grid Array (BGA), Wafer-Level Chip Scale Package (WLCSP)

Abstract This application note describes evaluation of recommended solder land patterns for mounting MicroPak packages

NXP Semiconductors AN10343MicroPak soldering information

Revision history

Rev Date Description

v.2 20101230 text and graphics updated to latest standards

AN10343 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.

Application note Rev. 2 — 30 December 2010 2 of 32

Contact informationFor more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: [email protected]


1. Introduction

NXP Semiconductors’ PicoGate and MicroPak packages are approximately ten to fifteen times smaller than conventional SO14 packages, providing significant miniaturization in space-constrained applications. They are available in a wide range of logic functions with a wide range of choices and deliver the right levels of performance.

PicoGate and MicroPak devices include single-, dual-, and triple-gate functions and are housed in 5-, 6-, 8- and 10-pin packages with selectable functions. To support the widest range of applications, every product in the portfolio is specified for high-temperature operation (40 C to +125 C). Since they perform the most popular functions and either meet or exceed competitive specifications, they eliminate single-source problems.

Driven by applications with a very small circuit board mounting area, the PicoGate logic family offers the most popular logic functions for space-constrained systems such as cellular phones, pagers, and portable consumer products (CD players, VCRs, cameras, hard disks, notebook computers, PC cards, CD ROMs, and Personal Digital Assistants (PDAs)). They can also be used as simple glue/repair logic to implement last minute design changes or to eliminate dependence on intricate line layout patterns and to simplify routing.

This application note describes the following mounting methods for MicroPak packages:

• MicroPak footprint

• SOT886/833-1 MicroPak on WLCSP/BGA footprint and vice versa

• SOT996-2 MicroPak on VSSOP8 footprint and vice versa

2. MicroPak Overview

2.1 Package description

The MicroPak package is a near Chips Scale Package (CSP) Land Grid Array (LGA) type plastic encapsulated package with a copper lead frame base. The package has no leads or bumps with peripheral land terminals at the bottom of the package. The terminals are soldered to solder lands on the Printed-Circuit Board (PCB), after solder paste is deposited.

An overview of released MicroPak packages is given in Table 1.



xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx

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Table 1. Overview MicroPak packages

Properties Number of pins

Pitch [mm] Height [mm] 5 or 6 8 10 16

0.3 0.35 SOT1115 SOT1116 - -

-

019aab128

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0.35 0.5/0.35 SOT891/SOT1202 SOT1089/SOT1203 SOT1081-1

019aab124

SOT1115

019aab125

SOT1116

019aab126

SOT891/SOT1202

019aab127

SOT1089/SOT1203 SOT1081

xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx

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n0.5 (Dual-in-Line) 0.5 SOT886 SOT833-1 - -

SOT1039-1

-

Table 1. Overview MicroPak packages …continued

Properties Number of pins

Pitch [mm] Height [mm] 5 or 6 8 10 16

19aab132

019aab133

SOT1039

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0.5 0.5 - SOT902-1 SOT1049-1

0.5 (VSSOP8 replacement)

0.5 - SOT996-2 -

019aab129

SOT886

019aab130

SOT833

019aab131

SOT902

0

SOT1049

019aab134

SOT996


3. MicroPak soldering information

3.1 Solder paste

The following solder pastes were used in the evaluation and gave satisfactory results:

• PbSn paste: Alpha Metals Omnix 5002 (62 % Sn, 36 % Pb, 2 % Ag)

• SAC paste: Alpha Metals Omnix 310 (95.5 % Sn, 4 % Ag, 0.5 % Cu)

Both these solder pastes are 'no-clean'; due to the small stand-off height of the MicroPak, proper cleaning underneath the package is not possible.

Both Pb or Pb-free solder can be used, although it is advised to use Pb-free solder paste as this is required by European legislation from July 2006 onwards.

A wide variety of Pb-free solder pastes is available, containing combinations of tin, copper, antimony, silver, bismuth, indium, and other elements. The different types of Pb-free solder pastes have a wide range of melting temperatures. Solders with a high melting point may be more suitable for the automotive industry, whereas solders with a low melting point can be used for soldering consumer IC packages.

The most common substitute for SnPb solder, is Pb-free paste SAC, which is a combination of tin (Sn), silver (Ag), and copper (Cu). These three elements are usually in the range of 3 % to 4 % of Ag and 0 % to 1 % of Cu, which is near eutectic. SAC typically has a melting temperature of around 217 C, and requires a reflow temperature of more than 235 C.

A no-clean solder paste does not require cleaning after reflow soldering and is therefore preferred, provided that this is possible within the process window. If a no-clean paste is used, flux residues may be visible on the board after reflow.

For more information on the solder paste, please contact your solder paste supplier.

3.2 Moisture sensitivity level and storage

The MicroPak components have a very good package moisture resistance. The Moisture Sensitivity Level (MSL) according to JEDEC-STD-020D is MSL1.

Table 2. Typical solder paste characteristics

Solder (near eutectic alloys) Melting temperature Minimum peak reflow temperature

SnPb 183 C 215 C

SAC 217 C 235 C

Table 3. Pb-free process - Package classification reflow temperatures (from J-STD-020D)

Package thickness Volume (<350 mm3)

Volume (350 mm3 to 2000 mm3)

Volume (>2000 mm3)

<1.6 mm 260 C 260 C 260 C

1.6 mm to 2.5 mm 260 C 250 C 245 C

>2.5 mm 250 C 245 C 245 C




3.3 Stencil

Table 4 gives the recommended electroformed stencil thickness for MicroPak packages with a terminal pitch of greater than or equal to 0.5 mm, between 0.4 mm to 0.5 mm and less than or equal to 0.4 mm. Side wall roughness of the apertures should be smooth to improve the solder paste release.

3.4 MicroPak placement

The required placement accuracy of a package depends on a variety of factors, such as package size and the terminal pitch, but also the package type itself. During reflow, when the solder is molten, a package that has not been placed perfectly may center itself on the pads: this is referred to as self-alignment. Therefore, the required placement accuracy of a package may be less tight if it is a trusted self-aligner. It is known, for example, that BGAs are good at self-alignment, as the package body essentially rests on a number of droplets of molten solder, resulting in minimal friction.

Table 5 gives typical placement tolerances as a function of the IC package terminal pitch.

3.5 Reflow soldering

The most important step in reflow soldering is reflow itself, when the solder paste deposits melt and soldered joints are formed. This is achieved by passing the boards through an oven and exposing them to a temperature profile that varies in time. A temperature profile essentially consists of three phases:

1. Preheat: the board is warmed up to a temperature that is lower than the melting point of the solder alloy

2. Reflow: the board is heated to a peak temperature that is well above the melting point of the solder, but below the temperature at which the components and board’s Organic Solderability Preservative (OSP) finish are damaged

3. Cooling down: the board is cooled down rapidly, so that soldered joints freeze before the board exits the oven

The peak temperature during reflow has an upper and a lower limit:

• Lower limit of peak temperature; the minimum peak temperature must be at least high enough for the solder to make reliable solder joints; this is determined by solder paste characteristics; contact your paste supplier for details

• The upper limit of the peak temperature must be lower than:

Table 4. Typical stencil thicknesses

IC package pitch Stencil thickness

0.5 mm 150 m

0.4 mm to 0.5 mm 100 m or 125 m

0.4 100 m

Table 5. Typical placement accuracies

Package terminal pitch Placement tolerance

0.65 mm 100 m

<0.65 mm 50 m




– the maximum temperature the component can withstand according to the specification

– the temperature at which the board or the components on the board are damaged (contact your board supplier for details)

Examples of a general purpose Pb-free reflow profile are shown is Figure 1 and Table 6.

[1] Delta between Tp(min) and Tp(max) preferably limited to 10 C.

Additional soldering information and guidelines for board-mounting of surface-mount IC packages are described in AN10365 ‘Surface mount reflow soldering description’.

Fig 1. Example of a general purpose Pb-free reflow profile

019aab067

tph

β

χ

tr

Tp(max)

temperature

time

Tph(min)

α

Tph(max)

Tr(max)

Tp(min)

tph

time to peak

Table 6. Explanation of the reflow temperature profile

Parameter Value(s) Typical value(s) Remark

1 C/s to 5 C/s 2 C/s determined by component and board type and finish

ß 1C/s to 5 C/s 1.5 C/s determined by component and board type and finish

2 C/s to +6 C - determined by component and board type and finish

Tph(min) to Tph(max)

120 C to 200 C 160 °C depends on the solder paste used - contact your solder paste supplier

tph 0 s to 180 s 100 s to 180 s depends on the solder paste used - contact your solder paste supplier

tr 30 s to 90 s 40 s to 70 s depends on board finish and solder paste voiding behavior - contact your board and solder paste supplier

Tp(min) 235 C - temperature measured in the solder at the coldest spot [1]

Tp(max) 260 C 245 C depends on the board and the board finish in case of OSP and the most temperature-sensitive component used on the board [1]

reflow atmosphere

- - general purpose reflow is under air atmosphere, nitrogen reflow is allowed




3.6 MicroPak soldering information for WLCSP/BGA footprint

Figure 2 shows the recommended solder land pattern for mounting the MicroPak XSON6 (SOT886) package. Using this pattern results in a very good electrical and mechanical connection which can also be inspected and tested for continuity. Using the land grid array package eliminates the co-planarity issues of leaded and WLCSP/BGA type devices.

The 6-pad MicroPak package available from NXP Semiconductors is alternately second-sourced by Fairchild Semiconductors. Although the footprint for the Texas Instruments WLCSP/BGA package is physically smaller, the MicroPak very easily fits the same footprint. Figure 3 shows the recommended solder land pattern for the WLCSP/BGA package and the footprint of the MicroPak SOT886.

Placing the WLCSP/BGA package on the MicroPak footprint is not recommended. As can be seen in Figure 4, the larger land pattern for the MicroPak may cause solder starvation due to the limited amount of solder in the package solder ball. Solder paste would help, although there will be limited mechanical contact. This is true for the larger Pb-free WLCSP/BGA balls. Even less mechanical contact is achieved with the smaller PbSn WLCSP/BGA balls. Figure 5 shows the recommended solder land pattern for the WLCSP/BGA package and the footprint of the MicroPak SOT833-1.

3.7 SOT996-2 MicroPak soldering information for VSSOP8 footprint

Figure 6a shows the recommended solder land pattern footprint for mounting the MicroPak XSON8 (SOT996-2) package. Using this pattern results in a very good electrical and mechanical connection which can also be inspected and tested for continuity. Figure 6b shows how the MicroPak XSON8 (SOT996-2) package fits the VSSOP8 (SOT765-1) solder land pattern footprint. Figure 6c shows the VSSOP8 (SOT765-1) package on its VSSOP8 solder land pattern footprint.

Fig 2. MicroPack footprint Fig 3. MicroPack SOT886 on BGA footprint

Fig 4. BGA on MicroPack footprint Fig 5. MicroPack SOT833-1 on BGA footprint

001aac255

0.49

0.3

0.5

1

0.52 0.49 solder land pattern

package footprint

dimensions in mm 001aac256

0.5 mm

solder land pattern

package footprint

0.5 mm

0.225 mm

001aac257

solder land pattern

package footprint

001aan102

0.5 mm

solder land pattern

package footprint




4. Manual repair of leadless MicroPak

In general, replacing a defective component on a soldered board, during repair or rework, can be carried out either manually or with a dedicated repair station.

The rework process should consist of the following steps:

1. Dry bake the board and the new component, if necessary

2. Mark the position of the old component

3. Remove the old component

4. Prepare the site

5. Print solder paste on the new component

6. Reflow the solder paste on the new component

7. Place the new component on the board

8. Solder the new component

9. Visual inspection, electrical measurement, and X-ray inspection

The above steps are summarized in Figure 7.

a. XSON8/SOT996-2 package superimposed on its recommended solder land pattern footprint

b. XSON8/SOT996-2 package superimposed on solder land pattern footprint for VSSOP8/SOT765-1

c. VSSOP8/SOT765-1 package superimposed on its solder land pattern footprint

Fig 6. Solder land pattern footprints for mounting package MicroPak XSON8U (SOT996-2)

019aab069

component

Cu footprint

0.25

1.10

1.00

019aab070

component

Cu footprint

0.30

0.40

0.75

019aab071

component

Cu footprint

0.30

0.40

0.75




Fig 7. Rework process steps

019aab068

MARK POSITIONOLD COMPONENT

SITEPREPARATION

PRINT PASTE ONNEW

COMPONENT

REFLOW PASTE

manualrepair only

repairstation only

both

REMOVE OLDCOMPONENT WITH

HOT AIR GUN

DE-SOLDER OLDCOMPONENT WITH

INFRARED

PLACE NEWCOMPONENTMANUALLY

PLACE NEWCOMPONENT USING

REPAIR STATION

DRY BAKEBOARD AND NEW

COMPONENT

INSPECTION

SOLDER NEWCOMPONENT WITH

HOT AIR GUN

SOLDER NEWCOMPONENT WITH

INFRARED




5. Package outline and PCB footprint

The package outline drawing and recommended soldering footprint of the released packages are shown in Figure 10 to Figure 19. The soldering footprints are only recommended and may be different for specific application requirements.




Fig 8. SOT833-1 (XSON8) package outline

terminal 1index area

REFERENCESOUTLINEVERSION

EUROPEANPROJECTION

ISSUE DATEIEC JEDEC JEITA

SOT833-1 - - -MO-252- - -

SOT833-1

07-11-1407-12-07

DIMENSIONS (mm are the original dimensions)

XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm

D

E

e1

e

A1

b

LL1

e1 e1

0 1 2 mm

scale

Notes1. Including plating thickness.2. Can be visible in some manufacturing processes.

UNIT

mm 0.250.17

2.01.9

0.350.27

A1max b E

1.050.95

D e e1 L

0.400.32

L1

0.50.6

A(1)

max

0.5 0.04

1

8

2

7

3

6

4

5

8×(2)

4×(2)

A




Fig 9. SOT833-1 (XSON8) solder footprint

sot833-1_fr

0.250(4 ×)

2.450

0.950(7 ×)

1.250

0.500

0.475

1.000

1.150pa + oa

2.100

2.150pa + oa

0.300(4 ×)

0.125(4 ×)

solder land

solder paste

placement area

occupied area

Dimensions in mm

0.025




Fig 10. SOT886 (XSON6) package outline



EUROPEANPROJECTION


SOT886 MO-252

SOT886

04-07-1504-07-22


XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm

D

E

e1

e

A1

b

LL1

e1

0 1 2 mm

scale

Notes1. Including plating thickness.2. Can be visible in some manufacturing processes.

UNIT

mm 0.250.17

1.51.4

0.350.27

A1max b E

1.050.95

D e e1 L

0.400.32

L1

0.50.6

A(1)

max

0.5 0.04

1

6

2

5

3

4

6×(2)

4×(2)

A




Fig 11. SOT886 (XSON6) solder footprint

sot886_fr

solder resist

occupied area

solder paste = solderland

Dimensions in mm

0.425(6×)

1.250

0.675

1.700

0.325(6×)

0.270(6×)

0.370(6×)

0.500

0.500







EUROPEANPROJECTION


SOT891

SOT891

05-04-0607-05-15

XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm

D

E

e1

e

A1

b

LL1

e1

0 1 2 mm

scale


UNIT

mm 0.200.12

1.050.95

0.350.27

A1max b E

1.050.95

D e e1 L

0.400.32

L1

0.350.55

Amax

0.5 0.04

1

6

2

5

3

4

A6×(1)

4×(1)

Note1. Can be visible in some manufacturing processes.





sot891_fr

solder resist

occupied area

solder land plussolder paste

Dimensions in mm

0.25(6×)

0.15(6×)

0.5(6×)

0.6(6×)

0.7

0.35

1.4

1.05




Fig 14. SOT902-1 (XQFN8U) package outline


EUROPEANPROJECTION


SOT902-1 MO-255- - - - - -

SOT902-1

05-11-2507-11-14

UNIT Amax

mm 0.5

A1

0.250.15

0.050.00

1.651.55

0.350.25

0.150.05


XQFN8U: plastic extremely thin quad flat package; no leads;8 terminals; UTLP based; body 1.6 x 1.6 x 0.5 mm

b D Le1

1.651.55

eE L1 v

0.10.55 0.5

w

0.05

y

0.05 0.05

y1

0 1 2 mm

scale

X

C

yCy1



B AD

E

detail X

A

A1

b

8

7

6

5

e1

e1

ee

AC B∅ v M

C∅ w M4

1

2

3

L

L1

metal areanot for soldering




Fig 15. SOT902-1 (XQFN8U) solder footprint

clearance

placement plusoccupied area

solder lands

solder paste

Dimensions in mm

0.450(8×)

0.400(8×)

0.220 (7×)0.270(8×)

1.900

1.900

0.110

0.500 1.0001.200

0.320

0.500

1.200

sot902-1_fr




Fig 16. SOT996-2 (XSON8U) package outline


EUROPEANPROJECTION


SOT996-2 - - -- - -

SOT996-2

07-12-1807-12-21

UNIT Amax

mm 0.5 0.050.00

0.350.15

3.12.9 0.5 1.5 0.5

0.30.60.4 0.1 0.05

A1


XSON8U: plastic extremely thin small outline package; no leads;8 terminals; UTLP based; body 3 x 2 x 0.5 mm

0 1 2 mm

scale

b D

2.11.9

E e e1 L L1

0.150.05

L2 v w

0.05

y y1

0.1

C

yCy1

X

b

1 4

8 5

e1

eAC Bv M

Cw M

L2

L1

L


B AD

E

detail X

A A1




Fig 17. SOT996-2 (XSON8U) solder footprint

placement area

occupied area

solder lands

solder paste

Dimensions in mm

sot996-2_fr

0.025

0.0250.250

2.000

2.000 4.0003.400

pa + oa4.250

0.900

2.400 pa + oa

0.5000.500




Fig 18. SOT1039-1 (HXQFN16U) package outline


EUROPEANPROJECTION


SOT1039-1 - - -- - -

SOT1039-1

07-11-1407-12-01

UNIT Amax

mm 0.5 0.050.00

0.350.25

1.951.75

3.12.9

1.951.75 0.5 1.5 0.35

0.25 0.1

A1


HXQFN16U: plastic thermal enhanced extremely thin quad flat package; no leads;16 terminals; UTLP based; body 3 x 3 x 0.5 mm

0 2.5 5 mm

scale

b D

3.12.9

Dh E Eh e e1

1.5

e2 L L1

0.10.0

v w

0.05

y

0.05

y1

0.1

C

yCy1

X

b

e2

e1

e

e

1/2 e

1/2 e

AC Bv M

Cw M


Dh

Eh

L1

L

9

8

1316

12

4

1

5

B A


D

E

detail X

A1A




Fig 19. SOT1039-1 (HXQFN16U) solder footprint

placement area

occupied area

solder lands

solder paste double masking

Dimensions in mm

sot1039-1_fr

0.01250.0125

0.500

0.240

0.500

1.500

2.000

4.250

3.300 pa + oa

0.2400.500

0.500

1.5002.0003.300

pa + oa4.250

0.800 0.350

0.800

0.350

1.800 2.300 4.000

1.800

1.500

2.300

4.000




Fig 20. SOT1049-1 (XQFN10U) package outline


EUROPEANPROJECTION


SOT1049-1 - - -MO-255- - -

UNIT

mmmaxnommin

0.50 0.050.030.00

1.651.551.45

2.12.01.9

0.58 0.5 1.50.40.30.2

0.1

A


0 2.5 mm

scale

A1 b

0.300.230.15

D E e e1 e2

1.16

e3 L L1

0.150.080.00

v w

0.05

y

0.1

y1

0.05

XQFN10U: plastic extremely thin quad flat package; no leads; 10 terminals;UTLP based; body 2 x 1.55 x 0.5 mm

C

yCy1

X


B AD

E

detail X

A

A1


e2

e1

e3

e

1/2 e1

AC Bv M

Cw M

L1

L

b

1

2

3

4

5

6

7

8

9

10

08-02-2810-02-05

SOT1049-1




Fig 21. SOT1049-1 (XQFN10U) solder footprint

placement area

occupied area

solder lands

solder paste

Dimensions in mm

sot1049-1_fr

1.100

0.500 0.500

2.000

2.300pa + oa

3.250

3.000

0.800 2.6002.8501.900

pa + oa

0.0125

0.0125

0.250




Fig 22. SOT1081-1 (XSON10U) package outline


EUROPEANPROJECTION


SOT1081-1 - - -- - -

SOT1081-1

UNIT

mmmaxnommin

0.500.480.46

0.050.030.00

1.81.71.6

1.11.00.9

0.35 1.40.40.30.2

0.100.050.00

0.1

A


XSON10U: plastic extremely thin small outline package; no leads;10 terminals; UTLP based; body 1 x 1.7 x 0.5 mm

A1 b

0.200.150.10

D E e e1 e2

0.6

L L1 L2

0.450.350.25

v w

0.05

y

0.05

y1

0.1

0 0.5 1 mm

scale

C

yCy1

B A


D

E

detail X

A

A1

b

e2

e1

eAC Bv M

Cw M

L

L2

L11 5

610

08-03-2808-04-18




Fig 23. SOT1081-1 (XSON10U) solder footprint

SOT1081-1

Remark:Stencil of 75 μm is recommended.A stencil of 75 μm gives an aspect ratio of 0.77With a stencil of 100 μm one will obtain an aspect ratio of 0.58

Footprint information for reflow soldering of XSON10U package

solder land plus solder paste

occupied area

solder land

solder paste deposit

solder resist

Hx

ByHy

0.05

C

PD 0.05

Ay

Dimensions in mm

Ay By C D Hy

1.26 0.26 0.5 0.15

P

0.35 1.4

Hx

1.75

Generic footprint pattern

Refer to the package outline drawing for actual layout





ReferencesOutlineversion

Europeanprojection

Issue dateIEC JEDEC JEITA

SOT1089 MO-252

sot1089_po

10-04-0910-04-12

Unit

mmmaxnommin

0.5 0.04 1.401.351.30

1.051.000.95

0.55 0.350.350.300.27

A(1)

Dimensions

Note1. Including plating thickness.2. Visible depending upon used manufacturing technology.

XSON8: extremely thin small outline package; no leads;8 terminals; body 1.35 x 1 x 0.5 mm SOT1089

A1 b L1

0.400.350.32

0.200.150.12

D E e e1 L

0 0.5 1 mm

scale


E

D

detail X

A

A1

L

L1

b

e1

e


1

4

8

5

(4×)(2)

(8×)(2)

X





sot1089_fr

Footprint information for reflow soldering of XSON8 package SOT1089

solder resist

occupied area

solder paste = solder land

Dimensions in mm

0.15(8×)

0.35(3×)

0.25(8×)

0.5(8×)

0.6(8×)

0.7 1.4

1.4




6. Legal information

6.1 Definitions

Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information.

6.2 Disclaimers

Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.

In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products.

NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect.

Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.

Evaluation products — This product is provided on an “as is” and “with all faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates and their suppliers expressly disclaim all warranties, whether express, implied or statutory, including but not limited to the implied warranties of non-infringement, merchantability and fitness for a particular purpose. The entire risk as to the quality, or arising out of the use or performance, of this product remains with customer.

In no event shall NXP Semiconductors, its affiliates or their suppliers be liable to customer for any special, indirect, consequential, punitive or incidental damages (including without limitation damages for loss of business, business interruption, loss of use, loss of data or information, and the like) arising out the use of or inability to use the product, whether or not based on tort (including negligence), strict liability, breach of contract, breach of warranty or any other theory, even if advised of the possibility of such damages.

Notwithstanding any damages that customer might incur for any reason whatsoever (including without limitation, all damages referenced above and all direct or general damages), the entire liability of NXP Semiconductors, its affiliates and their suppliers and customer’s exclusive remedy for all of the foregoing shall be limited to actual damages incurred by customer based on reasonable reliance up to the greater of the amount actually paid by customer for the product or five dollars (US$5.00). The foregoing limitations, exclusions and disclaimers shall apply to the maximum extent permitted by applicable law, even if any remedy fails of its essential purpose.

6.3 TrademarksNotice: All referenced brands, product names, service names and trademarks are the property of their respective owners.




7. Contents

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 MicroPak Overview . . . . . . . . . . . . . . . . . . . . . . 32.1 Package description . . . . . . . . . . . . . . . . . . . . . 3

3 MicroPak soldering information. . . . . . . . . . . . 63.1 Solder paste . . . . . . . . . . . . . . . . . . . . . . . . . . . 63.2 Moisture sensitivity level and storage. . . . . . . . 63.3 Stencil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73.4 MicroPak placement . . . . . . . . . . . . . . . . . . . . . 73.5 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . . 73.6 MicroPak soldering information for

WLCSP/BGA footprint . . . . . . . . . . . . . . . . . . . 93.7 SOT996-2 MicroPak soldering information for

VSSOP8 footprint . . . . . . . . . . . . . . . . . . . . . . . 9

4 Manual repair of leadless MicroPak . . . . . . . . 10

5 Package outline and PCB footprint . . . . . . . . 12

6 Legal information. . . . . . . . . . . . . . . . . . . . . . . 316.1 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 316.2 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 316.3 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 31

7 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

© NXP B.V. 2010. All rights reserved.

For more information, please visit: http://www.nxp.comFor sales office addresses, please send an email to: [email protected]

Date of release: 30 December 2010

Document identifier: AN10343

Please be aware that important notices concerning this document and the product(s)described herein, have been included in section ‘Legal information’.

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