an1141 pi3usb30532 and pi3usb31532 application note for ......in intel kaby lake design guideline,...

17
AN1141 PI3USB30532 and PI3USB31532 Application Note for Type-C Applications Paul Li, PTC, Diodes Incorporated AN1141 Rev 1 Application Note 1 of 17 www.diodes.com April 2018 © Diodes Incorporated Table of Contents 1.0 Introduction 2.0 Why passive MUX (PI3USB3X532) is better than active MUX in notebook design? 3.0 PI3USB3X532 in source-host: notebook, tablet, AIO and desktop PC 4.0 What are the recommended maximum traces for PI3USB3X532 in Intel ® notebook design? 5.0 PI3USB3X532 in sink-device: Monitor and HDTV 6.0 PI3USB3X532 in sink-device: Docking station 7.0 The I2C control of PI3USB3X532 8.0 Power and power de-coupling 9.0 Layout guideline 10.0 Appendix: application reference schematics

Upload: others

Post on 10-Mar-2020

4 views

Category:

Documents


0 download

TRANSCRIPT

Page 1: AN1141 PI3USB30532 and PI3USB31532 Application Note for ......In Intel Kaby Lake design guideline, Intel recommends a maximum 8” DP 1.2 trace without passive MUX and 4.1” with

AN1141

PI3USB30532 and PI3USB31532 Application Note for Type-C Applications Paul Li, PTC, Diodes Incorporated

AN1141 – Rev 1 Application Note

1 of 17

www.diodes.com

April 2018 © Diodes Incorporated

Table of Contents

1.0 Introduction 2.0 Why passive MUX (PI3USB3X532) is better than active MUX in notebook design? 3.0 PI3USB3X532 in source-host: notebook, tablet, AIO and desktop PC 4.0 What are the recommended maximum traces for PI3USB3X532 in Intel

® notebook design?

5.0 PI3USB3X532 in sink-device: Monitor and HDTV 6.0 PI3USB3X532 in sink-device: Docking station 7.0 The I2C control of PI3USB3X532 8.0 Power and power de-coupling 9.0 Layout guideline 10.0 Appendix: application reference schematics

Page 2: AN1141 PI3USB30532 and PI3USB31532 Application Note for ......In Intel Kaby Lake design guideline, Intel recommends a maximum 8” DP 1.2 trace without passive MUX and 4.1” with

AN1141

AN1141 – Rev 1 Application Note

2 of 17

www.diodes.com

April 2018 © Diodes Incorporated

1.0 Introduction

The PI3USB30532 and PI3USB31532 Type-C cross switch family is developed using cutting-edge technology

to achieve high performance of DP 1.2, DP 1.3, USB 3.0, USB 3.1 signals in type-C applications.

PI3USB3X532 is fully compliant to Type-C specifications. PI3USB3X532 was first to the market and

successfully designed in many varying applications, such as notebooks, tablets, AIO, PCs, monitors, HDTVs,

docking stations, etc. The PI3USB3X532 was also designed in Intel® reference schematic and designed in Intel

customer reference demonstration tablet.

2.0 Why passive MUX (PI3USB3X532) is better than active MUX in notebook design?

The market needs for notebooks are:

6-8 hours in battery running time

ability to boot-up 6-8 days after power-off

Intel mobile CPU/chipset can now achieve 6W power consumption, thus:

The ~0.4W to ~0.6W power consumption from an active MUX is too high and not acceptable

Especially when compared to the <0.003W power consumption from PI3USB3X532, which is a 99% power saving compared to an active MUX

3.0 PI3USB3X532 in Source-Host: Notebook, Tablet, AIO and Desktop PC

Figure 1. PI3USB30532, PI3USB31532 in Notebook, Tablet, All-in-One and Desktop PC

Intel is a trademark of Intel Corporation in the U.S. and/or other countries

Page 3: AN1141 PI3USB30532 and PI3USB31532 Application Note for ......In Intel Kaby Lake design guideline, Intel recommends a maximum 8” DP 1.2 trace without passive MUX and 4.1” with

AN1141

AN1141 – Rev 1 Application Note

3 of 17

www.diodes.com

April 2018 © Diodes Incorporated

4.0 What are the recommended maximum traces for PI3USB3X532 in Intel notebook design?

4.1 DP 1.2, DP 1.3 In Intel Kaby Lake design guideline, Intel recommends a maximum 8” DP 1.2 trace without passive MUX and 4.1” with passive MUX as to pass a DP 1.2 compliance test.

Intel deducted 3.9” trace from the 8” DP 1.2 trace for the passive MUX, which is conservative for a high performance passive MUX such as PI3USB3X532, as explained in figure 2, figure 3a, figure 3b and in table 1 below.

Based on the PI3USB30532 DP 1.2 eye compliance test results in figure 3a and figure 3b, as well the trace data in figure 2 and table 1, it‘s recommended as below.

Maximum 6.2” trace for DP 1.2 (5.4Gbps) path, as:

Intel DP 1.2 source PI3USB3X532 Type-C connector Maximum 4.0” trace for DP 1.3 (8Gbps) path, as:

Intel DP 1.3 source PI3USB31532 Type-C connector

(Assuming the layout and schematics are as recommended as using 90Ω traces without chokes, etc., and in reasonable system conditions)

4.2 USB3.0, USB3.1 Based on the PI3USB30532 USB 3.0 eye compliance test results in figure 4a and figure 4b, as well the trace data in figure 2 and table 1, we recommend the following guidelines:

Maximum 8.5” trace for USB3.0 (5Gbps) path, as:

USB3.0 host PI3USB3X532 Type-C connector Maximum 4.5” trace for USB3.1 (10Gbps) path, as:

USB3.1 host PI3USB31532 Type-C connector

(Assuming the layout and schematics are as recommended below and in reasonable system conditions)

Table 1 - The insertion loss of PI3USB3X532 versus Intel trace board Insertion

loss of 3” trace on

Intel trace board

Per inch PI3USB30532 PI3USB31532

30532: Insertion

loss

30532: equivalent

trace length (loss of 30532/1”

trace)

30532: good-max

DP 1.2 trace in Intel 8” trace

topology

31532: Insertion

loss

31532: equivalent

trace length (loss of 31532/1”

trace)

31532: good-max DP 1.2 trace in Intel 8” trace topology

Insertion loss at 5Gbps

(USB3.0)

-2.1db -0.70db -1.2db 1.71” (1.2db/0.70

db)

N/A -1.06db 1.51” (1.06db/0.7

0db)

N/A

Insertion loss at

5.4Gbps (DP1.2)

-2.3db -0.77db -1.3db 1.69” (1.3db/0.77

db)

6.31” (8”-1.69”)

-1.23db 1.60” (1.23db/0.7

7db)

6.40” (8”-

1.60”)

Insertion loss at 8Gbps (DP1.3)

-3.2db -1.07db N/A N/A N/A -1.63db 1.52” (1.63db/1.0

7db)

N/A

Insertion loss at

10Gbps (USB3.1)

-3.96db -1.32db N/A N/A N/A -1.68db 1.27” (1.68db/1.3

2db)

N/A

Table 1 the insertion loss of the 3” FR4 differential trace was measured using Intel trace board and Agilent N5230A 20GHz Network Analyzer, as setup in Figure 2. Note:

The data above is not linear, because the performances vary with different switch-routings and signal-types between PI3USB30532 and PI3USB31532, while PI3USB31532 has better performance than PI3USB30532 mostly at higher speed

N/A is for not applicable

Page 4: AN1141 PI3USB30532 and PI3USB31532 Application Note for ......In Intel Kaby Lake design guideline, Intel recommends a maximum 8” DP 1.2 trace without passive MUX and 4.1” with

AN1141

AN1141 – Rev 1 Application Note

4 of 17

www.diodes.com

April 2018 © Diodes Incorporated

4.3 The insertion loss of 3” differential trace on Intel trace board

Figure 2. The insertion loss of 3” FR4 differential trace on Intel trace board is measured using Agilent N5230A 20GHz Network Analyzer (chart by James Liu)

Page 5: AN1141 PI3USB30532 and PI3USB31532 Application Note for ......In Intel Kaby Lake design guideline, Intel recommends a maximum 8” DP 1.2 trace without passive MUX and 4.1” with

AN1141

AN1141 – Rev 1 Application Note

5 of 17

www.diodes.com

April 2018 © Diodes Incorporated

4.4 The PI3USB30532 Intel Haswell MB DP 1.2 eye compliance test result

Figure 3a. The eye of DP 1.2 (5.4Gbps) compliance test using PI3USB30532 setup (figure 3b) with Asus®

H97i-plus MB (Intel Haswell) and 7” trace passed the DP 1.2 HBR2 compliance test 3.1 using Tektronix scope at 400mV, 3.5db pre-emphasis. The upper waveform is at T3 with emulation cable in scope. The

lower waveform is at T2 without emulation cable (waveform by Jerry Chou). ASUS Trademark is either a US registered trademark or trademark of Asustek Computer Inc. in the United States and/or other countries

Page 6: AN1141 PI3USB30532 and PI3USB31532 Application Note for ......In Intel Kaby Lake design guideline, Intel recommends a maximum 8” DP 1.2 trace without passive MUX and 4.1” with

AN1141

AN1141 – Rev 1 Application Note

6 of 17

www.diodes.com

April 2018 © Diodes Incorporated

4.5 Test Setup

Figure 3b. The test setup of PI3USB30532 with 7” trace (2.8”+3.9”+0.3”) using Intel Haswell DP 1.2 source passed DP 1.2 (5.4Gbps) eye compliance test 3.1 as in figure 3a

Page 7: AN1141 PI3USB30532 and PI3USB31532 Application Note for ......In Intel Kaby Lake design guideline, Intel recommends a maximum 8” DP 1.2 trace without passive MUX and 4.1” with

AN1141

AN1141 – Rev 1 Application Note

7 of 17

www.diodes.com

April 2018 © Diodes Incorporated

Figure 4a. The Tx and Rx eyes passed the USB 3.0 (5Gbps) compliance test at the USB 3.0 connector of notebook (Intel Haswell) without PI3USB30532 EV board. To be compared to figure 4b with

PI3USB30532 EVB (waveform by Jerry Chou)

Page 8: AN1141 PI3USB30532 and PI3USB31532 Application Note for ......In Intel Kaby Lake design guideline, Intel recommends a maximum 8” DP 1.2 trace without passive MUX and 4.1” with

AN1141

AN1141 – Rev 1 Application Note

8 of 17

www.diodes.com

April 2018 © Diodes Incorporated

Figure 4b. The Tx and Rx eyes passed USB 3.0 (5Gbps) compliance test with 10.2” trace (5.5”+3.3”+1.4”) using notebook (Intel Haswell) and PI3USB30532 EV board. To be compared to figure

4a without PI3USB30532 EV board (waveform by Jerry Chou).

Page 9: AN1141 PI3USB30532 and PI3USB31532 Application Note for ......In Intel Kaby Lake design guideline, Intel recommends a maximum 8” DP 1.2 trace without passive MUX and 4.1” with

AN1141

AN1141 – Rev 1 Application Note

9 of 17

www.diodes.com

April 2018 © Diodes Incorporated

5.0 PI3USB3X532 in Sink-device: Monitor and HDTV

Figure 5. PI3USB30532, PI3USB31532 in monitor and HDTV

No active DP re-driver and USB3.0 re-driver needed in type-C MUX (PI3USB30532) or between the switches in cascading (PI3USB30532, PI3WVR12412, PI3PCIE3242).

o Because there are sufficient total source and sink equalization, as: Up to 9db output pre-emphasis (equalization) in DP source and USB3.0 Tx Up to 9db input equalization in DP scalar and USB3.0 Rx receiver.

o The total 18db equalization in source and sink is sufficient to compensate the estimated total insertion loss from the topology in figure 5:

Max 7.7db from total 10” traces Max 4db from 2m type-Cable Max 1.5db from PI3USEB30532 Max 1.5db from PI3WVR12412 or PI3PCIE3242

Page 10: AN1141 PI3USB30532 and PI3USB31532 Application Note for ......In Intel Kaby Lake design guideline, Intel recommends a maximum 8” DP 1.2 trace without passive MUX and 4.1” with

AN1141

AN1141 – Rev 1 Application Note

10 of 17

www.diodes.com

April 2018 © Diodes Incorporated

6.0 PI3USB3X532 in Sink-device: Docking Station

7.0 The I2C Control of PI3USB3X532

PI3USB3X532 has total three I2C registers: Conf [2:0], which is mapped between the I2C control signals and the configuration tables (source, sink) as in figure-7.

When using I2C interface to control PI3USB3X532, the I2C controller (in PD or MCU) will need sending total three bytes to PI3USB30532 in sequence as:

Start #1 byte for address as “10101000” (assuming A1_A0 set to 00, while last 0 for write)” #2 byte for chip-ID as fixed “00000000” #3 byte for Conf [2:0] control as “00000111” (assuming Conf [2:0]=111 as for USB3+DPx2 swapped)

Stop (must have stop, otherwise uncertainty may occur)

Page 11: AN1141 PI3USB30532 and PI3USB31532 Application Note for ......In Intel Kaby Lake design guideline, Intel recommends a maximum 8” DP 1.2 trace without passive MUX and 4.1” with

AN1141

AN1141 – Rev 1 Application Note

11 of 17

www.diodes.com

April 2018 © Diodes Incorporated

Figure 7. The I2C-control of the configuration table for source-sink (source-sink tables are the same)

I2C-controls PI3USB30532 in real application

For both source and sink applications, when a type-C plug is plugging into the source or sink type-C connectors with PI3USB30532 and PD, the I2C controller (in PD or MCU) shall I2C-control PI3USB30532 as:

DPx4 only, non-swap: Start 10101000 (last 0 for write) 0000000000000010stop

DPx4 only, swapped: Start 10101000 0000000000000011stop

USB3.0 only, non-swap: Start 10101000 0000000000000100stop

USB3.0 only, swapped: Start 10101000 0000000000000101stop

USB3+DPx2, non-swap: Start 10101000 0000000000000110stop

USB3+DPx2, swapped: Start 1010100 0000000000000111stop

Page 12: AN1141 PI3USB30532 and PI3USB31532 Application Note for ......In Intel Kaby Lake design guideline, Intel recommends a maximum 8” DP 1.2 trace without passive MUX and 4.1” with

AN1141

AN1141 – Rev 1 Application Note

12 of 17

www.diodes.com

April 2018 © Diodes Incorporated

8.0 Power and Power De-coupling

Use 0.1µf in size of 0402 for all the VDD (any power pins) pins of the IC device, as close to the VDD pins as possible, within 2-3mm if feasible.

Use dedicated VDD and GND planes for to minimize the jitters coupled between channel trough power sources.

9.0 Layout Guideline 9.1 Recommend 90Ω differential impedance trace for differential DP and USB 3.0 signals

Figure 8. The trace width and clearance

Use 6-7-6 mils for trace-space-trace for the micro-strip lines (the traces on top and bottom layers) for 90Ω differential impedance.

Use 6-5-6 mils for trace-space-trace for the strip-lines (the traces inside layers) for 90Ω differential impedance.

Use FR4. Using standard 4 to 8 layers stack-up with 0.062 inch thick PCB. For micro-strip lines, using ½ OZ Cu plated is ok. For strip-lines in 6 plus players, using 1 OZ Cu is better. The trace length miss-matching shall be less than 5 mils for the “+” and “–“ traces in the same pairs More pair-to-pair spacing for minimal crosstalk Target differential Zo of 90Ω ±15%

Page 13: AN1141 PI3USB30532 and PI3USB31532 Application Note for ......In Intel Kaby Lake design guideline, Intel recommends a maximum 8” DP 1.2 trace without passive MUX and 4.1” with

AN1141

AN1141 – Rev 1 Application Note

13 of 17

www.diodes.com

April 2018 © Diodes Incorporated

9.2 The PCB Layers Stackup

No new PCB technology required. Use FR4 is fine. Using standard 4 to 8 layers stack-up with 0.062 inch thick PCB. For micro strip lines, using ½ OZ Cu plated is ok. For strip line in 6 plus players, using 1 OZ Cu is better.

Figure 9. The Stackup

Stackup

Plane Material Thickness (mil)

Solder mask Mask paint 1.2

Signal Copper 1.9

Prepreg 2116 4.4

Vcc Copper 1.4

Core 47

Vss Copper 1.4

Prepreg 2116 4.4

Signal Copper 1.9

Solder mask Mask paint 1.2

Total 62.4

Page 14: AN1141 PI3USB30532 and PI3USB31532 Application Note for ......In Intel Kaby Lake design guideline, Intel recommends a maximum 8” DP 1.2 trace without passive MUX and 4.1” with

AN1141

AN1141 – Rev 1 Application Note

14 of 17

www.diodes.com

April 2018 © Diodes Incorporated

9.3 The Layout Guidance for the Trace Routings

Figure 10. The layout guidance for the trace routings

Don’t use EMI chokes, because PI3USB30532 and PI3USB31532 are passive switches not having EMI issues.

The differential traces shall be away from the strong EMI source and devices, such as TTL, switching-power traces and devices, with at least 30mil to 50mil space.

No other components shall piggy ride on the differential traces.

Page 15: AN1141 PI3USB30532 and PI3USB31532 Application Note for ......In Intel Kaby Lake design guideline, Intel recommends a maximum 8” DP 1.2 trace without passive MUX and 4.1” with

AN1141

AN1141 – Rev 1 Application Note

15 of 17

www.diodes.com

April 2018 © Diodes Incorporated

10.0 Appendix: Application Reference Schematics

PI3USB30532 DFP-source reference schematic for type-C PD/DP/ALT application

PI3USB30532 UFP-sink reference schematic for type-C PD/DP/ALT application

Use 0.22uf if output

swing >1.2V or using

re-drivers

USB3controller

RX2-

CONF1/SCL

TX1-

C33 0.2u

D2-

ADDR0

C23

0.1u

AUX-

C27

0.1u

+3V3

C40 0.1u

D+

C35 0.2u

C37 0.33u

RX1-

C32 0.33u

R32

200K

12

CONF2/SDA

R28 100K1 2

CONF2/

SDA

C24

0.1u

C26

0.1u

R14NC (for I2C)

12

PI3USB30532

U2

13121110

987654

41

123

14

15

16

17

18

19

20

2122232425262728293031323334

35

36

37

38

39

40

VDDTX-/RX-TX+/RX+VDDDP3-DP3+VDDDP2-DP2+VDD

PG

ND

MODEDP1+DP1-

A0

GN

DR

X+

/TX

+R

X-/

TX

-G

ND

AU

X+

AU

X-

SBU2/SBU1SBU1/SBU2

VDDRX1-/TX1-

RX1+/TX1+VDD

TX1-/RX1-TX1+/RX1+

VDDTX2-/RX2-

TX2+/RX2+VDD

RX2-/TX2-RX2+/TX2+

CO

NF

0/A

1C

ON

F1

/SC

LG

ND

CO

NF

2/S

DA

DP

0+

DP

0-

Vbus

control

RX1+

RX

1+

R24 01 2

No-chokes between 30532 and type-C connector, because30532 is a passive switch without EMI issue.

D0-

R22 01 2

TX2+

R19 01 2

CONF0/

A1

KUSB-8-A-P-3-1-1-01-ST1,

C41 0.2u

C34 0.2u

R262M

12

R17 01 2

TX2-

CC2

TX2+D1- R20 01 2

C22

10u

TVS

Source

charging

circuit

R30

200K

12

C25

0.1u

RX+

R15NC (for I2C)

12

+3V3

D-

D3+

RX

2-

RX

2+

CONF1/

SCL

Contact Diodes local sales for TVS

AUX+

C31 0.33u

C28

0.1u

R21 01 2

Type-C Recep.

J 2

A3B10

A4B9A5B8A6B7A7B6A8B5A9B4

A10B3

A11B2

A12B1

B11A2

B12A1

TX1-RX1-VBUSVBUSCC1SBU2D+D-D-D+SBU1CC2VBUSVBUSRX2-TX2-RX2+TX2+GNDGND

RX1+TX1+GNDGND

Layout

C29

0.1u

R27 100K1 2

C36 0.2u

PD controller

RX2+

C42 0.2u

CC1

TX+

C38 0.33u

TVS

TX1-

RX1+

R16

4.7K

12

USB2 D+/-

RX1-

DP source

RX2-

TX1+

+3V3

RX-

D3-

TX-

See source truth table for

the control of CONF[2:0]

C39 0.1u

+3V3

TX2-

RX2+

R29

200K1

2

Vbus

control

D0+

D2+

TX1+

D1+

R18 01 2

R13

NC1

2

R31

200K

12

R252M

12

C76-C83 are "must have" to prevent non-DP compliant3.3V signals from plug-in as real-seen-case.

CONF0/A1

R23 01 2

RX

1-

+3V3C30

100uf

PI3USB30532 reference schematic for source application

RX2+

R7 1M1 2

CONF2/

SDA

PD controller

D+

C20 0.2u

RX-

D1-

RX1

-

TX2-

RX1+

Vbus

control

RX+

RX2-

See sink truth table for

the control of CONF[2:0]

Sink

charging

circuit

+3V3

R8 1M1 2

C7

0.1u

C16 0.2u

TVS

RX1-

D3-

R4

4.7K

12

R9

200K

12

C17 0.1u

RX2

-

RX2-

C2

0.1u

TX1+

D-

+3V3

+3V3

TX2+

+3V3

D3+

C11 0.2u

AUX+

PI3USB30532 reference schematic for sink application

R1

NC

12

C21 0.2u

PI3USB30532

U1

13121110987654

41

123

14

15

16

17

18

19

20

2122232425262728293031323334

35

36

37

38

39

40

VDDTX-/RX-TX+/RX+VDDDP3-DP3+VDDDP2-DP2+VDD

PG

ND

MODEDP1+DP1-

A0

GN

DR

X+

/TX

+R

X-/

TX-

GN

DA

UX

+A

UX

-

SBU2/SBU1SBU1/SBU2

VDDRX1-/TX1-

RX1+/TX1+VDD

TX1-/RX1-TX1+/RX1+

VDDTX2-/RX2-

TX2+/RX2+VDD

RX2-/TX2-RX2+/TX2+

CO

NF0

/A1

CO

NF1

/SC

LG

ND

CO

NF2

/SD

AD

P0

+D

P0

-

C14 0.33u

TX2-

ADDR0

No-chokes between 30532 and type-C connector, because30532 is a passive switch without EMI issue.

D1+

C4

0.1u

CC1

AUX-

D2+

R3NC (for I2C)

12

TX+

CONF1/SCL

C13 0.33u

RX1+

R62M

12

CONF1/

SCL

C10 0.2uD0-

R52M

12

R2NC (for I2C)

12

TX2+

CONF2/SDA

RX2

+

C5

0.1u

C8

0.1u

Vbus

control

DPreceiver

TX-

C19 0.1u

C6

0.1u

TVS

R11

200K

12

C12 0.33u

Layout

RX2+

CONF0/A1

C18 0.2u

USB2 D+/-

TX1-

D0+

TX1-

CC2

C3

0.1u

TX1+

C15 0.33u

D2-

R10

200K

12

+3V3

R12

200K

12

RX1

+

CONF0/

A1

C55-C61, C63 are "must have" to prevent non-DP compliant 3.3Vsignals from plug-in as real-seen-case.

C9

100uf

Type-C Recep.

J 1

A3B10A4B9A5B8A6B7A7B6A8B5A9B4

A10B3

A11B2

A12B1

B11A2

B12A1

TX1-RX1-VBUSVBUSCC1SBU2D+D-D-D+SBU1CC2VBUSVBUSRX2-TX2-RX2+TX2+GNDGND

RX1+TX1+GNDGND

USB3controller

Contact Diodes local sales for TVS

C1

10u

RX1-

Page 16: AN1141 PI3USB30532 and PI3USB31532 Application Note for ......In Intel Kaby Lake design guideline, Intel recommends a maximum 8” DP 1.2 trace without passive MUX and 4.1” with

AN1141

AN1141 – Rev 1 Application Note

16 of 17

www.diodes.com

April 2018 © Diodes Incorporated

PI3USB31532 DFP-source reference schematic for type-C PD/DP/ALT application

PI3USB31532 UFP-sink reference schematic for type-C PD/DP/ALT application

TX1-

C74 0.33u

C72

100uf+3V3

CONF1/SCL

R57 01 2

TX-

D3+

R58 01 2

R67

200K

12

RX-

See source truth table for

the control of CONF[2:0]

TX1-

R59NC

12

C79 0.33u

C78 0.2u

D-RX2-

C65

0.1u

C71

0.1u

RX

1+

TVS

+3V3

RX1-

D2+

R56 01 2

+3V3

C67

0.1u

R66

200K

12

C75 0.2u

TX2+

RX

1-

TX2-

RX2+

CONF0/

A1

R50

4.7K

12

R51 01 2

USB2 D+/-

+3V3

RX2-

R68

200K

12

AUX-

R64 100K1 2

Source

charging

circuit

C70

0.1u

TX2+

C73 0.33u

PI3USB31532 reference schematic for source application

RX1+

RX1+

No-chokes between 31532 and type-C connector, because31532 is a passive switch without EMI issue.

CONF2/SDA

Use 0.22uf if output

swing >1.2V or using

re-drivers

D1-

CONF0/A1

R612M

12

R52 01 2

AUX+ C81 0.1u

RX

2-

D+

R49NC (for I2C)

12

PD controller

C77 0.2u

Vbus

control

+3V3

C68

0.1u

C76 0.2u

TVS

RX2+

R60270K

12

+3V3ADDR0

Type-C Recep.

J 4

A3B10A4B9A5B8A6B7A7B6A8B5A9B4

A10B3

A11B2

A12B1

B11A2

B12A1

TX1-RX1-VBUSVBUSCC1SBU2D+D-D-D+SBU1CC2VBUSVBUSRX2-TX2-RX2+TX2+GNDGND

RX1+TX1+GNDGND

CC1

D3-

TX1+

R65

200K

12

D1+

C82 0.1u

C66

0.1u

C64

10u

KUSB-8-A-P-3-1-1-01-ST1,

C80 0.33u

CC2TX1+

R53 01 2

Layout

TX2-

TX+

R47

NC

12

CONF1/

SCL

C118-C125 are "must have" to prevent non-DP compliant 3.3Vsignals from plug-in as real-seen-case.

R622M

12

R54 01 2

RX1-

PI3USB31532

U4

13121110

987654

41

123

14

15

16

17

18

19

20

2122232425262728293031323334

35

36

37

38

39

40

MODE1TX-/RX-TX+/RX+VDDDP3-DP3+VDDDP2-DP2+VDD

PG

ND

MODEDP1+DP1-

A0

GN

DR

X+

/TX

+R

X-/

TX

-G

ND

AUX

+A

UX

-

SBU2/SBU1SBU1/SBU2

VDDRX1-/TX1-

RX1+/TX1+VDD

TX1-/RX1-TX1+/RX1+

VDDTX2-/RX2-

TX2+/RX2+VDD

RX2-/TX2-RX2+/TX2+

CO

NF

0/A

1C

ON

F1

/SC

LG

ND

CO

NF

2/S

DA

DP

0+

DP

0-

DP source

C83 0.2u

R63 100K1 2

R55 01 2

D2-

R48NC (for I2C)

12

CONF2/

SDA

D0-

Contact Diodes local sales for TVS

RX+

C69

0.1u

RX

2+

Vbus

control

D0+

C84 0.2u

USB3controller

PI3USB31532 reference schematic for sink application

TX2-D+

R392M

12

C55 0.33u

RX+

R46

200K

12

TX1-

CONF1/SCL

TX1-

Layout

D0-

R41270K

12

AUX-

D3+

USB3controller

Vbus

control

RX2+

TX1+

+3V3

CONF0/

A1

R35NC (for I2C)

12

USB2 D+/-

R34NC (for I2C)

12

C47

0.1u

R44

200K

12

RX2-

+3V3

RX1+

C48

0.1u

+3V3

+3V3

TX+

D0+

D2-

C61 0.1u

CONF0/A1

C53 0.2u

CONF1/

SCL

TX2+

No-chokes between 31532 and type-C connector, because31532 is a passive switch without EMI issue.

RX1

+

C43

10u

C52 0.2u

R33

NC

12

Vbus

control

ADDR0

R37NC

12

C45

0.1u

C50

0.1u

C97-C103, C105 are "must have" to prevent non-DP compliant 3.3Vsignals from plug-in as real-seen-case.

+3V3

R42 1M1 2

+3V3

D3-

C46

0.1u

CC2

TVS

TX2-

D2+

DPreceiver

AUX+

Type-C Recep.

J 3

A3B10A4B9A5B8A6B7A7B6A8B5A9B4

A10B3

A11B2

A12B1

B11A2

B12A1

TX1-RX1-VBUSVBUSCC1SBU2D+D-D-D+SBU1CC2VBUSVBUSRX2-TX2-RX2+TX2+GNDGND

RX1+TX1+GNDGND

C44

0.1u

R45

200K

12

TX2+

TX1+

R43

200K

12

TVS

C62 0.2u

C54 0.33u

R382M

12

RX2-

RX2

-

Sink

charging

circuit

C51

100uf

RX1

-

PD controller

TX-

RX1-

CC1

D1+

C58 0.2u

RX2

+

CONF2/

SDA

C57 0.33u

R36

4.7K

12

C60 0.2u

PI3USB31532

U3

13121110987654

41

123

14

15

16

17

18

19

20

2122232425262728293031323334

35

36

37

38

39

40

MODE1TX-/RX-TX+/RX+VDDDP3-DP3+VDDDP2-DP2+VDD

PG

ND

MODEDP1+DP1-

A0

GN

DR

X+

/TX

+R

X-/

TX-

GN

DA

UX

+A

UX

-

SBU2/SBU1SBU1/SBU2

VDDRX1-/TX1-

RX1+/TX1+VDD

TX1-/RX1-TX1+/RX1+

VDDTX2-/RX2-

TX2+/RX2+VDD

RX2-/TX2-RX2+/TX2+

CO

NF0

/A1

CO

NF1

/SC

LG

ND

CO

NF2

/SD

AD

P0

+D

P0

-

C56 0.33u

C63 0.2u

Contact Diodes local sales for TVS

D-

RX1-

C49

0.1u CONF2/SDA

D1-

See sink truth table for

the control of CONF[2:0]

C59 0.1u

RX2+

RX-

R40 1M1 2

RX1+

Page 17: AN1141 PI3USB30532 and PI3USB31532 Application Note for ......In Intel Kaby Lake design guideline, Intel recommends a maximum 8” DP 1.2 trace without passive MUX and 4.1” with

AN1141

AN1141 – Rev 1 Application Note

17 of 17

www.diodes.com

April 2018 © Diodes Incorporated

IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated website, harmless against all damages. Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel. Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized application. Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings noted herein may also be covered by one or more United States, international or foreign trademarks. This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the final and determinative format released by Diodes Incorporated.

LIFE SUPPORT Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express written approval of the Chief Executive Officer of Diodes Incorporated. As used herein: A. Life support devices or systems are devices or systems which: 1. are intended to implant into the body, or

2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in significant injury to the user.

B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or to affect its safety or effectiveness. Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems. Copyright © 2018, Diodes Incorporated www.diodes.com