type-c application using pi3usb30532 and …...in intel kabylake design guideline, intel recommends...

Diodes-Pericom Semiconductor

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Type-C application using PI3USB30532 and PI3USB31532

By Paul Li

Table of Content

1.0 Introduction 2.0 Why passive MUX (PI3USB3X532) is better than active MUX in notebook design? 3.0 PI3USB3X532 in source-host: Notebook, tablet, AIO and desktop PC 4.0 What are the recommended maximum traces for PI3USB3X532 in Intel notebook design? 5.0 PI3USB3X532 in sink-device: Monitor and HDTV 6.0 PI3USB3X532 in sink-device: Docking station 7.0 The I2C control of PI3USB3X532 8.0 Power and power de-coupling 9.0 Layout guideline 10.0 Appendix: application Reference Schematics


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1.0 Introduction The PI3USB30532, PI3USB31532 type-C cross switch family is developed using cutting-edge technology to achieve high performance of DP 1.2, DP 1.3, USB 3.0, USB 3.1 signals in type-C applications. PI3USB3X532 is fully compliant to type- C specifications. PI3USB3X532 was first to the market and successfully designed in many and various applications, such as notebook, tablet, AIO, PC, monitor, HDTV, docking stations, etc. PI3USB3X532 was also designed in Intel reference schematic and designed in Intel customer reference demonstration tablet.

2.0 Why passive MUX (PI3USB3X532) is better than active MUX in notebook design? The market requests notebooks:

Running for 6-8 hours in battery operation

Boot-up after power-off for 6-8 days

Intel mobile CPU/chipset can now achieve 6W power consumption, thus:

The ~0.4W to ~0.6W power consumption from an active MUX is way too high and not reasonable.

Especially when compared to the <0.003W power consumption from PI3USB3X532, which is a 99% power saving compared to an

active MUX.

3.0 PI3USB3X532 in source-host: Notebook, tablet, AIO and desktop PC

Figure 1, PI3USB30532, PI3USB31532 in notebook, tablet all-in-one and desktop PC


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4.0 What are the recommended maximum traces for PI3USB3X532 in Intel notebook design? 4.1 DP 1.2, DP 1.3 In Intel Kabylake design guideline, Intel recommends maximum 8” DP 1.2 trace without passive MUX and 4.1” with passive MUX as to pass

DP 1.2 compliance test.

Intel deducted 3.9” trace from the 8” DP 1.2 trace for the passive MUX, which is conservative for a high performance passive MUX such as

PI3USB3X532, as explained in figure 2, figure 3a, figure 3b and in table-1 below.

Based on the PI3USB30532 DP 1.2 eye compliance test results in figure 3a and figure 3b, as well the trace data in figure 2 and table-1, it is

recommended as below.

Maximum 6.2” trace for DP 1.2 (5.4Gbps) path, as:

Intel DP 1.2 source PI3USB3X532 type-C connector

Maximum 4.0” trace for DP 1.3 (8Gbps) path, as:

Intel DP 1.3 source PI3USB31532 type-C connector

(Assuming the layout and schematics are as recommended as using 90ohm traces without chokes, etc., and in reasonable system

conditions)

4.2 USB3.0, USB3.1 Based on the PI3USB30532 USB 3.0 eye compliance test results in figure 4a and figure 4b, as well the trace data in figure 2 and table-1, it is

recommended as below.

Maximum 8.5” trace for USB3.0 (5Gbps) path, as:

USB3.0 host PI3USB3X532 type-C connector

Maximum 4.5” trace for USB3.1 (10Gbps) path, as:

USB3.1 host PI3USB31532 type-C connector

(Assuming the layout and schematics are as recommended below and in reasonable system conditions)

Table 1 the insertion loss of PI3USB3X532 versus Intel trace board

Insertion

loss of 3”

trace on

Intel trace

board

Per inch

PI3USB30532 PI3USB31532

30532:

Insertion

loss

30532:

equivalent trace

length (loss of

30532/1” trace)

30532: good-

max DP 1.2

trace in Intel

8” trace

topology

31532:

Insertion

loss

31532:

equivalent trace

length (loss of

31532/1” trace)

31532: good-

max DP 1.2

trace in Intel

8” trace

topology

Insertion loss

at 5Gbps (USB3.0)

-2.1db -0.70db -1.2db 1.71”

(1.2db/0.70db)

NA -1.06db 1.51”

(1.06db/0.70db)

NA

Insertion loss at

5.4Gbps (DP1.2)

-2.3db -0.77db -1.3db 1.69”

(1.3db/0.77db)

6.31”

(8”-1.69”)

-1.23db 1.60”

(1.23db/0.77db)

6.40”

(8”-1.60”)

Insertion loss at

8Gbps (DP1.3)

-3.2db -1.07db NA NA NA -1.63db 1.52”

(1.63db/1.07db)

NA

Insertion loss at

10Gbps (USB3.1)

-3.96db -1.32db NA NA NA -1.68db 1.27”

(1.68db/1.32db)

NA

Table 1 the insertion loss of the 3” FR4 differential trace was measured using Intel trace board and Agilent N5230A 20GHz Network

Analyzer, as setup in figure-2.

Note:

The data above is not linear, because the performances vary with different switch-routings and signal-types between PI3USB30532

and PI3USB31532, while PI3USB31532 has better performance than PI3USB30532 mostly at higher speed.

NA is for not applicable.


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4.3 The insertion loss of 3” differential trace on Intel trace board

Figure 2 the insertion loss of 3” FR4 differential trace on Intel trace board is measured using Agilent N5230A 20GHz Network Analyzer (chart by James Liu)

4.4 The PI3USB30532 Intel Haswell MB DP 1.2 eye compliance test result


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Figure 3a the eye of DP 1.2 (5.4Gbps) compliance test using PI3USB30532 setup (figure 3b) with Asus H97i-plus MB (Intel Haswell) and 7” trace passed the DP 1.2 HBR2 compliance test 3.1 using Tektronix scope at 400mV, 3.5db pre-emphasis. The upper waveform is at T3 with emulation cable in scope. The lower waveform is at T2 without emulation cable (waveform by Jerry Chou).


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4.5 The test setup of 4.4

Figure 3b the test setup of PI3USB30532 with 7” trace (2.8”+3.9”+0.3”) using Intel Haswell DP 1.2 source passed DP 1.2 (5.4Gbps) eye compliance test 3.1 as in figure 3a


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Figure 4a the Tx and Rx eyes passed the USB 3.0 (5Gbps) compliance test at the USB 3.0 connector of notebook (Intel Haswell) without PI3USB30532 EV board. To be compared to figure 4b with PI3USB30532 EVB (waveform by Jerry Chou)


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Figure 4b the Tx and Rx eyes passed USB 3.0 (5Gbps) compliance test with 10.2” trace (5.5”+3.3”+1.4”) using notebook (Intel Haswell) and PI3USB30532 EV board. To be compared to figure 4a without PI3USB30532 EV board (waveform by Jerry Chou).


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5.0 PI3USB3X532 in sink-device: Monitor and HDTV

Figure 5, PI3USB30532, PI3USB31532 in monitor and HDTV

No active DP re-driver and USB3.0 re-driver needed in type-C MUX (PI3USB30532) or between the switches in cascading

(PI3USB30532, PI3WVR12412, PI3PCIE3242).

o Because there are sufficient total source and sink equalization, as:

Up to 9db output pre-emphasis (equalization) in DP source and USB3.0 Tx

Up to 9db input equalization in DP scalar and USB3.0 Rx receiver.

o The total 18db equalization in source and sink is sufficient to compensate the estimated total insertion loss from

the topology in figure 5:

Max 7.7db from total 10” traces

Max 4db from 2m type-Cable

Max 1.5db from PI3USEB30532

Max 1.5db from PI3WVR12412 or PI3PCIE3242


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6.0 PI3USB3X532 in sink-device: Docking station

Figure 6, PI3USB30532, PI3USB31532 in docking station

7.0 The I2C control of PI3USB3X532 PI3USB3X532 has total three I2C registers as Conf [2:0], which is mapped between the I2C control signals and the configuration tables

(source, sink) as in figure-7.

When using I2C interface to control PI3USB3X532, the I2C controller (in PD or MCU) will need sending total three bytes to PI3USB30532

in sequence as:

Start

#1 byte for address as “10101000” (assuming A1_A0 set to 00, while last 0 for write)”

#2 byte for chip-ID as fixed “00000000”

#3 byte for Conf [2:0] control as “00000111” (assuming Conf [2:0]=111 as for USB3+DPx2 swapped)

Stop (must have stop, otherwise uncertainty may occur)


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Figure 7, The I2C-control of the configuration table for source-sink (source-sink tables are the same)

I2C-controls PI3USB30532 in real application

For both source and sink applications, when a type-C plug is plugging into the source or sink type-C connectors with PI3USB30532 and PD,

the I2C controller (in PD or MCU) shall I2C-control PI3USB30532 as:

DPx4 only, non-swap:

Start 10101000 (last 0 for write) 0000000000000010stop

DPx4 only, swapped:

Start 10101000 0000000000000011stop

USB3.0 only, non-swap:

Start 10101000 0000000000000100stop

USB3.0 only, swapped:

Start 10101000 0000000000000101stop

USB3+DPx2, non-swap:

Start 10101000 0000000000000110stop

USB3+DPx2, swapped:

Start 1010100 0000000000000111stop


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8.0 Power and power de-coupling

Use 0.1uf in size of 0402 for all the Vdd (any power pins) pins of the IC device, as close to the Vdd pins as possible, within 2-3mm if

feasible.

Use dedicated Vdd and GND planes for to minimize the jitters coupled between channel trough power sources.

9.0 Layout guideline 9.1 Recommend 90 ohm differential impedance trace for differential DP and USB 3.0 signals

Figure 8, the trace width and clearance

Use 6-7-6 mils for trace-space-trace for the micro-strip lines (the traces on top and bottom layers) for 90 ohm differential

impedance.

Use 6-5-6 mils for trace-space-trace for the strip-lines (the traces inside layers) for 90 ohm differential impedance.

Use FR4.

Using standard 4 to 8 layers stack-up with 0.062 inch thick PCB.

For micro-strip lines, using ½ OZ Cu plated is ok.

For strip-lines in 6 plus players, using 1 OZ Cu is better.

The trace length miss-matching shall be less than 5 mils for the “+” and “–“ traces in the same pairs

More pair-to-pair spacing for minimal crosstalk

Target differential Zo of 90 ohm ±15%


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9.2 The PCB Layers Stackup

No new PCB technology required. Use FR4 is fine. Using standard 4 to 8 layers stack-up with 0.062 inch thick PCB. For micro strip lines, using ½ OZ Cu plated is ok. For strip line in 6 plus players, using 1 OZ Cu is better.

Figure 9, the stackup

Stack-up Plane Material Thickness (mil)

Solder mask Mask paint 1.2

Signal Copper 1.9

Prepreg 2116 4.4

Vcc Copper 1.4

Core 47

Vss Copper 1.4

Prepreg 2116 4.4

Signal Copper 1.9

Solder mask Mask paint 1.2

Total 62.4

9.3 The Layout Guidance for the Trace Routings


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Figure 10, The layout guidance for the trace routings

Don’t use EMI chokes, because PI3USB30532 and PI3USB31532 are passive switches not having EMI issues. The differential traces shall be away from the strong EMI source and devices, such as TTL, switching-power traces and

devices, with at least 30mil to 50mil space. No other components shall piggy ride on the differential traces.

10 Appendix: application Reference Schematics


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TX-

R662M

12

RX2+

RX1-

CONF0/A1

Use 0.22uf if output

swing >1.2V or using

re-drivers

C85 0.1u

KUSB-8-A-P-3-1-1-01-ST1,

R62 01 2

C82 0.2u

ADDR0

RX2-

DP sourceR61 01 2

PD controller RX1-

C68

0.1u

TX2-

AUX-

R54NC (for I2C)

12

TX2+

C73

0.1u

RX+

R652M

12

R64 01 2

TX1+

D3-

CONF2/SDA

C78 0.2u

C71

0.1u

CC1

C87 0.2u

PI3USB30532

U1

13121110987654

41

123

14

15

16

17

18

19

20

2122232425262728293031323334

35

36

37

38

39

40

VDDTX-/RX-TX+/RX+VDDDP3-DP3+VDDDP2-DP2+VDD

PG

ND

MODEDP1+DP1-

A0

GN

DR

X+

/TX

+R

X-/

TX

-G

ND

AUX

+A

UX

-

SBU2/SBU1SBU1/SBU2

VDDRX1-/TX1-

RX1+/TX1+VDD

TX1-/RX1-TX1+/RX1+

VDDTX2-/RX2-

TX2+/RX2+VDD

RX2-/TX2-RX2+/TX2+

CO

NF

0/A

1C

ON

F1

/SC

LG

ND

CO

NF

2/S

DA

DP

0+

DP

0-

D1-

D0-

C75

100uf

C84 0.1u

RX-

D2-

D2+

C81 0.2u

Vbus

control

R59 01 2

Type-C Recep.

J 6

A3B10

A4B9A5B8A6B7A7B6A8B5A9B4

A10B3

A11B2

A12B1

B11A2

B12A1

TX1-RX1-VBUSVBUSCC1SBU2D+D-D-D+SBU1CC2VBUSVBUSRX2-TX2-RX2+TX2+GNDGND

RX1+TX1+GNDGND

R67 100K1 2

+3V3

CONF1/

SCL

D3+

+3V3

TX1-

RX1+

C83 0.2u

CONF2/

SDA

C77 0.2u

C67

10u

TX2-

C69

0.1u

C72

0.1u

TX2+

CONF0/

A1

C70

0.1u

No-chokes between 30532 and type-C connector, because30532 is a passive switch without EMI issue.

TX1+

R53

NC

12

TX+

R55NC (for I2C)

12

PI3USB30532 reference schematic for source application

Vbus

control

RX1+

R56

4.7K

12

C86 0.2u

C74

0.1u

USB2 D+/-

C76 0.2u

Contact Diodes local sales for TVS

C76-C83 are "must have" to prevent non-DP compliant3.3V signals from plug-in as real-seen-case.

R58 01 2

R63 01 2

+3V3

R60 01 2

TVS

TVS

RX2+

+3V3

RX2-

R57 01 2

USB3controller

D1+

+3V3

D+

D0+

C80 0.2u

R68 100K1 2

Source

charging

circuit

D-

CC2

C79 0.2u

TX1-

See source truth table for

the control of CONF[2:0]

CONF1/SCL

AUX+

PI3USB30532 DFP-source reference schematic for type-C PD/DP/ALT application


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TX1+

D-

D2-

RX2+

PI3USB30532 reference schematic for sink application

C64 0.1u

R51 1M1 2

CONF0/A1

TX1+

D1-

R492M

12

RX1-

C48

0.1u

RX1+

TX2-

C54

100uf

R46NC (for I2C)

12

C50

0.1u

RX2-

DPreceiver

TX-

+3V3

C62 0.1u C63 0.2u

C65 0.2u

RX2-

D0+

RX1+

CC1

TX2+C55 0.2u

USB2 D+/-

R47NC (for I2C)

12

C57 0.2u

Vbus

control

RX+

CONF2/SDA

C66 0.2u

+3V3

PD controller

C60 0.2u


Type-C Recep.

J 5

A3B10A4B9A5B8A6B7A7B6A8B5A9B4

A10B3

A11B2

A12B1

B11A2

B12A1


RX1+TX1+GNDGND

TX1-

AUX+

C61 0.2u

See sink truth table for


C46

10u

CC2

TX2+

D3-

C47

0.1u


CONF1/SCL

RX1-

C58 0.2u

C52

0.1u

+3V3

AUX-

D0-

TVS

D+

RX-

C59 0.2u

+3V3

CONF1/

SCL

C53

0.1u

D1+

R502M

12

D3+

ADDR0

RX2+

Vbus

control

D2+

R45

NC

12R48

4.7K

12

C56 0.2u

C55-C61, C63 are "must have" to prevent non-DP compliant 3.3Vsignals from plug-in as real-seen-case.

Sink

charging

circuit

C49

0.1u

CONF0/

A1

+3V3

R52 1M1 2

USB3controller

TVS

PI3USB30532

U1

13121110987654

41

123

14

15

16

17

18

19

20

2122232425262728293031323334

35

36

37

38

39

40

VDDTX-/RX-TX+/RX+VDDDP3-DP3+VDDDP2-DP2+VDD

PG

ND

MODEDP1+DP1-

A0

GN

DR

X+

/TX

+R

X-/

TX-

GN

DA

UX

+A

UX

-

SBU2/SBU1SBU1/SBU2

VDDRX1-/TX1-

RX1+/TX1+VDD

TX1-/RX1-TX1+/RX1+

VDDTX2-/RX2-

TX2+/RX2+VDD

RX2-/TX2-RX2+/TX2+

CO

NF0

/A1

CO

NF1

/SC

LG

ND

CO

NF2

/SD

AD

P0

+D

P0

-

KUSB-8-A-P-3-1-1-01-ST1,

C51

0.1u

TX2-

CONF2/

SDA

TX+

TX1-

PI3USB30532 UFP-sink reference schematic for type-C PD/DP/ALT application


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PI3USB31532 DFP-source reference schematic for type-C PD/DP/ALT application

D3+

KUSB-8-A-P-3-1-1-01-ST1,


AUX-

RX-

C1260.1u

C109

10u

+3V3

USB2 D+/-

Use 0.22uf if output

swing >1.2V or using

re-drivers

TX1-

TX1-

TX1+

C111

0.1u

TVS

RX1+

C117

100uf

C116

0.1u

C1220.2u

R381270K

12

CONF2/SDA


TX+ R92 100K1 2

R84 01 2

AUX+

C110

0.1u

D2-

C1290.2u

CC1TX1+

C1210.2u

C112

0.1u

PD controller

RX2+

TX2+

C114

0.1u

RX1-

DP source

D0-

R380NC

12

TX2+

D3-

RX1+

R81 01 2

+3V3

D+

CONF2/

SDA

RX+

R82 01 2

D-

C1190.2u

Type-C Recep.

J 8

A3B10

A4B9A5B8A6B7A7B6A8B5A9B4

A10B3

A11B2

A12B1

B11A2

B12A1


RX1+TX1+GNDGND

Vbus

control

RX2-

R78NC (for I2C)

12

RX2+

R83 01 2

R79NC (for I2C)

12

R87 01 2

RX1-

Source

charging

circuit

D1+

D2+

ADDR0

C118-C125 are "must have" to prevent non-DP compliant 3.3Vsignals from plug-in as real-seen-case.

TVS

+3V3

R902M

12

D1-

R91 100K1 2

C1180.2u

TX2-

PI3USB31532 reference schematic for source application

USB3controller

C115

0.1u

+3V3

CONF1/SCL

RX2-

R80

4.7K

12

C1270.1u

C1250.2u

C1280.2u

C1240.2u

D0+

CONF0/

A1

R88 01 2

PI3USB31532

U1

13121110

987654

41

123

14

15

16

17

18

19

20

2122232425262728293031323334

35

36

37

38

39

40

MODE1TX-/RX-TX+/RX+VDDDP3-DP3+VDDDP2-DP2+VDD

PG

ND

MODEDP1+DP1-

A0

GN

DR

X+

/TX

+R

X-/

TX

-G

ND

AUX

+A

UX

-

SBU2/SBU1SBU1/SBU2

VDDRX1-/TX1-

RX1+/TX1+VDD

TX1-/RX1-TX1+/RX1+

VDDTX2-/RX2-

TX2+/RX2+VDD

RX2-/TX2-RX2+/TX2+

CO

NF

0/A

1C

ON

F1

/SC

LG

ND

CO

NF

2/S

DA

DP

0+

DP

0-

R892M

12

See source truth table for


TX-

Vbus

control

R85 01 2

CONF1/

SCL

TX2-

+3V3

CC2

R77

NC

12

C1200.2u

C1230.2u

R86 01 2

C113

0.1u

+3V3

CONF0/A1


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PI3USB31532 UFP-sink reference schematic for type-C PD/DP/ALT application

TX1-

+3V3

CONF1/SCL

D-

C96

100uf

PI3USB31532 reference schematic for sink application

C91

0.1u

USB2 D+/-

+3V3

C92

0.1u

CC1

R732M

12

TX2-

R742M

12

C99 0.2u

C1000.2u

CONF0/A1

TX2+

TX1+

R75 1M1 2

RX1+

+3V3

D2+

Vbus

control

TX-

C88

10u

D0+

AUX-

C1040.1u

D3-

C1060.1u

D0-

R76 1M1 2

PD controllerSee sink truth table for


R72

4.7K

12

DPreceiver

RX-

C90

0.1u

+3V3

C97-C103, C105 are "must have" to prevent non-DP compliant 3.3Vsignals from plug-in as real-seen-case.

RX1-

PI3USB31532

U1

13121110987654

41

123

14

15

16

17

18

19

20

2122232425262728293031323334

35

36

37

38

39

40

MODE1TX-/RX-TX+/RX+VDDDP3-DP3+VDDDP2-DP2+VDD

PG

ND

MODEDP1+DP1-

A0

GN

DR

X+

/TX

+R

X-/

TX-

GN

DA

UX

+A

UX

-

SBU2/SBU1SBU1/SBU2

VDDRX1-/TX1-

RX1+/TX1+VDD

TX1-/RX1-TX1+/RX1+

VDDTX2-/RX2-

TX2+/RX2+VDD

RX2-/TX2-RX2+/TX2+

CO

NF0

/A1

CO

NF1

/SC

LG

ND

CO

NF2

/SD

AD

P0

+D

P0

-

D3+

CONF1/

SCL

R71NC (for I2C)

12

R280NC

12

C97 0.2u

RX2-

C94

0.1u

Vbus

control

CONF2/SDA

CC2


TX2-

C1050.2u

R281270K

12 Type-C Recep.

J 7

A3B10A4B9A5B8A6B7A7B6A8B5A9B4

A10B3

A11B2

A12B1

B11A2

B12A1


RX1+TX1+GNDGND

+3V3

C95

0.1u

CONF2/

SDA

RX+

C1020.2u

TVS

C89

0.1u

C1030.2u

C1010.2u

AUX+

R70NC (for I2C)

12

RX1+

TX2+

C93

0.1u

CONF0/

A1

KUSB-8-A-P-3-1-1-01-ST1,

D1-

RX2+

R69

NC

12


D2-

+3V3

C98 0.2u

Sink

charging

circuit

RX1-

TVS

USB3controller

TX+

TX1-

C1070.2u

C1080.2u

D1+

TX1+

RX2-

RX2+

D+

ADDR0

type-c application using pi3usb30532 and …...in intel kabylake design guideline, intel recommends...

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