Ankur Sharma

Mukul Gupta

Tsi = fin thickness 2h = width Lg = gate length Tox = gate oxide thickness

http://www.tibercad.org/files/u6/finfet_schematic.png

SOI FINFET Bulk MOSFET

Excellent control of short channel effects (eg DIBL)

Poor control of short channel effects

smaller sub-threshold swing higher sub-threshold swing

Design challenges due to discreet widths

Widths can be changed in a continuous manner

Less variation due to lightly doped fin

Higher variation since bulk is doped heavily to reduce Vt

DG FINFET modeled as back to back SOI devices

Body thickness of each SOI device is essentially half of fin thickness

Parameter Min (nm) Typical (nm) Max (nm) Step (nm)

Length 30 45 90 2

Width 40 60 120 2

Oxide Thickness

1 1.5 3 0.1

Fin Thickness

7 8.4 17 0.4

Supply Voltage

0.5 1.0 1.4 0.1

All the parameters were individually varied for three different slew rates 20ps, 100ps and 200ps.

Delay

• a=4 • Delay is measured for G3 • Measured for both input rise and input fall

Power measurement

• Energy supplied by Vdd is measured when the output is transitioning from 0->1 • Cload = 100fF • Dynamic power is the power consumed due to short-circuit current Ipeak and the power consumed by S/D parasitic capacitances • Sub-threshold and gate leakage are measured for both input=0 and input=1 • P(dynamic) = P(Vdd) – rise*CV^2 • P(sub-threshold) = P(ground)*rise + P(vdd)*(1-rise) • P(gate) = (1-rise)*(P(vdd) – P(ground)) + (rise)*P(gate) • Rise=0 implies input is transitioning from 0->1 • Rise=1 implies input is transitioning from 1->0

0.00E+00

1.00E-11

2.00E-11

3.00E-11

4.00E-11

5.00E-11

6.00E-11

0.00E+00 1.00E-08 2.00E-08 3.00E-08 4.00E-08 5.00E-08 6.00E-08 7.00E-08 8.00E-08 9.00E-08 1.00E-07

Dela

y

Length

fall delay

rise delay

Linear (fall delay)

Linear (rise delay)

0.00E+00

5.00E-12

1.00E-11

1.50E-11

2.00E-11

2.50E-11

0.00E+00 2.00E-08 4.00E-08 6.00E-08 8.00E-08 1.00E-07 1.20E-07 1.40E-07

FO4 delay vs width

Delay vs Width

No change in delay for change in width

1.93E-11

1.93E-11

1.94E-11

1.94E-11

1.95E-11

1.95E-11

1.96E-11

1.96E-11

1.97E-11

1.97E-11

1.98E-11

1.98E-11

0.00E+00 2.00E-09 4.00E-09 6.00E-09 8.00E-09 1.00E-08 1.20E-08 1.40E-08 1.60E-08 1.80E-08

FO4 delay vs fin width

FO4 delay vs fin width

No change in delay with fin thickness

1.90E-11

1.95E-11

2.00E-11

2.05E-11

2.10E-11

2.15E-11

2.20E-11

2.25E-11

2.30E-11

2.35E-11

0.00E+00 5.00E-10 1.00E-09 1.50E-09 2.00E-09 2.50E-09 3.00E-09 3.50E-09

Dela

y

Oxide thickness

FO4 delay vs oxide thickness

rise delay

fall delay

0.00E+00

1.00E-11

2.00E-11

3.00E-11

4.00E-11

5.00E-11

6.00E-11

7.00E-11

8.00E-11

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6

Dela

y (s)

Supply Voltage

delay vs vdd

delay vs vdd

Dynamic power is multiplied by 10^-16

0.00E+00

5.00E+00

1.00E+01

1.50E+01

0.00E+00 2.00E-08 4.00E-08 6.00E-08 8.00E-08 1.00E-07 1.20E-07 1.40E-07

Dynamic power vs width for fall delay

200ps

Poly. (200ps)

76

78

80

82

84

0.00E+00 2.00E-08 4.00E-08 6.00E-08 8.00E-08 1.00E-07 1.20E-07 1.40E-07

Po

wer

* 1

0^

-1

6

Width in m

Dynamic Power vs Width for rise delay

200ps

Linear (200ps)

0

0.5

1

0.00E+00 2.00E-08 4.00E-08 6.00E-08 8.00E-08 1.00E-07

dynamic power for falling output

dynamic power for falling output

5

6

7

8

9

0.00E+00 2.00E-08 4.00E-08 6.00E-08 8.00E-08 1.00E-07

dynamic power for rising output

dynamic power for rising output

0.00E+00

1.00E+00

2.00E+00

3.00E+00

4.00E+00

5.00E+00

6.00E+00

7.00E+00

8.00E+00

9.00E+00

0.00E+00 2.00E-09 4.00E-09 6.00E-09 8.00E-09 1.00E-08 1.20E-08 1.40E-08 1.60E-08 1.80E-08

dynamic power for rising output

dynamic power for falling output

0

0.05

0.1

0.15

0.2

0.25

0.3

0.00E+00 5.00E-10 1.00E-09 1.50E-09 2.00E-09 2.50E-09 3.00E-09 3.50E-09

dynamic power for falling output

dynamic power for falling output

7.5

7.6

7.7

7.8

7.9

8

8.1

0.00E+00 1.00E-09 2.00E-09 3.00E-09 4.00E-09

dyn

am

ic p

ow

er

oxide thickness

dynamic power for rising

output

Linear (dynamic power for

rising output)

0

2

4

6

8

10

12

0 0.5 1 1.5

Dyn

am

ic P

ow

er

(pW

)

Supply Voltage, Vdd

Dynamic power Vs Vdd

Dynamic power Vs Vdd

0.00E+00

5.00E-09

1.00E-08

1.50E-08

2.00E-08

2.50E-08

3.00E-08

3.50E-08

4.00E-08

0.00E+00 2.00E-08 4.00E-08 6.00E-08 8.00E-08 1.00E-07 1.20E-07 1.40E-07

sub-thresold leakage input=1

sub-threshold leakage input=0

0.00E+00

5.00E-08

1.00E-07

1.50E-07

2.00E-07

2.50E-07

0.00E+00 2.00E-08 4.00E-08 6.00E-08 8.00E-08 1.00E-07

sub-threshold leakage input=0

subthreshold leakage input=1

0.00E+00

5.00E-09

1.00E-08

1.50E-08

2.00E-08

2.50E-08

0.00E+00 5.00E-09 1.00E-08 1.50E-08 2.00E-08

sub-threshold leakage input=1

sub-threshold leakage input=0

0.00E+00

5.00E-09

1.00E-08

1.50E-08

2.00E-08

2.50E-08

3.00E-08

3.50E-08

0.00E+00 5.00E-10 1.00E-09 1.50E-09 2.00E-09 2.50E-09 3.00E-09 3.50E-09

sub-threshold leakage input=0

sub-threshold leakage input=1

0.00E+00

5.00E-09

1.00E-08

1.50E-08

2.00E-08

2.50E-08

3.00E-08

3.50E-08

0 0.5 1 1.5

Su

b-th

reshold

leakage p

ow

er

(W)

Supply voltage, Vdd

Sub-threshold Leakage Vs Vdd

Threshold Leakage Vs Vdd

Fin Thickness Length Width Supply Width

Delay* 0.10 2.73 1.00 -1.71 -4.81

Dyn. Power‡ 0.19 0.61 -0.58 9.20 0.24

Leak. Power⋕ -0.14 -22.24 4.09 16.89 4.99

Percent rise in the various metrics with 5% rise in parameter values.

* Averaged over rise and fall values ‡ Calculated for rising output ⋕ Calculated for falling output