architechture (4)

8/3/2019 ARCHITECHTURE (4)

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BCN1043

COMPUTER ARCHITECTURE andORGANIZATION

Chapter 4

Computer Interconnection

1


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COMPUTERCOMPONENTS

COMPUTERFUNCTIONS

INTERRUPTS

BUSINTERCONNECTION

OLDER BUSTYPES

PCI

AGP

Overview

INTERCONNECTIONSTRUCTURES

PC BUSES

ISA

MCA

EISA

VLB


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A computer system consists of two majorcomponent: Hardware and software.

Central Processing Unit (CPU) or microprocessorcontrols the operation of the computer andperforms its data processing functions.

Hardware(CPU, memory, system bus and I/O.)

Software (system software-OS, application software)

COMPUTER COMPONENTS


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Memory is the part of computer whereprogram and data are stored.

A bus is a communication pathwayconnecting two or more devices. System busis a bus that connects major computercomponents (processor, memory, I/O).


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The computer systems I/O is the computer interface tothe outside world. Example of I/O are keyboard,monitor, disk drives and floppy drives.


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Data and instructions are stored in a single read-write memory.The contents of this memory are addressable bylocation, without regard to the type of data

contained there.Execution occurs in a sequential fashion from oneinstruction to the next.

Three key concept :

All contemporary computer design are based onconcept developed by John Von Neumann


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PC

IR

MAR

MBR

I/O AR

I/O BR

I/O Module

Buffers

InstructionInstructionInstruction

DataDataDataData

MemoryCPU

PC = Program Counter

IR = Instruction Register

MAR = Memory Address Register

MBR = Memory buffer register

I/O AR = I/O address register

I/O BR = I/O buffer register

Computer Components : Top-Level View


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Register = small number of high speed memory in CPU

MAR = specifies the address in memory for the next read or writeMBR = Contains the data to be written into memory or receivesthe data from memory

I/O AR = specifies a particular I/O device

I/O BR = used for the exchange of data between an I/O moduleand the CPU.

IR = Part of CPU control unit that stores an instruction

PC (instruction address register ISR) = contain address of the nextinstruction to be execute

Cont


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COMPUTER FUNCTION


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INSTRUCTION EXECUTION Instruction cycle = The processing required for a single

instruction

Instruction Fetch and Execute

The processor fetches (reads) an instruction from memory

The processor increases the PC after each instruction fetchso that it will fetch the next instruction in sequence

The fetched instruction is loaded into a register in theprocessor known as the instruction register (IR)


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Instructions execution - The processor interprets theinstruction and performs the required action. An instructionsexecution may involve a combination of these action categories: Processor-memory : Data may be transferred fromprocessor to memory or from memory to processor.

Processor-I/O : Data may be transferred to or from aperipheral device by transferring between the processor andan I/O module. Data processing : The processor may perform somearithmetic or logic operation on data. Control : An instruction may specify that the sequence of execution be altered.


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Halts Program execution halts only if the machine is turnoff , some sort of unrecoverable error occurs or a programinstruction that halts the computer is encountered .

Fetch NextInstruction

ExecuteInstruction HaltStart

Basic Instruction CycleIncrease the PC

Only if machine is turned off,unrecoverable error occur orinstruction halts is encountered


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Example of Program Execution

1

2

3

First instructioncycle

Secondinstruction cycle

Third instructioncycle

Using three instruction cycle AC (accumulator) register in whichintermediate results are stored tempororarly


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1. The PC contains the no. 300, the address of the first instruction.This instruction (the value 1940 in hex) is loaded into theinstruction register, IR and the PC is increased . Note that thisprocess would involve the use of a memory address register(MAR) and a memory buffer register (MBR). For simplicity, theseintermediate registers are ignored.

2. The first 4 bits (first hex digit 1) in the IR indicate that the AC isto be loaded. The remaining 12 bits (three hex digit) specify the

address (940) from which data are to be loaded.

Example of Program Execution


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3. The next instruction (5941) is fetched from location301 and the PC is incremented

4. The old contents of the AC and the contents of location 941 are added and the result is stored in the

AC.5. The next instruction (2941) is fetched from location

302 and the PC is incremented.6. The contents of the AC are stored in location 941.

Example of Program Execution (Cont.)


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Interrupts


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InterruptsThe mechanism by which other system modules (I/O,memory) may interrupt the normal processing of the CPU.

A signal that gets the attention of the CPU and is usually

generated when I/O is required. A hardware interrupt causes the CPU to save its state of executionand begin execution of an interrupt handler.Interrupts are prioritized; the higher the priority, the faster the

interrupt will be serviced.


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Cont

Most external devices (e.g. printer) are slower than theCPU. CPU can waste vast amounts of processing cycleswaiting for these slow devices to perform their tasks.

Interrupts let the CPU execute its normal instructionsequence and pause to serve the external devices onlywhen they send a signal (the interrupts) that they are readyfor the CPUs attention.

The processor and the O/S are responsible for recognizingan interrupt, suspending the user program, servicing theinterrupt, and then resuming the user program.


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Program Something that occurs as a result of program executionsuch as illegal instructions, arithmetic overflow, divide by zero, orreference outside the allowed space of memory

Timer Generated by a timer within the processor, so that theprocessor can perform some time-scheduled task

I/O Generated by an I/O controller to request service from theprocessor such as keyboard, mouse, disk drive (e.g. when a key is

pressed or when the mouse is moved)

Hardware failure signifies some error condition with thehardware, such as power failure

Types of Interrupts


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Interrupts are processed in an interrupt cycle within theoverall instruction cycle

At the end of an instruction cycle, processor check to see if any interrupts are pending

If there arent any, proceed with the next instruction

If there are

Suspend execution of the program and save its state

Jump to the interrupt service routine (ISR) and execute

the instruction cycleWhen the ISR is completed, restore the state of theprogram and resume its operation


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Interrupts

How interrupt for write instruction to printer is handled. The user program performs a series of WRITE calls withinprocessing.The I/O program is a program that will perform the actual I/Ooperation.The WRITE calls in the user program are to the I/O program,which consists of three sections. A sequence of instructions to prepare for the I/O operation (copying data

into a special buffer) (4 in the fig). The actual I/O command that enables the device to perform the

requested function. A sequence of instruction (5- in the fig) to test the success or failure of

the operation.


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Transfer of control with multiple interrupts


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Cont

When the preparation and I/O command is executed, thecontrol returns to the user program.When the output device become ready to accept more datafrom the processor to print it, the I/O module of the devicesends an interrupt request signal to the processor.The processor responds by suspending operation of thecurrent program branching off to another program calledinterrupt handler. After servicing the request of the output device, theprocessor resumes the original execution.


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Interrupt Cycle added to the instruction cycle

1. Processor suspends execution of the current program and save theaddress of the next instruction to be executed (current content of PC).

2. Sets the PC to the starting address of an interrupt handler routine.


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Transfer of control via interrupts


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Interrupt handler

Interrupt handler is a program which is part of the operatingsystem.Typically , this program determines the nature of theinterrupt and perform any action needed.When this program is completed, the processor can resumeexecution of user program at the point of interruption.


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Multiple interrupts

A typical system can support several dozens of interrupts

How should the system respond if more than 1 interrupt occurs at thesame time?

Systems prioritize the various interrupts

At the start of the interrupt cycle, the highest priority pending interrupt will be serviced

Remaining interrupt requests will be serviced in turn

What if an interrupt occurs while an ISR is being executed (a result of aprevious interrupt)

Ignore the second interrupt (by disabling interrupts) until the ISRcompletes

Recognize and service the interrupt only if it has a higher priority thanthe one currently being serviced


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Transfer of control with multiple interrupts


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End of Part1?

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