arm 9 web server

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Design And Implementation Of An Embedded Web ServerBased On ARM 9

CHAPTER 1

LITERATURE SURVEYThe ARM is a 32-bit reduced instruction set computer (RISC) instruction set

architecture (ISA) developed by ARM oldin!s" It #as $no#n as the Advanced RISC

Machine% and be&ore that as the Acorn RISC Machine" The ARM architecture is the

most #idely used 32-bit ISA in terms o& numbers produced" They #ere ori!inally

conceived as a processor &or des$top personal computers by Acorn Computers% a

mar$et no# dominated by the ' &amily used by I*M +C compatible and Apple

Macintosh computers" The relative simplicity o& ARM processors made them suitable

&or lo# po#er applications" This has made them dominant in the mobile and

embedded electronics mar$et% as relatively lo# cost% and small microprocessors and

microcontrollers"

As o& 2,, % about . percent o& the more than one billion mobile phones sold each

year use at least one ARM processor" As o& 2,,.% ARM processors account &or

appro'imately .,/ o& all embedded 32-bit RISC processors" ARM processors are

used e'tensively in consumer electronics% includin! +0As% mobile phones% di!ital

media and music players% hand-held !ame consoles% calculators and computer

peripherals such as hard drives and routers"

The ARM architecture is licensable" Companies that are current or &ormer ARM

licensees include Alcatel-1ucent% Apple Inc"% Atmel% *roadcom% Cirrus 1o!ic% 0i!ital

uipment Corporation% 4reescale% Intel (throu!h 0 C)% 15% Marvell Technolo!y

5roup% Microso&t% 6 C% 6uvoton% 6vidia% 67+ (previously +hilips)% 8$i% 9ualcomm%

Samsun!% Sharp% STMicroelectronics% Symbios 1o!ic% Te'as Instruments% :1SI

Technolo!y% ;amaha and ?3@"

1

Moze College of engineering


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1.1 HISTORY

A&ter achievin! some success #ith the **C Micro computer% Acorn Computers 1td

considered ho# to move on &rom the relatively simple M8S Technolo!y ,2processor to address business mar$ets li$e the one that #ould soon be dominated by

the I*M +C% launched in =. =" The Acorn *usiness Computer (A*C) plan re uired a

number o& second processors to be made to #or$ #ith the **C Micro plat&orm% but

processors such as the Motorola ,,, and 6ational Semiconductor 32,= #ere

unsuitable% and the ,2 #as not po#er&ul enou!h &or a !raphics based user

inter&ace"

Acorn #ould need a ne# architecture% havin! tested all o& the available processors

and &ound them #antin!" Acorn then seriously considered desi!nin! its o#n

processor% and their en!ineers came across papers on the *er$eley RISC proBect"

They &elt it sho#ed that i& a class o& !raduate students could create a competitive 32-

bit processor% then Acorn #ould have no problem" A trip to the estern 0esi!n

Center in +hoeni' sho#ed Acorn en!ineers Steve 4urber and Sophie ilson that

they did not need massive resources and state-o&-the-art RD0 &acilities"

ilson set about developin! the instruction set% #ritin! a simulation o& the processor

in **C *asic that ran on a **C Micro #ith a ,2 second processor" It convincedthe Acorn en!ineers that they #ere on the ri!ht trac$" *e&ore they could !o any

&urther% ho#ever% they #ould need more resources" It #as time &or ilson to

approach AcornEs C 8% ermann auser% and e'plain #hat #as a&oot" 8nce the !o-

ahead had been !iven% a small team #as put to!ether to implement ilsonEs model

in hard#are"

1.1.1 Acorn RISC Machine: ARM2

The o&&icial Acorn RISC Machine proBect started in 8ctober =. 3" :1SI Technolo!y%Inc #as chosen as silicon partner% since it already supplied Acorn #ith R8Ms and

some custom chips" The desi!n #as led by ilson and 4urber% #ith a $ey desi!n

!oal o& achievin! lo#-latency inputFoutput (interrupt) handlin! li$e the M8S

Technolo!y ,2 used in AcornEs e'istin! computer desi!ns" The ,2Es memory

access architecture had allo#ed developers to produce &ast machines #ithout the

use o& costly direct memory access hard#are" :1SI produced the &irst ARM silicon on



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2 April =. G it #or$ed &irst time and came to be $no#n as ARM= by April =. "

The &irst HrealH production systems named ARM2 #ere available the &ollo#in! year"

Its &irst practical application #as as a second processor to the **C Micro% #here it#as used to develop the simulation so&t#are to &inish #or$ on the support chips

(:I0C% I8C% M MC) and to speed up the operation o& the CA0 so&t#are used in

developin! ARM2" ilson subse uently coded **C *asic in ARM assembly

lan!ua!e% and the in-depth $no#led!e obtained &rom desi!nin! the instruction set

allo#ed the code to be very dense% ma$in! ARM **C *asic an e'tremely !ood test

&or any ARM emulator" The ori!inal aim o& a principally ARM-based computer #as

achieved in =. #ith the release o& the Acorn Archimedes"

Such #as the secrecy surroundin! the ARM C+ proBect that #hen 8livetti #ere

ne!otiatin! to ta$e a controllin! share o& Acorn in =. % they #ere not told about the

development team until a&ter the ne!otiations had been &inalised" In =..2 Acorn once

more #on the 9ueenEs A#ard &or Technolo!y &or the ARM"

The ARM2 &eatured a 32-bit data bus% a 2 -bit address space and si'teen 32-bit

re!isters" +ro!ram code had to lie #ithin the &irst > Mbyte o& the memory% as the

pro!ram counter #as limited to 2 bits because the top > and bottom 2 bits o& the 32-

bit re!ister served as status &la!s" The ARM2 #as possibly the simplest use&ul 32-bitmicroprocessor in the #orld% #ith only 3,%,,, transistors (compare the transistor

count #ith MotorolaEs si'-year older ,,, model #ith around ,%,,, transistors)"

Much o& this simplicity comes &rom not havin! microcode (#hich represents about

one- uarter to one-third o& the ,,,) and% li$e most C+ s o& the day% not includin!

any cache" This simplicity led to its lo# po#er usa!e% #hile per&ormin! better than the

Intel ,2 " A successor% ARM3% #as produced #ith a > J* cache% #hich &urther

improved per&ormance?3@"

1.1.2 Apple, DEC, Intel: ARM6, StrongARM, XScale

In the late =. ,s Apple Computer and :1SI Technolo!y started #or$in! #ith Acorn

on ne#er versions o& the ARM core" The #or$ #as so important that Acorn spun o&&

the desi!n team in =.., into a ne# company called Advanced RISC Machines 1td"

4or this reason% ARM is sometimes e'panded as Advanced RISC Machine instead o&

Acorn RISC Machine" Advanced RISC Machines became ARM 1td #hen its parent

!



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company% ARM oldin!s plc% &loated on the 1ondon Stoc$ 'chan!e and 6AS0A9 in

=.. "

The ne# Apple-ARM #or$ #ould eventually turn into the ARM % &irst released in early=..2" Apple used the ARM -based ARM =, as the basis &or their Apple 6e#ton

+0A" In =..>% Acorn used the ARM =, as the main C+ in their Risc +C

computers" 0 C licensed the ARM architecture and produced the Stron!ARM" At

233 M K this C+ dre# only = att o& po#er (more recent versions dra# &ar less)"

This #or$ #as later passed to Intel as a part o& a la#suit settlement% and Intel too$

the opportunity to supplement their a!in! i. , line #ith the Stron!ARM" Intel later

developed its o#n hi!h per&ormance implementation $no#n as 7Scale #hich it has

since sold to Marvell?3@"

1.2 LICENSING GROWTH

The ARM core has remained lar!ely the same siKe throu!hout these chan!es" ARM2

had 3,%,,, transistors% #hile the ARM !re# to only 3 %,,," ARMEs business has

al#ays been to sell I+ cores% #hich licensees use to create microcontrollers and

C+ s based on this core" The most success&ul implementation has been the

ARM T0MI #ith hundreds o& millions sold" The idea is that the 8ri!inal 0esi!n

Manu&acturer combines the ARM core #ith a number o& optional parts to produce acomplete C+ % one that can be built on old semiconductor &abs and still deliver

substantial per&ormance at a lo# cost" Atmel has been a precursor desi!n center in

the ARM T0MI-*ased mbedded System"

ARM licensed about =" billion cores in 2,, " In 2,, % about = billion ARM cores

#ent into mobile phones" As o& Lanuary 2,, % over =, billion ARM cores have been

built% and in 2,, iSuppli predicted that by 2,==% billion ARM cores #ill be shippin!

per year" As o& Lanuary 2,==% ARM states that over = billion ARM processors have

shipped"

The architecture used in smartphones% personal di!ital assistants and other mobile

devices is anythin! &rom ARMv in obsoleteFlo#-end devices to ARM M-series in

current hi!h-end devices" 7Scale and ARM.2 processors are ARMv T % and are

no# more numerous in hi!h-end devices than the Stron!ARM% ARM.T0MI and

ARM T0MI based ARMv> processors% but lo#er-end devices may use older cores

#ith lo#er licensin! costs" ARMv processors represented a step up in per&ormance

"



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&rom standard ARMv cores% and are used in some cases% but Corte' processors

(ARMv ) no# provide &aster and more po#er-e&&icient options than all those previous

!enerations" Corte'-A tar!ets applications processors% as needed by smartphones

that previously used ARM. or ARM==" Corte'-R tar!ets real-time applications% and

Corte'-M tar!ets microcontrollers"

In 2,,.% some manu&acturers introduced netboo$s based on ARM architecture

C+ s% in direct competition #ith netboo$s based on Intel Atom"

1.3 ARM CORES

ARM provides a summary o& the numerous vendors #ho implement ARM cores in

their desi!n" J I1 also provides a some#hat ne#er summary o& vendors o& ARMbased processors" ARM &urther provides a chart displayin! an overvie# o& the ARM

processor lineup #ith per&ormance and &unctionality versus capabilities &or the more

recent ARM % ARM.% ARM==% Corte'-M% Corte'-R and Corte'-A device &amilies"

1.4 ARCHITECTURE

4rom =.. on#ards% the ARM Architecture Re&erence Manual has been the primary

source o& documentation on the ARM processor architecture and instruction set%

distin!uishin! inter&aces that all ARM processors are re uired to support (such as

instruction semantics) &rom implementation details that may vary" The architecture

has evolved over time% and startin! #ith the Corte' series o& cores% three Hpro&ilesH

are de&ined

• HApplicationH pro&ile Corte'-A series

• HReal-timeH pro&ile Corte'-R series

• HMicrocontrollerH pro&ile Corte'-M series

+ro&iles are allo#ed to subset the architecture" 4or e'ample the ARMv -M pro&ile

used by the Corte'-M3 core is notable in that it supports only the Thumb-2 instruction

set% and the ARMv -M pro&ile (used by the Corte'-M,) is a subset o& the ARMv -M

pro&ile (supportin! &e#er instructions)"

#



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1. C!"DITI!"A# EXECUTI!"

The conditional e'ecution &eature (called predication) is implemented #ith a >-bit

condition code selector (the predicate) on every instructionO one o& the &our-bit codesis reserved as an Hescape codeH to speci&y certain unconditional instructions% but

nearly all common instructions are conditional" Most C+ architectures only have

condition codes on branch instructions"

This cuts do#n si!ni&icantly on the encodin! bits available &or displacements in

memory access instructions% but on the other hand it avoids branch instructions #hen

!eneratin! code &or small i& statements"

8ne o& the #ays that Thumb code provides a more dense encodin! is to remove that&our bit selector &rom non-branch instructions"

1.$ !T%ER FEATURES

Another &eature o& the instruction set is the ability to &old shi&ts and rotates into the

Hdata processin!H (arithmetic% lo!ical% and re!ister-re!ister move) instructions% so

that% &or e'ample% the C statement

a PQ (B 2)O

could be rendered as a sin!le-#ord% sin!le-cycle instruction on the ARM"

A00 Ra% Ra% RB% 1S1 2

This results in the typical ARM pro!ram bein! denser than e'pected #ith &e#er

memory accessesO thus the pipeline is used more e&&iciently" ven thou!h the ARM

runs at #hat many #ould consider to be lo# speeds% it nevertheless competes uite

#ell #ith much more comple' C+ desi!ns"

The ARM processor also has some &eatures rarely seen in other RISC architectures%

such as +C-relative addressin! (indeed% on the ARM the +C is one o& its = re!isters)

and pre- and post-increment addressin! modes"

Another item o& note is that the ARM has been around &or a #hile% #ith the instruction

set increasin! some#hat over time" Some early ARM processors (prior to

ARM T0MI)% &or e'ample% have no instruction to store a t#o-byte uantity% thus%

strictly spea$in!% &or them itEs not possible to !enerate e&&icient code that #ould

behave the #ay one #ould e'pect &or C obBects o& type Hint= tH?3@"

%



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1.& 'I'E#I"ES A"D !T%ER IM'#EME"TATI!" ISSUES

The ARM and earlier implementations have a three sta!e pipelineO the sta!es bein!

&etch% decode% and e'ecute" i!her per&ormance desi!ns% such as the ARM.% havedeeper pipelines Corte'-A has thirteen sta!es" Additional implementation chan!es

&or hi!her per&ormance include a &aster adder% and more e'tensive branch prediction

lo!ic" The di&&erence bet#een the ARM 0I and ARM 0MI cores% &or e'ample% #as an

improved multiplier (hence the added HMH)"

1.1( C!'R!CESS!RS

The architecture provides a non-intrusive #ay o& e'tendin! the instruction set usin!

HcoprocessorsH #hich can be addressed usin! MCR% MRC% MRRC% MCRR% andsimilar instructions" The coprocessor space is divided lo!ically into = coprocessors

#ith numbers &rom , to = % coprocessor = (cp= ) bein! reserved &or some typical

control &unctions li$e mana!in! the caches and MM operation (on processors that

have one)"

In ARM-based machines% peripheral devices are usually attached to the processor by

mappin! their physical re!isters into ARM memory space or into the coprocessor

space or connectin! to another device (a bus) #hich in turn attaches to the

processor" Coprocessor accesses have lo#er latency so some peripherals (&or

e'ample 7Scale interrupt controller) are desi!ned to be accessible in both #ays

(throu!h memory and throu!h coprocessors)" In other cases% chip desi!ners only

inte!rate hard#are usin! the coprocessor mechanism" 4or e'ample% an ima!e

processin! en!ine mi!ht be a small ARM T0MI core combined #ith a coprocessor

that has specialiKed operations to support a speci&ic set o& 0T: transcodin!

primitives"

1.11 DEBUGGING All modern ARM processors include hard#are debu!!in! &acilitiesO #ithout them%

so&t#are debu!!ers could not per&orm basic operations li$e haltin!% steppin!% and

brea$ pointin! o& code startin! &rom reset" These &acilities are built usin! LTA5

support% thou!h some ne#er cores optionally support ARMEs o#n t#o-#ire HS 0H

protocol" In ARM T0MI cores% the H0H represented LTA5 debu! support% and the HIH

represented presence o& an H mbedded IC H debu! module" 4or ARM and ARM.

&



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core !enerations% mbedded IC over LTA5 #as a de-&acto debu! standard%

althou!h it #as not architecturally !uaranteed"

The ARMv architecture de&ines basic debu! &acilities at an architectural level" Theseinclude brea$points% #atch points% and instruction e'ecution in a H0ebu! ModeHO

similar &acilities #ere also available #ith mbedded IC " *oth Hhalt modeH and

HmonitorH mode debu!!in! are supported" The actual transport mechanism used to

access the debu! &acilities is not architecturally speci&ied% but implementations

!enerally include LTA5 support"

There is a separate ARM HCore Si!htH debu! architecture% #hich is not architecturally

re uired by ARMv processors?3@"

1.12 DSP ENHANCEMENT INSTRUCTIONS

To improve the ARM architecture &or di!ital si!nal processin! and multimedia

applications% a &e# ne# instructions #ere added to the set" These are si!ni&ied by an

H H in the name o& the ARMv T and ARMv T L architectures" -variants also imply

T%0%M and I"

The ne# instructions are common in di!ital si!nal processor architectures" They are

variations on si!ned multiply-accumulate% saturated add and subtract% and count

leadin! Keros"

1.13 JAZELLE

LaKelle is a techni ue that allo#s Lava *ytecode to be e'ecuted directly in the ARM

architecture as a third e'ecution state (and instruction set) alon!side the e'istin!

ARM and Thumb-mode" Support &or this state is si!ni&ied by the HLH in the ARMv T L

architecture% and in ARM. L-S and ARM L-S core names" Support &or this state is

re uired startin! in ARMv (e'cept &or the ARMv -M pro&ile)% althou!h ne#er cores

only include a trivial implementation that provides no hard#are acceleration"

1.14 THUMB

To improve compiled code-density% processors since the ARM T0MI have &eatured

the Thumb instruction set state" (The HTH in HT0MIH indicates the Thumb &eature")

hen in this state% the processor e'ecutes the Thumb instruction set% a variable-

len!th instruction set providin! 32-bit and = -bit instructions" Most o& the Thumb

instructions are directly mapped to normal ARM instructions" The space-savin!9



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comes &rom ma$in! some o& the instruction operands implicit and limitin! the number

o& possibilities compared to the ARM instructions e'ecuted in the ARM instruction set

state"

In Thumb% the = -bit opcodes have less &unctionality" 4or e'ample% only branches

can be conditional% and many opcodes are restricted to accessin! only hal& o& all o&

the C+ Es !eneral purpose re!isters" The shorter opcodes !ive improved code

density overall% even thou!h some operations re uire e'tra instructions" In situations

#here the memory port or bus #idth is constrained to less than 32 bits% the shorter

Thumb opcodes allo# increased per&ormance compared #ith 32-bit ARM code% as

less pro!ram code may need to be loaded into the processor over the constrained

memory band#idth"

mbedded hard#are% such as the 5ame *oy Advance% typically have a small amount

o& RAM accessible #ith a &ull 32-bit datapathO the maBority is accessed via a = bit or

narro#er secondary datapath" In this situation% it usually ma$es sense to compile

Thumb code and hand-optimise a &e# o& the most C+ -intensive sections usin! &ull

32-bit ARM instructions% placin! these #ider instructions into the 32-bit bus

accessible memory"

The &irst processor #ith a Thumb instruction decoder #as the ARM T0MI" All ARM.and later &amilies% includin! 7Scale% have included a Thumb instruction decoder"

1.15 Thu !"2

Thumb-2 technolo!y made its debut in the ARM== core% announced in 2,,3"

Thumb-2 e'tends the limited = -bit instruction set o& Thumb #ith additional 32-bit

instructions to !ive the instruction set more breadth" A stated aim &or Thumb-2 is to

achieve code density similar to Thumb #ith per&ormance similar to the ARM

instruction set on 32-bit memory" In ARMv this !oal can be said to have been met"Thumb-2 e'tends both the ARM and Thumb instruction set #ith yet more instructions%

includin! bit-&ield manipulation% table branches% and conditional e'ecution" A ne#

H ni&ied Assembly 1an!ua!eH ( A1) supports !eneration o& either Thumb-2 or ARM

instructions &rom the same source codeO versions o& Thumb seen on ARMv

processors are essentially as capable as ARM code (includin! the ability to #rite

interrupt handlers)" This re uires a bit o& care% and use o& a ne# HITH (i&-then)

instruction% #hich permits up to &our successive instructions to e'ecute based on a

1'



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tested condition" hen compilin! into ARM code this is i!nored% but #hen compilin!

into Thumb-2 it !enerates an actual instruction"

All ARMv chips support the Thumb-2 instruction set" Some chips% such as theCorte'-M3% support only the Thumb-2 instruction set" 8ther chips in the Corte' and

ARM== series support both HARM instruction set modeH and HThumb-2 instruction set

modeH"

1.1# THUMB E$ECUTION ENVIRONMENT %THUMBEE&

Thumb % also $no#n as Thumb-2 % and mar$eted as LaKelle RCT (Runtime

Compilation Tar!et)% #as announced in 2,, % &irst appearin! in the Corte'-A

processor" Thumb is a &ourth processor mode% ma$in! small chan!es to the

Thumb-2 e'tended Thumb instruction set" These chan!es ma$e the instruction set

particularly suited to code !enerated at runtime (e"!" by LIT compilation) in mana!ed

'ecution nvironments" Thumb is a tar!et &or lan!ua!es such as 1imbo% Lava%

C % +erl and +ython% and allo#s LIT compilers to output smaller compiled code

#ithout impactin! per&ormance"

6e# &eatures provided by Thumb include automatic null pointer chec$s on every

load and store instruction% an instruction to per&orm an array bounds chec$% access to

re!isters r -r= (#here the LaKelleF0*7 Lava :M state is held)% and specialinstructions that call a handler" andlers are small sections o& &re uently called code%

commonly used to implement a &eature o& a hi!h level lan!ua!e% such as allocatin!

memory &or a ne# obBect" These chan!es come &rom repurposin! a hand&ul o&

opcodes% and $no#in! the core is in the ne# Thumb mode"

1.1' VECTOR (LOATING POINT %V(P&

:4+ (:ector 4loatin! +oint) technolo!y is a coprocessor e'tension to the ARM

architecture" It provides lo#-cost sin!le-precision and double-precision &loatin!-pointcomputation &ully compliant #ith the ANSI/IEEE Std 754-1985 Standard for Binary

F oatin!-"oint Arith#etic " :4+ provides &loatin!-point computation suitable &or a #ide

spectrum o& applications such as +0As% smartphones% voice compression and

decompression% three-dimensional !raphics and di!ital audio% printers% set-top bo'es%

and automotive applications" The :4+ architecture also supports e'ecution o& short

vector instructions but these operate on each vector element se uentially and thus

do not o&&er the per&ormance o& true SIM0 (Sin!le Instruction Multiple 0ata)

11



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parallelism" This mode can still be use&ul in !raphics and si!nal-processin!

applications% ho#ever% as it allo#s a reduction in code siKe and instruction &etch and

decode overhead"

8ther &loatin!-point andFor SIM0 coprocessors &ound in ARM-based processors

include 4+A% 4+ % i#MM7t" They provide some o& the same &unctionality as :4+ but

are not opcode-compatible #ith it"

1.1) ADVANCED SIMD %NEON&

The Advanced SIM0 e'tension% mar$eted as 6 86 technolo!y% is a combined >-

and =2 -bit sin!le instruction multiple data (SIM0) instruction set that provides

standardiKed acceleration &or media and si!nal processin! applications" 6 86 can

e'ecute M+3 audio decodin! on C+ s runnin! at =, M K and can run the 5SM

AMR (Adaptive Multi-Rate) speech codec at no more than =3 M K" It &eatures a

comprehensive instruction set% separate re!ister &iles and independent e'ecution

hard#are" 6 86 supports -% = -% 32- and >-bit inte!er and sin!le-precision (32-bit)

&loatin!-point data and operates in SIM0 operations &or handlin! audio and video

processin! as #ell as !raphics and !amin! processin!" In 6 86% the SIM0 supports

up to = operations at the same time" The 6 86 hard#are shares the same &loatin!-point re!isters as used in :4+"

1.1* SECURITY E$TENSIONS %TRUSTZONE&

The Security 'tensions% mar$eted as Trust


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specialiKed code in the more trusted #orld ($no#n as Trust


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1i$e most I+ vendors% ARM prices its I+ based on perceived value" In architectural

terms% the lo#er per&ormance ARM cores command a lo#er license cost than the

hi!her per&ormance cores" In terms o& silicon implementation% a synthesiKable core is

more e'pensive than a hard macro (blac$ bo') core" Complicatin! price matters% a

merchant &oundry #ho holds an ARM license (such as Samsun! and 4uBitsu) can

o&&er reduced licensin! costs to its &ab customers" In e'chan!e &or ac uirin! the ARM

core throu!h the &oundryEs in-house desi!n services% the customer can reduce or

eliminate payment o& ARMEs up&ront license &ee" Compared to dedicated

semiconductor &oundries (such as TSMC and MC) #ithout in-house desi!n

services% 4uBitsuFSamsun! char!e 2 to 3 times more per manu&actured #a&er" 4or lo#

to mid volume applications% a desi!n service &oundry o&&ers lo#er overall pricin!(throu!h subsidiKation o& the license &ee)" 4or hi!h volume mass produced parts% the

lon! term cost reduction achievable throu!h lo#er #a&er pricin! reduces the impact

o& ARMEs 6R (6on-Recurrin! n!ineerin!) costs% ma$in! the dedicated &oundry a

better choice"

Many semiconductor or IC desi!n &irms hold ARM licensesO Analo! 0evices% Atmel%

*roadcom% Cirrus 1o!ic% ner!y Micro% 4araday Technolo!y% 4reescale% 4uBitsu% Intel

(throu!h its settlement #ith 0i!ital uipment Corporation)% I*M% In&ineon

Technolo!ies% 6intendo% 67+ Semiconductors% 8JI% 9ualcomm% Samsun!% Sharp%

STMicroelectronics% Te'as Instruments and :1SI are some o& the many companies

#ho have licensed the ARM in one &orm or another"

1.22 APPRO$IMATE LICENSING COSTS

ARMEs 2,, annual report and accounts state that royalties totallin! U " million

(V= >"= million) #ere the result o& licensees shippin! 2"> billion units" This is

e uivalent to U,",3 (V,", ) per unit shipped" o#ever% this is avera!ed across all

cores% includin! e'pensive ne# cores and ine'pensive older cores"

In the same year ARMEs licensin! revenues &or processor cores #ere U "2 million

( SV==." million)% in a year #hen processor licenses #ere si!ned% an avera!e o&

U= million (V=" > million) per license" A!ain% this is avera!ed across both ne# and old

cores"

5iven that ARMEs 2,, income &rom processor cores #as appro'imately ,/ &rom

royalties and >,/ &rom licenses% ARM ma$es the e uivalent o& U,", (V,"==) per unit

1"



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shipped includin! both royalties and licenses" o#ever% as one-o&& licenses are

typically bou!ht &or ne# technolo!ies% unit sales (and hence royalties) are dominated

by more established products" ence% the &i!ures above do not re&lect the true costs

o& any sin!le ARM product"

1.23 OPERATING SYSTEMS

1.2).1 Acorn *+*te *

The very &irst ARM-based Acorn Archimedes personal computers ran an interim

operatin! system called Arthur% #hich evolved into RISC 8S% used on later ARM-

based systems &rom Acorn and other vendors"

1.2).2 E -e e operating *+*te *

The ARM architecture is supported by a lar!e number o& embedded and real-time

operatin! systems% includin! indo#s C % Symbian 8S% eCos% I6T 5RIT;% 6ucleus

+1 S% MicroCF8S-II% 967% RT7C 9uadros% Thread7 and :' or$s"

1.2).) Uni/0li e

The ARM architecture is supported by ni' and ni'-li$e operatin! systems such as

56 F1inu'% *S0% +lan . &rom *ell 1abs% In&erno% Solaris% Apple i8S% eb8S and

Android"

1.2). 3in o4*

Microso&t announced on Lanuary 2,== that the ne't maBor version o& the indo#s

6T &amily #ill include support &or ARM processors" Microso&t demonstrated a

preliminary version o& indo#s (version "2" ) runnin! on an ARM-based

computer at the 2,== Consumer lectronics Sho#?3@"

1#



16/36


CHAPTER 2

PROBLEM STATEMENT

The embedded #eb server % #hich ta$e Samsun! corporationEs ARM.-ARM .

processor as core% is desi!ned% itEs operatin! system is 1inu'% the system hard#are

architecture is presented" Then the process o& the 1inu' operatin! system bein!

transplated on ARM is introduced" The realiKation o& *oa and dynamic interaction

bet#een bro#ser and the embedded system by usin! C5I are especially analyKed"

4inally the implemented embedded #eb server is tested to indicate that it respondin!

rapidly and operates e&&iciently and steadily% #hich achieves the e'pectant desi!nin!

purpose?=@"

2.1 EMBEDDED WEB SERVER

1$



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An mbedded eb Server ( S) is a eb server that runs on an embedded system

#ith limited computin! resources and serves embedded eb documents to a eb

bro#ser" *y embeddin! a eb server into a net#or$ device% it is possible &or an S

to provide a po#er&ul eb-based mana!ement user inter&ace constructed usin!

TM1% !raphics and other &eatures common to eb bro#sers" hen applied to

embedded systems% eb technolo!ies o&&er !raphical user inter&aces% #hich are

user-&riendly% ine'pensive% cross-plat&orm% and net#or$-ready" 5eneral eb servers%

#hich #ere developed &or !eneral purpose computers such as 6T servers or ni'

and 1inu' #or$stations% typically re uire me!abytes o& memory% a &ast processor% a

pre-emptive multitas$in! operatin! system% and other resources" A eb server can

be embedded in a device to provide remote access to the device &rom a ebbro#ser i& the resource re uirements o& the eb server are reduced" The end result

o& reducin! the resource re uirements o& the eb server is typically a portable set o&

code that can run on embedded systems #ith limited computin! resources"

mbedded system can be utiliKed to serve the embedded eb documents% includin!

static and dynamic in&ormation about embedded systems% to eb bro#sers" This

type o& eb server is called an mbedded eb Server ( S)"

Ss are used to convey the state in&ormation o& embedded systems% such as a

systemWs #or$in! statistics% current con&i!uration and operation results% to a eb

bro#ser" Ss are also used to trans&er user commands &rom a eb bro#ser to an

embedded system" The state in&ormation is e'tracted &rom an embedded system

application and the control command is implemented throu!h the embedded system

application" In many instances% it ma$es sense &or embedded eb so&t#are to be a

li!ht#ei!ht version o& eb so&t#are" 4or net#or$ devices% such as routers% s#itches

and hubs% it is possible to place an S directly in the devices #ithout additional

hard#are"

The development o& an S must ta$e into account the relative scarcity o& system

resources" An S must meet the deviceWs memory re uirements and limited

processin! po#er" More di&&icult than overcomin! the memory limitation is mana!in!

the impact o& eb re uest servicin! on the system C+ " An S process as a

subordinate process to the main purpose o& the device must use as &e# C+

resources as possible in order not to inter&ere #ith the main tas$ o& the system"

5enerally% net#or$ devices re uire hi!h reliability" As one embedded component o& a

1%



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net#or$ device% an S must also be hi!hly reliable" *ecause it is a subordinate

process% at the very least it must protect a!ainst propa!ation o& internal &ailure to the

#hole system" An S needs to run on a much broader ran!e o& embedded system

environments in terms o& the &acilities they provide% and #ith much ti!hter resource

constraints than mainstream computin! hard#are" Conse uently% it must be hi!hly

portable" Security is an important concem in many possible applications &or

embedded eb server technolo!y% especially ones that involve e uipment

con&i!uration or administration" It is o&ten desirable to limit access to this in&ormation

to a speci&ic set o& users" hile eb documents can be uic$ly prototyped #ith

readily available des$top authorin! tools% the prototype must then be inte!rated into

the system so&t#are" An S #or$s #ith a &i'ed set o& inte!rated eb documentsthat are usually &roKen at the time the embedded system is manu&actured% but then

incorporates dynamic in&ormation o& system so&t#are at run-time" 4or rapid

development% an easy but po#er&ul inte!ration mechanism must be provided"

mbedded #eb server re&ers to import eb Server at the scene the monitor and

control e uipment% in the support o& appropriate hard#are plat&orms and so&t#are

systems% trans&er traditional monitor and control e uipment into a internet based %

possessed #ith TC+FI+ protocol as the underlyin! communication protocol and eb

server technolo!y as its core" The resource o& embedded devices is limited% and do

not able to handle multiple user re uests% so the speci &ically desi!ned &or embedded

eb server are needed instead o& Apache used in 1inu'" In embedded 1inu'

systems% the typical eb Server are *oa% httpd% thttpd and so on" ttpd is clearly

inappropriate to advanced applications #hich only supports static pa!es and does

not support C5I% thttpd and *oa provide similar &unctions e'cept thttpd re uires

resources much lar!er #hen runnin! compared #ith *oa" *oa is a sin!le tas$ o&

TT+ server% It is di&&erent &rom traditional eb server% It is not calls subprocess to

handle multiple connections produced simultaneously throu!h the &or$% but

reprocesses all the on!oin! TT+ connections that only &or$ calls C5I pro!rams%

automatic directory !eneration% and &ile compression implementation" This is vital

important &or embedded systems by savin! the ma'imum e'tent possible system

resources" *ased on the above e'position% *oa applied to the embedded plat&orm

has many advanta!es% there&ore *oa is used as eb server in this paper" Its

architecture sho#ed in 4i!" 2"="

1&



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4i!" 2"=" Architecture o& *oa server?=@

2.2 THE CHOICE O( EMBEDDED WEB SERVER

5enerally spea$in!% the embedded devices have limited resources and donEt need tohandle the re uests o& many users simultaneously" There&ore they do not need to

use the most commonly used 1inu' server Apache" eb server #hich is speci&ically

desi!ned &or embedded devices are applied in such case" This $ind o& eb server

re uires relatively small stora!e space and less memory to run% #hich ma$es it uite

suitable &or embedded applications"

The typical embedded eb server has three $inds% namely httpd% *oa and thttpd" As

the simplest eb server% httpd has the #ea$est &unctions amon! the three" It does

not support authentication and C5I technolo!y #hile *oa and thttpd support these

&unctions" I& eb server only provides some static #eb pa!es such as simple online

help and system introduction% then a static server can be adoptedO i& you need to

improve system security or interact #ith users such as real-time status uery and

landin!% then you have to use dynamic eb technolo!ies" In such situation% either

*oa or thttpd can achieve these !oals" In the present research% #e adopt *oa% the

eb server suitable &or embedded system% because thttpd has less &unction and

needs &ar more resources to run?2@"19



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'('(1 )he "rinci* e +f E#,edded e, Ser&er Boa

*oa is a sin!le tas$ eb server" The di&&erence bet#een *oa and traditional eb

server is that #hen a connection re uest arrives% *oa does not create a separate

process &or each connection% nor handle multiple connections by copyin! itsel&"

Instead% *oa handles multiple connections by establishin! a list o& TT+ re uests%

but it only &or$s ne# process &or C5r pro!ram" In this #ay% the system resources are

saved to the lar!est e'tent" 1i$e a common eb sever% an embedded #eb server

can accomplish tas$s such as receivin! re uests &rom the

client% analyKin! re uests% respondin! to those re uests% and &inally returnin! results

to the client" The &ollo#in! is its #or$ process"

X Complete the initialiKation o& the eb server% such as creatin! an environment

variable% creatin! soc$et% bindin! a port% listenin! to a port% enterin! the loop% and

#aitin! &or connection re uests &orm a client"

X hen there is a connection re uest &rom a client% eb server is responsible &or

receivin! the re uest and savin! related in&ormation"

X A&ter receivin! the connection re uest% *oa analyKes the re uest% calls analysis

module% and #or$s out solutions% R1 tar!et% and in&ormation o& the list" At the same

time% it processes the re uest accordin!ly"

X A&ter the correspondin! treatment is &inished% the eb server sends responses to

the client bro#ser and then closes the TC+ connection #ith the client" 4or di&&erent

re uest methods% the embedded eb server *oa ma$es di&&erent responses" I& the

re uest method is A0% the response header #ill be sent to the bro#serO I& the

re uest method is 5 T% in addition to sendin! the response header% it #ill also read

out &rom the server the R1 tar!et &ile o& the client re uest and send it to the client

bro#serO I& the re uest method is +8ST% the in&ormation o& the list #ill be sent tocorrespondin! C5I pro!ram% and then ta$e the in&ormation as a C5I parameter to

e'ecute C5I pro!ram" 4inally% the results #ill be sent to client bro#ser" *oaEs

&lo#chart is sho#n in 4i!" 2"2"

'



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4i!" 2"2 mbedded eb server &lo#chart

2.3 EMBEDDED LINU$

1



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1inu' 8S runnin! in embedded system is $no#n as mbedded 1inu'" 1inu' os

occupy only up to =,,J* space in memory" 6o# days most S based on 32 bit

processor li$e ARM% +o#er+C% Cold4ire etc have su&&icient amount o& &lash and RAM

memory" Actually linu' is one o& the &avorite 8S &or S" The reason behind this is

&ollo#in!Y

=" 1inu' is compact and occupy less space in memory"

2" 1inu' has real time operational capabilities" 1inu' is real time operatin! system

a&ter release o& $ernel 2" "'" 1inu' $ernel is also preemptive $ernel"

3" 1inu' is &ully con&i!urable% it means you can use only those components #hich are

desired and le&t others"

>" 1inu' has support o& virtual memory" This is special re uirement o& sa&ety criticalproducts li$e aeroplane% trains% nuclear reactor etc"

" 1inu' has support o& all maBor devices li$e S*% ebcam% +rinter% various &ile

systems li$e 4AT%64S% 44S etc"

" 1inu' is open source% so user can do &ull con&i!uration at each level"

" S are desi!ned in order to $eep at lo# price" This re uirement ma$es linu' more

suitable 8S% because it is &ree"

" 1inu' is &ully supported by community"

." +roprietary linu' is also available by di&&erent vendors li$e Montavista% 967%

timesys% #indriver etc"

=," 1inu' has support o& more then = , processors"

2.4 (EATURES O( LINU$

- 1inu' is Monolith $ernel #ith support o& Modular architecture"

- +rotected mode so pro!rams or userEs canEt access unauthoriKed areas"

- 6et#or$in! #ith TC+FI+ and other protocols"

- Multiple user capability"- Shared libraries

- True multitas$in!

- 7 A !raphical user inter&ace similar to #indo#s% but supports remote sessions over

a net#or$-

2.5 (EATURES O( EMBEDDED LINU$

Con&i!urable $ernel Con&i!urable &eatures% Con&i!urable siKe% Con&i!urable

&unctionality



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0evice Support , #ide ran!e o& device are supported li$e S*% thernet etc"

Royalty 4ree ,6o need to pay royalty to &or any type o& product"

Support &or many embedded applications 0atabase (S91 1ite% Metalite)% #ebserver

(*oa% thttpd) 5raphics (+ 5% 6ano )

8pen Source Source code can be customiKed &or speci&ic need o& embedded

system

2.# BENE(IT O( USING EMBEDDED LINU$

There are so many bene&its o& usin! embedded linu'" They are

=" :endor independent

sin! linu' means you are no lon!er depend on particular vendor &or supply o& tools"

In linu' everythin! is available &rom open source community" ven service model o&

all linu' vendors is almost same they used to provide linu' $ernel% libraries etc" So%

user can easily s#itched &rom one vendor to another"

And even i& user #ants to !o #ithout vendor% everythin! is &reely available" *ut in that

case o& the #or$ o& inte!ration% *S+ development has to be done by use itsel&"

2" asy availability o& used tools

In embedded linu' so many development tools and utilities are easily available" ser

can do#nload them and use them &reely" So this result in &ast development time &or

embedded system products"

3" :arious hard#are supports

1inu' community is very active" They re!ularly add support o& ne# hard#are" 1inu' is

used in various research laboratories and universities #orld#ide% so linu' is al#ays

upto date #ith latest hard#are support"

>" 1o# cost development

*y usin! linu' in embedded system product% #e can development lo# cost products"1inu' development tools are &ree and easily available" 1inu' is royalty &ree" There is

no need to pay royalty &or ma$in! any number o& products"

2.' EMBEDDED LINU$ DEVELOPMENT ENVIRONMENT

!



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Fig.2.3. Embedded Linux Setup[4]

4ollo#in! are the essential &or embedded linu' setup

=" mbedded system development board (li$e ARM. board)

2" ost +C

3" Serial cable

>" thernet cross cable

" mbedded linu' $ernel runnin! in board

Serial connection is used to brin! up shell in host pc" thernet connection is used &or

do#nloadin! $ernel and debu!!in!"

ost terminal must have &ollo#in! tools

=" clipse I0

2" 5CC toolchain &or mbedded 1inu'

3" T4T+ (Trivial 4ile Transport +rotocol) server % this is &or do#nloadin! o& modules

CHAPTER 3

BLOC- DIAGRAM

"



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3.1 DESIGN O( THE HARDWARE SYSTEM

ARM . processor is used as core o& the hard#are plat&orm in this paper" 4i!" 3"= is

the bloc$ dia!ram o& hard#are system" Include serial port% thernet inter&ace% LTA5port% stora!e systems and so on" The &re uency o& ARM . is >,,M K and can up to

33M K in the ma'imum" Accordin! to its mode o& internal circuit" =2M K chosen &or

the crystal" LTA5 (Loint Test Action 5roup) is an international test protocol standard%

so&t#are simulation% sin!le-step debu! and u-boot do#nload can be carried out

throu!h the LTA5 port% itEs a simple and e&&icient means o& developin! and debu!!in!

embedded systems" The S0RAM capacity in the system is >M*% #or$in! volta!e is

3"3:% data bus is 32-bit%cloc$ &re uency up to =,,M K% Auto-Re&resh and Sel&-

Re&resh are both supported"

The httpd is a tiny web server f r embedded system! the entire si"e it # nsumed is

$4%& n'y. httpd is (TT)*$.$ # mp'ian#e! +ET*),ST meth d! -eep a'ive # nne#ti n

and w # ntr ' supp rt. F r # mputer pr grammer! httpd is easi'y f r reuse be#ause

f its stru#ture is simp'e. /n this paper! we intr du#e the means f bund'ing httpd t

ma-e a new web page! by 0ust adding the re1uired fun#ti ns. This ma-es the stati#

web page deve' pment n embedded system n t n'y simp'e but a's ef #ient than

ther web server.

,n n rma' # nditi ns! we may usua''y se'e#t pa#he as web server be#ause f it is

p werfu'. ,f #ause! there are a'ways s me ex#epti ns. &e#ause f hardware res ur#e

n embedded system is 'imited! f r instan#e! S& 524$6x has n'y 748& 9 8 and

$668/)S and SiS::6 has $2;8& 9 8 and 4668/)S.


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=sua''y! web server mean tw things! ne is a # mputer that resp nsib'e f r a##epting

(TT) re1uests fr m #'ients! whi#h are -n wn as web br wser su#h as 8i#r s ft

/nternet Exp' rer r 8 "i''a Firef x> the ther ne is a # mputer pr gram that

pr vides fun#ti n # rresp nding t a'' the #'ient re1uests. The 'atter is main'y issue

we dis#uss here.

Web Server Introduce

T a webmaster! there is n thing imp rtant than stabi'ity and ef #ien#y.


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Server Model

1. Finite State Machine Servers

T maximi"e the s#a'abi'ity! many sma'' web servers are imp'emented as a sing'e

pr #ess and a nite state ma#hine. Every tas- is sp'it int tw r m re sma'' steps that

are exe#uted as needed as Figure $.


28/36


ea#h ne ab'e t exe#ute its wn tas- and the ' #a' variab'e independent'y fr m the

thers. fter thread nish its tas-! the mem ry it ##upied w u'd be free.


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F r re'iabi'ity and se#urity reas ns! s me web servers use mu'tip'e pr #esses rather

than mu'tip'e threads within a sing'e pr #ess. =sua''y! a p ' f pr #esses is used unti'

a #ertain thresh 'd f re1uests has been served by pr #ess bef re rep'a#ed by a new

ne. &e#ause threads share a main pr #ess # ntext su#h as g' ba' variab'e! if a thread

#rash its wn tas- and the err r variab'e may 0am ther thread! this may easi'y #rash

the wh 'e app'i#ati n! and a buffer ver w #an have disastr us # nse1uen#es.

8 re ver! mem ry 'ea- is usua''y ut f the # ntr ' f r third party 'ibraries su#h as

)()! the app'i#ati n pr grammer #ann t dea' with it using threads! but #an use a p 'f pr #esses with a 'imited 'ifetime be#ause f ,S aut mati#a''y frees a'' the a'' #ated

mem ry when pr #ess dies. Furtherm re! g' ba' variab'e addresses in a pr #ess a's

differ fr m ea#h pr #ess! even if ne pr #ess has #rash! the thers d n t be

interfered. 8u'tipr #ess i''ustrated as Figure 3.

4. Mixed Module Servers

T integrate a'' advantages f the f rmer m de'! many web servers imp'ement a

mixture f a'' these pr gramming te#hni1ues su#h that serving #'ient a## rding t the

different tas-. F r examp'e! stati# web page imp'ement with sing'e pr #ess and thread!

. F r serving stati# r dynami# # ntent! et#.@.

9



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httpd Web Server


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e!uire"ents#

$ard%are re!uire"ents#

$. ) A/nte' )entium )r #ess r with m re than 466 8("@

2. 98B Embedded Cevi#e

3. Seria' ab'e

4. Ethernet ab'e

:. 9e'ay

So&t%are e!uire"ents#

$. )r gramming 'anguageD

2. Linux -erne' versi n 2.7

3. ny ,S f r ) with suitab'e sta#- and driver

3.2 DESIGN O( THE SO(TWARE SYSTEM

So&t#are development process based 8S includes the establishment o& cross-

compiler% the transplant o& *ootloader% the transplant o& embedded 1inu'% the deve-lopment embedded eb server" To be!in #ith% system cross-compiler environment

usin! A*I->"3"3 is established" #hatEs more% uboot that developed by the 5erman

0 76 !roup is used as *ootloader" The &unction o& *ootloader is to initialiKe the

hard#are devices% establish memory mappin! tables% thus establish appropriate

hard#are and so&t#are environment% prepare &or the &inal call to the operatin! system

$ernel" *esides% ya&&s &ile system is made"

.('(1 )he )ran * ant +f 0in%$ erne

!1



32/36


1inu' is used as operatin! system because 1inu' system is a hierarchical structure

and completely open its $ernel source% the important &eature o& 1inu' is portability to

support a #ide ran!e o& hard#are plat&orms% can run in most o& the architecture"

Contains a comprehensive set o& editin!% debu!!in! and other development tools%

!raphical inter&ace% a po#er&ul net#or$ supportin! and rich applications" In addition%

the $ernel can be reduced by con&i!urin!"

Transplantation include the &ollo#in! sections

=) Jernel con&i!ure" Ma$e menucon&i! is used to con&i!ure 1inu' $ernel" Support

TC+FI+ protocol in the 6et#or$in! options% Add 6et#or$ device support option in the

0evice 0rivers% and select 0M.,,, support in thernet (=, or =,,Mbit)"

2) Modi&y the correspondin! $ernel cod3) Connect script"

>) Mount the &ile system"

) 0river transplantation ( S* device driver mi!ration% 1C0 driver transplantation%

etc")"

1inu' development plat&orm is build #hen above contents are compiled and #rote

into system board &lash"

.('(' Set 2* +f e, Ser&er

=) 0o#nload *oa source? @" The boa-,".>"=3 version is used in this paper"

2) 0ecompress and compile *oa source" se "Fcon&i!ure !enerated Ma$e&ile

&iles%modi&y Ma$e&ile% chan! CCQ!cc and C++Q!cc G &or CCQarm-linu'-!cc and

C++Qarm-linu'!PP- "

3) Compile and optimiKe"

>) Con&i!ure *oa"

) Test *oa run"

64S is used &or testin! !enerally%&irst% copy *oa #eb server to the directory o& &ile

system sbinF% copy *oa con&i!uration &ile Hboa"con&H to the directory o& &ile system

etcFboaF"6e't% add the application to &ile system" stablish a #eb directory #hich

contents o& the c!i-bin directory and inde'"html static TM1 pa!es &ollo#in! the in

the shared directory" 1ast% start tar!et board usin! 64S !uide" Set the tar!et boardEs

!



33/36


I+ address is =,"= "=2"=>. % 8pen the the bro#ser in +C% input http FF=,"= "=2"=>.%

pa!e #ill appear as sho#n in 4i!ure 3"

.('(. I#* e#ent of 3yna#ic e, "a!e

There are many di&&erent technolo!ies to achieve dynamic eb pa!e% commonly

used #ith C5I% AS+% + +% and LS+ and so on" In 1inu'% C5I o&ten used to achieve

dynamic pa!e"

1 +&er&ie on C6I

C5I provides a access to e'ecute e'ternal pro!ram &or eb server% this server

technolo!y can be made to interact bet#een the bro#ser and server" C5I pro!rams

can be #ritten by any pro!rammin! lan!ua!e% &or e'ample Shell% 4ortran% +ascal%

+erl% C and so onZ*ut #ith C5I pro!rams #ritten in C lan!ua!e proved have a

e'ecution speed% security% etc% So C lan!ua!e is used &or C5I pro!ram desi!n in this

paper"

4i!" 3"2" or$ process o& C5I

C5IEs #or$in! process sho#n in 4i!" 3"2% concrete steps are as &ollo#s ?=@

a) sers in the client bro#ser ma$e a re uest to the eb server"

b) eb server #ill ma$e a Bud!ement on the re uest"

eb server #ill trans&er &ile directly to the client bro#ser i& the re uest is a static &ile%

else eb server #ill activate the C5I pro!ram"

!!



34/36


35/36


RE(ERENCES!#



36/36


?=@ Mo 5uanOMin!hai 5u% 0esi!n And Implementation 8& An mbedded eb Server

*ased 8n ARM %pp" =2- = %2,=,"

?2@ ;a$un 1iuO 7iaodon! Chen!% 0esi!n and implementation o& embedded ebserver based on arm and 1inu'% Issue 0ate 3,-3= May 2,=,%8n pa!e(s) 3= G

3=.

?3@ ###" i$ipedia"com

?>@ embeddedcra&t"or!Fembeddedlinu'"html

!$

arm 9 web server

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