Name : Deekshith Reddy Ramreddygari 700# -700613586

8.20 Assuming a 1- KB page size, what are the page numbers and offsets for the following address references (provided as decimal numbers): a. 3085 b. 42095 c. 215201 d. 650000 e. 2000001Ans Page no =Address reference % page sizeoffset = memory address / page size3085=42095=215201=650000=2000001=

8.23 Consider a logical address space of 256 pages with a 4- KB page size, mapped onto a physical memory of 64 frames. a. How many bits are required in the logical address? b. How many bits are required in the physical address?Ans : a) Page size= 4KB =2^12 bytesbits for offset =12 bitslogical address space = 256 pages256 is maximum for each process256 = 2^8bits for page no = 8 bitsTotal bits in logical address = bits for page no + bits for offset= 8+12 = 20 bits

b) Frame size =page size = 4KBTotal size = 64 frames * page size = 64 * 4 KB = (2^6) * (2^2)* (2^10) = 2^18Total bits in physical address = 18 bits

8.25 Consider a paging system with the page table stored in memory. a. If a memory reference takes 50 nanoseconds, how long does a paged memory reference take? b. If we add TLB s, and 75 percent of all page-table references are found in the TLB s, what is the effective memory reference time? (Assume that finding a page-table entry in the TLB s takes 2 nanoseconds, if the entry is present.)

Ans a) 50nano secs to access the page table and word in memory time for page memory reference = 50 + 50 = 100 nanoseconds

b) EAT = % (TLB + Memory access ) + ( 1 - %) (TLB + memory access + Page table access ) = 0.75 (2 + 50) + 0.25(2+ 50 + 50)= 0.75 * 52 + 0.25 * 102= 64.50 nanoseconds

8.29 What is the purpose of paging the page tables?Ans:In specific circumstances the page tables could get to be expansive enough that by paging the page tables, one could improve the memory designation issue (by guaranteeing that everything is dispensed as settled size pages as contradicted to variable-sized pieces) furthermore empower the swapping of parcels of page table that are not as of now utilized

9.21 Consider the following page reference string: 7, 2, 3, 1, 2, 5, 3, 4, 6, 7, 7, 1, 0, 5, 4, 6, 2, 3, 0 , 1. Assuming demand paging with three frames, how many page faults would occur for the following replacement algorithms? LRU replacement FIFO replacement Optimal replacementAnsLRU replacement : 723 1 5 3 4 6 7 1 0 5 4 6 2 3 0 1777113337700066600

22222444445552221

3355566111444333

No of page faults = 18

FIFO replacement

7 2 3 1 5 4 6 7 1 0 5 4 6 2 3 0 177711166600066600

2225557775552221

333444111444333

No of page faults = 17

Optimal replacement

7 2 3 1 5 4 6 7 0 4 6 2 3 7771111111111

222555554623

33346700000

No of page faults = 13

9.27 Consider a demand-paging system with the following time-measured utilizations: CPU utilization Paging disk Other I/O devices 20% 97.7% 5% For each of the following, indicate whether it will (or is likely to) improve CPU utilization. Explain your answers. a. Install a faster CPU . b. Install a bigger paging disk. c. Increase the degree of multiprogramming. d. Decrease the degree of multiprogramming. e. Install more main memory. f. Install a faster hard disk or multiple controllers with multiple hard disks. g. Add prepaging to the page-fetch algorithms. h. Increase the page size.

a) No this won't help since the CPU is under utilized.b) No, this won't help because the problem is speed of retrieval not the amount of room neededc) No, this will mean still fewer frames per process and more thrashing making the problem worse.d) Yes, this will help. Fewer process, more frames per process and less thrashinge) Yes, this will help. More frames in memory so less thrashing.f) No, won't help. The paging disk is the problem not other disks.h) Maybe this might help. However it might also hurt. Larger page sizes means that info is retrieved in a more timely way per byte. So info is brought in quicker. The problem is that it might be bringing in info that is not needed so it might hinder.

9.30 A page-replacement algorithm should minimize the number of page faults. We can achieve this minimization by distributing heavily used pages evenly over all of memory, rather than having them compete for a small number of page frames. We can associate with each page frame a counter of the number of pages associated with that frame. Then, to replace a page, we can search for the page frame with the smallest counter. a. Define a page-replacement algorithm using this basic idea. Specif- ically address these problems: i. What is the initial value of the counters? ii. When are counters increased? iii. When are counters decreased? iv. How is the page to be replaced selected?

b. How many page faults occur for your algorithm for the following reference string with four page frames? 1, 2, 3, 4, 5, 3, 4, 1, 6, 7, 8, 7, 8, 9, 7, 8, 9, 5, 4, 5, 4, 2.

c. What is the minimum number of page faults for an optimal page- replacement strategy for the reference string in part b with four page frames?

Ans :a) i) intial value of the countes = 0ii) counters are increased when the particular page is loaded into the memoryiii) counters are decreased when a particular page is replaced of page faultiv) The page to be repalced is the one with least counter value

b)No of page faults = 11

c)1 2 3 4 5 1 6 7 8 9 5 4 21111556666555

222211119999

33333777744

4444488882

No of page faults = 13