assm13 lecture 2 digital components
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CSW 353(Assembly Language)
Computer
ArchitectureDr. Salma [email protected]
mailto:[email protected]:[email protected] -
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Course LogisticsTextbook Outline
2
Chapter 1:Digital Logic Circuits
Chapter 2:Digital Components
Chapter 3:Data Representation
Chapter 4:Register Transfer and
Microoperations
Chapter 5:Basic Computer OrganizationChapter 6:Programming the Basic Computer
Chapter 7:Microporgammed Control
Chapter 8:CPU
Chapter 11:I/O Organization
Chapter 12:Memory Organization
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Digital
Components1. Integrated Circuits
2. Decoders3. Multiplexers
4. Registers
5. Binary Counters
6. Memory Units
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1. Integrated Circuits
Miniature, low-costelectronics circuits whose
components are fabricated on
a single, continuous piece ofsemiconductor material to
perform a high-level function.
Usually referred to as a
monolithic IC.410/6/2013
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1. Integrated Circuits(cont.)
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2. Circuit technology (digital logic family):Bipolar or MOS or both.
Bipolar:
Diode logic (DL). (obsolete) Resistor transistor logic (RTL). (obsolete)
Diode transistor logic (DTL). (obsolete)
Transistor Transistor logic (TTL).
Emitter Coupled Logic (ECL), also known as Current
Mode Logic(CML).
Integrated Injection logic (I2L). (obsolete)
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1. Integrated Circuits(cont.)
2. Circuit technology (digital logic family):Bipolar or MOS or both.
MOS:
PMOS family (using P-channel MOSFETs) (obsolete) The NMOS family (using N-channel MOSFETs).
The CMOS family (using both N- and P-channel
devices). The Bi-MOS logic family uses both bipolar and MOS
devices.
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1. Integrated Circuits(cont.)
Data sheet
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1. Integrated Circuits(cont.)
Basic componentsCombinational
Decoders binary adders or any Boolean function
Multiplexers
Sequential
Flip-Flops
Registers binary counters and memory units
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2. Decoders
Converts binary information from codedinputs to a maximum of unique outputs.
-to-line or . (can use less than )
Each output represents one of the mintermsof the input variables.
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2. Decoders(cont.)
A -to-line decoder
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2. Decoders(cont.)
Truth table for
-to-
line decoder
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2. Decoders(cont.)
A
-to-
line decoder can be used for: Binary to octal conversion: input variable may
represent a binary number, and outputs will
then represent the eight digits in a octalnumber system.
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2. Decoders(cont.)
Generally, decoders can be used for: Implementing Boolean functions: any
combinational circuit with inputs and
outputs can be implemented with an
-to-
decoder and OR gates.
Example:
implement a full-adder circuit.
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2. Decoders(cont.)
Decoders can be used for: Implementing Boolean functions.
Example:
implement a full-adder circuit.
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2. Decoders(cont.)
A
-to-
line decoder with enable(demultiplexer)
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2. Decoders(cont.)
Truth table for
-to-
line decoder withenable:
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2. Decoders(cont.)
NAND gate decoders produce the mintermsin their complement form.
-to-line NAND decoder with enable.
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2. Decoders(cont.)
Decoder expansion: constructing largerdecoder from smaller ones.
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The most significant bit(s)decide(s) which decoder(s)
is/are enabled and which
is/are disabled.
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2. Decoders(cont.)
An encoder circuit performs the inverseoperation of a decoder.
Has (or less) input lines and output
lines that generate the binary codecorresponding to the input value.
Example: octal to binary decoder.
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2. Decoders(cont.)
An encoder circuit performs the inverseoperation of a decoder.
Has (or less) input lines and output
lines. Example: octal to binary decoder.
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It is assumed that only
one input has the valueof 1 at any given time;
otherwise, the circuit
has no meaning.
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Selected Problems
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Selected Problems(cont.)
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Selected Problems(cont.)
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Selected Problems(cont.)
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3. Multiplexers
Multiplexing means transmitting a largenumber of information units over a smaller
number of channels or lines.
A digital multiplexer (MUX, data selector) isa combinational circuit that selects binary
information from one or many input lines
and directs it to as single output line. Selection is controlled by a set of selection
lines inputs and selection lines.2810/6/2013
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3. Multiplexers(cont.)
-to-
multiplexer
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3. Multiplexers(cont.)
A
-to-
multiplexer is constructed from an-to- decoder by adding to it input
lines, one from each data input and using
the inputs as selection lines.
May have enable input to control the
operation of the unit.
Two or more in single IC package.3010/6/2013
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3. Multiplexers(cont.)
Quadruple
-to-
line multiplexer
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Selected Problems(cont.)
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Selected Problems(cont.)
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Selected Problems(cont.)
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4. Registers
ICs that contain storage cells are classifiedby the function they perform:
Registers
Counters
Memory units.
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4. Registers(cont.)
A registeris a group of flip-flops. -bit register has a group of flip-flops and
is capable of storing any binary information
of bits. Built into the CPU Very fast
A register may hold a computer instruction ,
a storage address, or any kind of data.
Register = flip-flops (load) + gates (control
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4. Registers(cont.)
Loading= transfer ofnew info into a register.
Parallel load = all
bits of the register are loaded
simultaneously (single clock
pulse).
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A 4-bit register
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4. Registers(cont.)
Parallel load Master clock
then a separate
load control signal.
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4. Registers(cont.)
Parallel load example Design a sequential circuit whose state table
is listed below.
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4. Registers(cont.)
Parallel load example Design a sequential circuit whose state table
is listed below.
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4. Registers(cont.)
Parallel load example Design a sequential circuit whose state table
is listed below.
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4. Registers(cont.)
Parallel load example
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4. Registers(cont.)
Shift Register: capable of shifting its binaryinformation in one (unidirectional) or both
directions (bidirectional).
Logical configuration: a chain of flip-flops incascade.
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4. Registers(cont.)
Serial transfer
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4. Registers(cont.)
Serial transfer
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i ( )
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4. Registers(cont.)
Bidirectional shift register with parallel load
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4. Registers(cont.)
Bidirectional shift register with parallel load
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4. Registers(cont.)
Bidirectional shift register with parallel load
often used to interface digital systems
situated remotely from each other, e.g.
transmission of
-bit between two points. Transmitter loads in parallel into a shift
register, transmits from serial output.
Receiver accepts one at a time through serialinput into a shift register, then taken in
parallel after all bits are accumulated.5010/6/2013
5 C
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5. Counters
A counter is basically a register that goes
through a predetermined sequence of states
upon the application of input pulses.
The design of synchronous binary counters: Previous lecture (sequential circuits).
Direct inspection of the sequence of states that
the register must undergo. e.g. 0000, 0001, 0010 when does a bit change?
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5. Counters(cont.)
Synchronous binary counters have a regular
patter and their circuit will usually employ
flip-flops with complementing capabilities
T or JK. Example: 4-bit counter with JK flip-flips.
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5 C t ( t )
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5. Counters(cont.)
4-bit synchronous binary counter.
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To extend counter to
next stage
5 C t ( t )
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5. Counters(cont.)
Binary counters with Parallel Load for
transmitting an initial binary number prior
to the counter operation.
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5. Counters(cont.)
Binary counters with Parallel Load
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S l t d P bl
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Selected Problems
S l t d P bl ( t )
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Selected Problems(cont.)
S l t d P bl ( t )
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Selected Problems(cont.)
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Selected Problems(cont.)
Selected Problems (cont )
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Selected Problems(cont.)
Next Lecture
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Next Lecture
Register Transfer and Microoperations.
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Assignment
- Reading: Chapters 2+3.
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