bc0046 microprocessor
TRANSCRIPT
Bachelor of Computer Application (BCA) – Semester 3
BC0046 – Microprocessor – 4 Credits
(Book ID: B0807)
Roll no: - 581111448
Name: Rajeshkumar Shah
Assignment Set – 1 (60 Marks)
BC0046–Microprocessor Roll no: 58111448 Name: Rajeshkumar shah
1. Convert the decimal number 321.145 to octal and hexadecimal.
Conversion of Decimal number 321.145 to octal :
The integer part can be converted to octal by successive division by 8, with remainders.
321 = 40*8 + 1= (5*8 + 0)*8 + 1= 501[b=8]
The fractional part can be converted to octal by successive multiplication by 8, and continuing with successive fractional parts, until you get the repetition that must occur, or until you get the level of precision you need.
8(.145) = 1.168(.16) = 1.288(.28) = 2.248(.24) = 1.928(.92) = 7.368(.36) = 2.888(.88) = 7.048(.04) = 0.328(.32) = 2.568(.56) = 4.48. . .giving.145 = .1121727024...
So Octal number is 501.1121727024
Conversion of Decimal number 321.145 to hexadecimal
The integer part.
BC0046–Microprocessor Roll no: 58111448 Name: Rajeshkumar shah
321 = 20*16 + 1= (1*16 + 4)*16 + 1= 141 (base 16)
The fractional part -- similar to the octal case, but with multipliers of 16 instead of 8. It will start out:.145 = .251EB9...[base=16] and321.145 = 141.251EB9...[base=16]
So Hexadecimal number is : 141.251EB9
2. Write an assembly language program to find the smallest among two
numbers.
Answer:
.model small
.stack 64
.data
n1 db 08h,04h res db ? .code
mov ax,@data mov ds,ax mov cx,02 lea si,n1 mov bl,0ffh
mine:mov al,[si] cmp al,bl jne loop1 jmp loop2
loop1:jnc loop2 mov bl,al inc si
BC0046–Microprocessor Roll no: 58111448 Name: Rajeshkumar shah
loop mine jmp exit
loop2:inc si loop mine
exit:mov res,bl hlt end
OR
MVI B, 30HMVI C, 40HMOV A, BCMP C JZ EQU JC SMLOUT PORT1HLTEQU: MVI A, 01HOUT PORT1HLTSML: MOV A, COUT PORT1HLT
3. Draw and explain the internal architecture of 8085.
Answer:
BC0046–Microprocessor Roll no: 58111448 Name: Rajeshkumar shah
Internal Architecture of 8085
Control Unit
Generates signals within microprocessor to carry out the instruction, which has been decoded. In reality causes certain connections between blocks of the microprocessor to be opened or closed, so that data goes where it is required, and so that ALU operations occur.
Arithmetic Logic Unit
The ALU performs the actual numerical and logic operation such as ‘add’, ’subtract’, ‘AND’, ‘OR’, etc. Uses data from memory and from Accumulator to perform arithmetic. Always stores result of operation in Accumulator.
Registers
The 8085/8080A-programming model includes six registers, one accumulator, and one flag register, as shown in above figure.
BC0046–Microprocessor Roll no: 58111448 Name: Rajeshkumar shah
In addition, it has two 16-bit registers: the stack pointer and the program counter. They are described briefly as follows.
The 8085/8080A has six general-purpose registers to store 8-bit data; these are identified as B,C,D,E,H and L as shown in the figure. They can be combined as register pairs – BC, DE, and HL – to perform some 16-bit operations. The programmer can use these registers to store or copy data into the registers by using data copy instructions.
Accumulator
The accumulator is an 8-bit register that is a part of arithmetic/logic unit (ALU). This register is used to store 8-bit data and to perform arithmetic and logical operations. The result of an operation is stored in the accumulator. The accumulator is also identified as register A.
Flags
The ALU includes five flip-flops, which are set or reset after an operation according to data conditions of the result in the accumulator and other registers. They are called Zero(Z), Carry (CY), Sign (S), Parity (P), and Auxiliary Carry (AC) flags. The most commonly used flags are Zero, Carry, and Sign. The microprocessor uses these flags to test data conditions. For example, after an addition of two numbers, if the sum in the accumulator is larger than eight bits, the flip-flop uses to indicate a carry — called the Carry flag (CY) – is set to one. When an arithmetic operation results in zero, the flip-flop called the Zero(Z) flag is set to one. The Figure shows an 8-bit register, called the flag register, adjacent to the accumulator. However, it is not used as a register; five bit positions out of eight are used to store the outputs of the five flip-flops. The flags are stored in the 8-bit register so that the programmer can examine these flags (data conditions) by accessing the register through an instruction.
These flags have critical importance in the decision-making process of the micro- processor. The conditions (set or reset) of the flags are tested through the software instructions. For example, the instruction JC (Jump on Carry) is implemented to change the sequence of a program when CY flag is set. The thorough understanding of flag is essential in writing assembly language programs.
Program Counter (PC)
This 16-bit register deals with sequencing the execution of instructions. This register is a memory pointer. Memory locations have 16-bit addresses, and that is why this is a 16-bit register. The microprocessor uses this register to sequence the execution of the instructions. The function of the program counter is to point to the memory address from which the next
BC0046–Microprocessor Roll no: 58111448 Name: Rajeshkumar shah
byte is to be fetched. When a byte (machine code) is being fetched, the program counter is incremented by one to point to the next memory location
Stack Pointer (SP)
The stack pointer is also a 16-bit register used as a memory pointer. It points to a memory location in R/W memory, called the stack. The beginning of the stack is defined by loading 16-bit address in the stack pointer.
Instruction Register/Decoder
Temporary store for the current instruction of a program. Latest instruction sent here from memory prior to execution. Decoder then takes instruction and ‘decodes’ or interprets the instruction. Decoded instruction then passed to next stage.
Memory Address Register
Holds address, received from PC, of next program instruction. Feeds the address bus with addresses of location of the program under execution.
Control Generator
Generates signals within microprocessor to carry out the instruction which has been decoded. In reality causes certain connections between blocks of the microprocessor to be opened or closed, so that data goes where it is required, and so that ALU operations occur.
Register Selector
This block controls the use of the register stack in the example. Just a logic circuit which switches between different registers in the set will receive instructions from Control Unit.
General Purpose Registers
Microprocessor requires extra registers for versatility. Can be used to store additional data during aprogram. More complex processors may have a variety of differently named registers.
BC0046–Microprocessor Roll no: 58111448 Name: Rajeshkumar shah
4. Draw and explain the internal architecture of 8086.
Answer:
Below figure shows the internal architecture of the 8086. Except for the instruction register, which is actually a 6-byte queue, the control unit and working registers are divided into three groups according to their functions. There is a data group, which is essentially the set of arithmetic registers; the pointer group, which includes base and index registers, but also contains the program counter and stack pointer; and the segment group, which is a set of special purpose base registers. All of the registers are 16 bits wide.
The data group consists of the AX, BX, CX and DX registers. These registers can be used to store both operands and results and each of them can be accessed as a whole, or the upper and lower bytes can be accessed separately. For example, either the 2 bytes in BX can be used together, or the upper byte BH or the lower byte BL can be used by itself by specifying BH or BL, respectively.
Internal Architecture of 8086
In addition to serving as arithmetic registers, the BX, CX and DX registers play special addressing, counting, and I/O roles:
BX may be used as a base register in address calculations.
CX is used as an implied counter by certain instructions.
BC0046–Microprocessor Roll no: 58111448 Name: Rajeshkumar shah
DX is used to hold the I/O address during certain I/O operations.
The pointer and index group consists of the IP, SP, BP, SI, and DI registers. The instruction pointer IP and SP registers are essentially the program counter and stack pointer registers, but the complete instruction and stack addresses are formed by adding the contents of these registers to the contents of the code segment (CS) and stack segment (SS) registers. BP is a base register for accessing the stack and may be used with other registers and/or a displacement that is part of the instruction. The SI and DI registers are for indexing. Although they may be used by themselves, they are often used with the BX or BP registers and/or a displacement. Except for the IP, a pointer can be used to hold an operand, but must be accessed as a whole.
To provide flexible base addressing and indexing, a data address may be formed by adding together a combination of the BX or BP register contents, SI or DI register contents, and a displacement. The result of such an address computation is called an effective address (EA) or offset. The word “displacement” is used to indicate a quantity that is added to the contents ‘of a register(s) to form an EA. The final data address, however, is determined by the EA and the appropriate data segment (DS), extra segment (ES), or stack segment (SS) register.
The segment group consists of the CS, SS, DS, and ES registers. As indicated above, the registers that can be used for addressing, the BX, IP, SP, BP, SI, and DI registers, are only 16 bits wide and, therefore, an effective address has only 16 bits. On the other hand, the address put on the address bus, called the physical address, must contain 20 bits. The extra 4 bits are obtained by adding the effective address to the contents of one of the segment registers as shown in below figure. The addition is carried out by appending four 0 bits to the right of the number in the segment register before the addition is made; thus a 20-bit result is produced
.
Generation of physical Address
The utilization of the segment registers essentially divide the memory space into overlapping segments, with each segment being 64K bytes long and beginning at a 16-
BC0046–Microprocessor Roll no: 58111448 Name: Rajeshkumar shah
byte, or paragraph, boundary, i.e., beginning at an address that is divisible by 16. We will hereafter refer to the contents of a segment register as the segment address, and the segment address multiplied by 16 as the beginning physical segment address, or simply, the beginning segment address.
The 8086’s PSW contains 16 bits, but 7 of them are not used. Each bit in the PSW is called a flag. The 8086 flags are divided into the conditional flags which reflect the result of the previous operation involving the ALU, and the control flags, which control the execution of special functions. The flags are summarized in below figure
The condition flags are:
SF (Sign FIag)-Is equal to the MSB of the result. Since in 2’s complement negative numbers have a 1 in the MSB and for nonnegative numbers this bit is 0, this flag indicates whether the previous result was negative’ or nonnegative.
ZF (Zero Flag)-Is set to 1 if the result is zero and 0 if the result is nonzero.
PF (Parity Flag)-Is set to 1 if the low-order 8 bits of the result contains an even number of 1’s; otherwise it is cleared.
CF (Carry Flag)-An addition causes this flag to be set if there is a carry out of the MSB, and a subtraction causes it to be set if a borrow is needed. Other instructions also affect this flag and its value will be discussed when these instructions are defined.
AF (Auxiliary Carry Flag)-Is set if there is a carry out of bit 3 during an addition or a borrow by bit 3 during a subtraction. This flag is used exclusively for BCD arithmetic.
OF (Overflow Flag)-Is set if an overflow occurs, i.e., a result is out of range. More specifically, for addition this flag is set when there is a carry into the MSB and no carry out of the MSB or vice versa. For subtraction, it is set when the MSB needs a borrow and there is no borrow from the MSB or viceversa.
PSW register of 8086
BC0046–Microprocessor Roll no: 58111448 Name: Rajeshkumar shah
The control flags are:
DF (Direction Flag)-Used by string manipulation instructions. If zero, the string is processed from its beginning with the first element having the lowest address. Otherwise, the string is processed from the high address towards the low address.IF (Interrupt Enable Flag)-Ifset, a certain type of interrupt (a maskable interrupt) can be recognized by the CPU; otherwise, these interrupts are ignored.TF (Trap Flag)-If set, a trap is executed after each instruction.
5. Write a sequence of instructions to reverse a two digit hexadecimal
number available in the register AX using shift and rotate instructions
Answer:
Using Shift:
mov ax,1111111100000000bmov cx,2shl ax,cl ;ax=1111110000000000b
Using Rotate
mov ax,1111111100000000bmov cx,2rol ax,cl ;ax=1111110000000011b
6. Explain the concept of Linking and Relocation.
Answer:
In constructing a program some program modules may be put in the same sourcemodule and assembled together; others may be in different source modules and assembled separately. If they are assembled separately, then the main module, which has the first instruction to be executed, must be terminated by an END statement with the entry point specified, and each of the other modules must be terminated by an END statement
BC0046–Microprocessor Roll no: 58111448 Name: Rajeshkumar shah
with no operand. In any event, the resulting object modules, some of which may be grouped into libraries, must be linked together to form a load module before the program can be executed. In addition to outputting the load module, normally the linker prints a memory map that indicates where the linked object modules will be loaded into memory. After the load module has been created it is loaded into the memory of the computer by the loader and execution begins. Although the I/O can be performed by modules within the program, normally the I/O is done by I/O drivers that are part of the operating system. All that appears in the user’s program are references to the I/O drivers that cause the operating system to execute them.
The general process for creating and executing a program is illustrated in below figure. The arrows indicate that corrections may be made after anyone of the major stages.
Creation and Execution of a program
7. Differentiate macros and procedures.
Answer:
a) Procedures save memory and Macros don’t save memory
BC0046–Microprocessor Roll no: 58111448 Name: Rajeshkumar shah
b) procedures requires more code to program the linkage than is needed to
perform the task whereas in macros no linkage is required
c) procedures provides a modularity that makes it easier to debug and
modify program whereas macros provides some degree of modularity
8. What is the operational difference between the IRET and RET
instructions?
Answer:
The Return (RET) instructions provide a means, at the end of a subroutine, of resuming program execution at the instruction following the Call instruction which invoked the subroutine. These instructions are placed at the end of the subroutine, not in the body of the main program. When encountered, the Return will move the byte pointed to by the Stack Pointer into the lower byte of the PC, the next byte higher in RAM to the higher byte of PC, and add 2 to the contents of SP. Thus, the address of the instruction following the Call, previously saved on the stack, is now in PC, and will be fetched next. Also, the stack pointer is updated accordingly. The Return Conditional executes exactly the same way, providing that the conditions specified by the CCC bits are true. None of the flags are affected.
Since int pushes the flags onto the stack you must use a special return instruction, iret (interrupt return), to return from a routine called via the int instructions. If you return from an interrupt procedure using the ret instruction, the flags will be left on the stack upon returning to the caller. The iret instruction is equivalent to the two instruction sequence: ret.
But ret instructions doesn’t affect any flags, whereas the iret instruction, by its very nature, can affect all the flags since it pops the flags from the stack.
9. Describe about each flag of a 8086 flag register.
Answer:
BC0046–Microprocessor Roll no: 58111448 Name: Rajeshkumar shah
The 8086’s PSW contains 16 bits, but 7 of them are not used. Each bit in the PSW is called a flag. The 8086 flags are divided into the conditional flags which reflect the result of the previous operation involving the ALU, and the control flags, which control the execution of special functions. The flags are summarized in below figure
The condition flags are:
SF (Sign FIag)-Is equal to the MSB of the result. Since in 2’s complement negative numbers have a 1 in the MSB and for nonnegative numbers this bit is 0, this flag indicates whether the previous result was negative’ or nonnegative.
ZF (Zero Flag)-Is set to 1 if the result is zero and 0 if the result is nonzero.
PF (Parity Flag)-Is set to 1 if the low-order 8 bits of the result contains an even number of 1’s; otherwise it is cleared.
CF (Carry Flag)-An addition causes this flag to be set if there is a carry out of the MSB, and a subtraction causes it to be set if a borrow is needed. Other instructions also affect this flag and its value will be discussed when these instructions are defined.
AF (Auxiliary Carry Flag)-Is set if there is a carry out of bit 3 during an addition or a borrow by bit 3 during a subtraction. This flag is used exclusively for BCD arithmetic.
OF (Overflow Flag)-Is set if an overflow occurs, i.e., a result is out of range. More specifically, for addition this flag is set when there is a carry into the MSB and no carry out of the MSB or vice versa. For subtraction, it is set when the MSB needs a borrow and there is no borrow from the MSB or viceversa.
PSW register of 8086
The control flags are:
DF (Direction Flag)-Used by string manipulation instructions. If zero, the string is processed from its beginning with the first element having the lowest address. Otherwise, the string is processed from the high address towards the low address.
BC0046–Microprocessor Roll no: 58111448 Name: Rajeshkumar shah
IF (Interrupt Enable Flag)-Ifset, a certain type of interrupt (a maskable interrupt) can be recognized by the CPU; otherwise, these interrupts are ignored.TF (Trap Flag)-If set, a trap is executed after each instruction.
10. Write an assembly program to add and display two numbers.
Answer:
TITLE ADD.model small.stack 100h.data
add_msga db 10,13, "Enter Number 1: $"add_msgb db 10,13, "Enter Number 2: $"add_num1 db ?add_num2 db ?add_result db ?
.codemain PROCmov ax,@datamov ds,ax
call AddNumbers
mov ax, 4c00hint 21hmain ENDP
AddNumbers PROC;get num1 mov ah, 09h mov dx, offset add_msga int 21h mov ah, 1h int 21h mov add_num1, al ;get num2 mov ah, 09h mov dx, offset add_msgb int 21h
BC0046–Microprocessor Roll no: 58111448 Name: Rajeshkumar shah
mov ah, 1h int 21h mov add_num2, al
;add [numbers] mov al, add_num1 add al, add_num2 mov add_result, al ;output result mov ah, 09h mov dx, offset add_result int 21h
ret
AddNumbers endp
END main