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Sean Nicolson, BCTM 2006

Design and Scaling of SiGe BiCMOS

VCOs Above 100GHz

S. T. Nicolson1, K.H.K Yau1, K.A. Tang1, P. Chevalier2, A. Chantre2

B. Sautreuil2, and S. P. Voinigescu1

1) Edward S. Rogers Sr. Dept. of Elec. & Comp. Eng., Univ. of Toronto2) STMicroelectronics


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Outline

Motivation for W-band SiGe integrated circuits VCO design methodology for low phase noise in W-band

Layout considerations

Measurement results Conclusions and future work


3/19


Motivation for W-band SiGe ICs Typical applications: 77GHz auto radar, 94GHz weather radar, imaging

Central to these applications is the low phase noise VCO

Process development: NFmin, Rn & Ysopt difficult to measure in W-band Use VCO as a process monitorfor the noise performance of SiGe technologies

Explore VCO scaling/yield in SiGe


4/19


VCO Topology

No cascode

lower phase noise, lower supply voltage

Colpitts topology maximize foscrelative to other topologies

Augment Cbe with Cext Reduces phase noise

Add negative Miller capacitors Increases foscby cancelling Cm

Differential tuning reduces supply induced noise

24mA

CM

VCC

LB

Cext

Cvar

Q1

VTUNE+

VTUNE-LEE

REE CEE

LC

VBB

2.5 V

VTUNE

RB

rpcpbib

E

CB

Cext


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W-Band VCO Design Methodology

Use smallest realizable LB with adequate Q

Given fosc, maximize tuning range using large Cext

Negative resistance

Phase noise formula

Phase noise trade-off when HBT pushed to limit

Minimize HBT noise bias at NFmin current density

Maximize Vtankand Cext bias at peak fT current density

22

var

2

2

tank

2

1

1

12

p

p

C

CC

CC

V

IS

ext

ex t

n

out

m

p

p CCCC

CCCC

ext

ex teq

var

var

eqB

oscCL

fp2

1

var2 CVIC

VIRRTCFext

TCBneg

Max. Rnegoccurs at

peak fT/fMAXbias


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VCO Fabrication

Fabricated in three technology splits:

All VCO layouts and bias currents are identical no redesign

Directly compare VCOs fabricated in different processes

Use the VCO to optimize HBT profile Noise parameters from phase noise

fMAX from VCO output power

BiC9

fT = 150GHz

fMAX = 160GHz

emitter

45mm0.17mm

BipX

fT = 230GHz

fMAX = 300GHz

emitter

45mm0.13mm

BipX1

fT = 270GHz

fMAX = 260GHz

emitter

45mm0.13mm


7/19 Sean Nicolson, BCTM 2006

VCO Layout

VCO core area: 100mm 100mm

Spiral inductors where necessary to reduce area Plenty of supply decoupling (MiM and metal-metal)

70mm

100mm



Technology Overview fT/fMAX Scaling Peak fT/fMAX current density increases at each technology node

0.17mm SiGe JpeakfT = 7mA/mm2 where fT = 150GHz

0.13mm SiGe JpeakfT = 14mA/mm2 where fT = 230GHz (or 250GHz)

Contrast with CMOS

JpfT = 0.3mA/mm, JpfMAX = 0.2mA/mm, JNFmin = 0.15mA/mm for 180-65nm nodes



Measurement Results

VCO performance comparison in 3 SiGe technologies

Phase noise performance

Temperature testing

Wafer mapping


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Performance Comparison Across Technology

LC-oscillator frequency insensitive to technology fT/fMAX

MOS varactors give less phase noise than HBT (CBC

) varactors

Higher fMAX more output power, higher frequency

BipX1 results in lowest phase noise

BiCMOS9

MOS var.

BiCMOS9

HBT var.

BipX

HBT var.

BipX1

HBT var.

Tech. fT/fMAX(GHz)

150/160 150/160 230/300 250/260

Differential Pout

(dBm)

+0.7 -1.3 +2.7 +2.5

SSB PN @

1MHz (dBc/Hz)

-101.6 -80 -98 -101.3

Osc. Freq. (GHz) 96 100 106 104


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Phase Noise Performance

Oscillation frequency of 104GHz

Phase noise of 101.3dBc/Hz @ 1MHz offset

90nm CMOS

fT=200GHzfmax=275GHz

fT=175

fmax=275

130nmCMOS

fT=175

fmax=275fT=205

fmax=290

fT=206

fmax=197

fT=150

fmax=160

fT=270

fmax=260

fT=155

fmax=155

fT=230

fmax=300

-110

-105

-100

-95

-90

-85

-80

65 70 75 80 85 90 95 100 105 110

Oscillation frequency (GHz)

Phasenoiseat1MHzoff

s

(dBc/Hz)

Averaged Spectral PlotPhase Noise in W-Band

SiGe VCOs

**References provided in abstract**

FMCW modulation


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Biasing W-Band VCOs for Low Noise

NFmin current density scales with technology and fosc Emitter width J

NFmin

(scales with JpeakfT

)

Frequency JNFmin (gets closer to JpeakfT)

Noise correlation further increases JNFmin [K. Yau, SiRF, 2006]

The B and C shot noise

currents are correlated

1exp2* nCnCnB jqIii

cp bibC

RB

E

B


13/19


phase

noise

JNFMIN increases

with frequency

output

power

CM

VCC

LB

Cext

Cvar

Q1

VTUNE+

VTUNE-LEE

REE CEE

LC

VBB

2.5 V

Phase Noise Performance Across Bias What is the minimum phase noise current density in W-band VCOs?

Measure output power and phase noise w.r.t current density (vary VBB

)

Looks like phase noise is minimum at peak fT current density


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-6

-4

-2

0

2

92 96 100 104 108

Center frequency (GHz)

Outputpower(dBm)

25C

70C

25C

50C

125C

70C

25C

BiC9

MOS var.BiC9

HBT var. BipX

W-Band Manufacturability Challenges Manufacturability specifications for automotive radar are stringent

Outdoors wide temperature variations

Must last for cars lifetime

Low cost per part requires high yield

Is SiGe on the way to meeting such challenges?


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Wafer Mapping BiCMOS9

Wafer 1 2 3 4

Center freq. (GHz) 94.7 94.9 94.9 95.0

Tuning range (GHz) 4.6 4.6 4.6 4.6

Output power (dBm) 0.2 0.7 0.6 0.8

DC power (mW) 133.8 133.2 137.3 132.6

Wafer 1 2 3 4

Center freq. (GHz) 99.6 100.5 100.1 100.5

Tuning range (GHz) 3.4 3.6 3.6 3.7

Output power (dBm) -1.1 -1 -1.4 -0.9

DC power (mW) 133.0 133.0 136.2 132.8

Tested 120 VCOs on 4 wafers

Summary of BiC9 VCOs with MOS varactors (60 dice averaged)

Summary of BiC9 VCOs with HBT varactors (60 dice averaged)

4 VCOs had significantly below average performance (outliers)

2 of the 4 outlier VCOs failed to oscillate entirely


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Wafer Mapping BipX

VCO not present

Die not tested

< -98 dBc/Hz

-95 -98 dBc/Hz

-92 -95 dBc/Hz

> -92 dBc/Hz

Oscillation Frequency Phase Noise at 1MHz offset

VCO not presentDie not tested

104.5-105.0 GHz

104.0-104.5 GHz

103.5-104.0 GHz

103.0-103.5 GHz

Wafer flat

Location of

VCO in reticule


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Figures of Merit Comparison of our work to other state of the art W-Band VCOs

References [1] Huang P. et al, ISSCC 2006 [2] Kobayashi K. W. et al, JSSC 1999

[3] Tang K. W. et al. CSICS 2006 [4] Huang P. et al, ISSCC 2006


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Conclusions

Demonstrated a design methodology for low phase noise in W-Band

VCOs Biasing at JpeakfT minimizes phase noise in W-band VCOs

Performed a direct comparison of identical VCOs fabricated in different

technologies

LC-oscillator frequency is insensitive to technology scaling

Higher fT technology yielded VCO with lower phase noise

Higher fMAX technology yielded VCO with improved output power

Future work is required to fully support these conclusions

Noise figure measurements in the W-Band (correlate to Y-parameter method)

Verify JNFmin in the W-Band and support biasing near JpeakfT for min. phase noise


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Technology Overview fT/fMAX Scaling Improvement in peak fT/fMAX has two contributions

Layout stripe contact, decreased emitter width 0.17mm to 0.13m

Vertical profile and processing doping, materials, epitaxy, etc.

How much of the speed improvement is due to each contribution?

Measure the 0.13mm HBT layouts fabricated in the 0.17mm process

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