cadence tutorial a: schematic entry and functional ... · pdf file• functional simulation...

Cadence Tutorial A: Schematic Entry and Functional Simulation Created for the MSU VLSI program by Professor A. Mason and the AMSaC lab group.

Revision Notes: July 2004 Created tutorial for analog simulation A. Gore, N. Trombly, A. Mason Document Contents • Introduction • Environment Setup • Creating a Schematic Cell View • Functional Simulation (DC, AC and transient analysis) Introduction This document is designed as a follow-up to Tutorial 1 for simulation of analog characteristics of transistors and circuits. Tutorial 1 covers device characterization and this tutorial describes common measurements for a simple CMOS integrated circuit amplifier using CADENCE Custom IC Design Tools (IC5.0) with the AMI06 process technology and the NCSU design kit. Convention: To show the sequence of steps for the pull down menu, following convention is used. For example,

Tools => Analog Artist => Simulation Statement above indicates that you pull down the Tools menu, then click on the Analog Artist button and finally click on the Simulation button. Note: If at anytime during this tutorial you want to quit Cadence, make sure you save your work by selecting Design => Save and close the design windows by selecting Close from the menu. After you have closed all your working windows, then select File => Exit and click Yes in the pop-up confirmation window to end the Cadence session. Environment Setup This tutorial assumes you know how to start cadence and have already launched the program in the proper working directory. Please refer to Cadence Analog Tutorial 1 and your class-specific setup guide to launch Cadence. Creating a Schematic Cellview STEP 1: Create a new schematic • Go to the Library Manager window and click/select the library you want to use for this

project. • Select File => New => Cellview. Use the Create New File window that pops up to create the

schematic view for a source amplifier cell. • Enter the Cell Name “sourceamp”. • Click on Tool drop-down list and select Composer-Schematic. This is where you choose

which Cadence tool you want to use and the appropriate View Name for each tool will be filled in automatically. Here we will be creating the schematic view.

• Click the OK button. The Composer schematic editing tool will open with an empty Schematic Editing window.

Cadence Analog Tutorial 2: Amplifier Design and Characterization 1

STEP 2: Add an nFET to the schematic • In the Schematic Editing window Select Add => Instance to activate the Add Instance tool

for adding components (transistors, sources, etc.) to your schematic. You can also invoke this tool by clicking on the Instance icon on the left-hand toolbar, or by typing the hot key ‘i’ with your mouse over the Schematic Editing window. Two windows (Component Browser window and Add Instance) will pop open.

• In the Component Browser window, under Library select NCSU_Analog_Parts. A list of parts will be displayed near the bottom of this window. From the parts list, click on N_transistors and a list of available nFET transistor elements will be displayed. Pick up the nmos4 element by clicking on it. This will attach the component to your mouse pointer.

• If necessary, click on the Rotate, Sideways, or Upside-down buttons in the Add Instance window to manipulate the component you are adding. You can also rotate a component by selecting Edit => Rotate or by typing the hot key “r”

• Click on schematic area of the Schematic Editing window (main black area of the window) and the nmos4 component will appear in your schematic. Clicking on the schematic window again will add another copy of the component (don’t do this). Pressing ESC on the keyboard will end the Add Instance function (but don’t do this yet).

STEP 3: Add other components to the schematic • In Component Browser window, go to the P-Transistors category in NCSU_Analog_Parts,

and pick up pmos4 and add it to your schematic. Place it above the nFET as appropriate for a CMOS inverter. If you need to move a component, press ‘ESC’ and left-click on the component and drag it to a new location. Pressing ‘ESC’ will cancel the Add Instance command so you will need to restart it to add more components.

• In Component Browser window, go to the Supply-nets category and pick up vdd (supply voltage) and gnd (ground reference) and add them above and below, respectively, the MOSFET components. Now the Schematic Editing window looks like the figure below.


STEP 4: Change transistor parameters • In the Schematic Editing window select NMOS transistor. Press button “q” to change

parameters of a NMOS transistor. • Make width of a NMOS transistor equal to 30u and length equal to 2.1u. • Similarly change the properties of PMOS transistor to the same values • .

STEP 5: Add I/O pins • In the Schematic Editing window select Add => Pin (or use hot key ‘p’) to add an input pin. • In the Add Pin window enter ‘VIN VBIAS’ for the Pin Name and select input for the

Direction. • Click on the Schematic Editing window and drop the pin to the left of the transistors

(between the gate inputs). • Follow the same procedure to add output pin ‘VOUT’ to the right of the transistors between

the drain nodes. Be sure to use the correct pin direction. Press ‘ESC’ when you are done.


STEP 6: Add wire connections • In the Schematic Editing window select Add => Wire (or use hot key ‘w’) to begin placing

wires, which will connect the terminals of the components and pins in the schematic. • Wire the schematic as appropriate for a CMOS inverter. Be sure to connect the body

terminal of each transistor (nMOS to ground, pMOS to VDD). Press ESC to end wiring. STEP 7: Setting global labels • In the Schematic Editing window type the letter ‘l’ to invoke the labeling tool. Since we will

be using the same “vdd” and “gnd” supplies for all our cells, we want to make a global declaration for these labels. Cadence uses the “!” symbol after a label-name to indicate a global label, i.e., one that is common to all cells in the library.

• In the label pop-up window, enter the Name vdd! gnd!

• Move your mouse to the Schematic Editing window and drop the vdd! label on the wire that connects to the vdd pin. Follow the same procedure to drop gnd! label on the wire that connects gnd pin. Press ESC when you are done. Note: In a single instance of “Add Wire Name” as shown above, you can define as many wire names, as you want but be careful to drop them at their respective wire instances.

Final schematic of an nMOS common-source amplifier


STEP 8: Check and Save the cellview Now that you are familiar with the schematic editing tool, explore the menu commands in the Schematic Editing window to do the following: • Check the cell for errors. If errors exist the error section will blink in the Schematic Editing

window. • Save the cellview. Simulation with Affirma Analog Circuit Design Environment To verify a circuit is working and test the functionality of the schematic we must simulate the circuit. For this we will use the Cadence Affirma analog simulation tool. STEP 9: Create schematic of a test circuit for the amplifier • Select library NCSU_Analog_Parts. Select Voltage_Sources from part list and add two vdc

components and select cap (capacitor) from R_L_C list. • Wire all the components as shown below.

• Select component vdc connected to the pMOS load (VBIAS) and change the DC voltage to 2.5V and press OK. Do not change other parameter values of either vdc. Keep default values as they are.

STEP 10: Check and Save the cellview • Check the cell for errors. If errors exist the error section will blink in the Schematic Editing

window. • Save the cellview.


STEP 11: Launch the Affirma analog simulation tool • With your “sourceamp” schematic open, in the Schematic Editing window select Tools =>

Analog Environment, and the Cadence Analog Design Environment window will open. Alternatively, you can launch this tool from the CIW by selecting Tools => Analog

Environment => Simulation in the CIW. When the Cadence Analog Design Environment opens you have click on the Setup => Design to specify the library and cell, for example “tutorial” and "sourceamp".

• In Cadence Analog Design Environment, click on Setup => Simulator/Directory/Host. • Choose spectreS as the Simulator. • Enter a path for your simulations files and results in Project Directory. You may set this to

any valid path, but you might find it useful to keep all simulations in one directory. If you need to run multiple simulations on the same cell, you can even use different paths for each simulation. Example Project Directory:

/egr/courses/personal/<class>/<username>/cadence/simulation /egr/courses/personal/<class>/<username>/simulation

Note: Do not use the Project Directory path (~/cadence/simulation) set by Cadence. It will use memory space from your home directory.

STEP 12: Setup stimulus The schematic defines the components within the cell but does not define the control signals (typically voltage sources) necessary to test the operation of the circuit, such as the power supply voltage and an input voltage signal. These signals are referred to as the stimulus, and here we will define a SPICE-like stimulus text file to define these signals.


• In Cadence Analog Design Environment window, select Setup => Stimulus => Edit Analog. • In the Edit Stimulus File window select text as the Editor, enter a File Name such as

“stimulus.txt” and click OK.

• A Text Editor window will open. Type in the following line to define the DC supply voltage

named vdd between nodes vdd! and 0 (ground) with value of 5V..

vdd vdd! 0 5V

• Save the text file and exit the text editor. STEP 14: DC Analysis • In the Cadence Analog Design Environment

window, select Analyses => Choose • Select dc as analysis type. Select Component

Parameter. New fields will pop up in the same window. Now press Select Component button and click on the VIN voltage source.

• A new window called Select Component Parameter will pop up. Select dc and press OK

• In the Choosing Analysis window, enter Start = 0 and Stop = 5 (see below) and press OK.

Cadence Analog Tutorial 2: Amplifier Design and Characteriz

ation 7

Voltage Transfer Curve • Select VOUT and VIN as the outputs to be plotted and run the simulation (select Simulation

=> Run). You will get DC analysis waveform as shown below.

• Use markers A and B and find out the input linear range (constant gain range) of a common-source amplifier. Input linear range is a range over which output value varies linearly with input value.

Bias Current and Power Consumption • Now, in the Cadence Analog Design Environment select VIN and VOUT under Outputs and

delete them • Now select Outputs => To be plotted => select on schematic and select the source node of

the PMOS load that is connected to the voltage source (vdd) to plot the transistor source/drain current. In this case this current is also the total supply current which can be used to calculate the overall power consumption by multiplying by the supply voltage.

• Observe the steady state drain current in the region where both transistors are in saturation.


STEP 15: AC Analysis • Select vdc (input voltage source) and press “q” to make change in its properties. • Make AC magnitude = 10mV. Amplitude. DC voltage = 1.55V (the average of the input

linear range) and press OK • In the Cadence Analog Design Environment window, select dc analysis in Analyses sub

window and delete that analysis using delete button or selecting Analyses => delete • In the Cadence Analog Design Environment window, select Analyses => Choose • Select AC analysis. Select Frequency as a Sweep variable. Select Sweep Range as Start-Stop,

Sweep-Type as Logarithmic and Points per decade equal to 10. Frequncy value varies from 100 to 1G (it is not necessary to go down to 1Hz as shown below).

• Press OK and run simulation (select Simulation => Run). You will see VIN and VOUT in the waveforms for frequency range 100 to 1GHz.

•

Plot Gain in dB • In the Waveform window, select Tools => Calculator. A calculator will pop up. • Press wave button. First select VOUT waveform and then select VIN waveform • Press button “/”. (You are requesting calculator to compute VOUT/VIN for entire waveform)

and now press enter. • Since you want Gain in dB,

press db20 button. • Now press plot button and you

will see the gain of a source amplifier is plotted vs. frequency.

• Select VIN waveform. Select Edit => Delete or delete button to erase the VIN waveform. Delete VOUT waveform also.

Cadence Analog Tutorial 2: Amplifier Desig
n and Characterization 9

• Now the Waveform window contains gain plotted vs. frequency as shown below.

Gain Bandwidth • Using the markers, measure the maximum gain at lower frequencies. This is often called the

DC gain since it holds this value down to frequency = 0 = DC. • Find the frequency where gain reduced by 3dB. This is known as the -3dB frequency and is

often referred to as the 3dB bandwidth. This ends the tutorial for design and analysis of a common-source amplifier.


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