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1 Capstone Design Course Lecture-1: Parallel I/O By Syed Masud Mahmud, Ph.D. Copyright 2002 by Syed Masud Mahmud

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  • 1

    Capstone Design Course

    Lecture-1: Parallel I/O

    By

    Syed Masud Mahmud, Ph.D.

    Copyright 2002 by Syed Masud Mahmud

  • 2

    BCLR Clear Bit(s) in MemorySyntax: Syntax: BCLR (BCLR (opropr) () (mskmsk))Example: Example: BCLR 10,X $C0BCLR 10,X $C0Operation:Operation: Clear multiple bits in the Clear multiple bits in the

    operand. The bit(s) to be cleared are operand. The bit(s) to be cleared are specified by specified by ONEONEss in the mask byte. The in the mask byte. The other bits remain unchanged.other bits remain unchanged.

    BCLR 10,X $C0BCLR 10,X $C0Assume that X = $1000. Assume that X = $1000. The address of operand = 10+$1000 = $100AThe address of operand = 10+$1000 = $100AMask = $C0 = 1100 0000Mask = $C0 = 1100 0000•• The most significant two bits of the byte at The most significant two bits of the byte at

    location $100A are cleared.location $100A are cleared.

  • 3

    Valid Addressing Modes for BCLR

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    BSET Set Bit(s) in MemorySyntax: Syntax: BSET (BSET (opropr) () (mskmsk))Example: Example: BSET 20,X $07BSET 20,X $07Operation:Operation: Set multiple bits in the operand. Set multiple bits in the operand.

    The bit(s) to be set are specified byThe bit(s) to be set are specified by ONEONEssin the mask byte. The other bits remain in the mask byte. The other bits remain unchanged.unchanged.

    BSET BSET 20,X $0720,X $07Assume that X = $1000. Assume that X = $1000. The address of operand = 20+$1000 = $1014The address of operand = 20+$1000 = $1014Mask = $07 = 0000 0111Mask = $07 = 0000 0111•• The least significant three bits of the byte The least significant three bits of the byte

    at location $1014 are set.at location $1014 are set.

  • 5

    BRCLR Branch if Bit(s) ClearSyntax: Syntax: BRCLR (BRCLR (opropr) () (mskmsk) () (relrel))Example: Example: BRCLR 10,X $80 NEXTBRCLR 10,X $80 NEXTOperation:Operation: If all operand bits corresponding to If all operand bits corresponding to

    the the 1s1s in the mask byte are in the mask byte are ZEROZEROss, then a , then a branch will occur.branch will occur.

    BRCLR 10,X $80 NEXTBRCLR 10,X $80 NEXTAssume that X = $1000. Assume that X = $1000. The address of operand = 10+$1000 = $100AThe address of operand = 10+$1000 = $100AMask = $80 = 1000 0000Mask = $80 = 1000 0000•• If the most significant bit of the byte at If the most significant bit of the byte at

    location $100A is a location $100A is a zerozero, then the processor , then the processor will branch to the instruction at label will branch to the instruction at label NEXTNEXT

  • 6

    Valid Addressing Modes for BRCLR

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    BRSET Branch if Bit(s) SetSyntax: Syntax: BRSET (BRSET (opropr) () (mskmsk) () (relrel))Example: Example: BRSET 10,X $80 NEXTBRSET 10,X $80 NEXTOperation:Operation: If all operand bits corresponding to If all operand bits corresponding to

    the the 1s1s in the mask byte are in the mask byte are ONEONEss, then a , then a branch will occur.branch will occur.

    BRSET 10,X $80 NEXTBRSET 10,X $80 NEXTAssume that X = $1000. Assume that X = $1000. The address of operand = 10+$1000 = $100AThe address of operand = 10+$1000 = $100AMask = $80 = 1000 0000Mask = $80 = 1000 0000•• If the most significant bit of the byte at If the most significant bit of the byte at

    location $100A is a location $100A is a ONEONE, then the processor , then the processor will branch to the instruction at label will branch to the instruction at label NEXTNEXT

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    Modes of 68HC11•• Single Chip ModeSingle Chip Mode•• Expanded ModeExpanded ModeSingle Chip ModeSingle Chip Mode•• Only the internal RAM and ROM are used to Only the internal RAM and ROM are used to

    keep the code and data.keep the code and data.•• Five Input/Output ports are available in this Five Input/Output ports are available in this

    mode.mode.Expanded ModeExpanded Mode•• In addition to the internal RAM and ROM some In addition to the internal RAM and ROM some

    external memory can also be used.external memory can also be used.•• Only three Input/Output ports are available in Only three Input/Output ports are available in

    this mode.this mode.•• FOR ECE4600 COURSE, YOU WILL BE USING FOR ECE4600 COURSE, YOU WILL BE USING

    THE CHIP IN THIS MODE.THE CHIP IN THIS MODE.

  • 9

    Ports of 68HC11•• PortPort--A : It has 8 input/output linesA : It has 8 input/output lines•• PortPort--B : It has 8 B : It has 8 outputoutput lineslines•• PortPort--C : It has 8 input/output linesC : It has 8 input/output lines•• PortPort--D : It has 6 input/output linesD : It has 6 input/output lines•• PortPort--E : It has 8 E : It has 8 inputinput lineslines

    •• PortPort--B and PortB and Port--C are not available in C are not available in the Expanded Mode of the chip.the Expanded Mode of the chip.

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    Port-A

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    Port-B (available only in Single Chip Mode)

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    Port-C (available only in Single Chip Mode)

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    Port-D

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    Port-E

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    Port RegistersAddressAddress RegisterRegister CommentsComments$1000 $1000 PORTAPORTA PortPort--A Data Reg.A Data Reg.$1003 $1003 PORTCPORTC PortPort--C Data Reg.C Data Reg.$1004 $1004 PORTBPORTB PortPort--B Data Reg.B Data Reg.$1007 $1007 DDRCDDRC PortPort--C Data C Data

    Direction Reg.Direction Reg.$1008 $1008 PORTDPORTD PortPort--D Data Reg.D Data Reg.$1009 $1009 DDRDDDRD PortPort--D Data D Data

    Direction Reg.Direction Reg.$100A $100A PORTEPORTE PortPort--E Data Reg.E Data Reg.

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    DDRC: Port-C Data Direction Reg.•• If the 68HC11 is in single chip mode, then If the 68HC11 is in single chip mode, then

    this register controls the direction of the this register controls the direction of the lines of Portlines of Port--C.C.

    •• If a bit of this register is a 1, then the If a bit of this register is a 1, then the corresponding line of Portcorresponding line of Port--C is an output C is an output line. Otherwise, the line is an input line.line. Otherwise, the line is an input line.

    Example:Example:DDRC

    PC7, PC4, PC2 and PC1 are output lines.PC6, PC5, PC3 and PC0 are input lines.

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    DDRD: Port-D Data Direction Reg.•• This register controls the direction of the This register controls the direction of the

    lines of Portlines of Port--D.D.•• If a bit of this register is a 1, then the If a bit of this register is a 1, then the

    corresponding line of Portcorresponding line of Port--D is an output D is an output line. Otherwise, the line is an input line.line. Otherwise, the line is an input line.

    Example:Example:

    DDRD

    PD2 and PD1 are output lines.PD5, PD4, PD3 and PD0 are input lines.

  • 18

    Controlling an LED using a Switch

    LDXLDX #$1000#$1000 ; X = $1000= ; X = $1000= PortA AddrPortA Addr..LOOPLOOP BRCLRBRCLR 0,X 1 ON0,X 1 ON ; If PA0=0 then LED ON; If PA0=0 then LED ON

    BCLRBCLR 0,X $100,X $10 ; LED is OFF; LED is OFFBRABRA LOOPLOOP ; Repeat; Repeat

    ONON BSETBSET 0,X $100,X $10 ; LED is ON; LED is ONBRABRA LOOPLOOP ; Repeat; Repeat

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    Controlling an LED using two Switches

    LDXLDX #$1000#$1000 ; X = $1000= ; X = $1000= PortA AddrPortA Addr..LOOPLOOP BRCLRBRCLR 0,X 0,X 33 ONON ; If PA0=0 then LED ON; If PA0=0 then LED ON

    BCLRBCLR 0,X $100,X $10 ; LED is OFF; LED is OFFBRABRA LOOPLOOP ; Repeat; Repeat

    ONON BSETBSET 0,X $100,X $10 ; LED is ON; LED is ONBRABRA LOOPLOOP ; Repeat; Repeat

  • 20

    Keyboard Scanning Program

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    Scanning Col-0

    1110

  • 22

    Scanning Col-1

    1101

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    Keyboard Scanning Program (contd.)•• This subroutine scans a 4x4 keypad. If any This subroutine scans a 4x4 keypad. If any

    key is down, then the subroutine returns the key is down, then the subroutine returns the key number through Register B, otherwise key number through Register B, otherwise $FF is returned through Register B$FF is returned through Register B

    REGBASREGBAS EQUEQU $1000$1000PORTCPORTC EQUEQU 33DDRCDDRC EQUEQU 77

    ORGORG $100$100ROWNUM RMBROWNUM RMB 11COLNUMCOLNUM RMBRMB 11

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    Keyboard Scanning Program (contd.)ORG $2000ORG $2000PSHXPSHXPSHAPSHALDXLDX #REGBAS#REGBASLDAALDAA #$0F#$0F ; PC7 ; PC7 -- PC4 are inputsPC4 are inputsSTAASTAA DDRC,XDDRC,X ; PC3 ; PC3 -- PC0 outputsPC0 outputs

    * Scan a Column by sending a zero through the* Scan a Column by sending a zero through the* corresponding output line of Port* corresponding output line of Port--CC

    LDAALDAA #$FE#$FELOOPLOOP STAASTAA PORTC,XPORTC,X

    LDABLDAB PORTC,XPORTC,X ; Read keyboard; Read keyboardORABORAB #$0F#$0F ; Least sig. 4bits are 1; Least sig. 4bits are 1

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    Keyboard Scanning Program (contd.)CMPBCMPB #$FF#$FF ; Check if all bits are 1; Check if all bits are 1BNEBNE KEYDWNKEYDWN ; If not ; If not eqeq , a key down, a key downLSLALSLAORAAORAA #1#1 ; Set the least significant bit to 1; Set the least significant bit to 1CMPACMPA #$EF#$EF ; Check if all cols scanned; Check if all cols scannedBEQBEQ NOKEYNOKEYBRABRA LOOPLOOP ; Go back, check next col.; Go back, check next col.

    NOKEYNOKEY LDABLDAB #$FF#$FF ; $FF is code for No Key; $FF is code for No KeyJMPJMP DONEDONE

    * Determine the Column Number of the key* Determine the Column Number of the keyKEYDWNKEYDWN CLRCLR COLNUMCOLNUM ; COLNUM=0; COLNUM=0

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    Keyboard Scanning Program (contd.)CLOOPCLOOP LSRALSRA

    BCCBCC NEXT1NEXT1 ; If C=0, go to NEXT1; If C=0, go to NEXT1INCINC COLNUMCOLNUM ; Inc. COLNUM by 1; Inc. COLNUM by 1BRABRA CLOOPCLOOP

    * Determine the Row Number of the key* Determine the Row Number of the keyNEXT1NEXT1 LDAALDAA #3#3

    STAASTAA ROWNUMROWNUM ; ROWNUM = 3; ROWNUM = 3RLOOPRLOOP LSLBLSLB

    BCCBCC NEXT2NEXT2DECDEC ROWNUMROWNUM ; Dec. ROWNUM by 1; Dec. ROWNUM by 1BRABRA RLOOPRLOOP

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    Keyboard Scanning Program (contd.)* Determine the key number* Determine the key numberNEXT2NEXT2 LDAALDAA COLNUMCOLNUM

    LDABLDAB #4#4MULMUL ; B = COLNUM*4; B = COLNUM*4ADDBADDB ROWNUMROWNUM

    * B = COLNUM*4 + ROWNUM = KEY NUMBER* B = COLNUM*4 + ROWNUM = KEY NUMBERDONEDONE PULAPULA

    PULXPULXRTSRTS

    Capstone Design CourseLecture-1: Parallel I/OBySyed Masud Mahmud, Ph.D.Copyright ? 2002 by Syed Masud MahmudBCLR Clear Bit(s) in MemoryValid Addressing Modes for BCLRBSET Set Bit(s) in MemoryBRCLR Branch if Bit(s) ClearValid Addressing Modes for BRCLRBRSET Branch if Bit(s) SetModes of 68HC11Ports of 68HC11Port-APort-B (available only in Single Chip Mode)Port-C (available only in Single Chip Mode)Port-DPort-EPort RegistersDDRC: Port-C Data Direction Reg.DDRD: Port-D Data Direction Reg.Controlling an LED using a SwitchControlling an LED using two SwitchesKeyboard Scanning ProgramScanning Col-0Scanning Col-1Keyboard Scanning Program (contd.)Keyboard Scanning Program (contd.)Keyboard Scanning Program (contd.)Keyboard Scanning Program (contd.)Keyboard Scanning Program (contd.)