cdp ece 291 -- spring 2000 ece 291 spring 2000 lecture 4: the 80x86 instruction set architecture...

CDP ECE 291 -- Spring 2000

ECE 291

Spring 2000

Lecture 4:

The 80x86 Instruction Set Architecture

Registers-Instructions

Constantine D. Polychronopoulos


Instruction Format• ALL instructions have the following specifiers:

– OPCODE: a field that specifies the operation to be done

– OPERAND(S): one or more fields giving the operands or the location where the operands can be found

– DESTINATION: a field that specifies the location (register or memory) where the result of the operation is to be stored

– [Descriptor fields]: Special bit specifiers that allow for different interpretation of the same field (e.g. register or offset specifier)

• ASSEMBLY INSTRUCTIONS: symbolic (mnemonic) versions of machine instructions

• MACHINE INSTR. Or BINARY CODE: Binary codes that give the specific value for each of the above fields

• Assembly program ==> ASSEMBLER (MASM) ==> Machine code


Instruction Format: x86

• In 80x86 instructions can vary in length from 8-bits (1b) to more than 100-bits (13b)

• REAL MODE:

– Default instruction size is 16-bits

• 16-bit registers & 16-bit offset fields

• RPOTECTED MODE:

– Default instruction size is 32-bits (x386 and above)


– D-bit in descriptor specifies real or protected mode:

• D=0: (real-mode) 16-bit instructions, register values and addresses

• D=1: (protected mode) 32-bit instructions, reg. values and addresses


Addressing Modes

• Immediate: Move an immediate value (in the field itself) to the destination register or memory location:

– MOV AX, 7F55H

• Register: Move a byte or word from the source register to the destination register or memory location:

– MOV AX, BX

• Direct: Move a byte/word from a memory location to a register or memory location:

– MOV AX, [7777H]


Addressing Modes

• Base-relative or indexed: Move a byte/word between a register and mem. Location specified by an index (DI or SI) or base register (BP or BX):

– MOV AX, [BX]

• Register-relative: Move a byte/word between a register and mem. Location specified by an index OR base register + offset:

– MOV AX, [DI + 7777H]

• Base-relative and indexed: Move a byte/word between a register and mem. Location specified by a base register PLUS an index register PLUS offset:

– MOV AX, [SP + DI + 7777H]


Addressing Modes: Register

Instruction Comment Addr. Mode Memory Cont.OP Dest Source

MOV AX, BX Move to AX the 16-bit value in BX Register 89 D8 MOV AX, DI Move to AX the 16-bit value in DI Register 89F8 MOV AH, AL Move to AH the 8-bit value in AL Register 88C4


Addressing Modes - Immediate


MOV AH, 12H Move to AH the byte value 12H Immediate B412

MOV AX, 1234H Move to AX the value 1234H Immediate B8 34 12 MOV AX, CONST Move to AX the constant CONST Immediate B8LSB MSB MOV AX, OFFSET x Move to AX the address (offset) of Immediate B 8 LSB MSB

variable x MASM Notation


Addressing Modes: Direct & Indexed


MOV AX, [1234H] Move to AX the value at memory Direct A1 34 12location 1234H (uses default segment, DS)

MOV AX, x Move to AX the value of M[x] Direct A1 LSB MSB (uses default segment, DS) MASM Notation

MOV x, AX Move to M[x] the value of AX Direct A3 LSB MSB (uses default segment, DS) MASM Notation

MOV AX, [DI] Move to AX the value at M[DI] Indexed 8B 05 (uses default segment, DS)

MOV [DI], AX Move to M[DI] the value AX Indexed 89 05 (uses default segment, DS)



MOV AX, [BX] Move to AX the value M[BX] Base-relative 8B 07 (uses default segment, DS)

MOV [BX], AX Move to M[BX] the value AX Base-relative 89 07 (uses default segment, DS)

MOV AX, [BP] Move to AX the value of M[BP] Base-relative 8B 46 (uses stack segment, SS)

MOV [BP], AX Move to M[BP] the value of AX Base-relative 89 46 (uses stack segment, SS)

Addressing Modes: Base-relat.


Instruction Comment Addr. Mode Memory ContentsOP Dest Source

MOV AX, offs[BX] Move to AX the value M[offs+BX] Base-relative 8B 87 LSB MSB (uses default segment, DS) Direct

MOV offs[BX], AX Move to M[offs+BX] the value AX Base-relative 89 87 LSB MSB (uses default segment, DS) Direct

MOV AX, [BX+DI] Move to AX the value M[BX+DI] Base-relative 8B 01 (uses default segment, DS) Direct

MOV [BX+DI], AX Move to M[BX+DI] the value Base-relative 89 01 AX (uses default segment, DS) Indexed

MOV AX, [BX+DI+1234H] Move to AX the value pointed to by Base-relative 8B 81 34 12

M[BX+DI+1234H] Indexed Direct(uses default segment, DS)

Addressing Modes: Base-relat./Direct/Indexed-Direct


Memory Model: Real & Protected Modes

• Due to downward compatibility with previous generations all x86 processors support real address mode which allows direct addressing of only 1Mb of memory (20 bits) - recall that:

– Memory address = segment register + offset

• where segment reg. Is 16-bits left-shifted by 4 bits - hence a 20-bit address.

• Protected mode allows extended memory of 4Gb or even 64Gb: An SDT (segment description table) is used to get the starting address of memory segment to be addressed. The original DS or CS register is used as an index into SDT whose entry points to actual memory segment. Offset is added to latter to form address:

– Memory addr. = SDT[segment register] + offset


Memory Model (Cont.)

• ALL memory is allocated and managed in units of 64Kb segments

• Segments are used to organize different partitions of memory for different objects (with different access restrictions): – user code & user data– user stack area– system code and data– memory-mapped I/O devices and other peripherals

• The segment starting address must first be loaded to DS or CS before any access to that segment via x86 mem. Instructions.

• Before x386 only real memory addressing was available. But protected mode was introduced starting with the 32-bit architectures.

• Default is always real mode for all x86 processors.


Instruction Format• ALL instructions have the following specifiers:

– OPCODE: a field that specifies the operation to be done

– OPERAND(S): one or more fields giving the operands or the location where the operands can be found

– DESTINATION: a field that specifies the location (register or memory) where the result of the operation is to be stored

– [Descriptor fields]: Special bit specifiers that allow for different interpretation of the same field (e.g. register or offset specifier)

• ASSEMBLY INSTRUCTIONS: symbolic (mnemonic) versions of machine instructions

• MACHINE INSTR. Or BINARY CODE: Binary codes that give the specific value for each of the above fields

• Assembly program ==> ASSEMBLER (MASM) ==> Machine code


Instruction Format: x86

• In 80x86 instructions can vary in length from 8-bits (1b) to more than 100-bits (13b)

• REAL MODE:

– Default instruction size is 16-bits


• RPOTECTED MODE:

– Default instruction size is 32-bits (x386 and above)


– D-bit in descriptor specifies real or protected mode:

• D=0: (real-mode) 16-bit instructions, register values and addresses

• D=1: (protected mode) 32-bit instructions, reg. values and addresses


Unconditional Jump (JMP)

• Short jump: 2-byte jump instr. - allows short jumps within memory locations [-128:+127] from the location following the jump instr.:

– JMP SHORT Target_Label

• Near jump: 3-byte jump instr. - supports jumps within [-32K:+32K] bytes from current location:

– JMP Label

• Far jump: 5-byte instruction allowing jumps anywhere within 4Gb of address space:

– JMP Label

OPCODE DISP.

OPCODE DISP-low DISP-high

OPCODE DISP-low DISP-high CS low CS high


Conditional Jumps

• A conditional Jump instruction tests a condition bit (FLAGS) and sets the IP to a specified address (given in a field of the instruction). Otherwise, IP is left unchanged and the next instruction is fetched from IP+1 (in byte addressable mode)

• Hence: A conditional jump is materialized by TWO instructions:

– One that “compares” values or does an arith./logic op and sets bits of FLAGS accordingly, and

– One that carries out the Jump based on the outcome of the operation or the bit value of selected FLAGS

• FLAGS used by conditional branches:– S (sign) – Z (zero)– C (carry)– P (parity)– O (overflow)


• The CMP is used to compare two values in signed or unsigned form and sets one or more of the previous FLAG bits based on the outcome of the comparison:

• CMP Operand_1 Operand_2

CMP (Comparison)

Unsigned Operands Signed Operands

Z: set if equal Z: set if equal

C=1 if Op_1 < Op_2C=0 if Op_1 >= Op_2

C: no meaning

S and O: no meaning if (S=0 AND O=1) OR (S=1 AND O=0): Op_1< Op_2if (S=0 AND O=0)OR (S=1 AND O=1): Op_1>=Op_2


Comparing Signed Integers

• CMP AX, BX

– Sign bit (S) will be set if AX-BX has a 1 in MSB

– Overflow bit (O) is set if AX-BX result is out of range (-215, 215-1)

• JS Target_label:

– Check S bit and if set then jump to Target_label (i.e. sign bit is 1)

• JL (Jump on less than):

– JL takes the jump if (S XOR O) is 1 (jump is taken even on an overflow because overflow in a CMP or SUB instruction can happen only when first operand is a negative number and second operand is a positive number - hence their SUB becomes an addition that may overflow)


Jump Instruction Semantics• If num_1 & num_2 are unsigned we say num_1 is above num_2

if num_1 > num_2 (otherwise it’s below).

• If num_1 & num_2 are signed, num_1 is greater than num_2 if num_1 > num_2 (otherwise it’s less).

• Notation of jump instructions:

– J = JUMP

– N = Not

– E = Equal

– A/B = Above/below

– G/L = greater/less


Jump Instructions

Instruction Description Condition

JA=JNBE Jump if above C=0 & Z=0Jump if not below or equal

JBE=JNA Jump if below or equal C=1 | Z=1Jump if not above

JAE=JNB=JNC Jump if above or equal C=0Jump if not belowJump if no Carry

JB=JNA=JC Jump if below C=1Jump if not aboveJump if Carry

JE=JZ Jump if equal Z=1Jump if Zero (set)

JNE=JNZ Jump if not equal Z=0Jump if not Zero

JS Jump if Sign S=1


Jump Instructions (Cont.)

Instruction Description Condition

JNS Jump Not Sign S=0

JO Jump if Overflow O=1

JNO Jump if No Overflow O=0

JG=JNLE Jump if greater S=0 & Z=0Jump if not less or equal

JGE=JNL Jump if greater or equal S=0Jump if not less

JL=JNGE Jump if less S XOR OJump if Not greater or eq.

JLE=JNG Jump if less or equal S XOR O | z=1Jump if not greater

JCXZ Jump if reg. CX=0 CX=0


Branch Instructions


Case Statements


Repeat/Until & While Looping


Multiplication in x86


Multiplication


Division


Stack


Stack Frame Organization


Stack Frame Layout

cdp ece 291 -- spring 2000 ece 291 spring 2000 lecture 4: the 80x86 instruction set architecture...

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