CMP 301AComputer

Architecture 1

Lecture 4

Outline

Virtual memory

Terminology

Page Table

Translation Lookaside Buffer (TLB)

Basic Terminology

Main memory acts as a cache for secondary storage “magnetic disk”

Page : Virtual memory block “similar to cache block” Page Fault: Virtual memory miss “similar to cache miss” Virtual address: Address generated by the processor Physical address: Actual address to access the main memory Address Translation: Mapping virtual address to physical one

Virtual to physical Address Mapping

Page Table

Virtual to physical translation Indexed by the virtual page number to generate the

physical address Each program has its own page table in memory A special hardware register, page table register is used

to point to the beginning of the table Page table register should be save in context switching

(like PC,...etc) Page table has a V bit to indicate whether the page is in

the memory or not If V=0, the operating system takes control to bring

this page from the magnetic disk.

Physical address Generation

Example: For 32-bit virtual address, 4KB pages, 4B per page table entry. What is the total size of a page table?Solution: (4GB/4kB)*4B=4MB

Making Address Translation Fast: The TLB

Every memory access take twice as long: get physical address then get data

To speed up: cache the most recent translation in a Translation Lookaside Buffer (TLB) By the principle of locality, it will be needed soon

8

Putting it all together