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ISLPED’03

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August 25-27, 2003

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ISLPED’03:2003 Int. Sym

posium on Low Power Electronics

and Design• Seoul, Korea • August 25-27, 2003

ISLPED’03Proceedings of the

2003International Symposiumon Low Power Electronics

and Design

JW Marriott HotelSeoul, Korea

August 25-27, 2003

Sponsored by

ACM SIGDA and IEEE Circuits and Systems Society

with technical co-sponsorship from

the IEEE Solid-State Circuits Society

and

the IEEE Electron Devices Society

EDS

ISLPED03-cover+spine.qxd 7/25/03 11:17 AM Page 1

ISLPED’03Proceedings of the

2003International Symposiumon Low Power Electronics

and Design

JW Marriott HotelSeoul, Korea

August 25-27, 2003

Sponsored by

ACM SIGDA and IEEE Circuits and Systems Society

with technical co-sponsorship from

the IEEE Solid-State Circuits Society

and

the IEEE Electron Devices Society

EDS

ii

The Association for Computing Machinery 1515 Broadway

New York, New York 10036

Copyright © 2003 by the Association for Computing Machinery, Inc. (ACM). Permission to make digital or hard copies of portions of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyright for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, to republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permission to republish from: Publications Dept., ACM, Inc. Fax +1 (212) 869-0481 or <permissions@acm.org>. For other copying of articles that carry a code at the bottom of the first or last page, copying is permitted provided that the per-copy fee indicated in the code is paid through the Copyright Clearance Center, 222 Rosewood Drive, Danvers, MA 01923.

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iii

Foreword

Welcome to the 2003 International Symposium on Low Power Electronics and Design (ISLPED)!

This is the first time that the ISLPED moves to Asia and only the second time that it moves outside California. Indeed, ISLPED is not even 10 years old: the first official ISLPED was in 1996. This indicates the continuous international interest across the VLSI electronics community for all aspects of low power. Unique to ISLPED is that it brings together researchers from academia and industry with different backgrounds in technology, circuits, micro-architectures and architectures, digital and analog design, system design and software. All have one common research concern: low power.

A record total of 221 papers were submitted, this is a 35% increase compared to the last two years. Many thanks to all the authors who submitted papers: their work is the reason this symposium has become so successful. We were able to accept a total of 90 contributions: 17 regular papers, 37 short and 36 poster papers. For organizational reasons, the poster papers have been turned into short papers. It will give more exposure to the work of the authors. Regular papers and short papers have 6 pages in the proceedings. Poster papers have 4 pages in the proceedings.

We have also an excellent program of keynote and invited speakers, representing a large span of research issues related to low power and representing all corners of the globe. The winners of the student design contest have a special session on Tuesday morning. Their papers are not included in the proceedings. An industry sponsored cash award will be presented to each selected design entry.

Many thanks to the technical program committee for all the hard work in the paper review, paper selection and session organization. It was a pleasant surprise to them to see the large number and high quality submissions to the symposium. The technical program committee also had the help of additional reviewers, which we would like to thank for their contribution. The technical program committee met in April on the UCLA campus. Even with economic constraints and health concerns, we had a very large attendance. Thanks for your commitment to the symposium. Also thanks to the members of the organizing committee for all their hard work behind the scenes: Vijay Narayanan as treasurer, Luca Benini as publicity chair, Vivek Tiwari as Design Contest chair, Diana Marculescu as Exhibits chair and Jihong Kim as local arrangements chair. The symposium has received generous support from Samsung, Texas Instruments, and Magma Design Automation. ISLPED is sponsored by ACM Sigda and the IEEE Circuits and Systems Society. It receives technical co-sponsorship from the IEEE Solid State Circuit Society and the IEEE Electron Devices Society.

Finally, we would like to thank you, the audience and the reader, for your interest and support of this symposium. We hope that you will find the symposium both stimulating and helpful. We appreciate your comments and suggestions.

Ingrid Verbauwhede & Hyung Roh General Co-chairs

Kiyoung Choi & Rajiv Joshi Technical Program Co-chairs

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Table of Contents

Conference Organization .............................................................................................................................xi

Technical Program Committee ................................................................................................................xii

Additional Reviewers.....................................................................................................................................xii

Plenary Speeches Session Chair: Kiyoung Choi (Seoul National University) • Low Power Requirements for Future Digital Life Style ...........................................................................1

K. W. Lee (Samsung Electronics Co. Ltd.) • Evolution of Low Power Electronics and Its Future Applications ........................................................2

T. Makimoto, Y. Sakai (Sony Corporation)

Session 1: Low Power Caches Session Chair: Stephen Tang (Intel Corp.) Session Organizer: Tadahiro Kuroda (Keio University)

• A Forward Body-Biased Low-Leakage SRAM Cache: Device and Architecture Considerations ..................................................................................................................6 C. H. Kim, J.-J. Kim, S. Mukhopadhyay, K. Roy (Purdue University)

• Reducing Translation Lookaside Buffer Active Power..........................................................................10 L. T. Clark, B. Choi, M. Wilkerson (Intel Corp.)

• A Power-Aware SWDR Cell for Reducing Cache Write Power ............................................................14 Y.-J. Chang, C.-L. Yang, F. Lai (National Taiwan University)

• A Noise Tolerant Cache Design to Reduce Gate and Sub-threshold Leakage in the Nanometer Regime ..............................................................................................................................18 A. Agarwal, K. Roy (Purdue University)

• Understanding and Minimizing Ground Bounce During Mode Transition of Power Gating Structures ..........................................................................................................................22 S. Kim, S. V. Kosonocky, D. R. Knebel (IBM T. J. Watson Research Center)

Session 2: Power Modeling and Optimization for Embedded Systems Session Chair: Naehyuck Chang (Seoul National University) Session Organizer: Diana Marculescu (Carnegie Mellon University) • Energy-Efficient Data Scrambling on Memory-Processor Interfaces ................................................26

L. Benini (Università di Bologna), A. Galati, A. Macii, E. Macii (Politecnico di Torino), M. Poncino (Università di Verona)

• Analyzing the Energy Consumption of Security Protocols..................................................................30 N. R. Potlapally (Princeton University), S. Ravi, A. Raghunathan (NEC Laboratories America), N. K. Jha (Princeton University)

• LPBP: Low-Power Basis Profile of the Java 2 Micro Edition ...............................................................36 I. Choi, H. S. Kim, H. Shin, N. Chang (Seoul National University)

• Estimating Influence of Data Layout Optimizations on SDRAM Energy Consumption ................40 H. S. Kim, N. Vijaykrishnan, M. Kandemir (The Pennsylvania State University), E. Brockmeyer, F. Catthoor (IMEC), M. J. Irwin (The Pennsylvania State University)

• Analysis of Discharge Techniques for Multiple Battery Systems.......................................................44 R. Rao, S. Vrudhula (University of Arizona), D. Rakhmatov (The University of Victoria)

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Session 3: Design Strategies for Active Power Reduction Session Chair: Vivek De (Intel Corp.) Session Organizer: David Scott (Texas Instruments)

• A 225 MHz Resonant Clocked ASIC Chip ..................................................................................................48 C. H. Ziesler, J. Kim, V. S. Sathe, M. C. Papaefthymiou (University of Michigan)

• Energy Recovery Clocking Scheme and Flip-Flops for Ultra Low-Energy Applications..............54 M. Cooke, H. Mahmoodi-Meimand, K. Roy (Purdue University)

• A Semi-Custom Voltage-Island Technique and Its Application to High-Speed Serial Links............................................................................................................................60 J.-A. Carballo, J. L. Burns, S.-M. Yoo, I. Vo (IBM Research), V. R. Norman (IBM Microelectronics)

• Row-by-Row Dynamic Source-Line Voltage Control (RRDSV) Scheme for Two Orders of Magnitude Leakage Current Reduction of Sub-1-V-VDD SRAM’s ...................................................66 K.-S. Min (University of Tokyo, Kookmin University), K. Kanda (University of Tokyo, Fujitsu Laboratories Ltd.), T. Sakurai (University of Tokyo)

• UDSM (Ultra-Deep Sub-Micron)-Aware Post-Layout Power Optimization for Ultra Low-Power CMOS VLSI .................................................................................................................72 K.-w. Choi, A. Chatterjee (Georgia Institute of Technology)

Session 4: Leakage Estimation Session Chair: Farid Najm (University of Toronto) Session Organizer: Yun Cao (Kyushu University)

• Full Chip Leakage Estimation Considering Power Supply and Temperature Variations .............78 H. Su, F. Liu, A. Devgan, E. Acar, S. Nassif (IBM Corp.)

• Statistical Estimation of Leakage Current Considering Inter- and Intra-Die Process Variation ............................................................................................................................................84 R. Rao, A. Srivastava, D. Blaauw, D. Sylvester (University of Michigan)

• Leakage Power Modeling and Optimization in Interconnection Networks.......................................90 X. Chen, L.-S. Peh (Princeton University)

• Leakage and Leakage Sensitivity Computation for Combinational Circuits ...................................96 E. Acar, A. Devgan, R. Rao, Y. Liu, H. Su, S. Nassif, J. Burns (IBM Research)

• Efficient Techniques for Gate Leakage Estimation ..............................................................................100 R. M. Rao (University of Michigan, Ann Arbor), J. L. Burns, A. Devgan (IBM), R. B. Brown (University of Michigan, Ann Arbor)

Session 5: Design Strategies for Controlling Standby Leakage Session Chair: Deog-Kyoon Jeong (Seoul National University) Session Organizer: A. Keshavarzi (Intel Corp.), R. B. Brown (University of Michigan, Ann Arbor)

• Design Methodology for Fine-Grained Leakage Control in MTCMOS .............................................104 B. H. Calhoun, F. A. Honore, A. Chandrakasan (Massachusetts Institute of Technology)

• An MTCMOS Design Methodology and Its Application to Mobile Computing ..............................110 H.-S. Won, K.-S. Kim, K.-O. Jeong (Samsung Electronics Co.), K.-T. Park (Tohoku University), K.-M. Choi, J.-T. Kong (Samsung Electronics Co.)

• Optimal Body Bias Selection for Leakage Improvement and Process Compensaton Over Different Technology Generations..................................................................................................116 C. Neau, K. Roy (Purdue University)

• Effectiveness and Scaling Trends of Leakage Control Techniques for Sub-130nm CMOS Technologies ........................................................................................................122 B. Chatterjee, M. Sachdev (University of Waterloo), S. Hsu, R. Krishnamurthy, S. Borkar (Intel Corp.)

• An ASIC Design Methodology with Predictably Low Leakage, Using Leakage-immune Standards Cells ..............................................................................................................................................128 N. Jayakumar, S. P. Khatri (University of Colorado)

vii

Session 6: Advances in Low Power Synthesis Session Chair: Steve Kang (University of California at Santa Cruz) Session Organizer: Massimo Poncino (Università di Verona)

• Low-Power High-Level Synthesis for FPGA Architectures ................................................................134 D. Chen, J. Cong, Y. Fan (University of California at Los Angeles)

• ILP-Based Optimization of Sequential Circuits for Low Power .........................................................140 F. Gao, J. P. Hayes (University of Michigan)

• Simultaneous Vt Selection and Assignment for Leakage Optimization .........................................146 A. Srivastava (University of Maryland)

• Effective Graph Theoretic Techniques for the Generalized Low Power Binding Problem ........152 A. Davoodi, A. Srivastava (University of Maryland)

• Minimization of Dynamic and Static Power Through Joint Assignment of Threshold Voltages and Sizing Optimization ....................................................................................158 D. Nguyen, A. Davare, M. Orshansky, D. Chinnery, B. Thompson, K. Keutzer (University of California at Berkeley)

Session 7: Power Estimation and Design for Scaled Technologies Session Chair: Wim Dehaene (KULeuven) Session Organizer: Takayasu Sakurai (Tokyo University) • Level Conversion for Dual-Supply Systems...........................................................................................164

F. Ishihara (University of California at Berkeley, Toshiba Corporation), F. Sheikh, B. Nickolić (University of California at Berkeley)

• New Optimal Design Strategies and Analysis of Ultra-Low Leakage Circuits or Nano-Scale SOI Technology..................................................................................................................168 K. K. Das (The University of Michigan), R. V. Joshi, C.-T. Chuang, P. W. Cook (IBM Thomas J. Watson Research Center), R. B. Brown (The University of Michigan)

• Modeling and Estimation of Total Leakage Current in Nano-scaled CMOS Devices Considering the Effect of Parameter Variation ......................................................................................172 S. Mukhopadhyay, K. Roy (Purdue University)

• A Clock Delayed Sleep Mode Domino Logic for Wide Dynamic OR Gate ......................................176 K.-I. Oh, L.-S. Kim (KAIST)

• Strained-Si Devices and Circuits for Low-Power Applications .........................................................180 K. Kim, R. V. Joshi, C.-T. Chuang (IBM T. J. Watson Research Center)

Session 8: Low Power Analog Building Blocks Session Chair: Byung-Gook Park (Seoul National University) Session Organizer: Futao Yamaguchi (Sony) • Low Power Startup Circuits for Voltage and Current Reference

with Zero Steady State Current ..................................................................................................................184 Q. A. Khan, S. K. Wadhwa, K. Misri (Motorola India Limited)

• Reverse-Order Source/Drain Formation with Double Offset Spacer (RODOS) for CMOS Low-Power, High-Speed and Low-Noise Amplifiers.............................................................................189 W. Y. Choi, J. D. Lee, B.-G. Park (Seoul National University)

• Electric-Energy Generation Using Variable-Capacitive Resonator for Power-Free LSI: Efficiency Analysis and Fundamental Experiment ..............................................................................193 M. Miyazaki, H. Tanaka, G. Ono (Hitachi Ltd.), T. Nagano (Hitachi ULSI Systems Co, Ltd.), N. Ohkubo, T. Kawahara, K. Yano (Hitachi Ltd.)

• Temperature and Process Invariant MOS-based Reference Current Generation Circuits for Sub-1V Operation ....................................................................................................................................199 S. Tang, S. Narendra, V. De (Intel Labs.)

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Keynote Speech 1 Session Chair: Kiyoung Choi (Seoul National University) • Elements of Low Power Design for Integrated Systems .....................................................................205

S.-M. Kang (University of California at Santa Cruz)

Session 9: Temperature and Power Aware Architectures Session Chair: Trevor Mudge (University of Michigan) Session Organizer: S.T. Chakradhar (NEC Laboratories) • Microarchitecture Level Power and Thermal Simulation Considering Temperature

Dependent Leakage Model..........................................................................................................................211 W. Liao, F. Li, L. He (University of California at Los Angeles)

• Reducing Power Density through Activity Migration...........................................................................217 S. Heo, K. Barr, K. Asanović (Massachusetts Institute of Technology)

• Pipeline Muffling and A Priori Current Ramping: Architectural Techniques to Reduce High-Frequency Inductive Noise ...........................................................................................223 M. D. Powell, T. N. Vijaykumar (Purdue University)

• Integrated Architectural/Physical Planning Approach for Minimization of Current Surge in High Performance Clock-gated Microprocessors ...........................................229 Y. Chen, K. Roy, C.-K. Koh (Purdue University)

• Reducing Reorder Buffer Complexity Through Selective Operand Caching ................................235 G. Kucuk, D. Ponomarev, O. Ergin, K. Ghose (State University of New York at Binghamton)

• Routine Based OS-Aware Microprocessor Resource Adaptation for Run-time Operating System Power Saving ......................................................................................241 T. Li, L. K. John (University of Texas at Austin)

Session 10: Design Contest Presentation Session Chair: Vivek Tiwari (Intel Corp.) Session Chair: David Scott (Texas Instruments) Session Organizer: Diana Marculescu (Carnegie Mellon University)

Keynote Speech 2 Session Chair: Ingrid Verbauwhede (University of California at Los Angeles)

• Ambient Intelligence — Industrial Research on a Visionary Concept .............................................247 W. Weber (Infineon Technologies)

Session 11: Power Efficient Cache Design Session Chair: Wei Hwang (NCTU) Session Organizer: Shin-Dug Kim (Yonsei University)

• Reducing Data Cache Energy Consumption via Cached Load/Store Queue ................................252 D. Nicolaescu, A. Veidenbaum, A. Nicolau (University of California at Irvine),

• On Load Latency in Low-Power Caches .................................................................................................258 S. Kim, N. Vijaykrishnan, M. J. Irwin (The Pennsylvania State University), L. K. John (The University of Texas at Austin)

• Reducing Energy and Delay Using Efficient Victim Caches ..............................................................262 G. Memik, G. Reinman, W. H. Mangione-Smith (University of California at Los Angeles),

• Low Cost Instruction Cache Designs for Tag Comparison Elimination..........................................266 Y. Zhang (University of Texas at Dallas), J. Yang (University of California at Riverside)

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• Lightweight Set Buffer: Low Power Data Cache for Multimedia Application ................................270 J. Yang, J. Yu (University of California at Riverside), Y. Zhang (University of Texas at Dallas)

• Non Redundant Data Cache........................................................................................................................274 C. Molina, C. Aliagas, M. García (Universitat Rovira I Virgili), A. González, J. Tubella (Intel Corp., Universitat Politècnica de Catalunya)

Session 12: System Estimation and Voltage Scheduling Session Chair: Wolfgang Nebel (Carl v. Ossietzky University) Session Organizer: Kimiyoshi Usami (Shibaura Institute of Technology)

• A Critical Analysis of Application-Adaptive Multiple Clock Processors.........................................278 E. Talpes, D. Marculescu (Carnegie Mellon University)

• Microprocessor Pipeline Energy Analysis..............................................................................................282 K. Natarajan, H. Hanson, S. W. Keckler, C. R. Moore, D. Burger (The University of Texas at Austin)

• B#: a Battery Emulator and Power Profiling Instrument .....................................................................288 P. H. Chou, C. Park, J. Park, K. Pham, J. Liu (University of California at Irvine)

• ESTIMA: An Architectural-Level Power Estimator for Multi-Ported Pipelined Register Files..................................................................................................................................................294 K. M. Büyüksahin, P. Patra (Intel Corp.), F. N. Najm (University of Toronto)

• Multivoltage Scheduling with Voltage-Partitioned Variable Storage ...............................................298 A. Menon (Texas Instruments India), S. K. Nandy (Indian Institute of Science), M. Mehendale (Texas Instruments India)

• Voltage Scheduling Under Unpredictabilities: A Risk Management Paradigm.............................302 A. Davoodi, A. Srivastava (University of Maryland)

Session 13: Energy Efficient Microarchitectural Techniques Session Chair: Alice Wang (Massachusetts Institute of Technology) Session Organizer: Vojin Oklobdzija (University of California at Davis) • Energy Efficient D-TLB and Data Cache Using Semantic-Aware Multilateral Partitioning ........306

H.-H. S. Lee, C. S. Ballapuram (Georgia Institute of Technology) • A Selective Filter-Bank TLB System .........................................................................................................312

J.-H. Lee (Yonsei University), G.-H. Park, S.-B. Park (Samsung Electronics Co.), S.-D. Kim (Yonsei University) • Checkpointing Alternatives for High Performance, Power-Aware Processors.............................318

A. Moshovos (University of Toronto) • Reducing Instruction Fetch Energy with Backwards Branch Control Information

and Buffering ..................................................................................................................................................322 J. A. Rivers, S. Asaad, J.-D. Wellman, J. H. Moreno (IBM T. J. Watson Research Center)

• Pipeline Stage Unification: A Low-Energy Consumption Technique for Future Mobile Processors.....................................................................................................................326 H. Shimada, H. Ando, T. Shimada (Nagoya University)

• Energy-Efficient Instruction Set Synthesis for Application-Specific Processors ........................330 J.-e. Lee, K. Choi (Seoul National University), N. D. Dutt (University of California at Irvine)

Session 14: High Speed Converters, Amplifiers, and Low Power Analog Circuits Session Chair: Lucien Breems (Philips) Session Organizer: Hong-June Park (Pohang University of Science and Technology) • A Low-Power Design Methodology for High-Resolution Pipelined

Analog-to-Digital Converters ......................................................................................................................334 R. Lotfi, M. Taherzadeh-Sani, M. Y. Azizi, O. Shoaei (University of Tehran)

• A 1-V 1-mW High-Speed Class AB Operational Amplifier for High-Speed Low Power Pipelined A/D Converters using “Slew Boost” Technique .................................................................340 H. A. Aslanzadeh, S. Mehrmanesh, M. B. Vahidfar, A. Q. Safarian (Sharif University of Technology), R. Lotfi (University of Tehran)

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• Low-Voltage Low-Power Fast-Settling CMOS Operational Transconductance Amplifiers for Switched-Capacitor Applications ...................................................................................345 M. Yavari, O. Shoaei (University of Tehran)

• Low-Voltage Low-Power High dB-Linear CMOS Exponential Function Generator using Highly-Linear V-I Converter.........................................................................................349 Q.-H. Duong, T.-K. Nguyen, S.-G. Lee (Information & Communication University)

• A New Architecture for Rail-to-Rail Input Constant-gm CMOS Operational Transconductance Amplifiers ....................................................................................................................353 M. M. Ahmadi (Sharif University of Technology), R. Lotfi (University of Tehran), M. Sharif-Bakhtiar (Sharif University of Technology)

Keynote Speech 3 Session Chair: Rajiv Joshi (IBM)

• A Systems Approach to Molecular Electronics .....................................................................................359 J. R. Heath (California Institute of Technology)

Session 15: Circuit Considerations for Low Power Session Chair: Chong-Min Kyung (KAIST) Session Organizer: Suhwan Kim (IBM T. J. Watson Research Center)

• Energy-Aware Architectures for a Real-Valued FFT Implementation ..............................................360 A. Wang, A. P. Chandrakasan (Massachusetts Institute of Technology)

• A Low-Power VLSI Architecture for Turbo Decoding ..........................................................................366 S.-J. Lee, N. R. Shanbhag, A. C. Singer (University of Illinois at Urbana-Champaign)

• A Mixed-Clock Issue Queue Design for Globally Asynchronous, Locally Synchronous Processor Cores ...................................................................................................372 V. S. P. Rapaka, D. Marculescu (Carnegie Mellon University)

• Power Efficient Comparators for Long Arguments in Superscalar Processors ...........................378 D. Ponomarev, G. Kucuk, O. Ergin, K. Ghose (State University of New York at Binghamton)

• The Microarchitecture of a Low Power Register File ...........................................................................384 N. S. Kim, T. Mudge (The University of Michigan)

• Branch Prediction On Demand: an Energy-Efficient Solution...........................................................390 D. Chaver, L. Piñeul, M. Prieto, F. Tirado (Universidad Complutense), M. C. Huang (University of Rochester)

Session 16: System Level Issues Session Chair: Flavius Gruian (Lund University) Session Organizer: Mani Srivastava (University of California at Los Angeles)

• Dynamic Voltage Scaling Algorithm for Fixed-Priority Real-Time Systems Using Work-Demand Analysis ...................................................................................................................396 W. Kim, J. Kim, S. L. Min (Seoul National University)

• Exploiting Program Hotspots and Code Sequentiality for Instruction Cache Leakage Management......................................................................................................................402 J. S. Hu, A. Nadgir, N. Vijaykrishnan, M. J. Irwin, M. Kandemir (The Pennsylvania State University)

• Power-Aware Scheduling of Conditional Task Graphs in Real-Time Multiprocessor Systems ..............................................................................................................................408 D. Shin, J. Kim (Seoul National University)

• Exploiting Compiler-Generated Schedules for Energy Savings in High-Performance Processors ..............................................................................................................414 M. Valluri, L. John, H. Hanson (The University of Texas at Austin)

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• Energy-Aware Memory Allocation in Heterogeneous Non-Volatile Memory Systems ................420 H. G. Lee, N. Chang (Seoul National University)

• Energy Characterization of a Tiled Architecture Processor with On-Chip Networks ..................424 J. S. Kim, M. B. Taylor, J. Miller, D. Wentzlaff (Massachusetts Institute of Technology)

Keynote Speech 4 Session Chair: Rajiv Joshi (IBM)

• Low Power RF IC Design for Wireless Communication ......................................................................428 D. M. W. Leenaerts (Philips Research)

Session 17: RF Communication Circuits Session Chair: Domine Leenaerts (Philips Research) Session Organizer: Kevin Kornegay (IBM)

• A Power-Optimized Widely-Tunable 5-GHz Monolithic VCO in a Digital SOI CMOS Technology on High Resistivity Substrate ........................................................................434 J. Kim, J.-O. Plouchart, N. Zamdmer, M. Sherony, Y. Tan, M. Yoon, R. Trzcinski, M. Talbi, J. Safran, A. Ray, L. Wagner (IBM Semiconductor Research and Development Center)

• A 0.123 mW 7.25 GHz Static Frequency Divider by 8 in a 120-nm SOI Technology.....................440 J.-O. Plouchart, J. Kim, H. Recoules, N. Zamdmer, Y. Tan, M. Sherony, A. Ray, L. Wagner (IBM Semiconductor Research and Development Center)

• A 0.75-mW Analog Processor IC for Wireless Biosignal Monitor .....................................................443 C.-J. Yen, W.-Y. Chung, M. C. Chi, S.-H. Lee (Christian University)

• Integrated DC-DC Converter Design for Improved WCDMA Power Amplifier Efficiency in SiGe BiCMOS Technology................................................................................449 D. Guckenberger, K. Kornegay (Cornell University)

• A Novel High Frequency, High-Efficiency, Differential Class-E Power Amplifier in 0.18цm CMOS ............................................................................................................................................455 P. Heydari, Y. Zhang (University of California at Irvine)

Session 18: Sensor Networks and Communication Systems Session Chair: Sarma Vrudhula (University of Arizona) Session Organizer: Youngsoo Shin (IBM T. J. Watson Research Center) • Energy Optimization Techniques in Cluster Interconnects................................................................459

E. J. Kim (Pennsylvania State University), K. H. Yum (The University of Texas at San Antonio), G. M. Link, N. Vijaykrishnan, M. Kandemir, M. J. Irwin (Pennsylvania State University), M. Yousif (Intel Corp.), C. R. Das (Pennsylvania State University)

• Uncertainty-Based Scheduling: Energy-Efficient Ordering for Tasks with Variable Execution Time .....................................................................................................................465 F. Gruian, K. Kuchcinski (Lund University)

• Energy Efficiency and Fairness Tradeoffs in Multi-Resource, Multi-Tasking Embedded Systems ...........................................................................................................469 S. I. Park (Raytheon Inc.), V. Raghunathan, M. B. Srivastava (University of California at Los Angeles)

• Low Power Coordination in Wireless Ad-hoc Networks .....................................................................475 F. Koushanfar, A. Davare, D. T. Nguyen (University of California at Berkeley), M. Potkonjak (University of California at Los Angeles), A. Sangiovanni-Vincentelli (University of California at Berkeley)

• An Enviromental Energy Harvesting Framework for Sensor Networks ..........................................481 A. Kansal, M. B. Srivastava (University of California at Los Angeles)

Author Index......................................................................................................................................................487

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Executive Committee & Symposium Officers

General Co-Chairs: Ingrid Verbauwhede, University of California, Los Angeles Hyung Roh, Samsung Electronics

Technical Program Co-Chairs: Rajiv Joshi, IBM Kiyoung Choi, Seoul National University

Treasurer: Vijay Narayanan, Penn State University

Publicity Chair: Luca Benini, Università di Bologna

Local Arrangements Chair: Jihong Kim, Seoul National University

Design Contest Chair: Vivek Tiwari, Intel Corporation

Exhibits Chair: Diana Marculescu, Carnegie Mellon University

Other Members of the EC: B. Barton, Texas Instruments D. Blaauw, University of Michigan R. Brodersen, University of California, Berkeley A. Chandrakasan, Massachusetts Institute of Technology E. Cheng, Synopsys J. Cong, University of California, Los Angeles V. De, Intel Corporation G. DeMicheli, Stanford University

C. Enz, CSEM M. J. Irwin, Penn State University E. Macii, Politecnico di Torino F. Najm, University of Toronto M. Pedram, University of Southern California C. Piguet, CSEM J. Rabaey, University of California, Berkeley T. Sakurai, University of Tokyo C. Svensson, Linkoping University

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Technical Program Committee

J. Arends (Motorola) I. Bahar (Brown U)

L. Benini (U Bologna) K. van Berkel (Philips) A. Bogliolo (U Urbino)

L. Breems (Philips) B. Brodersen (UCB) Y. Cao (Kyushu U) S.-I. Chae (SNU)

C. Chakrabarti (ASU) S. Chakradhar (NEC) N.-H. Chang (SNU) E. Cheng (Synopsys)

J.-D. Cho (SungKyunKwan U) K.-M. Choi (Samsung)

P. Chou (UCIrvine) J. Cong (UCLA)

N. Dutt (UCIrvine) B. Falsafi (CMU) J. Figueras (UPC) D. Garrett (Lucent)

J. Henkel (NEC) E. Huijbregts (Magma)

W. Hwang (NCTU) A. Inoue (Fujitsu)

M. Kandemir (PSU) A. Keshavarzi (Intel)

H.-N. Kim (ETRI) L.-S. Kim (KAIST)

S. Kim (IBM) S.-D. Kim (Yonsei U)

Y.-H. Kim (POSTECH) P. Kogge (U Notre Dame)

J.-T. Kong (Samsung) K. Kornegay (Cornell U)

A. Kornfeld (Intel) S. Kosonocky (IBM) T. Kuroda (Keio U)

L.-H. Lee (Motorola) E. Macii (P Torino)

H. Makino (Mitsubishi) B. Mangione-Smith (UCLA)

D. Marculescu (CMU) R. Marculescu (CMU)

M. Martonosi (Princeton U) S. Mattisson (Ericsson)

R. Mehra (Synopsys) H. Mizuno (Hitachi) K. Muhammad (TI)

S. Mukherjee (Philips) K. Najafi (U Michigan)

V. Narayanan (PSU) S. Narendra (Intel) W. Nebel (OFFIS)

M. Nemani (Intel) V. Oklobdzija (UCDavis)

R. Panda (Motorola) B. M. Pangrle (Synopsys)

G.-H. Park (Samsung) H.-J. Park (POSTECH) M. Poncino (U Verona)

K. Roy (Purdue U) T. Sakurai (U Tokyo)

C.A.T Salama (U Toronto) C. Schurgers (MIT)

D. Scott (TI) Y.-S. Shin (IBM) J. Sparso (DTU)

M. Srivastava (UCLA) G. Stamoulis (U Thessaly) M. R. Stan (U Virginia)

L. Svensson (Chalmers U) J. Tierno (IBM) V. Tiwari (Intel)

N. Tzartzanis (Fujitsu) K. Usami (SIT)

H.-S. Won (Samsung) F. Yamaguchi (Sony)

H. Yasuura (Kyushu U) R. Zafalon (STMicro)

xiv

Additional Reviewers

Amit Agarwal Remus Albu

Pietro Babighian Yu Bai

Mark Barry Brock Barton Mural Becer

Reinaldo A. Bergamaschi Subhrajit Bhattacharya

Clive Bittlestone Andrea Bona Pradip Bose

Eric Chi Jinsung Cho Nam Ik Cho

Sangyeun Cho Jonghyuk Choi Yongseok Choi

Sung Woo Chung Michael Clinton

Julie Dong Monica Donno

Evelyn Duesterwald Benoit Dufort

Claire Fang Fang Bita Gorji-Ara

Upul Gunawardana Sumanth Gururajarao

Soonhoi Ha Jiwon Hahn

Seongsoo Hong Ted Houston Jingcao Hu

Alessandro Ivaldi Woo Kyeong Jeong

Yongsoo Joo Gunok Jung

Masahiro Kanazawa Naoyuki Kawabe

Hyung-Il Kim Jae-Joon Kim Jihong Kim Joohee Kim

Kwanho Kim Nam Yun Kim Seo Kyu Kim

Seongwon Kim Takeshi Kitahara

Geoff Knagge Lars Kruse

Hyung Gyu Lee Jaejin Lee

Seongsoo Lee Woo Hyong Lee

Ted Letavic Dexin Li

Jinfeng Liu Xun Liu

Zhijian Lu Alberto Macii

Andrew Marshall Tali Moreshet Chris Nicol

Sang Soo Park Thomas Prokop

Oliver Ridler Eric Seelen

Kevin Skadron Phillip Stanley-Marbell

Emil Talpes Hiep Tran

Benoit Veillette Ben Widdup Qiang Xie

Masaaki Yamada Se-Hyun Yang

Vittorio Zaccaria Conrad H. Ziesler

487

Author IndexAcar, E. ................................... 78, 96 Agarwal, A.................................... 18 Ahmadi, M. M. ........................... 353 Aliagas, C. .................................. 274 Ando, H. ..................................... 326 Asaad, S. ..................................... 322 Asanović, K. ............................... 217 Aslanzadeh, H. A........................ 340 Azizi, M. Y. ................................ 334 Bakhtiar, M. S............................. 353 Ballapuram, C. S......................... 306 Barr, K. ....................................... 217 Benini, L. ...................................... 26 Blaauw, D. .................................... 84 Borkar, S. .................................... 122 Brockmeyer, E. ............................. 40 Brown, R. B. ....................... 100, 168 Burger, D. ................................... 282 Burns, J. L....................... 60, 96, 100 Büyükşahin, K. M....................... 294 Calhoun, B. H. ............................ 104 Carballo, J.-A................................ 60 Catthoor, F. ................................... 40 Chandrakasan, A................. 104, 360 Chang, N............................... 36, 420 Chang, Y.-J. .................................. 14 Chatterjee, A. ................................ 72 Chatterjee, B. .............................. 122 Chaver, D.................................... 390 Chen, D....................................... 134 Chen, X......................................... 90 Chen, Y....................................... 229 Chi, M. C. ................................... 443 Chinnery, D. ............................... 158 Choi, B.......................................... 10 Choi, I. .......................................... 36 Choi, K........................................ 330 Choi, K.-M.................................. 110 Choi, K.-w. ................................... 72 Choi, W. Y.................................. 189 Chou, P. H. ................................. 288 Chuang, C.-T. ..................... 168, 180 Chung, W.-Y............................... 443 Clark, L. T. ................................... 10 Cong, J. ....................................... 134 Cook, P. W.................................. 168 Cooke, M. ..................................... 54 Das, C. R..................................... 459 Das, K. K. ................................... 168 Davare, A............................ 158, 475

Davoodi, A. .........................152, 302 De, V. ..........................................199 Devgan, A. ......................78, 96, 100 Duong, Q.-H................................349 Dutt, N. D....................................330 Ergin, O. ..............................235, 378 Fan, Y..........................................134 Galati, A. .......................................26 Gao, F..........................................140 García, M.....................................274 Ghose, K..............................235, 378 González, A.................................274 Gruian, F. ....................................465 Guckenberger, D. ........................449 Hanson, H............................282, 414 Hayes, J. P. ..................................140 He, L............................................211 Heath, J. R. ..................................359 Heo, S..........................................217 Heydari, P....................................455 Honore, F. A................................104 Hsu, S. .........................................122 Hu, J. S. .......................................402 Huang, M. C................................390 Irwin, M. J. ............40, 258, 402, 459 Ishihara, F....................................164 Jayakumar, N...............................128 Jeong, K.-O. ................................110 Jha, N. K........................................30 John, L.........................414, 241, 258 Joshi, R. V. ..........................168, 180 Kanda, K. ......................................66 Kandemir, M. ................40, 402, 459 Kang, S.-M. .................................205 Kansal, A.....................................481 Kawahara, T. ...............................193 Keckler, S. W. .............................282 Keutzer, K. ..................................158 Khan, Q. A. .................................184 Khatri, S. P. .................................128 Kim, C. H. .......................................6 Kim, E. J......................................459 Kim, H. S.................................36, 40 Kim, J. ...........48, 396, 408, 434, 440 Kim, J. S......................................424 Kim, J.-J. .........................................6

Kim, K. ....................................... 180 Kim, K.-S.................................... 110 Kim, L.-S. ................................... 176 Kim, N. S. ................................... 384 Kim, S. .................................. 22, 258 Kim, S.-D.................................... 312 Kim, W. ...................................... 396 Knebel, D. R. ................................ 22 Koh, C.-K. .................................. 229 Kong, J.-T. .................................. 110 Kornegay, K................................ 449 Kosonocky, S. V. .......................... 22 Koushanfar, F. ............................ 475 Krishnamurthy, R. ...................... 122 Kuchcinski, K. ............................ 465 Kucuk, G............................. 235, 378 Lai, F............................................. 14 Lee, H. G. ................................... 420 Lee, H.-H. S. ............................... 306 Lee, J. D...................................... 189 Lee, J.-e....................................... 330 Lee, J.-H. .................................... 312 Lee, K. W........................................ 1 Lee, S.-G..................................... 349 Lee, S.-H..................................... 443 Lee, S.-J. ..................................... 366 Leenaerts, D. M. W..................... 428 Li, F. ........................................... 211 Li, T. ........................................... 241 Liao, W. ...................................... 211 Link, G. M. ................................. 459 Liu, F. ........................................... 78 Liu, J. .......................................... 288 Liu, Y............................................ 96 Lotfi, R........................ 334, 340, 353 Macii, A. ....................................... 26 Mahmoodi-Meimand, H. .............. 54 Makimoto, T. .................................. 2 Mangione-Smith, W. H............... 262 Marculescu, D..................... 278, 372 Mehendale, M. ............................ 298 Mehrmanesh, S. .......................... 340 Meimand, H. M............................. 54 Memik, G.................................... 262 Menon, A. ................................... 298 Miller, J....................................... 424 Min, K.-S. ..................................... 66 Min, S. L. .................................... 396 Misri, K....................................... 184 Miyazaki, M................................ 193 Molina, C. ................................... 274

488

Moore, C. R. ............................... 282 Moreno, J. H. .............................. 322 Moshovos, A............................... 318 Mudge, T. ................................... 384 Mukhopadhyay, S. .................. 6, 172 Nadgir, A. ................................... 402 Nagano, T. .................................. 193 Najm, F. N. ................................. 294 Nandy, S. K. ............................... 298 Narendra, S. ................................ 199 Nassif, S.................................. 78, 96 Natarajan, K................................ 282 Neau, C. ...................................... 116 Nguyen, D........................... 158, 475 Nguyen, T.-K. ............................. 349 Nicolaescu, D.............................. 252 Nicolau, A................................... 252 Nikolić, B.................................... 164 Norman, V. R................................ 60 Oh, K.-I....................................... 176 Ohkubo, N. ................................. 193 Ono, G. ....................................... 193 Orshansky, M.............................. 158 Papaefthymiou, M. C. ................... 48 Park, B.-G. .................................. 189 Park, C. ....................................... 288 Park, G.-H................................... 312 Park, J. ........................................ 288 Park, K.-T. .................................. 110 Park, S. I. .................................... 469 Park, S.-B.................................... 312 Patra, P........................................ 294 Peh, L.-S. ...................................... 90 Pham, K. ..................................... 288 Piñuel, L...................................... 390 Plouchart, J.-O. ................... 434, 440 Poncino, M.................................... 26 Ponomarev, D. .................... 235, 378 Potkonjak, M. ............................. 475

Potlapally, N. R. ............................30 Powell, M. D. ..............................223 Prieto, M......................................390 Raghunathan, A.............................30 Raghunathan, V...........................469 Rakhmatov, D. ..............................44 Rao, R................................44, 84, 96 Rao, R. M. ...................................100 Rapaka, V. S. P. ..........................372 Ravi, S. ..........................................30 Ray, A. ................................434, 440 Recoules, H. ................................440 Reinman, G. ................................262 Rivers, J. A..................................322 Roy, K. ........6, 18, 54, 116, 172, 229 Sachdev, M..................................122 Safarian, A. Q..............................340 Safran, J.......................................434 Sakai, Y. ..........................................2 Sangiovanni-Vincentelli, A. ........475 Sani, M. T....................................334 Sathe, V. S.....................................48 Shanbhag, N. R. ..........................366 Sharif-Bakhtiar, M. .....................353 Sheikh, F. ....................................164 Sherony, M..........................434, 440 Shimada, H..................................326 Shimada, T. .................................326 Shin, D. .......................................408 Shin, H. .........................................36 Shoaei, O. ............................334, 345 Singer, A. C.................................366 Srivastava, A. ........84, 146, 152, 302 Srivastava, M. B. .................469, 481 Su, H........................................78, 96 Sukurai, T......................................66 Sylvester, D. ..................................84 Taherzadeh-Sani, M. ...................334 Talbi, M.......................................434

Talpes, E. .................................... 278 Tan, Y. ................................ 434, 440 Tanaka, H.................................... 193 Tang, S........................................ 199 Taylor, M. B. .............................. 424 Thompson, B............................... 158 Tirado, F. .................................... 390 Trzcinski, R................................. 434 Tubella, J. ................................... 274 Vahidfar, M. B. ........................... 340 Valluri, M. .................................. 414 Veidenbaum, A. .......................... 252 Vijaykrishnan, N.......... 40, 258, 402,

459 Vincentelli, A. S.. ....................... 475 Vo, I. ............................................. 60 Vrudhula, S. .................................. 44 Wadhwa, S. K. ............................ 184 Wagner, L. .......................... 434, 440 Wang, A...................................... 360 Weber, W.................................... 247 Wellman, J.-D............................. 322 Wentzlaff, D. .............................. 424 Wilkerson, M. ............................... 10 Won, H.-S. .................................. 110 Yang, C.-L. ................................... 14 Yang, J. ............................... 266, 270 Yano, K....................................... 193 Yavari, M.................................... 345 Yen, C.-J. .................................... 443 Yoo, S.-M. .................................... 60 Yoon, M...................................... 434 Yousif, M.................................... 459 Yu, J............................................ 270 Yum, K. H................................... 459 Zamdmer, N........................ 434, 440 Zhang, Y. .................... 266, 270, 455 Ziesler, C. H.................................. 48