Computing Detection Probability of Delay Defectsin Signal Line TSVs

C. Metzler, A. Todri-Sanial, A. Bosio, L. Dilillo, P. Girard, A. VirazelLIRMM UMR 5506 - University of Montpellier 2/CNRS

Montpellier, FranceEmail: lastname@lirmm.fr

P. Vivet, M. BellevilleCEA - LETI

Grenoble, FranceEmail: first.last@cea.fr

Abstract—Three-dimensional stacking technology promises tosolve the interconnect bottleneck problem by using Through-Silicon-Vias (TSVs) to vertically connect circuit layers. However,manufacturing steps may lead to partly broken or incompletelyfilled TSVs that may degrade the performance and reduce theuseful lifetime of a 3D IC.

Due to combinations of physical factors such as switchingactivity, supply noise and crosstalk, path delays can experiencespeed-up or slow-down that could let the effect of resistive openTSV go undetected by conventional test methods. In this work,we present a metric based on probabilistic analysis to detect delaydefects induced by resistive opens that occur on signal line TSVs.Our experimental result will show the accuracy of the proposedmetric.

I. INTRODUCTION

Through-Silicon-Vias (TSVs) are the key enablers tothree-dimensional (3D) circuit implementation. TSVs provideshorter and faster interconnects than the conventional 2Dinterconnects due to reduced lengths and parasitics [1] whileenabling signal transmission, power and clock lines betweenvertical tiers. Despite the on-going advancements on 3Dprocessing technologies, there are several challenges relatedto design and test of 3D ICs. In this work, we study TSVresiliency by investigating resistive open defects that can occurduring manufacturing steps.

TSVs are created by etching holes in silicon and filling thevoid with metal (e.g. copper). The process of electroplatingthe metal can result in partial or porous metal fill meaningthat the TSV channel is not completely filled or partly brokenthus, creating an open defect. Also aging can introduce opendefects in TSVs, where unidirectional large currents createsvoids and hillocks on a TSV. Open defects can be categorizedinto resistive open (weak open) and open (strong open) defects.Strong opens can completely interrupt electrical connectionamong tiers, whereas weak opens still conduct but with anincreased resistivity which results in excessive path delay.

Path delays already experience a lot of uncertainty andvariation due to physical (i.e. substrate coupling) and electrical(i.e. supply noise) conditions on a 3D IC. During test, itis difficult to determine whether the obtained delay increaseis due to a defective TSV or due to other factors such asvoltage drop. Delay variations induced by resistive open TSVscan vary drastically. For some cases, delay variations lead toexcessive delay, which facilitates detection of resistive open

TSV. Conversely, there are also some cases where path delaysdecrease, which prevents detections and faulty TSVs can goundetected. Such cases occur due to the impact of TSV-to-TSV coupling (crosstalk) and non-uniform voltage distributionamong gates on a path which can create artificial delay speed-up as shown in [2]–[4] and from a test perspective suchbehavior reduces TSV fault coverage.

There are many existing works that look into diagno-sis, detection and test methods for resistive-open defects onconventional 2D interconnects [5]–[12]. There are some on-going works on resistive open TSVs investigated by [14]–[17]. In [14] a resistive-open fault model is proposed forTSVs implemented on 3D DRAM stacking. In [15], delayvariations caused by resistive-opens are investigated and amethod to allocate spare TSVs is proposed. A delay testscheme TSV aware is presented in [16] where they propose avariable output threshold (VOT) based oscillator ring structureto detect small delay defects induced by resistive open TSVs.In [17] they show probabilistic models on independent andclustered defects distributions for yield analysis. Despite thesefew works, TSV-aware test and detection methods are still intheir early development phase.

This work proposes a probability based metric to detectresistive open TSVs. We exploit mathematical models toexpress path delays as a function of physical (TSV size andTSV-to-TSV coupling) and electrical factors (power supplynoise and ground bounce [20]) to devise a relationship be-tween delay variation and defect size (resistive open value).The proposed metric computes a probability of detection forresistive open TSVs by a joint probability density function.Such mathematical concepts can be thought of as knobsfor solving the problem and have been shown effective onother research topics [12]. This formulation allows us to sortdefect sizes (resistive open values) in ranges of detectable andnon-detectable. The main contributions of this work can besummarized as follows:

• We propose a metric for computing the probability ofdetection of resistive opens TSVs while considering phys-ical and electrical factors unique to 3D ICs (such as TSV-to-TSV coupling and noise on each tier).

• This metric aims to define relationship between opendefect size in TSV and the probability of detection.

• We detect resistive open defects at lower resistive values

2013 18th IEEE European Test Symposium (ETS)

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978-1-4673-6377-8/13/$31.00 ©2013 IEEE

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by taking into account the effect of physical and electricalfactors which can be exploited to facilitate detectabilityof resistive open TSVs.

The rest of this paper is organized as follows. In sectionII, we present the problem formulation and the mathematicalconcepts utilized for this work. In Section III, we providethe analysis on detection probability for resistive open TSVs.In Section IV, we present a case study to demonstrate thegoodness of our metric. Section V concludes this paper.

II. MATHEMATICAL FORMULATION

In this section, we start by explaining the defect modelingconsidered in this work. Second, we describe the delay modelin the presence of physical and electrical factors. Lastly, wedefine mathematically the conditions for detecting resistiveopen TSVs.

A. Stage-Path Delay Modeling

In this work, we consider a single path stage to investigaterise-to-fall and fall-to-rise transition delays due to a resistiveopen TSV. Figure 1 shows the driver buffer gate, TSV andreceiver buffer gate that are found between two tiers. Dueto proximity between TSVs, we assume the TSV is coupledthrough the substrate to neighboring TSVs both inductivelyand capacitively. We consider stage-path delay, the delaymeasured from point A to point B in order to capture anytransition faults.

Stage-path delay can be derived with respect to the delayof the buffer and TSV interconnect delay. As shown in [20],buffer delay can experience either delay speed-up or slow-down due to the voltage levels at power and ground terminals.Buffer delay is also dependent on the input vector and theoutput loading parasitics or the TSV. TSV parasitics play acritical role on delay and TSV-to-TSV coupling can furtherexacerbate delay variations. TSV-to-TSV coupling impacts canbe thought of similarly as crosstalk concept on interconnects.Depending on input vectors, capacitive coupling can speed-upor slow-down stage-path delays. Thus, stage-path delay canvary due to multiple parameters introduced from both physicaland electrical factors. Stage-path delay can be expressed as afunction of physical and electrical conditions as:

D0 ≡ ∆d = f(RTSV , LTSV , Cc, VDD, VSS , Vin) (1)

where RTSV , LTSV , Cc are the TSVs parasitics, VDD andVSS power and ground supply voltage and Vin the inputvectors that contain the transition states (low to high (LH)or high to low (HL)).

Thus, to further investigate stage-path delay variations inthe presence of a resistive open TSV, it is important tounderstand the sources of path delay variation with ideal TSVso we can later differentiate the impact of a defective TSV.In the following subsections, we present stage-path delay asa function of physical-electrical factors and resistive openTSV. Based on these mathematical models, we formulate ourdetection probability metric.

Driver Receiver

RTSV LTSV

TIER 1

TSV 1

Cc

Cload

RTSV LTSV

TSV 2Cload

TIER 2

Point A Point B

Vi1

Vi2

Fig. 1. Stage-path delay measured from point A to B.

B. Delay Modeling Considering Physical and Electrical Fac-tors

Delay threshold is normally used to identify a fault or fault-free behavior. As delay can vary due to several aforementionedfactors (either increase or decrease), it is challenging to detecta fault. In this work, we assume that a stage-path havinga delay greater than delay threshold DT is considered as atransition fault. For each transition (HL and LH), we identifytransition faults by computing the stage-path delay.

B.1 Delay for Rising (LH) Transition: For a rising transi-tion, the incremental charge on buffer delay considering powerand ground supply noise can be expressed as in [20]:

∆dLH= k1r.(∆VDD

+ ∆VSS) − k2r.(∆VDD

− ∆VSS) + k5r

(2)

where k1r and k2r are positive constants and their valuedepend on the rising input transition, gate load, and parasitics.The constants k1r, k2r and k5r are given by [20]:

k1r =tr + ∆tr

2VDD.(1 + α)+CTSV2IDO

(3)

k2r =tr + ∆tr

2VDD.(1 + α)− CTSV

2IDO(4)

k5r = ∆tr .

(0.5 − 1 − vt

1 + α

)(5)

where α, is the ratio of drain to source current, vt is thethreshold voltage, IDO is the drain saturation current atVGS = VDS = Vdd of the inverter. This formulation allows tocompute stage-path delay for LH transition while consideringthe parasitics of TSVs, TSV-to-TSV coupling, input vector,transition time and supply voltages at power and groundterminals.

B.2 Delay for Falling (HL) Transition: In a similar waystage-path delay can be estimated for a falling transition, asin [20]:

∆dHL= −k1f .(∆VDD

+ ∆VSS) − k2f .(∆VDD

− ∆VSS) + k5f

(6)

where k1f and k2f are positive constants and their valuedepend on the falling input transition, gate load, and parasitics.

!

!

The constants k1f , k2f and k5f are given by [20]:

k1f =tf + ∆tf

2VDD.(1 + α)+CTSV2IDO

(7)

k2f =tf + ∆tf

2VDD.(1 + α)− CTSV

2IDO(8)

k5f = ∆tf .

(0.5 − 1 − vt

1 + α

)(9)

Both HL and LH stage-path delay formulations once com-pared to the delay threshold, DT, assure that a transitionfault occurs due to physical and electrical effects. We furtherexploit such mathematical formulation to introduce the effectof resistive open TSV and derive its impact on stage-pathdelay.

C. Detecting Conditions for Resistive Open TSVs under Phys-ical and Electrical Factors

During 3D ICs manufacturing test, detection of delay varia-tions caused by resistive open TSVs can be very challenging.The detectability of a defective TSV can be a function of thesize of the open (i.e. open resistivity values) and also due tocombinations of physical and electrical conditions from thestacked circuit.

Definition: In general terms, delay variations can be rep-resented in a normal distribution. A defect-free TSV has astage-path delay normal distribution D0 that can be expressedas N(µD0 , σD0 ). Whereas, a path-delay containing resistiveopen TSV also can be expressed in normal distribution Ddef

such as N(µDdef, σDdef

).Figure 2 depicts delay distribution D0 for a non-defective

TSV represented by the nominal curve of delay versus prob-ability density distribution (PDF) considering electrical andphysical factors. Such delay distribution would further varydue to a defective TSV. Intuitively, delay variations Ddef

are greater than D0 due to the increased resistance, butdelay variations induced by resistive open TSVs may lead toexcessive delay or artificial delay speed-up due to physicaland electrical effects, which affects the detectability of suchdefects. Since Ddef would further vary due to a defective TSV,delay variations can be expressed as a function of resistiveopen values (Ropen), as in:

Ddef = f(R)

Delay (ps)

PDF

μ nominal

DelayThreshold

μ

Fig. 2. Delay distribution for a defect-free path delay as a function of physicaland electrical factors. µD0

, σD0and delay threshold line can vary due to

selected path and design constraints. We assume that path delays passing thedelay threshold line are detectable.

where f(R) = f(Ropen1, ..., Ropenn

) (10)

For each resistive open value, the stage-path delay can beexpressed by normal variables N(µdef , σdef ). Then the mean(µdef ) and standard deviation (σdef ) of stage-path delay withresistive open TSV can estimated using multivariate Taylor-series expansion [21] second-order approximation by:

µDdef= f(R) + 0.5

n∑i=1

∂2f(R)

∂R2openi

σ2Ropeni(11)

and

σ2Ddef

=

n∑i=1

(∂f(R)

∂Ropeni

)2

σ2Ropeni (12)

The distribution of the parameters can be quite wide as somepreliminary studies have shown [2]. The nominal distributionfunction for stage-path delay can be expressed as:

D0 ∼ N(µD0, σD0

) (13)

Similarly, the stage-path delay obtained due to a resistive openTSV, can be expressed as:

Ddef ∼ N(µDdef, σDdef

) (14)

Then, the statistical detection condition for resistive open TSVcausing transition faults can be stated as:

Ddef ∼ N(µDdef, σDdef

) ≥ D0 ∼ N(µD0, σD0

) (15)

We will utilize in the following section such comparison inorder to detect statistically the condition of transition faultscaused by a resistive open TSV.

III. PROBABILITY OF DETECTION

In this section, we explain the concept of deriving prob-ability of detection, Pdet, for various resistive open valuesutilizing the delay probability density functions. We exploitjoint probability density function f(D0, Ddef ) to calculate theprobability to detect resistive open TSVs. The probability ofdetection of resistive open TSV can be analytically estimatedvia the area of the joint distributions by taking the doubleintegral as:

Pdet[Ddef ≥ D0] =∫ µD0+3σD0

µD0−3σD0

(∫ (µDdef+3σDdef

)

D0

f(D0, Ddef )dDdef

)dD0

(16)

The probability of detection, Pdet would vary as a functionof resistive open values (Ropen). Strong Ropen values wouldlead to large probability of detection. However, weak open (orsmall Ropen) would lead to small probability of detection.

Stage-path delay with resistive open TSV has delay varia-tions great enough to be detected by conventional methods weconsider that Ddef > DT as a transition fault. We assume thatdelay threshold, DT , as the detectable delay, thus Pdet = 1.

We further exploit our mathematical formulation of Pdet todetermine the TSV resistive open values that lead to smalldelay defects. In the following subsections, we present threecases of delay distributions with respect to joint probabilitydensity function, Pdet.

!

!

N(μ0,σ0)*10-11

N(μ0,σ0)*10-11

N(μ

de

f,σ

de

f)*1

0-1

1

N(μdef,σdef)*10-11

Bivariate Normal Distribution

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Detectable

Region

Non-detectable

Region

Delay(s)

0.06

0.04

0.02

0.12

0.1

0.08

0.14

1 2 3

non-defective

defective

0.02

0.01

0.005

0.015

0

3

2.5

2

1.5

132.521.51

33

22

11

0

(a) (b) (c)

Fig. 3. Case I shows disjoint stage-path delay distributions. (a) Path delay distributions for a stage-path with a defect-free and defective TSV. (b) We observethat their PDFs are disjoint (no overlap). (c) Contours plot from bivariate densities with resistive open TSVs shows the open resistivity is detectable (withhigh probability of detection) as it is beyond the delay threshold line.

A. Case I: Disjoint Delay Distributions

In this case, we investigate probability density distributionsof path delays derived from a stage-path with a defect-free anddefective TSV. Figure 3a shows the two distributions whichare distinctively disjointed with respect to their mean andstandard deviations, µDdef

, σDdefand µD0 , σD0 . For disjoint

delay distribution, we note that:

µDdef>> µD0 (17)

This case demonstrates that the defective TSV has a largeresistive open value for producing a delay distribution thatis disjointed from the defect-free path delay distribution. Asshown in Figure 3b, their joint density distribution is plottedwith respect to defect-free delays on x-axis, defective-delayson y-axis and their joint densities on z-axis. The contour plotfrom joint densities (Figure 3c) serves as the estimate for theprobability of detection. Delay threshold line splits the graphin two to show the detectable and non-detectable regions.The area of the contour plot beyond the delay threshold lineprovides an estimate of the detection probability, Pdet, whichis a high probability.

B. Case II: Joint Delay Distributions

In this case, the delay distributions from defect-free anddefective TSV have mean and standard derivations that arecloser, as shown in Figure 4. Some of the delays valuesobtained from defective TSV can be misinterpreted as delay

variations induced from physical and electrical factors such asvoltage drop. For joint distribution, we note that:

µDdef≥ µD0 + 3σD0

(18)

This is also shown on their joint distribution, which is muchwider compared to case I and resides in the middle of thegraph. Similarly, the contour plot shows that more than halfits area resides below the delay threshold and these scenarioscan let defective TSVs go undetected. The area of the contourbeyond the delay threshold shows the detectable region, whichhas less than 50% probability of detection.

C. Case III: Overlapped Delay Distribution

In this case, stage-path delays from defective and defect-free TSV have very similar distributions with a large overlapbetween them as shown in Figure 5. For this case, we notethat:

µDdef− µD0 ≤ σD0 (19)

This demonstrates that the value of resistive open is smalland there are a lot of scenarios where defective TSV can goundetected. Their joint bivariate densities show a distributionthat is spread closely over the nominal delays. Also, this isshown from the contour plot, where most of the area is locatedbelow the delay threshold line, thus resulting in very lowprobability of detection.

N(μ0,σ0)*10-11

N(μ0,σ0)*10-11

N(μ

de

f,σ

de

f)*1

0-1

1

N(μdef,σdef)*10-11

(a) (b) (c)

Bivariate Normal Distribution

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Detectable

Region

Non-detectable

Region

Delay(s)

non-defective

defective

0.06

0.04

0.02

0.12

0.1

0.08

0.14

1.2 1.4 1.6 1.8 2 2.2 2.4

3

2.8

2.6

2.4

2.2

2

1.8

1.6

1.4

1

1.2

1 1.5 2 2.5 3

33

22

11

0

0.025

0.02

0.01

0.005

0.015

0

Fig. 4. Case II shows the joint delay distributions. (a) Path delay distributions for a stage-path with a defect-free and defective TSV. (b) Their delaydistributions are partially joint. (c) Contour plot from bivariate densities passes the delay threshold line, thus, resulting less than 50% probability of detection.

!

!

33

22

11

0

0.03

0.02

0.01

1 1.5 2 2.5 3N(μ0,σ0)*10

-11

N(μ0,σ0)*10-11

N(μ

de

f,σ

de

f)*1

0-1

1

N(μdef,σdef)*10-11

(a) (b) (c)

Bivariate Normal Distribution

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non-defective

defective Detectable

Region

Non-detectable

Region

Delay(s)

0.06

0.04

0.02

0.12

0.1

0.08

0.14

1.2 1.4 1.6 1.8 2 2.2 2.4

3

2.8

2.6

2.4

2.2

2

1.8

1.6

1.4

1

1.2

Fig. 5. Case III shows overlapped stage-path delay distributions. (a) Path delay distributions for a stage-path with a defect-free and defective TSV.(b) Theirdelay distributions are mostly overlapping. (c) Contour plot from bivariate densities shows that most of the area is out of detectability region, thus resultingin a very low probability of detection.

IV. CASE STUDY

To illustrate the applicability and relevance of the proposedprobability metric, we use a sample circuit as shown inFigure 6. The given sample circuit is converted into a 3Dcircuit by introducing TSVs between gates to represent thelogic divided into two tiers. Please note that the sample circuitis combinational for simplicity reasons and our metric is ap-plicable to all types of circuits regardless the TSV distribution.We utilize TSVs of 3µm radius and 15µm depth, which theRLC parasitics have been characterized by [18]. We considerTSV-to-TSV coupling which is derived based on the proximitybetween TSVs with pitch of 50µm. We perform HSPICEsimulation on the sample circuit to capture the delay variationswith resistive open TSV. We measure the stage-path delaybetween points A and B as shown in Figure 6. Additionally,we consider electrical factors such as non-uniform powersupply voltages and ground bounce within 10% of VDD. Thecircuit was synthesized using 65nm Predictive TechnologyModel (PTM) [22] library and Synopsys Tetramax was utilizedto generate the input vectors for sensitizing the path withthe TSV. The applied input vectors for rising and fallingtransitions are (V1,V2)=(0011,1100) and (V1,V2)=(0001,1111),respectively.

Additionally, we utilize MATLAB to perform the mathemat-ical computations of our proposed formulas. Our objective is tocompare the results obtained from our mathematical formulasversus to the simulation results obtained from HSPICE. Theexperiment is performed assuming one of the TSV is defectiveas shown in Figure 6. Initially, we perform HSPICE simula-tions and measure stage-path delay as a function of variousresistive open values or defect sizes. From the mathematicalformulations, we can obtain the mean and standard deviationvalues for various resistive open values as shown in Figure 7. Itis important to note that stage-delay distributions for defectiveTSVs experience a significant increase in their means andsigmas with defect size (Ropen). In Figure 8a, we show thestage-path delay ratio obtained from defective TSV of varioussizes versus nominal delay obtained from HSPICE simulation.

In Figure 8b, we show the probability of detection, Pdet forvarious resistive open sizes obtained from our mathematicalformulations. From Figure 8a, we note that stage-path delays

passing the delay threshold line with condition, µdef≥DToccurs around resistance of 50kΩ, or Rfailure=50kΩ. Thisis also defined as CASE I in our analysis. Rfailure is alsocorrectly estimated using our mathematical formulas as shownin Figure 8b for Pdet = 1. Similarly, we estimate the de-tectable resistance, Rdetectable when probability of detection,Pdet = 0.5, which occurs around Rdetectable = 36kΩ. This isdefined as CASE II from our analysis. HSPICE simulationalso confirm such Rdectable value when the condition ofµdef = µD0 + 3σD0 is satisfied also as shown in Figure 8a.For CASE III, we identify the region of resistance open valuesless than Rdetectable. TABLE I summarizes the resistanceopen values based on the computed probabilities of detection.Figure 9 shows the joint density distribution and contour plotfor the case of Pdet = 0.5, which strongly confirms our derivedresults by 99.2% in accuracy. Half of the contour plot residesinside the non-detectable region bounded by delay thresholdlines.

Faulty TSV

Cc

TSV1

A

C

D

B

j3

j1j2

j4

Point A Point B

TSV2

O1

Fig. 6. Sample circuit used as a case study for computing probability ofdetection.

TABLE IPROBABILITY OF DETECTION, Pdet FOR RANGES OF RESISTIVE OPEN,

Ropen VALUES.

Ropenvalues Pdet

Ropen ≤ 36kΩ ≤ 50%Ropen = Rdetectable = 36kΩ 50%36kΩ < Ropen < 50kΩ 50% < Pdet < 100%Ropen ≥ 50kΩ 100%

V. CONCLUSION

This work proposes a probability based metric to detectresistive opens TSVs. This metric aims to derive a relationship

!

!

Resisitive Open (Ω) Resisitive Open (Ω)

μd

ef

ve

rsu

s μ

0

σd

ef

ve

rsu

s σ

0

(a) (b)

Fig. 7. Given the measured delay from HSPICE simulations we obtain(a) µdef /µ0 and (b) σdef /σ0 for various resistive open values.

(b)

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Ra

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Resisitive Open (Ω)

(a)

Resisitive Open (Ω)10k 20k 30k 40k 50k 60k

Rfa

ilu

re

Rd

ete

cta

ble

Rdetectable Rfailure

Fig. 8. (a) Stage-path delay ratio of defective TSVs with nominal delayobtained from HSPICE simulations, and (b) probability of detection, Pdet

for various resistive open values. We identify Rdetectable = 36kΩ whenPdet = 0.5 and Rfailure = 50kΩ.

between defect size and detectability screening resistive openvalues and associates a probability of detection to them.This allows to sort resistive opens in ranges of detectabilityi.e. detectable and non-detectable regions. Our probability ofdetection metric is based on the joint density distributions ofthe defect-free and defective stage-path delays for capturingtransition faults. Our proposed probability of detection metriccomputes with high accuracy the detectable and non-detectableregions for various resistive opens and the results matchwell HSPICE results our simulations provide 99.2% accuracy.As future work, we aim to exploit the probability metricto develop a TSV-aware detection method while taking intoaccount the physical and electrical factors on 3D ICs.

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(a) (b)

N(μ

de

f,σ

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s

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Bivariate Normal Distribution

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