course structure and syllabus i year i semester code … · advanced computer architecture 3 0 3...

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABADM. TECH (REAL TIME SYSTEMS)

COURSE STRUCTURE AND SYLLABUS

I YEAR I SEMESTERCode Group Subject L P Credits

Advanced Computer Architecture 3 0 3Advanced Micro Controllers 3 0 3Fundamentals of Real Time Systems 3 0 3Design & Development of Real Time Systems 3 0 3

Elective -I Digital Control SystemsDistributed Operating SystemsCloud Computing

3 0 3

Elective -II Digital Systems DesignFault Tolerant SystemsAdvanced Computer Networks

3 0 3

Lab Micro Processors and Programming Languages Lab0 3 2Seminar - - 2

Total Credits (6 Theory + 1 Lab.) 22

JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY HYDERABAD

MASTER OF TECHNOLOGY (REAL TIME SYSTEMS)

I SEMESTERADVANCED COMPUTER ARCHITECTURE

UNIT IConcept of instruction format and instruction set of a computer, types of operands and operations;addressing modes; processor organization, register organization and stack organization; instructioncycle; basic details of Pentium processor and power PC processor, RISC and CISC instruction set.UNIT IIMemory devices; Semiconductor and ferrite core memory, main memory, cache memory, associativememory organization; concept of virtual memory; memory organization and mapping; partitioning,demand paging, segmentation; magnetic disk organization, introduction to magnetic tape and CDROM.UNIT IIIIO Devices, Programmed IO, interrupt driver IO, DMA IO modules, IO addressing; IO channel, IOProcessor, DOT matrix printer, ink jet printer, laser printer.Advanced concepts; Horizontal and vertical instruction format, microprogramming, microinstructionsequencing and control; instruction pipeline; parallel processing; problems in parallel processing; datahazard, control hazard.UNIT IVILP software approach-complier techniques-static branch protection-VLIW approach-H.W support formore ILP at compile time-H.W verses S.W solutionsMultiprocessors and thread level parallelism-symmetric shared memory architectures-distributed sharedmemory-Synchronization-multi threading.UNIT VStorage System-Types-Buses-RAID-errors and failures-bench marking a storage device designing a I/Osystem.Inter connection networks and clusters-interconnection network media – practical issues ininterconnecting networks-examples-clusters-designing a cluster

Text Books:1. “Computer organization and architecture”, Williams Stallings, PHI of India, 1998.2. Computer organization, Carl Hamachar, Zvonko Vranesic and Safwat Zaky, McGraw Hill

International Edition.3. Computer Architecture & Organization, John P. Hayes, TMH III Edition.4. Computer Architecture A quantitative approach 3rd edition John L. Hannessy & David A. Patteson

Morgan Kufmann (An Imprint of Elsevier)

Reference Books:1. “Computer Architecture and parallel Processing” Kai Hwang and A. Briggs International

edition McGraw-Hill.2. Advanced Computer Architecture, Dezso Sima, Terence Fountain, Peter Kacsuk, Pearson.


MASTER OF TECHNOLOGY (REAL TIME SYSTEMS)I SEMESTER

ADVANCED MICRO CONTROLLERS

UNIT IINTRODUCTION TO EMBEDDED SYSTEMSReview of Micro controllers and their Features. 8 & 16 Bit Micro Controller Families (of Intel 8051)FlashSeries, Motorola 68HC11; Micro Chip PIC 16C6X and Micro controller hardware, Embedded RISCProcessor Architectures – ARM6TDMI (Advanced RISC Machines).UNIT IIMICRO CONTROLLER INTERFACING8051, 68HC11, PIC-16C6X and ATMEL External Memory Interfacing – Memory Management Unit,Instruction and data cache, memory controller.On Chip Counters, Timers, Serial I/O Interrupts and their use. PWM /Watch dog, ISP, IAP features.UNIT IIIPROGRAMMINGInstruction sets and assembly language programme concepts and programming the 8051, 68HC11, PIC-16C6X Micro Controller ARM6TDMI Core (SOC) and PIC-IDE.UNIT IVInterrupt synchronization – Interrupt vectors & Priority, external interrupt design. Serial I/O DevicesRS232 Specifications, RS422/Apple Talk / RS423/ RS435 & other communication protocols. Serialcommunication controller.Ethernet Protocol, SDMA, Channels and IDMA simulation, CPM Interrupt controller and CPM Timers.UNIT VPower Controls, External BUS Interface system Development and Debugging.CASE STUDIES: Design and Embedded Systems using the Micro Controller – 8051/ARM6TDMI, forapplication in the area of Communications, Automotives, industrial control.

Text Books:1. M.A.Mazadi & J.G. Mazidi, “The 8051 Micro Controller & Embedded Systems”, Pearson

Education, Asia (2000).2. John B. Peatman, Designing with PIC Micro Controllers, Pearson Education.3. Jonathan W. Valvano, Embedded Microcomputer Systems, Real Time Interfacing. Brookes/Cole,

Thomas learning 1999.4. Cathey May and Silha5. (Ed)., “The Power PC Architecture”, Morgan Kauffman Press (1998).


MASTER OF TECHNOLOGY (REAL TIME SYSTEMS)I SEMESTER

FUNDAMENTALS OF REAL TIME SYSTEMS

UNIT IIntroduction, A Car-and-Driver Example, Issues in Real-Time Computing, Structure of a Real-TimeSystems, Task Classes, Issues Covered in this Book, Characterizing Real-time Systems and Tasks,Performance Measures for Real-Time Systems, Estimating Program Run Times, Suggestions forFurther Reading.Task Assignment and SchedulingIntroduction, Classical Uniprocessor Scheduling Algorithms, Uniprocessor Scheduling of IRIS Tasks,Task Assignment, Mode Changes, Fault-Tolerant Scheduling, Suggestions for Further Reading.UNIT IIProgramming Languages and ToolsIntroduction, Desired Language Characteristics, Data Typing, Control Structures, FacilitatingHierarchical Decomposition, Packages, Run-time Error (Exception) Handling, Overloading andGenerics, Multitasking, Low-Level Programming, Task Scheduling, Timing Specifications, SomeExperimental Languages, Programming Environments, Run-time support, Suggestion for Furtherreading.UNIT IIIReal-Time DatabasesIntroduction, Basic Definitions, Real-Time vs General-Purpose Databases, Main Memory Databases,Transaction Priorities, Transaction Aborts, Concurrency Control Issues, Disk Scheduling algorithms, Atwo-phase approach to improve predictability. Maintaining Serialization Consistency, Databases forHard Real – Time systems. Suggestion for further reading.Real time CommunicationIntroduction, Network Topologies, Protocols, suggestions for Further ReadingUNIT IVFault- Tolerance TechniquesIntroduction, What Causes Failures? Fault Types, Fault Detection, Fault and Error Containment,Redundancy, Data Diversity, Reversal Checks, Malicious or Byzantine Failures, Integrated Failurehandling, Suggestions for further reading.UNIT VReliability Evaluation TechniquesIntroduction, Obtaining Parameter Values, Reliability Models for Hardware Redundancy, Software-Error Models, Taking time into account, Suggestions for further readingClock SynchronizationIntroduction, Clocks, A Nonfault-Tolerant Synchronization algorithm, Impact of faults, fault-tolerantsynchronization in hardware, Synchronization in software, Suggestion for further reading

Text Books:Real Time Systmes, Krishna C.M & Kand Shin G. Mc Graw Hill, 1997, L.R. Rabiner & R. W. Schafe



I SEMESTERDESIGN & DEVELOPMENT OF REAL TIME SYSTEMS

UNIT IIntroduction to Real-Time SystemsHistorical background, Elements of a computer control systems, Real-Time Systems-definition, Classification of real-time systems, Time constraints, Classification of programs,Summary.Concepts of Computer controlIntroduction, Sequence control, Loop control (direct digital control), Supervisory control,Centralized computer control, Hierarchical systems, Distributed systems, Human-ComputerInterface (HCI), the control engineer, Economics and benefits of computer control systems,Summary.

UNIT IIComputer Hardware Requirements for Real-Time applicationsIntroductionGeneral purpose computer, Single-chip microcomputers and microcontrollers, SpecializationProcessor, Process-related Interfaces, Data Transfer techniques, Communications, StandardInterface, Summary.DDC Algorithms and Their ImplementationIntroduction, Implementation for the Basic PID algorithm, Synchronization of the control loop.

UNIT IIIBumpless transfer, Saturation and integral action wind-up, Tuning Choice of sampling interval,Plant input and output, improved forms of algorithm for integral and derivative calculation,Implementation of controller designs based on plant models, SummaryDesign of Real-Time Systems – General IntroductionIntroduction, Specification document, Preliminary design, Single-program ApproachForeground/Background system, Multi-tasking approach, Mutual exclusion, Monitors,Rendezvous, Summary.

UNIT IVReal-Time System Development Methodologies – 1Introduction, Yourdon methodology, Requirements definition for drying oven, Ward andMellor method, Hatley and Pirbhai method, Comments and the Yourdon MethodologiessummaryReal-Time System Development Methodologies -2MASCOT, Basic features of MASCOT, General design approach, Textual representation ofMASCOT designs, Other features of MASCOT, Development facilities, The MASCOTKernel, Summary of MASCOT, Formal Methods, The PAISLey system for real-time softwaredevelopment method, PAISLey summary, Summary.

UNIT VDependability, Fault detection and fault toleranceIntroduction, USE of Redundancy, Fault tolerance in Mixed Hardware-Software systems, Faultdetection measures, Fault detection mechanisms, Damage containment and assessmentProvision of fault tolerance, summary

Text Books:Real Time Computer control, Stuart Bennett, 2nd edition, Pearson Education

Reference BooksReal-Time Systems Design and Analysis by Phillip A Laplante



I SEMESTER ELECTIVE - IDIGITAL CONTROL SYSTEMS

UNIT ISAMPLING AND RECONTRUCTIONIntroduction, Examples of Data Control Systems – Digital to Analog conversion and Analog toDigital conversion, sample and hold operations.

UNIT IITHE Z - TRANSFORMSIntroduction, Linear difference equations, pulse response, Z-transforms, Theorems of Z-Transforms, the inverse Z – transforms, Modified Z –Transforms.Z-PLANE ANALYSIS OF DISCRETE-TIME CONTROL SYSTEMSZ-Transform method for solving difference equations, Pulse transforms function, blockdiagram analysis of sampled – data systems, mapping between s-plane and z-plane.

UNIT IIISTATE SPACE ANALYSISState Space Representation of discrete time systems, Pulse Transfer Function Matrix solvingdiscrete time state space equations, State transition matrix and it’s Properties, Methods forComputation of State Transition Matrix, Discretization of continuous time state-spaceequations

UNIT IVCONTROLLABILITY AND OBSERVABILITYConcepts of Controllability and Observability, Tests for controllability and Observability.Duality between Controllability and Observability, Controllability and Observabilityconditions for Pulse Transfer Function.STABILITY ANALYSISMapping between the S-Plane and the Z-Plane – Primary strips and Complementary Strips –Constant frequency loci, Constant damping ratio loci, Stability Analysis of closed loop systemsin the Z-Plane. Jury stability test – Stability Analysis by use of the Bilinear Transformationand Routh Stability criterion.

UNIT VDESIGN OF DISCRETE TIME CONTROL SYSTEM BY CONVENTIONAL METHODSTransient and steady – State response Analysis – Design based on the frequency responsemethod – Bilinear Transformation and Design procedure in the w-plane, Lead Lag and Lead-Lag compensators and digital PID controllers.STATE FEEDBACK CONTROLLERS AND OBSERVERSDesign of state feedback controller through pole placement – Necessary and sufficientconditions, Ackerman’s formula State Observers – Full order and Reduced order observers.

Text Books1. Discrete-time Control systems – K. Ogata, Pearson Education/PHI, 2nd Edition2. Digital Control and State Variable Methods by M.Gopal, TMH

References:1. Digital Control Systems, Kuo Oxford University Press 2nd Edition 20032. Digital Control Engineering, M.Gopal



I SEMESTER ELECTIVE - IDISTRIBUTED OPERATING SYSTEMS

UNIT ICharacteristics of Distributed Systems, Design Issues, User requirements, NetworkTechnologies and Protocols, IPC, Client-server Communication, Group communications, IPCin UNIX.Remote Procedure calling Design issue, implementation, Asynchronous RPC

UNIT IIDistributed OS, its Kernel, Processor and Threads, Naming and Protection, Communicationand Invocation, Virtual memory, File service components, Design issues, Interfaces,Implementation techniques, SUN Network File System.

UNIT IIISNS – a name service model, its design issues, Synchronizing physical clocks, Logical timeand logical clocks, Distributed coordination, Replication and its architectural model,Consistency and request ordering, Conversation between a client and a server, Transactions,Nested TransactionsConcurrency control, Locks, Optimistic concurrency control, Timestamp ordering, Comparisonof methods for concurrency control.

UNIT IVDistributed Transactions and Nested Transactions Atomic commit protocols, Concurrencycontrol in distributed transactions, distributed Deadlocks, Transactions with replicated data,Transaction recovery, Fault Tolerance, Hierarchical and group masking of faults

UNIT VCryptography, Authentication and Key distribution, Logics and Authentication, DigitalSignatures.Distributed shared memory, Design and Implementation issues, sequential consistency and ivy,Release consistency and Munin, Overview of Distributed Operating systems Mach, Chorus.

Text Books:1. Distributed Systems Concepts and Design, g. Coulouris, J. Dollimore and T Kindberg,

Second Edition, Addison Wesley.

References:1. Advanced Concepts in Operating Systems, M. Sighal, N.G Shivarathri, Tata McGraw-

Hill Edition.



I SEMESTER ELECTIVE - I

CLOUD COMPUTINGUNIT – IIntroduction to virtualization and virtual machine, Virtualization in cluster/grid contextVirtual network, Information model & data model for virtual machine, Software as a Service(SaaS), SOA, On Demand Computing.

UNIT – IICloud computing: Introduction, What it is and What it isn’t, from Collaborations to Cloud,

Cloud application architectures, Value of cloud computing, Cloud Infrastructure models,Scaling a Cloud Infrastructure, Capacity Planning, Cloud Scale.

UNIT – IIIData Center to Cloud: Move into the Cloud, Know Your Software Licenses, The Shift to aCloud Cost Model, Service Levels for Cloud ApplicationsSecurity: Disaster Recovery, Web Application Design, Machine Image Design, PrivacyDesign,Database Management, Data Security, Network Security, Host Security, CompromiseResponse

UNIT – IVDefining Clouds for the Enterprise- Storage-as-a-Service, Database-as-a-Service, Information-as-a-Service, Process-as-a-Service, Application-as-a-Service, Platform-as-a-Service,Integration-as-a-Service, Security-as-a-Service, Management/Governance-as-a-Service,Testing-as-a-Service, Infrastructure-as-a-Service

UNIT – VDisaster Recovery, Disaster Recovery, Planning, Cloud Disaster ManagementCase study: Types of Clouds, Cloudcentres in detail, Comparing approaches, XenOpenNEbula , Eucalyptus, Amazon, Nimbus

Text Books:1. Cloud Computing – Web Based Applications That Change the way you Work and

Collaborate Online – Michael Miller, Pearson Education.2. Cloud Application Architectures, 1st Edition by George Reese O'Reilly Media.

Reference Book:1. Cloud Computing and SOA Convergence in Your Enterprise: A Step-by-Step Guide

David S. Linthicum Addison-Wesley Professional.2. Enterprise Web 2.0 Fundamentals by Krishna Sankar; Susan A. Bouchard, Cisco

Press



I SEMESTER ELECTIVE - IIDIGITAL SYSTEMS DESIGN

UNIT IDESIGN OF DIGITAL SYSTEMS: ASM charts, Hardware description language and controlsequence method, Reduction of state tables, state assignments.SEQUENTIAL CIRCUIT DESIGN: design of Iterative circuits, design of sequential circuitsusing ROMs and PLAs, sequential circuit design using CPLD, FPGAs.

UNIT IIFAULT MODELING: Fault classes and models – Stuck at faults, bridging faults, transitionand intermittent faults.TEST GENERATION: Fault diagnosis of Combinational circuits by conventional methods –Path Sensitization techniques, Booleam difference method, Kohavi algorithm.

UNIT IIITEST PATTERN GENERATION: D-Algorithm, PODEM, Random testing, Transition counttesting, Signature analysis and testing for bridging faults.FAULT DIAGNOSIS IN SEQUNTIAL CIRCUITS: State identification and fault detectionexperiment, Machine identification, Design of fault detection experiment.

UNIT IVPROGRAMING LOGIC ARRAYS: Design using PLA’s, PLA minimization and PLA folding.PLA TESTING: Fault models, Test generation and Testable PLA design.

UNIT VASYNCHRONOUS SEQUENTIAL MACHINE: Fundamental mode model, flow table, statereduction, minimal closed covers, races, cycles and hazards.

Text Books1. Z. Kohavi – “Switching & finite Automata Theory” (TMH)2. N.N. Biswas – “Logic Design Theory (PHI)3. Nolman Balabanian, Bradly Calson Logic Design Principles” – Wily student Edition

2004.

References:1. M. Abramovici, M.A. Breues, A.D. Friedman – “Digital System Testing and Testable

Design”, Jaico Publications.2. Charles H. Roth Jr. – “Fundamentals of Logic Design”. Frederick J.Hill & Peterson –

“Computer Aided Logic Design” – Wiley 4th Edition



I SEMESTER ELECTIVE - IIFAULT TOLERANT SYSTEMS

UNIT IBasic ConceptsFailure and Faults, reliability and failure rate, relation between eligibility and Mean-timebetween failures, maintainability and availability, reliability and series and parallel systems,Modeling of faults, stuc at, Bridging (short circuit), stuck open, transient and intermittentfaults.Fault diagnosis of digital systems, Test generation for combinational logic circuitsconventional methods, Random testing, transition count testing and signature analysis

UNIT IIBasic concepts – static, dynamic, Hybrid, and self-purging redundancy, shift – over ModularRedundancy (SMR). Tripte Modular redundancy, SMR.Reconfiguration, use of error correcting codes, Time redundancy, software redundancy, failsoft-operation examples of practical fault tolerant systems, Introduction to fault TolerantDesign of VLSI chips.

UNIT IIIDesign of Totally self-checking checkers, checkers using m-out of n codes, Berger codes andlow cost residue code. Self-checking sequential Machines, Partially self checking circuits.

UNIT IVBasic Concepts of test ability, controllability and observability. The read muller expansiontechnique, three level OR-AND-OR design, use of control logic and syndrome-testable design.

UNIT VDesign of Testable Sequential circuits the scan-path technique – leel sensitive scan design(LSSD) and Random Access scan technique, built-in-test, built-in-test of VLSI chips, designfor autonomous self-test, Designing Testability into logic Boards. .

Text Books1. Fault Tolerant and Fault testable hardware design, Parag K.Lala PHI 1985

References Books:1. Digital systems design using PLD’s LALA, PHI 19902. Logic Design theory, N.N. Biswas, PHI 1990


MASTER OF TECHNOLOGY (REAL TIME SYSTEMS)I SEMESTER ELECTIVE - II

ADVANCED COMPUTER NETWORKSUNIT I ReviewComputer Networks and the Internet: What is the Internet, The Network edge, The Network core,Access Networks and Physical media, ISPs and Internet Backbones, Delay and Loss in Packet-Switched Networks, History of Computer Networking and the Internet - Foundation of NetworkingProtocols: 5-layer TCP/IP Model, 7-Layer OSI Model, Internet Protocols and Addressing, Equal-SizedPackets Model: ATM - Networking Devices: Multiplexers, Modems and Internet Access Devices,Switching and Routing Devices, Router Structure.

UNIT IIThe Link Layer and Local Area Networks: Link Layer: Introduction and Services, Error-Detectionand Error-Correction techniques, Multiple Access Protocols, Link Layer Addressing, Ethernet,Interconnections: Hubs and Switches, PPP: The Point-to-Point Protocol, Link Virtualization - Routingand Internetworking: Network–Layer Routing, Least-Cost-Path algorithms, Non-Least-Cost-Pathalgorithms, Intradomain Routing Protocols, Interdomain Routing Protocols, Congestion Control atNetwork Layer

UNIT IIILogical Addressing: IPv4 Addresses, IPv6 Addresses - Internet Protocol: Internetworking, IPv4,IPv6, Transition from IPv4 to IPv6 – Multicasting Techniques and Protocols: Basic Definitions andTechniques, Intradomain Multicast Protocols, Interdomain Multicast Protocols, Node-Level Multicastalgorithms - Transport and End-to-End Protocols: Transport Layer, Transmission Control Protocol(TCP), User Datagram Protocol (UDP), Mobile Transport Protocols, TCP Congestion Control –Application Layer: Principles of Network Applications, The Web and HTTP, File Transfer: FTP,Electronic Mail in the Internet, Domain Name System (DNS), P2P File Sharing, Socket Programmingwith TCP and UDP, Building a Simple Web Server

UNIT IVWireless Networks and Mobile IP: Infrastructure of Wireless Networks, Wireless LAN Technologies,IEEE 802.11 Wireless Standard, Cellular Networks, Mobile IP, Wireless Mesh Networks (WMNs) -Optical Networks and WDM Systems: Overview of Optical Networks, Basic Optical NetworkingDevices, Large-Scale Optical Switches, Optical Routers, Wavelength Allocation in Networks, CaseStudy: An All-Optical Switch

UNIT VVPNs, Tunneling and Overlay Networks: Virtual Private Networks (VPNs), MultiprotocolLabel Switching (MPLS), Overlay Networks – VoIP and Multimedia Networking: Overview of IPTelephony, VoIP Signaling Protocols, Real-Time Media Transport Protocols, Distributed MultimediaNetworking, Stream Control Transmission Protocol - Mobile A-Hoc Networks: Overview of WirelessAd-Hoc Networks, Routing in Ad-Hoc Networks, Routing Protocols for Ad-Hoc Networks – WirelessSensor Networks: Sensor Networks and Protocol Structures, Communication Energy Model,Clustering Protocols, Routing Protocols

TEXT BOOKS:1. Computer Networking: A Top-Down Approach Featuring the Internet, James F. Kurose, Keith

W.Ross, Third Edition, Pearson Education, 20072. Computer and Communication Networks, Nader F. Mir, Pearson Education, 2007

REFERENCES:1. Data Communications and Networking, Behrouz A. Forouzan, Fourth Edition, Tata

McGraw Hill, 20072. Guide to Networking Essentials, Greg Tomsho,Ed Tittel, David Johnson,Fifth Edition,

Thomson.3. An Engineering Approach to Computer Networking , S.Keshav, Pearson Education.4. Campus Network Design Fundamentals, Diane Teare, Catherine Paquet, Pearson

Education (CISCO Press)5. Computer Networks, Andrew S. Tanenbaum, Fourth Edition, Prentice Hall.6. The Internet and Its Protocols,A.Farrel,Elsevier.



I SEMESTER

MICROPROCESSORS AND PROGRAMMING LANGUAGE LAB

1. 8259 – Interrupt Controller2. 8279 – Keyboard display3. 8255 – PPI4. 8251 – USART5. Reading and Writing on a parallel port6. Timer in different modes7. Serial communication implementation8. Exercise on C++, prolog, lisp and similar languages

course structure and syllabus i year i semester code … · advanced computer architecture 3 0 3...

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